2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2018 The FreeBSD Foundation
5 * Copyright (c) 1992 Terrence R. Lambert.
6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
9 * This code is derived from software contributed to Berkeley by
12 * Portions of this software were developed by A. Joseph Koshy under
13 * sponsorship from the FreeBSD Foundation and Google, Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
44 #include <sys/cdefs.h>
46 #include "opt_atpic.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_perfmon.h"
54 #include "opt_platform.h"
56 #include <sys/param.h>
58 #include <sys/systm.h>
62 #include <sys/callout.h>
65 #include <sys/eventhandler.h>
67 #include <sys/imgact.h>
69 #include <sys/kernel.h>
71 #include <sys/linker.h>
73 #include <sys/malloc.h>
74 #include <sys/memrange.h>
75 #include <sys/msgbuf.h>
76 #include <sys/mutex.h>
78 #include <sys/ptrace.h>
79 #include <sys/reboot.h>
81 #include <sys/rwlock.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
85 #include <sys/syscallsubr.h>
86 #include <sys/sysctl.h>
87 #include <sys/sysent.h>
88 #include <sys/sysproto.h>
89 #include <sys/ucontext.h>
90 #include <sys/vmmeter.h>
93 #include <vm/vm_param.h>
94 #include <vm/vm_extern.h>
95 #include <vm/vm_kern.h>
96 #include <vm/vm_page.h>
97 #include <vm/vm_map.h>
98 #include <vm/vm_object.h>
99 #include <vm/vm_pager.h>
100 #include <vm/vm_phys.h>
101 #include <vm/vm_dumpset.h>
105 #error KDB must be enabled in order for DDB to work!
108 #include <ddb/db_sym.h>
113 #include <net/netisr.h>
115 #include <dev/smbios/smbios.h>
117 #include <machine/bootinfo.h>
118 #include <machine/clock.h>
119 #include <machine/cpu.h>
120 #include <machine/cputypes.h>
121 #include <machine/intr_machdep.h>
123 #include <machine/md_var.h>
124 #include <machine/metadata.h>
125 #include <machine/pc/bios.h>
126 #include <machine/pcb.h>
127 #include <machine/pcb_ext.h>
128 #include <machine/proc.h>
129 #include <machine/sigframe.h>
130 #include <machine/specialreg.h>
131 #include <machine/sysarch.h>
132 #include <machine/trap.h>
133 #include <x86/ucode.h>
134 #include <machine/vm86.h>
135 #include <x86/init.h>
137 #include <machine/perfmon.h>
140 #include <machine/smp.h>
147 #include <x86/apicvar.h>
151 #include <x86/isa/icu.h>
154 /* Sanity check for __curthread() */
155 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
157 register_t init386(int first);
158 void dblfault_handler(void);
159 void identify_cpu(void);
161 static void cpu_startup(void *);
162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
164 /* Intel ICH registers */
165 #define ICH_PMBASE 0x400
166 #define ICH_SMI_EN ICH_PMBASE + 0x30
168 int _udatasel, _ucodesel;
170 static int above4g_allow = 1;
171 static int above24g_allow = 0;
177 int late_console = 1;
180 FEATURE(pae, "Physical Address Extensions");
183 struct kva_md_info kmi;
185 static struct trapframe proc0_tf;
186 struct pcpu __pcpu[MAXCPU];
188 static void i386_clock_source_init(void);
192 struct mem_range_softc mem_range_softc;
194 extern char start_exceptions[], end_exceptions[];
196 extern struct sysentvec elf32_freebsd_sysvec;
198 /* Default init_ops implementation. */
199 struct init_ops init_ops = {
200 .early_clock_source_init = i386_clock_source_init,
201 .early_delay = i8254_delay,
205 i386_clock_source_init(void)
211 cpu_startup(void *dummy)
217 * On MacBooks, we need to disallow the legacy USB circuit to
218 * generate an SMI# because this can cause several problems,
219 * namely: incorrect CPU frequency detection and failure to
221 * We do this by disabling a bit in the SMI_EN (SMI Control and
222 * Enable register) of the Intel ICH LPC Interface Bridge.
224 sysenv = kern_getenv("smbios.system.product");
225 if (sysenv != NULL) {
226 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
227 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
228 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
229 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
230 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
231 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
232 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
233 strncmp(sysenv, "Macmini1,1", 10) == 0) {
235 printf("Disabling LEGACY_USB_EN bit on "
237 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
243 * Good {morning,afternoon,evening,night}.
247 panicifcpuunsupported();
253 * Display physical memory if SMBIOS reports reasonable amount.
256 sysenv = kern_getenv("smbios.memory.enabled");
257 if (sysenv != NULL) {
258 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
261 if (memsize < ptoa((uintmax_t)vm_free_count()))
262 memsize = ptoa((uintmax_t)Maxmem);
263 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
264 realmem = atop(memsize);
267 * Display any holes after the first chunk of extended memory.
272 printf("Physical memory chunk(s):\n");
273 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
276 size = phys_avail[indx + 1] - phys_avail[indx];
278 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
279 (uintmax_t)phys_avail[indx],
280 (uintmax_t)phys_avail[indx + 1] - 1,
281 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
285 vm_ksubmap_init(&kmi);
287 printf("avail memory = %ju (%ju MB)\n",
288 ptoa((uintmax_t)vm_free_count()),
289 ptoa((uintmax_t)vm_free_count()) / 1048576);
292 * Set up buffers, so they can be used to read disk labels.
295 vm_pager_bufferinit();
307 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
309 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
310 * instructions. We must set the CR0_MP bit and use the CR0_TS
311 * bit to control the trap, because setting the CR0_EM bit does
312 * not cause WAIT instructions to trap. It's important to trap
313 * WAIT instructions - otherwise the "wait" variants of no-wait
314 * control instructions would degenerate to the "no-wait" variants
315 * after FP context switches but work correctly otherwise. It's
316 * particularly important to trap WAITs when there is no NPX -
317 * otherwise the "wait" variants would always degenerate.
319 * Try setting CR0_NE to get correct error reporting on 486DX's.
320 * Setting it should fail or do nothing on lesser processors.
322 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
327 u_long bootdev; /* not a struct cdev *- encoding is different */
328 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
329 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
332 * Initialize 386 and configure to run kernel
336 * Initialize segments & interrupt table
341 struct mtx dt_lock; /* lock for GDT and LDT */
343 union descriptor gdt0[NGDT]; /* initial global descriptor table */
344 union descriptor *gdt = gdt0; /* global descriptor table */
346 union descriptor *ldt; /* local descriptor table */
348 static struct gate_descriptor idt0[NIDT];
349 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
351 static struct i386tss *dblfault_tss;
352 static char *dblfault_stack;
354 static struct i386tss common_tss0;
356 vm_offset_t proc0kstack;
359 * software prototypes -- in more palatable form.
361 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
362 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
364 struct soft_segment_descriptor gdt_segs[] = {
365 /* GNULL_SEL 0 Null Descriptor */
371 .ssd_xx = 0, .ssd_xx1 = 0,
374 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
376 .ssd_limit = 0xfffff,
377 .ssd_type = SDT_MEMRWA,
380 .ssd_xx = 0, .ssd_xx1 = 0,
383 /* GUFS_SEL 2 %fs Descriptor for user */
385 .ssd_limit = 0xfffff,
386 .ssd_type = SDT_MEMRWA,
389 .ssd_xx = 0, .ssd_xx1 = 0,
392 /* GUGS_SEL 3 %gs Descriptor for user */
394 .ssd_limit = 0xfffff,
395 .ssd_type = SDT_MEMRWA,
398 .ssd_xx = 0, .ssd_xx1 = 0,
401 /* GCODE_SEL 4 Code Descriptor for kernel */
403 .ssd_limit = 0xfffff,
404 .ssd_type = SDT_MEMERA,
407 .ssd_xx = 0, .ssd_xx1 = 0,
410 /* GDATA_SEL 5 Data Descriptor for kernel */
412 .ssd_limit = 0xfffff,
413 .ssd_type = SDT_MEMRWA,
416 .ssd_xx = 0, .ssd_xx1 = 0,
419 /* GUCODE_SEL 6 Code Descriptor for user */
421 .ssd_limit = 0xfffff,
422 .ssd_type = SDT_MEMERA,
425 .ssd_xx = 0, .ssd_xx1 = 0,
428 /* GUDATA_SEL 7 Data Descriptor for user */
430 .ssd_limit = 0xfffff,
431 .ssd_type = SDT_MEMRWA,
434 .ssd_xx = 0, .ssd_xx1 = 0,
437 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
439 .ssd_limit = 0xfffff,
440 .ssd_type = SDT_MEMRWA,
443 .ssd_xx = 0, .ssd_xx1 = 0,
446 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
449 .ssd_limit = sizeof(struct i386tss)-1,
450 .ssd_type = SDT_SYS386TSS,
453 .ssd_xx = 0, .ssd_xx1 = 0,
456 /* GLDT_SEL 10 LDT Descriptor */
458 .ssd_limit = sizeof(union descriptor) * NLDT - 1,
459 .ssd_type = SDT_SYSLDT,
462 .ssd_xx = 0, .ssd_xx1 = 0,
465 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
467 .ssd_limit = (512 * sizeof(union descriptor)-1),
468 .ssd_type = SDT_SYSLDT,
471 .ssd_xx = 0, .ssd_xx1 = 0,
474 /* GPANIC_SEL 12 Panic Tss Descriptor */
476 .ssd_limit = sizeof(struct i386tss)-1,
477 .ssd_type = SDT_SYS386TSS,
480 .ssd_xx = 0, .ssd_xx1 = 0,
483 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
485 .ssd_limit = 0xfffff,
486 .ssd_type = SDT_MEMERA,
489 .ssd_xx = 0, .ssd_xx1 = 0,
492 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
494 .ssd_limit = 0xfffff,
495 .ssd_type = SDT_MEMERA,
498 .ssd_xx = 0, .ssd_xx1 = 0,
501 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
503 .ssd_limit = 0xfffff,
504 .ssd_type = SDT_MEMRWA,
507 .ssd_xx = 0, .ssd_xx1 = 0,
510 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
512 .ssd_limit = 0xfffff,
513 .ssd_type = SDT_MEMRWA,
516 .ssd_xx = 0, .ssd_xx1 = 0,
519 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
521 .ssd_limit = 0xfffff,
522 .ssd_type = SDT_MEMRWA,
525 .ssd_xx = 0, .ssd_xx1 = 0,
528 /* GNDIS_SEL 18 NDIS Descriptor */
534 .ssd_xx = 0, .ssd_xx1 = 0,
539 static struct soft_segment_descriptor ldt_segs[] = {
540 /* Null Descriptor - overwritten by call gate */
546 .ssd_xx = 0, .ssd_xx1 = 0,
549 /* Null Descriptor - overwritten by call gate */
555 .ssd_xx = 0, .ssd_xx1 = 0,
558 /* Null Descriptor - overwritten by call gate */
564 .ssd_xx = 0, .ssd_xx1 = 0,
567 /* Code Descriptor for user */
569 .ssd_limit = 0xfffff,
570 .ssd_type = SDT_MEMERA,
573 .ssd_xx = 0, .ssd_xx1 = 0,
576 /* Null Descriptor - overwritten by call gate */
582 .ssd_xx = 0, .ssd_xx1 = 0,
585 /* Data Descriptor for user */
587 .ssd_limit = 0xfffff,
588 .ssd_type = SDT_MEMRWA,
591 .ssd_xx = 0, .ssd_xx1 = 0,
599 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
603 off = func != NULL ? (uintptr_t)func + setidt_disp : 0;
604 setidt_nodisp(idx, off, typ, dpl, selec);
608 setidt_nodisp(int idx, uintptr_t off, int typ, int dpl, int selec)
610 struct gate_descriptor *ip;
613 ip->gd_looffset = off;
614 ip->gd_selector = selec;
620 ip->gd_hioffset = ((u_int)off) >> 16 ;
624 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
625 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
626 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
627 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
633 IDTVEC(xen_intr_upcall),
635 IDTVEC(int0x80_syscall);
639 * Display the index and function name of any IDT entries that don't use
640 * the default 'rsvd' entry point.
642 DB_SHOW_COMMAND_FLAGS(idt, db_show_idt, DB_CMD_MEMSAFE)
644 struct gate_descriptor *ip;
646 uintptr_t func, func_trm;
650 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
651 if (ip->gd_type == SDT_SYSTASKGT) {
652 db_printf("%3d\t<TASK>\n", idx);
654 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
655 if (func >= PMAP_TRM_MIN_ADDRESS) {
661 if (func != (uintptr_t)&IDTVEC(rsvd)) {
662 db_printf("%3d\t", idx);
663 db_printsym(func, DB_STGY_PROC);
665 db_printf(" (trampoline %#x)",
674 /* Show privileged registers. */
675 DB_SHOW_COMMAND_FLAGS(sysregs, db_show_sysregs, DB_CMD_MEMSAFE)
680 db_printf("idtr\t0x%08x/%04x\n",
681 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
683 db_printf("gdtr\t0x%08x/%04x\n",
684 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
685 db_printf("ldtr\t0x%04x\n", rldt());
686 db_printf("tr\t0x%04x\n", rtr());
687 db_printf("cr0\t0x%08x\n", rcr0());
688 db_printf("cr2\t0x%08x\n", rcr2());
689 db_printf("cr3\t0x%08x\n", rcr3());
690 db_printf("cr4\t0x%08x\n", rcr4());
691 if (rcr4() & CR4_XSAVE)
692 db_printf("xcr0\t0x%016llx\n", rxcr(0));
693 if (amd_feature & (AMDID_NX | AMDID_LM))
694 db_printf("EFER\t0x%016llx\n", rdmsr(MSR_EFER));
695 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
696 db_printf("FEATURES_CTL\t0x%016llx\n",
697 rdmsr(MSR_IA32_FEATURE_CONTROL));
698 if (((cpu_vendor_id == CPU_VENDOR_INTEL ||
699 cpu_vendor_id == CPU_VENDOR_AMD) && CPUID_TO_FAMILY(cpu_id) >= 6) ||
700 cpu_vendor_id == CPU_VENDOR_HYGON)
701 db_printf("DEBUG_CTL\t0x%016llx\n", rdmsr(MSR_DEBUGCTLMSR));
702 if (cpu_feature & CPUID_PAT)
703 db_printf("PAT\t0x%016llx\n", rdmsr(MSR_PAT));
706 DB_SHOW_COMMAND_FLAGS(dbregs, db_show_dbregs, DB_CMD_MEMSAFE)
709 db_printf("dr0\t0x%08x\n", rdr0());
710 db_printf("dr1\t0x%08x\n", rdr1());
711 db_printf("dr2\t0x%08x\n", rdr2());
712 db_printf("dr3\t0x%08x\n", rdr3());
713 db_printf("dr6\t0x%08x\n", rdr6());
714 db_printf("dr7\t0x%08x\n", rdr7());
717 DB_SHOW_COMMAND(frame, db_show_frame)
719 struct trapframe *frame;
721 frame = have_addr ? (struct trapframe *)addr : curthread->td_frame;
722 printf("ss %#x esp %#x efl %#x cs %#x eip %#x\n",
723 frame->tf_ss, frame->tf_esp, frame->tf_eflags, frame->tf_cs,
725 printf("err %#x trapno %d\n", frame->tf_err, frame->tf_trapno);
726 printf("ds %#x es %#x fs %#x\n",
727 frame->tf_ds, frame->tf_es, frame->tf_fs);
728 printf("eax %#x ecx %#x edx %#x ebx %#x\n",
729 frame->tf_eax, frame->tf_ecx, frame->tf_edx, frame->tf_ebx);
730 printf("ebp %#x esi %#x edi %#x\n",
731 frame->tf_ebp, frame->tf_esi, frame->tf_edi);
737 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
739 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
740 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
741 ssd->ssd_type = sd->sd_type;
742 ssd->ssd_dpl = sd->sd_dpl;
743 ssd->ssd_p = sd->sd_p;
744 ssd->ssd_def32 = sd->sd_def32;
745 ssd->ssd_gran = sd->sd_gran;
749 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
753 int i, insert_idx, physmap_idx;
755 physmap_idx = *physmap_idxp;
760 lim = 0x100000000; /* 4G */
761 if (pae_mode && above4g_allow)
762 lim = above24g_allow ? -1ULL : 0x600000000; /* 24G */
764 printf("%uK of memory above %uGB ignored, pae %d "
765 "above4g_allow %d above24g_allow %d\n",
766 (u_int)(length / 1024), (u_int)(lim >> 30), pae_mode,
767 above4g_allow, above24g_allow);
770 if (base + length >= lim) {
771 ign = base + length - lim;
773 printf("%uK of memory above %uGB ignored, pae %d "
774 "above4g_allow %d above24g_allow %d\n",
775 (u_int)(ign / 1024), (u_int)(lim >> 30), pae_mode,
776 above4g_allow, above24g_allow);
780 * Find insertion point while checking for overlap. Start off by
781 * assuming the new entry will be added to the end.
783 insert_idx = physmap_idx + 2;
784 for (i = 0; i <= physmap_idx; i += 2) {
785 if (base < physmap[i + 1]) {
786 if (base + length <= physmap[i]) {
790 if (boothowto & RB_VERBOSE)
792 "Overlapping memory regions, ignoring second region\n");
797 /* See if we can prepend to the next entry. */
798 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
799 physmap[insert_idx] = base;
803 /* See if we can append to the previous entry. */
804 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
805 physmap[insert_idx - 1] += length;
810 *physmap_idxp = physmap_idx;
811 if (physmap_idx == PHYS_AVAIL_ENTRIES) {
813 "Too many segments in the physical address map, giving up\n");
818 * Move the last 'N' entries down to make room for the new
821 for (i = physmap_idx; i > insert_idx; i -= 2) {
822 physmap[i] = physmap[i - 2];
823 physmap[i + 1] = physmap[i - 1];
826 /* Insert the new entry. */
827 physmap[insert_idx] = base;
828 physmap[insert_idx + 1] = base + length;
833 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
835 if (boothowto & RB_VERBOSE)
836 printf("SMAP type=%02x base=%016llx len=%016llx\n",
837 smap->type, smap->base, smap->length);
839 if (smap->type != SMAP_TYPE_MEMORY)
842 return (add_physmap_entry(smap->base, smap->length, physmap,
847 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
850 struct bios_smap *smap, *smapend;
853 * Memory map from INT 15:E820.
855 * subr_module.c says:
856 * "Consumer may safely assume that size value precedes data."
857 * ie: an int32_t immediately precedes SMAP.
859 smapsize = *((u_int32_t *)smapbase - 1);
860 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
862 for (smap = smapbase; smap < smapend; smap++)
863 if (!add_smap_entry(smap, physmap, physmap_idxp))
872 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
877 pmap_basemem_setup(basemem);
881 * Populate the (physmap) array with base/bound pairs describing the
882 * available physical memory in the system, then test this memory and
883 * build the phys_avail array describing the actually-available memory.
885 * If we cannot accurately determine the physical memory map, then use
886 * value from the 0xE801 call, and failing that, the RTC.
888 * Total memory size may be set by the kernel environment variable
889 * hw.physmem or the compile-time define MAXMEM.
891 * XXX first should be vm_paddr_t.
894 getmemsize(int first)
896 int has_smap, off, physmap_idx, pa_indx, da_indx;
898 vm_paddr_t physmap[PHYS_AVAIL_ENTRIES];
899 quad_t dcons_addr, dcons_size, physmem_tunable;
900 int hasbrokenint12, i, res __diagused;
902 struct vm86frame vmf;
903 struct vm86context vmc;
905 struct bios_smap *smap, *smapbase;
909 bzero(&vmf, sizeof(vmf));
910 bzero(physmap, sizeof(physmap));
914 * Tell the physical memory allocator about pages used to store
915 * the kernel and preloaded data. See kmem_bootstrap_free().
917 vm_phys_early_add_seg((vm_paddr_t)KERNLOAD, trunc_page(first));
919 TUNABLE_INT_FETCH("hw.above4g_allow", &above4g_allow);
920 TUNABLE_INT_FETCH("hw.above24g_allow", &above24g_allow);
923 * Check if the loader supplied an SMAP memory map. If so,
924 * use that and do not make any VM86 calls.
927 kmdp = preload_search_by_type("elf kernel");
929 kmdp = preload_search_by_type("elf32 kernel");
930 smapbase = (struct bios_smap *)preload_search_info(kmdp,
931 MODINFO_METADATA | MODINFOMD_SMAP);
932 if (smapbase != NULL) {
933 add_smap_entries(smapbase, physmap, &physmap_idx);
939 * Some newer BIOSes have a broken INT 12H implementation
940 * which causes a kernel panic immediately. In this case, we
941 * need use the SMAP to determine the base memory size.
944 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
945 if (hasbrokenint12 == 0) {
946 /* Use INT12 to determine base memory size. */
947 vm86_intcall(0x12, &vmf);
948 basemem = vmf.vmf_ax;
953 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
954 * the kernel page table so we can use it as a buffer. The
955 * kernel will unmap this page later.
958 smap = (void *)vm86_addpage(&vmc, 1, PMAP_MAP_LOW + ptoa(1));
959 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
960 KASSERT(res != 0, ("vm86_getptr() failed: address not found"));
964 vmf.vmf_eax = 0xE820;
965 vmf.vmf_edx = SMAP_SIG;
966 vmf.vmf_ecx = sizeof(struct bios_smap);
967 i = vm86_datacall(0x15, &vmf, &vmc);
968 if (i || vmf.vmf_eax != SMAP_SIG)
971 if (!add_smap_entry(smap, physmap, &physmap_idx))
973 } while (vmf.vmf_ebx != 0);
977 * If we didn't fetch the "base memory" size from INT12,
978 * figure it out from the SMAP (or just guess).
981 for (i = 0; i <= physmap_idx; i += 2) {
982 if (physmap[i] == 0x00000000) {
983 basemem = physmap[i + 1] / 1024;
988 /* XXX: If we couldn't find basemem from SMAP, just guess. */
998 * If we failed to find an SMAP, figure out the extended
999 * memory size. We will then build a simple memory map with
1000 * two segments, one for "base memory" and the second for
1001 * "extended memory". Note that "extended memory" starts at a
1002 * physical address of 1MB and that both basemem and extmem
1003 * are in units of 1KB.
1005 * First, try to fetch the extended memory size via INT 15:E801.
1007 vmf.vmf_ax = 0xE801;
1008 if (vm86_intcall(0x15, &vmf) == 0) {
1009 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1012 * If INT15:E801 fails, this is our last ditch effort
1013 * to determine the extended memory size. Currently
1014 * we prefer the RTC value over INT15:88.
1018 vm86_intcall(0x15, &vmf);
1019 extmem = vmf.vmf_ax;
1021 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1026 * Special hack for chipsets that still remap the 384k hole when
1027 * there's 16MB of memory - this really confuses people that
1028 * are trying to use bus mastering ISA controllers with the
1029 * "16MB limit"; they only have 16MB, but the remapping puts
1030 * them beyond the limit.
1032 * If extended memory is between 15-16MB (16-17MB phys address range),
1035 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1039 physmap[1] = basemem * 1024;
1041 physmap[physmap_idx] = 0x100000;
1042 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1046 * Now, physmap contains a map of physical memory.
1050 /* make hole for AP bootstrap code */
1051 alloc_ap_trampoline(physmap, &physmap_idx);
1055 * Maxmem isn't the "maximum memory", it's one larger than the
1056 * highest page of the physical address space. It should be
1057 * called something like "Maxphyspage". We may adjust this
1058 * based on ``hw.physmem'' and the results of the memory test.
1060 * This is especially confusing when it is much larger than the
1061 * memory size and is displayed as "realmem".
1063 Maxmem = atop(physmap[physmap_idx + 1]);
1066 Maxmem = MAXMEM / 4;
1069 if (TUNABLE_QUAD_FETCH("hw.physmem", &physmem_tunable))
1070 Maxmem = atop(physmem_tunable);
1073 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
1074 * the amount of memory in the system.
1076 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
1077 Maxmem = atop(physmap[physmap_idx + 1]);
1080 * The boot memory test is disabled by default, as it takes a
1081 * significant amount of time on large-memory systems, and is
1082 * unfriendly to virtual machines as it unnecessarily touches all
1085 * A general name is used as the code may be extended to support
1086 * additional tests beyond the current "page present" test.
1089 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1091 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1092 (boothowto & RB_VERBOSE))
1093 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1096 * If Maxmem has been increased beyond what the system has detected,
1097 * extend the last memory segment to the new limit.
1099 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1100 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1102 /* call pmap initialization to make new kernel address space */
1103 pmap_bootstrap(first);
1106 * Size up each available chunk of physical memory.
1108 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1111 phys_avail[pa_indx++] = physmap[0];
1112 phys_avail[pa_indx] = physmap[0];
1113 dump_avail[da_indx] = physmap[0];
1116 * Get dcons buffer address
1118 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1119 getenv_quad("dcons.size", &dcons_size) == 0)
1123 * physmap is in bytes, so when converting to page boundaries,
1124 * round up the start address and round down the end address.
1126 for (i = 0; i <= physmap_idx; i += 2) {
1129 end = ptoa((vm_paddr_t)Maxmem);
1130 if (physmap[i + 1] < end)
1131 end = trunc_page(physmap[i + 1]);
1132 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1133 int tmp, page_bad, full;
1138 * block out kernel memory as not available.
1140 if (pa >= KERNLOAD && pa < first)
1144 * block out dcons buffer
1147 && pa >= trunc_page(dcons_addr)
1148 && pa < dcons_addr + dcons_size)
1156 * map page into kernel: valid, read/write,non-cacheable
1158 ptr = (int *)pmap_cmap3(pa, PG_V | PG_RW | PG_N);
1162 * Test for alternating 1's and 0's
1164 *(volatile int *)ptr = 0xaaaaaaaa;
1165 if (*(volatile int *)ptr != 0xaaaaaaaa)
1168 * Test for alternating 0's and 1's
1170 *(volatile int *)ptr = 0x55555555;
1171 if (*(volatile int *)ptr != 0x55555555)
1176 *(volatile int *)ptr = 0xffffffff;
1177 if (*(volatile int *)ptr != 0xffffffff)
1182 *(volatile int *)ptr = 0x0;
1183 if (*(volatile int *)ptr != 0x0)
1186 * Restore original value.
1192 * Adjust array of valid/good pages.
1194 if (page_bad == TRUE)
1197 * If this good page is a continuation of the
1198 * previous set of good pages, then just increase
1199 * the end pointer. Otherwise start a new chunk.
1200 * Note that "end" points one higher than end,
1201 * making the range >= start and < end.
1202 * If we're also doing a speculative memory
1203 * test and we at or past the end, bump up Maxmem
1204 * so that we keep going. The first bad page
1205 * will terminate the loop.
1207 if (phys_avail[pa_indx] == pa) {
1208 phys_avail[pa_indx] += PAGE_SIZE;
1211 if (pa_indx == PHYS_AVAIL_ENTRIES) {
1213 "Too many holes in the physical address space, giving up\n");
1218 phys_avail[pa_indx++] = pa; /* start */
1219 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1223 if (dump_avail[da_indx] == pa) {
1224 dump_avail[da_indx] += PAGE_SIZE;
1227 if (da_indx == PHYS_AVAIL_ENTRIES) {
1231 dump_avail[da_indx++] = pa; /* start */
1232 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1243 * The last chunk must contain at least one page plus the message
1244 * buffer to avoid complicating other code (message buffer address
1245 * calculation, etc.).
1247 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1248 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1249 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1250 phys_avail[pa_indx--] = 0;
1251 phys_avail[pa_indx--] = 0;
1254 Maxmem = atop(phys_avail[pa_indx]);
1256 /* Trim off space for the message buffer. */
1257 phys_avail[pa_indx] -= round_page(msgbufsize);
1259 /* Map the message buffer. */
1260 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
1261 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1269 db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab, 0);
1273 if (boothowto & RB_KDB)
1274 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
1281 struct gate_descriptor *ip;
1285 for (x = 0; x < NIDT; x++) {
1287 if (ip->gd_type != SDT_SYS386IGT &&
1288 ip->gd_type != SDT_SYS386TGT)
1290 off = ip->gd_looffset + (((u_int)ip->gd_hioffset) << 16);
1291 KASSERT(off >= (uintptr_t)start_exceptions &&
1292 off < (uintptr_t)end_exceptions,
1293 ("IDT[%d] type %d off %#x", x, ip->gd_type, off));
1295 MPASS(off >= PMAP_TRM_MIN_ADDRESS &&
1296 off < PMAP_TRM_MAX_ADDRESS);
1297 ip->gd_looffset = off;
1298 ip->gd_hioffset = off >> 16;
1308 for (x = 0; x < NIDT; x++)
1309 setidt(x, &IDTVEC(rsvd), SDT_SYS386IGT, SEL_KPL,
1310 GSEL(GCODE_SEL, SEL_KPL));
1311 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386IGT, SEL_KPL,
1312 GSEL(GCODE_SEL, SEL_KPL));
1313 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
1314 GSEL(GCODE_SEL, SEL_KPL));
1315 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
1316 GSEL(GCODE_SEL, SEL_KPL));
1317 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
1318 GSEL(GCODE_SEL, SEL_KPL));
1319 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386IGT, SEL_UPL,
1320 GSEL(GCODE_SEL, SEL_KPL));
1321 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386IGT, SEL_KPL,
1322 GSEL(GCODE_SEL, SEL_KPL));
1323 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL,
1324 GSEL(GCODE_SEL, SEL_KPL));
1325 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386IGT, SEL_KPL,
1326 GSEL(GCODE_SEL, SEL_KPL));
1327 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL,
1329 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386IGT,
1330 SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1331 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386IGT, SEL_KPL,
1332 GSEL(GCODE_SEL, SEL_KPL));
1333 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386IGT, SEL_KPL,
1334 GSEL(GCODE_SEL, SEL_KPL));
1335 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386IGT, SEL_KPL,
1336 GSEL(GCODE_SEL, SEL_KPL));
1337 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL,
1338 GSEL(GCODE_SEL, SEL_KPL));
1339 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
1340 GSEL(GCODE_SEL, SEL_KPL));
1341 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386IGT, SEL_KPL,
1342 GSEL(GCODE_SEL, SEL_KPL));
1343 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386IGT, SEL_KPL,
1344 GSEL(GCODE_SEL, SEL_KPL));
1345 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386IGT, SEL_KPL,
1346 GSEL(GCODE_SEL, SEL_KPL));
1347 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386IGT, SEL_KPL,
1348 GSEL(GCODE_SEL, SEL_KPL));
1349 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall),
1350 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1351 #ifdef KDTRACE_HOOKS
1352 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret),
1353 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1356 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall),
1357 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1365 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL,
1366 GSEL(GCODE_SEL, SEL_KPL));
1367 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL,
1368 GSEL(GCODE_SEL, SEL_KPL));
1371 #if defined(DEV_ISA) && !defined(DEV_ATPIC)
1376 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint),
1377 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1378 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint),
1379 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1386 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1387 int gsel_tss, metadata_missing, x, pa;
1389 struct xstate_hdr *xhdr;
1394 thread0.td_kstack = proc0kstack;
1395 thread0.td_kstack_pages = TD0_KSTACK_PAGES;
1398 * This may be done better later if it gets more high level
1399 * components in it. If so just link td->td_proc here.
1401 proc_linkup0(&proc0, &thread0);
1403 if (bootinfo.bi_modulep) {
1404 metadata_missing = 0;
1405 addend = (vm_paddr_t)bootinfo.bi_modulep < KERNBASE ?
1407 preload_metadata = (caddr_t)bootinfo.bi_modulep + addend;
1408 preload_bootstrap_relocate(addend);
1410 metadata_missing = 1;
1413 if (bootinfo.bi_envp != 0) {
1414 addend = (vm_paddr_t)bootinfo.bi_envp < KERNBASE ?
1416 init_static_kenv((char *)bootinfo.bi_envp + addend, 0);
1418 init_static_kenv(NULL, 0);
1422 * Re-evaluate CPU features if we loaded a microcode update.
1424 ucode_len = ucode_load_bsp(first);
1425 if (ucode_len != 0) {
1427 first = roundup2(first + ucode_len, PAGE_SIZE);
1430 identify_hypervisor();
1431 identify_hypervisor_smbios();
1433 /* Init basic tunables, hz etc */
1436 /* Set bootmethod to BIOS: it's the only supported on i386. */
1437 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1440 * Make gdt memory segments. All segments cover the full 4GB
1441 * of address space and permissions are enforced at page level.
1443 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1444 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1445 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
1446 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
1447 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
1448 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
1451 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
1452 gdt_segs[GPRIV_SEL].ssd_base = (int)pc;
1453 gdt_segs[GPROC0_SEL].ssd_base = (int)&common_tss0;
1455 for (x = 0; x < NGDT; x++)
1456 ssdtosd(&gdt_segs[x], &gdt0[x].sd);
1458 r_gdt.rd_limit = NGDT * sizeof(gdt0[0]) - 1;
1459 r_gdt.rd_base = (int)gdt0;
1460 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
1463 pcpu_init(pc, 0, sizeof(struct pcpu));
1464 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
1465 pmap_kenter(pa, pa);
1466 dpcpu_init((void *)first, 0);
1467 first += DPCPU_SIZE;
1468 PCPU_SET(prvspace, pc);
1469 PCPU_SET(curthread, &thread0);
1470 /* Non-late cninit() and printf() can be moved up to here. */
1473 * Initialize mutexes.
1475 * icu_lock: in order to allow an interrupt to occur in a critical
1476 * section, to set pcpu->ipending (etc...) properly, we
1477 * must be able to get the icu lock, so it can't be
1481 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
1485 r_idt.rd_limit = sizeof(idt0) - 1;
1486 r_idt.rd_base = (int) idt;
1489 finishidentcpu(); /* Final stage of CPU initialization */
1492 * Initialize the clock before the console so that console
1493 * initialization can use DELAY().
1499 initializecpu(); /* Initialize CPU registers */
1500 initializecpucache();
1502 /* pointer to selector slot for %fs/%gs */
1503 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
1505 /* Initialize the tss (except for the final esp0) early for vm86. */
1506 common_tss0.tss_esp0 = thread0.td_kstack + thread0.td_kstack_pages *
1507 PAGE_SIZE - VM86_STACK_SPACE;
1508 common_tss0.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
1509 common_tss0.tss_ioopt = sizeof(struct i386tss) << 16;
1510 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1511 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
1512 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
1515 /* Initialize the PIC early for vm86 calls. */
1521 /* Reset and mask the atpics and leave them shut down. */
1525 * Point the ICU spurious interrupt vectors at the APIC spurious
1526 * interrupt handler.
1533 * The console and kdb should be initialized even earlier than here,
1534 * but some console drivers don't work until after getmemsize().
1535 * Default to late console initialization to support these drivers.
1536 * This loses mainly printf()s in getmemsize() and early debugging.
1538 TUNABLE_INT_FETCH("debug.late_console", &late_console);
1539 if (!late_console) {
1544 if (cpu_fxsr && (cpu_feature2 & CPUID2_XSAVE) != 0) {
1546 TUNABLE_INT_FETCH("hw.use_xsave", &use_xsave);
1549 kmdp = preload_search_by_type("elf kernel");
1550 link_elf_ireloc(kmdp);
1554 init_param2(physmem);
1556 /* now running on new page tables, configured,and u/iom is accessible */
1561 if (metadata_missing)
1562 printf("WARNING: loader(8) metadata is missing!\n");
1567 msgbufinit(msgbufp, msgbufsize);
1571 * Set up thread0 pcb after npxinit calculated pcb + fpu save
1572 * area size. Zero out the extended state header in fpu save
1575 thread0.td_pcb = get_pcb_td(&thread0);
1576 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
1577 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
1579 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1581 xhdr->xstate_bv = xsave_mask;
1583 PCPU_SET(curpcb, thread0.td_pcb);
1584 /* Move esp0 in the tss to its final place. */
1585 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
1586 common_tss0.tss_esp0 = (vm_offset_t)thread0.td_pcb - VM86_STACK_SPACE;
1587 PCPU_SET(kesp0, common_tss0.tss_esp0);
1588 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; /* clear busy bit */
1591 /* transfer to user mode */
1593 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1594 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1596 /* setup proc 0's pcb */
1597 thread0.td_pcb->pcb_flags = 0;
1598 thread0.td_pcb->pcb_cr3 = pmap_get_kcr3();
1599 thread0.td_pcb->pcb_ext = 0;
1600 thread0.td_frame = &proc0_tf;
1606 /* Location of kernel stack for locore */
1607 return ((register_t)thread0.td_pcb);
1611 machdep_init_trampoline(void)
1613 struct region_descriptor r_gdt, r_idt;
1614 struct i386tss *tss;
1615 char *copyout_buf, *trampoline, *tramp_stack_base;
1618 gdt = pmap_trm_alloc(sizeof(union descriptor) * NGDT * mp_ncpus,
1620 bcopy(gdt0, gdt, sizeof(union descriptor) * NGDT);
1621 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1622 r_gdt.rd_base = (int)gdt;
1625 tss = pmap_trm_alloc(sizeof(struct i386tss) * mp_ncpus,
1627 bcopy(&common_tss0, tss, sizeof(struct i386tss));
1628 gdt[GPROC0_SEL].sd.sd_lobase = (int)tss;
1629 gdt[GPROC0_SEL].sd.sd_hibase = (u_int)tss >> 24;
1630 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
1632 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
1633 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
1634 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
1635 PCPU_SET(common_tssp, tss);
1636 ltr(GSEL(GPROC0_SEL, SEL_KPL));
1638 trampoline = pmap_trm_alloc(end_exceptions - start_exceptions,
1640 bcopy(start_exceptions, trampoline, end_exceptions - start_exceptions);
1641 tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT);
1642 PCPU_SET(trampstk, (uintptr_t)tramp_stack_base + TRAMP_STACK_SZ -
1644 tss[0].tss_esp0 = PCPU_GET(trampstk);
1646 idt = pmap_trm_alloc(sizeof(idt0), M_NOWAIT | M_ZERO);
1647 bcopy(idt0, idt, sizeof(idt0));
1649 /* Re-initialize new IDT since the handlers were relocated */
1650 setidt_disp = trampoline - start_exceptions;
1652 printf("Trampoline disposition %#zx\n", setidt_disp);
1655 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1;
1656 r_idt.rd_base = (int)idt;
1660 dblfault_tss = pmap_trm_alloc(sizeof(struct i386tss), M_NOWAIT | M_ZERO);
1661 dblfault_stack = pmap_trm_alloc(PAGE_SIZE, M_NOWAIT);
1662 dblfault_tss->tss_esp = dblfault_tss->tss_esp0 =
1663 dblfault_tss->tss_esp1 = dblfault_tss->tss_esp2 =
1664 (int)dblfault_stack + PAGE_SIZE;
1665 dblfault_tss->tss_ss = dblfault_tss->tss_ss0 = dblfault_tss->tss_ss1 =
1666 dblfault_tss->tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1667 dblfault_tss->tss_cr3 = pmap_get_kcr3();
1668 dblfault_tss->tss_eip = (int)dblfault_handler;
1669 dblfault_tss->tss_eflags = PSL_KERNEL;
1670 dblfault_tss->tss_ds = dblfault_tss->tss_es =
1671 dblfault_tss->tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1672 dblfault_tss->tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1673 dblfault_tss->tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1674 dblfault_tss->tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1675 gdt[GPANIC_SEL].sd.sd_lobase = (int)dblfault_tss;
1676 gdt[GPANIC_SEL].sd.sd_hibase = (u_int)dblfault_tss >> 24;
1678 /* make ldt memory segments */
1679 ldt = pmap_trm_alloc(sizeof(union descriptor) * NLDT,
1681 gdt[GLDT_SEL].sd.sd_lobase = (int)ldt;
1682 gdt[GLDT_SEL].sd.sd_hibase = (u_int)ldt >> 24;
1683 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
1684 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
1685 for (x = 0; x < nitems(ldt_segs); x++)
1686 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1688 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1690 PCPU_SET(currentldt, _default_ldt);
1692 copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT);
1693 PCPU_SET(copyout_buf, copyout_buf);
1694 copyout_init_tramp();
1696 SYSINIT(vm_mem, SI_SUB_VM, SI_ORDER_SECOND, machdep_init_trampoline, NULL);
1700 i386_setup_lcall_gate(void)
1702 struct sysentvec *sv;
1703 struct user_segment_descriptor desc;
1706 sv = &elf32_freebsd_sysvec;
1707 lcall_addr = (uintptr_t)sv->sv_psstrings - sz_lcall_tramp;
1709 bzero(&desc, sizeof(desc));
1710 desc.sd_type = SDT_MEMERA;
1711 desc.sd_dpl = SEL_UPL;
1715 desc.sd_lolimit = 0xffff;
1716 desc.sd_hilimit = 0xf;
1717 desc.sd_lobase = lcall_addr;
1718 desc.sd_hibase = lcall_addr >> 24;
1719 bcopy(&desc, &ldt[LSYS5CALLS_SEL], sizeof(desc));
1721 SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_ANY, i386_setup_lcall_gate, NULL);
1725 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1728 pcpu->pc_acpi_id = 0xffffffff;
1732 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
1734 struct bios_smap *smapbase;
1735 struct bios_smap_xattr smap;
1738 int count, error, i;
1740 /* Retrieve the system memory map from the loader. */
1741 kmdp = preload_search_by_type("elf kernel");
1743 kmdp = preload_search_by_type("elf32 kernel");
1744 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1745 MODINFO_METADATA | MODINFOMD_SMAP);
1746 if (smapbase == NULL)
1748 smapattr = (uint32_t *)preload_search_info(kmdp,
1749 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
1750 count = *((u_int32_t *)smapbase - 1) / sizeof(*smapbase);
1752 for (i = 0; i < count; i++) {
1753 smap.base = smapbase[i].base;
1754 smap.length = smapbase[i].length;
1755 smap.type = smapbase[i].type;
1756 if (smapattr != NULL)
1757 smap.xattr = smapattr[i];
1760 error = SYSCTL_OUT(req, &smap, sizeof(smap));
1764 SYSCTL_PROC(_machdep, OID_AUTO, smap,
1765 CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 0,
1766 smap_sysctl_handler, "S,bios_smap_xattr",
1767 "Raw BIOS SMAP data");
1770 spinlock_enter(void)
1776 if (td->td_md.md_spinlock_count == 0) {
1777 flags = intr_disable();
1778 td->td_md.md_spinlock_count = 1;
1779 td->td_md.md_saved_flags = flags;
1782 td->td_md.md_spinlock_count++;
1792 flags = td->td_md.md_saved_flags;
1793 td->td_md.md_spinlock_count--;
1794 if (td->td_md.md_spinlock_count == 0) {
1796 intr_restore(flags);
1800 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1801 static void f00f_hack(void *unused);
1802 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1805 f00f_hack(void *unused)
1807 struct region_descriptor r_idt;
1808 struct gate_descriptor *new_idt;
1814 printf("Intel Pentium detected, installing workaround for F00F bug\n");
1816 tmp = (vm_offset_t)pmap_trm_alloc(PAGE_SIZE * 3, M_NOWAIT | M_ZERO);
1818 panic("kmem_malloc returned 0");
1819 tmp = round_page(tmp);
1821 /* Put the problematic entry (#6) at the end of the lower page. */
1822 new_idt = (struct gate_descriptor *)
1823 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
1824 bcopy(idt, new_idt, sizeof(idt0));
1825 r_idt.rd_base = (u_int)new_idt;
1826 r_idt.rd_limit = sizeof(idt0) - 1;
1828 /* SMP machines do not need the F00F hack. */
1830 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
1832 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1835 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1836 * we want to start a backtrace from the function that caused us to enter
1837 * the debugger. We have the context in the trapframe, but base the trace
1838 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1839 * enough for a backtrace.
1842 makectx(struct trapframe *tf, struct pcb *pcb)
1845 pcb->pcb_edi = tf->tf_edi;
1846 pcb->pcb_esi = tf->tf_esi;
1847 pcb->pcb_ebp = tf->tf_ebp;
1848 pcb->pcb_ebx = tf->tf_ebx;
1849 pcb->pcb_eip = tf->tf_eip;
1850 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
1851 pcb->pcb_gs = rgs();
1857 * Provide inb() and outb() as functions. They are normally only available as
1858 * inline functions, thus cannot be called from the debugger.
1861 /* silence compiler warnings */
1862 u_char inb_(u_short);
1863 void outb_(u_short, u_char);
1872 outb_(u_short port, u_char data)