2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atpic.h"
45 #include "opt_compat.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_mp_watchdog.h"
54 #include "opt_perfmon.h"
55 #include "opt_platform.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/rwlock.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
106 #error KDB must be enabled in order for DDB to work!
109 #include <ddb/db_sym.h>
113 #include <pc98/pc98/pc98_machdep.h>
118 #include <net/netisr.h>
120 #include <machine/bootinfo.h>
121 #include <machine/clock.h>
122 #include <machine/cpu.h>
123 #include <machine/cputypes.h>
124 #include <machine/intr_machdep.h>
126 #include <machine/md_var.h>
127 #include <machine/metadata.h>
128 #include <machine/mp_watchdog.h>
129 #include <machine/pc/bios.h>
130 #include <machine/pcb.h>
131 #include <machine/pcb_ext.h>
132 #include <machine/proc.h>
133 #include <machine/reg.h>
134 #include <machine/sigframe.h>
135 #include <machine/specialreg.h>
136 #include <machine/vm86.h>
137 #include <x86/init.h>
139 #include <machine/perfmon.h>
142 #include <machine/smp.h>
149 #include <x86/apicvar.h>
153 #include <x86/isa/icu.h>
157 #include <machine/xbox.h>
159 int arch_i386_is_xbox = 0;
160 uint32_t arch_i386_xbox_memsize = 0;
163 /* Sanity check for __curthread() */
164 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
166 extern register_t init386(int first);
167 extern void dblfault_handler(void);
169 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
170 #define CPU_ENABLE_SSE
173 static void cpu_startup(void *);
174 static void fpstate_drop(struct thread *td);
175 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
176 char *xfpusave, size_t xfpusave_len);
177 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
178 char *xfpustate, size_t xfpustate_len);
179 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
181 /* Intel ICH registers */
182 #define ICH_PMBASE 0x400
183 #define ICH_SMI_EN ICH_PMBASE + 0x30
185 int _udatasel, _ucodesel;
189 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
190 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
192 static int ispc98 = 1;
193 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
199 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
201 #ifdef COMPAT_FREEBSD4
202 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
209 FEATURE(pae, "Physical Address Extensions");
213 * The number of PHYSMAP entries must be one less than the number of
214 * PHYSSEG entries because the PHYSMAP entry that spans the largest
215 * physical address that is accessible by ISA DMA is split into two
218 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
220 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
221 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
223 /* must be 2 less so 0 0 can signal end of chunks */
224 #define PHYS_AVAIL_ARRAY_END (nitems(phys_avail) - 2)
225 #define DUMP_AVAIL_ARRAY_END (nitems(dump_avail) - 2)
227 struct kva_md_info kmi;
229 static struct trapframe proc0_tf;
230 struct pcpu __pcpu[MAXCPU];
234 struct mem_range_softc mem_range_softc;
236 /* Default init_ops implementation. */
237 struct init_ops init_ops = {
238 .early_clock_source_init = i8254_init,
239 .early_delay = i8254_delay,
241 .msi_init = msi_init,
254 * On MacBooks, we need to disallow the legacy USB circuit to
255 * generate an SMI# because this can cause several problems,
256 * namely: incorrect CPU frequency detection and failure to
258 * We do this by disabling a bit in the SMI_EN (SMI Control and
259 * Enable register) of the Intel ICH LPC Interface Bridge.
261 sysenv = kern_getenv("smbios.system.product");
262 if (sysenv != NULL) {
263 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
264 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
265 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
266 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
267 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
268 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
269 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
270 strncmp(sysenv, "Macmini1,1", 10) == 0) {
272 printf("Disabling LEGACY_USB_EN bit on "
274 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
281 * Good {morning,afternoon,evening,night}.
285 panicifcpuunsupported();
291 * Display physical memory if SMBIOS reports reasonable amount.
294 sysenv = kern_getenv("smbios.memory.enabled");
295 if (sysenv != NULL) {
296 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
299 if (memsize < ptoa((uintmax_t)vm_cnt.v_free_count))
300 memsize = ptoa((uintmax_t)Maxmem);
301 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
302 realmem = atop(memsize);
305 * Display any holes after the first chunk of extended memory.
310 printf("Physical memory chunk(s):\n");
311 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
314 size = phys_avail[indx + 1] - phys_avail[indx];
316 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
317 (uintmax_t)phys_avail[indx],
318 (uintmax_t)phys_avail[indx + 1] - 1,
319 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
323 vm_ksubmap_init(&kmi);
325 printf("avail memory = %ju (%ju MB)\n",
326 ptoa((uintmax_t)vm_cnt.v_free_count),
327 ptoa((uintmax_t)vm_cnt.v_free_count) / 1048576);
330 * Set up buffers, so they can be used to read disk labels.
333 vm_pager_bufferinit();
338 * Send an interrupt to process.
340 * Stack is set up to allow sigcode stored
341 * at top to call routine, followed by call
342 * to sigreturn routine below. After sigreturn
343 * resets the signal mask, the stack, and the
344 * frame pointer, it returns to the user
349 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
351 struct osigframe sf, *fp;
355 struct trapframe *regs;
361 PROC_LOCK_ASSERT(p, MA_OWNED);
362 sig = ksi->ksi_signo;
364 mtx_assert(&psp->ps_mtx, MA_OWNED);
366 oonstack = sigonstack(regs->tf_esp);
368 /* Allocate space for the signal handler context. */
369 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
370 SIGISMEMBER(psp->ps_sigonstack, sig)) {
371 fp = (struct osigframe *)((uintptr_t)td->td_sigstk.ss_sp +
372 td->td_sigstk.ss_size - sizeof(struct osigframe));
373 #if defined(COMPAT_43)
374 td->td_sigstk.ss_flags |= SS_ONSTACK;
377 fp = (struct osigframe *)regs->tf_esp - 1;
379 /* Build the argument list for the signal handler. */
381 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
382 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
383 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
384 /* Signal handler installed with SA_SIGINFO. */
385 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
386 sf.sf_siginfo.si_signo = sig;
387 sf.sf_siginfo.si_code = ksi->ksi_code;
388 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
391 /* Old FreeBSD-style arguments. */
392 sf.sf_arg2 = ksi->ksi_code;
393 sf.sf_addr = (register_t)ksi->ksi_addr;
394 sf.sf_ahu.sf_handler = catcher;
396 mtx_unlock(&psp->ps_mtx);
399 /* Save most if not all of trap frame. */
400 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
401 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
402 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
403 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
404 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
405 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
406 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
407 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
408 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
409 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
410 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
411 sf.sf_siginfo.si_sc.sc_gs = rgs();
412 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
414 /* Build the signal context to be used by osigreturn(). */
415 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
416 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
417 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
418 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
419 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
420 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
421 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
422 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
425 * If we're a vm86 process, we want to save the segment registers.
426 * We also change eflags to be our emulated eflags, not the actual
429 if (regs->tf_eflags & PSL_VM) {
430 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
431 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
432 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
434 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
435 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
436 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
437 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
439 if (vm86->vm86_has_vme == 0)
440 sf.sf_siginfo.si_sc.sc_ps =
441 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
442 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
444 /* See sendsig() for comments. */
445 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
449 * Copy the sigframe out to the user's stack.
451 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
453 printf("process %ld has trashed its stack\n", (long)p->p_pid);
459 regs->tf_esp = (int)fp;
460 if (p->p_sysent->sv_sigcode_base != 0) {
461 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
464 /* a.out sysentvec does not use shared page */
465 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
467 regs->tf_eflags &= ~(PSL_T | PSL_D);
468 regs->tf_cs = _ucodesel;
469 regs->tf_ds = _udatasel;
470 regs->tf_es = _udatasel;
471 regs->tf_fs = _udatasel;
473 regs->tf_ss = _udatasel;
475 mtx_lock(&psp->ps_mtx);
477 #endif /* COMPAT_43 */
479 #ifdef COMPAT_FREEBSD4
481 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
483 struct sigframe4 sf, *sfp;
487 struct trapframe *regs;
493 PROC_LOCK_ASSERT(p, MA_OWNED);
494 sig = ksi->ksi_signo;
496 mtx_assert(&psp->ps_mtx, MA_OWNED);
498 oonstack = sigonstack(regs->tf_esp);
500 /* Save user context. */
501 bzero(&sf, sizeof(sf));
502 sf.sf_uc.uc_sigmask = *mask;
503 sf.sf_uc.uc_stack = td->td_sigstk;
504 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
505 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
506 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
507 sf.sf_uc.uc_mcontext.mc_gs = rgs();
508 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
509 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
510 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
511 bzero(sf.sf_uc.uc_mcontext.__spare__,
512 sizeof(sf.sf_uc.uc_mcontext.__spare__));
513 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
515 /* Allocate space for the signal handler context. */
516 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
517 SIGISMEMBER(psp->ps_sigonstack, sig)) {
518 sfp = (struct sigframe4 *)((uintptr_t)td->td_sigstk.ss_sp +
519 td->td_sigstk.ss_size - sizeof(struct sigframe4));
520 #if defined(COMPAT_43)
521 td->td_sigstk.ss_flags |= SS_ONSTACK;
524 sfp = (struct sigframe4 *)regs->tf_esp - 1;
526 /* Build the argument list for the signal handler. */
528 sf.sf_ucontext = (register_t)&sfp->sf_uc;
529 bzero(&sf.sf_si, sizeof(sf.sf_si));
530 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
531 /* Signal handler installed with SA_SIGINFO. */
532 sf.sf_siginfo = (register_t)&sfp->sf_si;
533 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
535 /* Fill in POSIX parts */
536 sf.sf_si.si_signo = sig;
537 sf.sf_si.si_code = ksi->ksi_code;
538 sf.sf_si.si_addr = ksi->ksi_addr;
540 /* Old FreeBSD-style arguments. */
541 sf.sf_siginfo = ksi->ksi_code;
542 sf.sf_addr = (register_t)ksi->ksi_addr;
543 sf.sf_ahu.sf_handler = catcher;
545 mtx_unlock(&psp->ps_mtx);
549 * If we're a vm86 process, we want to save the segment registers.
550 * We also change eflags to be our emulated eflags, not the actual
553 if (regs->tf_eflags & PSL_VM) {
554 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
555 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
557 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
558 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
559 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
560 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
562 if (vm86->vm86_has_vme == 0)
563 sf.sf_uc.uc_mcontext.mc_eflags =
564 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
565 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
568 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
569 * syscalls made by the signal handler. This just avoids
570 * wasting time for our lazy fixup of such faults. PSL_NT
571 * does nothing in vm86 mode, but vm86 programs can set it
572 * almost legitimately in probes for old cpu types.
574 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
578 * Copy the sigframe out to the user's stack.
580 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
582 printf("process %ld has trashed its stack\n", (long)p->p_pid);
588 regs->tf_esp = (int)sfp;
589 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
591 regs->tf_eflags &= ~(PSL_T | PSL_D);
592 regs->tf_cs = _ucodesel;
593 regs->tf_ds = _udatasel;
594 regs->tf_es = _udatasel;
595 regs->tf_fs = _udatasel;
596 regs->tf_ss = _udatasel;
598 mtx_lock(&psp->ps_mtx);
600 #endif /* COMPAT_FREEBSD4 */
603 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
605 struct sigframe sf, *sfp;
610 struct trapframe *regs;
611 struct segment_descriptor *sdp;
619 PROC_LOCK_ASSERT(p, MA_OWNED);
620 sig = ksi->ksi_signo;
622 mtx_assert(&psp->ps_mtx, MA_OWNED);
623 #ifdef COMPAT_FREEBSD4
624 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
625 freebsd4_sendsig(catcher, ksi, mask);
630 if (SIGISMEMBER(psp->ps_osigset, sig)) {
631 osendsig(catcher, ksi, mask);
636 oonstack = sigonstack(regs->tf_esp);
638 #ifdef CPU_ENABLE_SSE
639 if (cpu_max_ext_state_size > sizeof(union savefpu) && use_xsave) {
640 xfpusave_len = cpu_max_ext_state_size - sizeof(union savefpu);
641 xfpusave = __builtin_alloca(xfpusave_len);
650 /* Save user context. */
651 bzero(&sf, sizeof(sf));
652 sf.sf_uc.uc_sigmask = *mask;
653 sf.sf_uc.uc_stack = td->td_sigstk;
654 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
655 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
656 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
657 sf.sf_uc.uc_mcontext.mc_gs = rgs();
658 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
659 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
660 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
663 * Unconditionally fill the fsbase and gsbase into the mcontext.
665 sdp = &td->td_pcb->pcb_fsd;
666 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
668 sdp = &td->td_pcb->pcb_gsd;
669 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
671 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
672 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
673 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
675 /* Allocate space for the signal handler context. */
676 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
677 SIGISMEMBER(psp->ps_sigonstack, sig)) {
678 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
679 #if defined(COMPAT_43)
680 td->td_sigstk.ss_flags |= SS_ONSTACK;
683 sp = (char *)regs->tf_esp - 128;
684 if (xfpusave != NULL) {
686 sp = (char *)((unsigned int)sp & ~0x3F);
687 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
689 sp -= sizeof(struct sigframe);
691 /* Align to 16 bytes. */
692 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
694 /* Build the argument list for the signal handler. */
696 sf.sf_ucontext = (register_t)&sfp->sf_uc;
697 bzero(&sf.sf_si, sizeof(sf.sf_si));
698 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
699 /* Signal handler installed with SA_SIGINFO. */
700 sf.sf_siginfo = (register_t)&sfp->sf_si;
701 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
703 /* Fill in POSIX parts */
704 sf.sf_si = ksi->ksi_info;
705 sf.sf_si.si_signo = sig; /* maybe a translated signal */
707 /* Old FreeBSD-style arguments. */
708 sf.sf_siginfo = ksi->ksi_code;
709 sf.sf_addr = (register_t)ksi->ksi_addr;
710 sf.sf_ahu.sf_handler = catcher;
712 mtx_unlock(&psp->ps_mtx);
716 * If we're a vm86 process, we want to save the segment registers.
717 * We also change eflags to be our emulated eflags, not the actual
720 if (regs->tf_eflags & PSL_VM) {
721 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
722 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
724 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
725 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
726 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
727 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
729 if (vm86->vm86_has_vme == 0)
730 sf.sf_uc.uc_mcontext.mc_eflags =
731 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
732 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
735 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
736 * syscalls made by the signal handler. This just avoids
737 * wasting time for our lazy fixup of such faults. PSL_NT
738 * does nothing in vm86 mode, but vm86 programs can set it
739 * almost legitimately in probes for old cpu types.
741 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
745 * Copy the sigframe out to the user's stack.
747 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
748 (xfpusave != NULL && copyout(xfpusave,
749 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
752 printf("process %ld has trashed its stack\n", (long)p->p_pid);
758 regs->tf_esp = (int)sfp;
759 regs->tf_eip = p->p_sysent->sv_sigcode_base;
760 if (regs->tf_eip == 0)
761 regs->tf_eip = p->p_sysent->sv_psstrings - szsigcode;
762 regs->tf_eflags &= ~(PSL_T | PSL_D);
763 regs->tf_cs = _ucodesel;
764 regs->tf_ds = _udatasel;
765 regs->tf_es = _udatasel;
766 regs->tf_fs = _udatasel;
767 regs->tf_ss = _udatasel;
769 mtx_lock(&psp->ps_mtx);
773 * System call to cleanup state after a signal
774 * has been taken. Reset signal mask and
775 * stack state from context left by sendsig (above).
776 * Return to previous pc and psl as specified by
777 * context left by sendsig. Check carefully to
778 * make sure that the user has not modified the
779 * state to gain improper privileges.
787 struct osigreturn_args /* {
788 struct osigcontext *sigcntxp;
791 struct osigcontext sc;
792 struct trapframe *regs;
793 struct osigcontext *scp;
798 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
803 if (eflags & PSL_VM) {
804 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
805 struct vm86_kernel *vm86;
808 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
809 * set up the vm86 area, and we can't enter vm86 mode.
811 if (td->td_pcb->pcb_ext == 0)
813 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
814 if (vm86->vm86_inited == 0)
817 /* Go back to user mode if both flags are set. */
818 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
819 ksiginfo_init_trap(&ksi);
820 ksi.ksi_signo = SIGBUS;
821 ksi.ksi_code = BUS_OBJERR;
822 ksi.ksi_addr = (void *)regs->tf_eip;
823 trapsignal(td, &ksi);
826 if (vm86->vm86_has_vme) {
827 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
828 (eflags & VME_USERCHANGE) | PSL_VM;
830 vm86->vm86_eflags = eflags; /* save VIF, VIP */
831 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
832 (eflags & VM_USERCHANGE) | PSL_VM;
834 tf->tf_vm86_ds = scp->sc_ds;
835 tf->tf_vm86_es = scp->sc_es;
836 tf->tf_vm86_fs = scp->sc_fs;
837 tf->tf_vm86_gs = scp->sc_gs;
838 tf->tf_ds = _udatasel;
839 tf->tf_es = _udatasel;
840 tf->tf_fs = _udatasel;
843 * Don't allow users to change privileged or reserved flags.
845 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
850 * Don't allow users to load a valid privileged %cs. Let the
851 * hardware check for invalid selectors, excess privilege in
852 * other selectors, invalid %eip's and invalid %esp's.
854 if (!CS_SECURE(scp->sc_cs)) {
855 ksiginfo_init_trap(&ksi);
856 ksi.ksi_signo = SIGBUS;
857 ksi.ksi_code = BUS_OBJERR;
858 ksi.ksi_trapno = T_PROTFLT;
859 ksi.ksi_addr = (void *)regs->tf_eip;
860 trapsignal(td, &ksi);
863 regs->tf_ds = scp->sc_ds;
864 regs->tf_es = scp->sc_es;
865 regs->tf_fs = scp->sc_fs;
868 /* Restore remaining registers. */
869 regs->tf_eax = scp->sc_eax;
870 regs->tf_ebx = scp->sc_ebx;
871 regs->tf_ecx = scp->sc_ecx;
872 regs->tf_edx = scp->sc_edx;
873 regs->tf_esi = scp->sc_esi;
874 regs->tf_edi = scp->sc_edi;
875 regs->tf_cs = scp->sc_cs;
876 regs->tf_ss = scp->sc_ss;
877 regs->tf_isp = scp->sc_isp;
878 regs->tf_ebp = scp->sc_fp;
879 regs->tf_esp = scp->sc_sp;
880 regs->tf_eip = scp->sc_pc;
881 regs->tf_eflags = eflags;
883 #if defined(COMPAT_43)
884 if (scp->sc_onstack & 1)
885 td->td_sigstk.ss_flags |= SS_ONSTACK;
887 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
889 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
891 return (EJUSTRETURN);
893 #endif /* COMPAT_43 */
895 #ifdef COMPAT_FREEBSD4
900 freebsd4_sigreturn(td, uap)
902 struct freebsd4_sigreturn_args /* {
903 const ucontext4 *sigcntxp;
907 struct trapframe *regs;
908 struct ucontext4 *ucp;
909 int cs, eflags, error;
912 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
917 eflags = ucp->uc_mcontext.mc_eflags;
918 if (eflags & PSL_VM) {
919 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
920 struct vm86_kernel *vm86;
923 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
924 * set up the vm86 area, and we can't enter vm86 mode.
926 if (td->td_pcb->pcb_ext == 0)
928 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
929 if (vm86->vm86_inited == 0)
932 /* Go back to user mode if both flags are set. */
933 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
934 ksiginfo_init_trap(&ksi);
935 ksi.ksi_signo = SIGBUS;
936 ksi.ksi_code = BUS_OBJERR;
937 ksi.ksi_addr = (void *)regs->tf_eip;
938 trapsignal(td, &ksi);
940 if (vm86->vm86_has_vme) {
941 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
942 (eflags & VME_USERCHANGE) | PSL_VM;
944 vm86->vm86_eflags = eflags; /* save VIF, VIP */
945 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
946 (eflags & VM_USERCHANGE) | PSL_VM;
948 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
949 tf->tf_eflags = eflags;
950 tf->tf_vm86_ds = tf->tf_ds;
951 tf->tf_vm86_es = tf->tf_es;
952 tf->tf_vm86_fs = tf->tf_fs;
953 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
954 tf->tf_ds = _udatasel;
955 tf->tf_es = _udatasel;
956 tf->tf_fs = _udatasel;
959 * Don't allow users to change privileged or reserved flags.
961 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
962 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
963 td->td_proc->p_pid, td->td_name, eflags);
968 * Don't allow users to load a valid privileged %cs. Let the
969 * hardware check for invalid selectors, excess privilege in
970 * other selectors, invalid %eip's and invalid %esp's.
972 cs = ucp->uc_mcontext.mc_cs;
973 if (!CS_SECURE(cs)) {
974 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
975 td->td_proc->p_pid, td->td_name, cs);
976 ksiginfo_init_trap(&ksi);
977 ksi.ksi_signo = SIGBUS;
978 ksi.ksi_code = BUS_OBJERR;
979 ksi.ksi_trapno = T_PROTFLT;
980 ksi.ksi_addr = (void *)regs->tf_eip;
981 trapsignal(td, &ksi);
985 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
988 #if defined(COMPAT_43)
989 if (ucp->uc_mcontext.mc_onstack & 1)
990 td->td_sigstk.ss_flags |= SS_ONSTACK;
992 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
994 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
995 return (EJUSTRETURN);
997 #endif /* COMPAT_FREEBSD4 */
1003 sys_sigreturn(td, uap)
1005 struct sigreturn_args /* {
1006 const struct __ucontext *sigcntxp;
1011 struct trapframe *regs;
1014 size_t xfpustate_len;
1015 int cs, eflags, error, ret;
1020 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1024 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
1025 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
1026 td->td_name, ucp->uc_mcontext.mc_flags);
1029 regs = td->td_frame;
1030 eflags = ucp->uc_mcontext.mc_eflags;
1031 if (eflags & PSL_VM) {
1032 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1033 struct vm86_kernel *vm86;
1036 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1037 * set up the vm86 area, and we can't enter vm86 mode.
1039 if (td->td_pcb->pcb_ext == 0)
1041 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1042 if (vm86->vm86_inited == 0)
1045 /* Go back to user mode if both flags are set. */
1046 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1047 ksiginfo_init_trap(&ksi);
1048 ksi.ksi_signo = SIGBUS;
1049 ksi.ksi_code = BUS_OBJERR;
1050 ksi.ksi_addr = (void *)regs->tf_eip;
1051 trapsignal(td, &ksi);
1054 if (vm86->vm86_has_vme) {
1055 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1056 (eflags & VME_USERCHANGE) | PSL_VM;
1058 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1059 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1060 (eflags & VM_USERCHANGE) | PSL_VM;
1062 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1063 tf->tf_eflags = eflags;
1064 tf->tf_vm86_ds = tf->tf_ds;
1065 tf->tf_vm86_es = tf->tf_es;
1066 tf->tf_vm86_fs = tf->tf_fs;
1067 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1068 tf->tf_ds = _udatasel;
1069 tf->tf_es = _udatasel;
1070 tf->tf_fs = _udatasel;
1073 * Don't allow users to change privileged or reserved flags.
1075 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
1076 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1077 td->td_proc->p_pid, td->td_name, eflags);
1082 * Don't allow users to load a valid privileged %cs. Let the
1083 * hardware check for invalid selectors, excess privilege in
1084 * other selectors, invalid %eip's and invalid %esp's.
1086 cs = ucp->uc_mcontext.mc_cs;
1087 if (!CS_SECURE(cs)) {
1088 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1089 td->td_proc->p_pid, td->td_name, cs);
1090 ksiginfo_init_trap(&ksi);
1091 ksi.ksi_signo = SIGBUS;
1092 ksi.ksi_code = BUS_OBJERR;
1093 ksi.ksi_trapno = T_PROTFLT;
1094 ksi.ksi_addr = (void *)regs->tf_eip;
1095 trapsignal(td, &ksi);
1099 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
1100 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
1101 if (xfpustate_len > cpu_max_ext_state_size -
1102 sizeof(union savefpu)) {
1104 "pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
1105 p->p_pid, td->td_name, xfpustate_len);
1108 xfpustate = __builtin_alloca(xfpustate_len);
1109 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
1110 xfpustate, xfpustate_len);
1113 "pid %d (%s): sigreturn copying xfpustate failed\n",
1114 p->p_pid, td->td_name);
1121 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate,
1125 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1128 #if defined(COMPAT_43)
1129 if (ucp->uc_mcontext.mc_onstack & 1)
1130 td->td_sigstk.ss_flags |= SS_ONSTACK;
1132 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1135 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1136 return (EJUSTRETURN);
1140 * Reset registers to default values on exec.
1143 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1145 struct trapframe *regs = td->td_frame;
1146 struct pcb *pcb = td->td_pcb;
1148 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1149 pcb->pcb_gs = _udatasel;
1152 mtx_lock_spin(&dt_lock);
1153 if (td->td_proc->p_md.md_ldt)
1156 mtx_unlock_spin(&dt_lock);
1158 bzero((char *)regs, sizeof(struct trapframe));
1159 regs->tf_eip = imgp->entry_addr;
1160 regs->tf_esp = stack;
1161 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1162 regs->tf_ss = _udatasel;
1163 regs->tf_ds = _udatasel;
1164 regs->tf_es = _udatasel;
1165 regs->tf_fs = _udatasel;
1166 regs->tf_cs = _ucodesel;
1168 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1169 regs->tf_ebx = imgp->ps_strings;
1172 * Reset the hardware debug registers if they were in use.
1173 * They won't have any meaning for the newly exec'd process.
1175 if (pcb->pcb_flags & PCB_DBREGS) {
1182 if (pcb == curpcb) {
1184 * Clear the debug registers on the running
1185 * CPU, otherwise they will end up affecting
1186 * the next process we switch to.
1190 pcb->pcb_flags &= ~PCB_DBREGS;
1193 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1196 * Drop the FP state if we hold it, so that the process gets a
1197 * clean FP state if it uses the FPU again.
1202 * XXX - Linux emulator
1203 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1206 td->td_retval[1] = 0;
1217 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1219 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1220 * instructions. We must set the CR0_MP bit and use the CR0_TS
1221 * bit to control the trap, because setting the CR0_EM bit does
1222 * not cause WAIT instructions to trap. It's important to trap
1223 * WAIT instructions - otherwise the "wait" variants of no-wait
1224 * control instructions would degenerate to the "no-wait" variants
1225 * after FP context switches but work correctly otherwise. It's
1226 * particularly important to trap WAITs when there is no NPX -
1227 * otherwise the "wait" variants would always degenerate.
1229 * Try setting CR0_NE to get correct error reporting on 486DX's.
1230 * Setting it should fail or do nothing on lesser processors.
1232 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1237 u_long bootdev; /* not a struct cdev *- encoding is different */
1238 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1239 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1241 static char bootmethod[16] = "BIOS";
1242 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1243 "System firmware boot method");
1246 * Initialize 386 and configure to run kernel
1250 * Initialize segments & interrupt table
1255 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1256 union descriptor ldt[NLDT]; /* local descriptor table */
1257 static struct gate_descriptor idt0[NIDT];
1258 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1259 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1260 struct mtx dt_lock; /* lock for GDT and LDT */
1262 static struct i386tss dblfault_tss;
1263 static char dblfault_stack[PAGE_SIZE];
1265 extern vm_offset_t proc0kstack;
1269 * software prototypes -- in more palatable form.
1271 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1272 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1274 struct soft_segment_descriptor gdt_segs[] = {
1275 /* GNULL_SEL 0 Null Descriptor */
1281 .ssd_xx = 0, .ssd_xx1 = 0,
1284 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1286 .ssd_limit = 0xfffff,
1287 .ssd_type = SDT_MEMRWA,
1290 .ssd_xx = 0, .ssd_xx1 = 0,
1293 /* GUFS_SEL 2 %fs Descriptor for user */
1295 .ssd_limit = 0xfffff,
1296 .ssd_type = SDT_MEMRWA,
1299 .ssd_xx = 0, .ssd_xx1 = 0,
1302 /* GUGS_SEL 3 %gs Descriptor for user */
1304 .ssd_limit = 0xfffff,
1305 .ssd_type = SDT_MEMRWA,
1308 .ssd_xx = 0, .ssd_xx1 = 0,
1311 /* GCODE_SEL 4 Code Descriptor for kernel */
1313 .ssd_limit = 0xfffff,
1314 .ssd_type = SDT_MEMERA,
1317 .ssd_xx = 0, .ssd_xx1 = 0,
1320 /* GDATA_SEL 5 Data Descriptor for kernel */
1322 .ssd_limit = 0xfffff,
1323 .ssd_type = SDT_MEMRWA,
1326 .ssd_xx = 0, .ssd_xx1 = 0,
1329 /* GUCODE_SEL 6 Code Descriptor for user */
1331 .ssd_limit = 0xfffff,
1332 .ssd_type = SDT_MEMERA,
1335 .ssd_xx = 0, .ssd_xx1 = 0,
1338 /* GUDATA_SEL 7 Data Descriptor for user */
1340 .ssd_limit = 0xfffff,
1341 .ssd_type = SDT_MEMRWA,
1344 .ssd_xx = 0, .ssd_xx1 = 0,
1347 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1348 { .ssd_base = 0x400,
1349 .ssd_limit = 0xfffff,
1350 .ssd_type = SDT_MEMRWA,
1353 .ssd_xx = 0, .ssd_xx1 = 0,
1356 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1359 .ssd_limit = sizeof(struct i386tss)-1,
1360 .ssd_type = SDT_SYS386TSS,
1363 .ssd_xx = 0, .ssd_xx1 = 0,
1366 /* GLDT_SEL 10 LDT Descriptor */
1367 { .ssd_base = (int) ldt,
1368 .ssd_limit = sizeof(ldt)-1,
1369 .ssd_type = SDT_SYSLDT,
1372 .ssd_xx = 0, .ssd_xx1 = 0,
1375 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1376 { .ssd_base = (int) ldt,
1377 .ssd_limit = (512 * sizeof(union descriptor)-1),
1378 .ssd_type = SDT_SYSLDT,
1381 .ssd_xx = 0, .ssd_xx1 = 0,
1384 /* GPANIC_SEL 12 Panic Tss Descriptor */
1385 { .ssd_base = (int) &dblfault_tss,
1386 .ssd_limit = sizeof(struct i386tss)-1,
1387 .ssd_type = SDT_SYS386TSS,
1390 .ssd_xx = 0, .ssd_xx1 = 0,
1393 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1395 .ssd_limit = 0xfffff,
1396 .ssd_type = SDT_MEMERA,
1399 .ssd_xx = 0, .ssd_xx1 = 0,
1402 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1404 .ssd_limit = 0xfffff,
1405 .ssd_type = SDT_MEMERA,
1408 .ssd_xx = 0, .ssd_xx1 = 0,
1411 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1413 .ssd_limit = 0xfffff,
1414 .ssd_type = SDT_MEMRWA,
1417 .ssd_xx = 0, .ssd_xx1 = 0,
1420 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1422 .ssd_limit = 0xfffff,
1423 .ssd_type = SDT_MEMRWA,
1426 .ssd_xx = 0, .ssd_xx1 = 0,
1429 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1431 .ssd_limit = 0xfffff,
1432 .ssd_type = SDT_MEMRWA,
1435 .ssd_xx = 0, .ssd_xx1 = 0,
1438 /* GNDIS_SEL 18 NDIS Descriptor */
1444 .ssd_xx = 0, .ssd_xx1 = 0,
1449 static struct soft_segment_descriptor ldt_segs[] = {
1450 /* Null Descriptor - overwritten by call gate */
1456 .ssd_xx = 0, .ssd_xx1 = 0,
1459 /* Null Descriptor - overwritten by call gate */
1465 .ssd_xx = 0, .ssd_xx1 = 0,
1468 /* Null Descriptor - overwritten by call gate */
1474 .ssd_xx = 0, .ssd_xx1 = 0,
1477 /* Code Descriptor for user */
1479 .ssd_limit = 0xfffff,
1480 .ssd_type = SDT_MEMERA,
1483 .ssd_xx = 0, .ssd_xx1 = 0,
1486 /* Null Descriptor - overwritten by call gate */
1492 .ssd_xx = 0, .ssd_xx1 = 0,
1495 /* Data Descriptor for user */
1497 .ssd_limit = 0xfffff,
1498 .ssd_type = SDT_MEMRWA,
1501 .ssd_xx = 0, .ssd_xx1 = 0,
1507 setidt(idx, func, typ, dpl, selec)
1514 struct gate_descriptor *ip;
1517 ip->gd_looffset = (int)func;
1518 ip->gd_selector = selec;
1524 ip->gd_hioffset = ((int)func)>>16 ;
1528 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1529 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1530 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1531 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1533 #ifdef KDTRACE_HOOKS
1537 IDTVEC(xen_intr_upcall),
1539 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1543 * Display the index and function name of any IDT entries that don't use
1544 * the default 'rsvd' entry point.
1546 DB_SHOW_COMMAND(idt, db_show_idt)
1548 struct gate_descriptor *ip;
1553 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1554 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1555 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1556 db_printf("%3d\t", idx);
1557 db_printsym(func, DB_STGY_PROC);
1564 /* Show privileged registers. */
1565 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1567 uint64_t idtr, gdtr;
1570 db_printf("idtr\t0x%08x/%04x\n",
1571 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1573 db_printf("gdtr\t0x%08x/%04x\n",
1574 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1575 db_printf("ldtr\t0x%04x\n", rldt());
1576 db_printf("tr\t0x%04x\n", rtr());
1577 db_printf("cr0\t0x%08x\n", rcr0());
1578 db_printf("cr2\t0x%08x\n", rcr2());
1579 db_printf("cr3\t0x%08x\n", rcr3());
1580 db_printf("cr4\t0x%08x\n", rcr4());
1581 if (rcr4() & CR4_XSAVE)
1582 db_printf("xcr0\t0x%016llx\n", rxcr(0));
1583 if (amd_feature & (AMDID_NX | AMDID_LM))
1584 db_printf("EFER\t0x%016llx\n", rdmsr(MSR_EFER));
1585 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
1586 db_printf("FEATURES_CTL\t0x%016llx\n",
1587 rdmsr(MSR_IA32_FEATURE_CONTROL));
1588 if ((cpu_vendor_id == CPU_VENDOR_INTEL ||
1589 cpu_vendor_id == CPU_VENDOR_AMD) && CPUID_TO_FAMILY(cpu_id) >= 6)
1590 db_printf("DEBUG_CTL\t0x%016llx\n", rdmsr(MSR_DEBUGCTLMSR));
1591 if (cpu_feature & CPUID_PAT)
1592 db_printf("PAT\t0x%016llx\n", rdmsr(MSR_PAT));
1595 DB_SHOW_COMMAND(dbregs, db_show_dbregs)
1598 db_printf("dr0\t0x%08x\n", rdr0());
1599 db_printf("dr1\t0x%08x\n", rdr1());
1600 db_printf("dr2\t0x%08x\n", rdr2());
1601 db_printf("dr3\t0x%08x\n", rdr3());
1602 db_printf("dr6\t0x%08x\n", rdr6());
1603 db_printf("dr7\t0x%08x\n", rdr7());
1609 struct segment_descriptor *sd;
1610 struct soft_segment_descriptor *ssd;
1612 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1613 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1614 ssd->ssd_type = sd->sd_type;
1615 ssd->ssd_dpl = sd->sd_dpl;
1616 ssd->ssd_p = sd->sd_p;
1617 ssd->ssd_def32 = sd->sd_def32;
1618 ssd->ssd_gran = sd->sd_gran;
1623 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1626 int i, insert_idx, physmap_idx;
1628 physmap_idx = *physmap_idxp;
1634 if (base > 0xffffffff) {
1635 printf("%uK of memory above 4GB ignored\n",
1636 (u_int)(length / 1024));
1642 * Find insertion point while checking for overlap. Start off by
1643 * assuming the new entry will be added to the end.
1645 insert_idx = physmap_idx + 2;
1646 for (i = 0; i <= physmap_idx; i += 2) {
1647 if (base < physmap[i + 1]) {
1648 if (base + length <= physmap[i]) {
1652 if (boothowto & RB_VERBOSE)
1654 "Overlapping memory regions, ignoring second region\n");
1659 /* See if we can prepend to the next entry. */
1660 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1661 physmap[insert_idx] = base;
1665 /* See if we can append to the previous entry. */
1666 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1667 physmap[insert_idx - 1] += length;
1672 *physmap_idxp = physmap_idx;
1673 if (physmap_idx == PHYSMAP_SIZE) {
1675 "Too many segments in the physical address map, giving up\n");
1680 * Move the last 'N' entries down to make room for the new
1683 for (i = physmap_idx; i > insert_idx; i -= 2) {
1684 physmap[i] = physmap[i - 2];
1685 physmap[i + 1] = physmap[i - 1];
1688 /* Insert the new entry. */
1689 physmap[insert_idx] = base;
1690 physmap[insert_idx + 1] = base + length;
1695 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1697 if (boothowto & RB_VERBOSE)
1698 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1699 smap->type, smap->base, smap->length);
1701 if (smap->type != SMAP_TYPE_MEMORY)
1704 return (add_physmap_entry(smap->base, smap->length, physmap,
1709 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
1712 struct bios_smap *smap, *smapend;
1715 * Memory map from INT 15:E820.
1717 * subr_module.c says:
1718 * "Consumer may safely assume that size value precedes data."
1719 * ie: an int32_t immediately precedes SMAP.
1721 smapsize = *((u_int32_t *)smapbase - 1);
1722 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1724 for (smap = smapbase; smap < smapend; smap++)
1725 if (!add_smap_entry(smap, physmap, physmap_idxp))
1737 if (basemem > 640) {
1738 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1744 * XXX if biosbasemem is now < 640, there is a `hole'
1745 * between the end of base memory and the start of
1746 * ISA memory. The hole may be empty or it may
1747 * contain BIOS code or data. Map it read/write so
1748 * that the BIOS can write to it. (Memory from 0 to
1749 * the physical end of the kernel is mapped read-only
1750 * to begin with and then parts of it are remapped.
1751 * The parts that aren't remapped form holes that
1752 * remain read-only and are unused by the kernel.
1753 * The base memory area is below the physical end of
1754 * the kernel and right now forms a read-only hole.
1755 * The part of it from PAGE_SIZE to
1756 * (trunc_page(biosbasemem * 1024) - 1) will be
1757 * remapped and used by the kernel later.)
1759 * This code is similar to the code used in
1760 * pmap_mapdev, but since no memory needs to be
1761 * allocated we simply change the mapping.
1763 for (pa = trunc_page(basemem * 1024);
1764 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1765 pmap_kenter(KERNBASE + pa, pa);
1768 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1769 * the vm86 page table so that vm86 can scribble on them using
1770 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1771 * page 0, at least as initialized here?
1773 pte = (pt_entry_t *)vm86paddr;
1774 for (i = basemem / 4; i < 160; i++)
1775 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1779 * Populate the (physmap) array with base/bound pairs describing the
1780 * available physical memory in the system, then test this memory and
1781 * build the phys_avail array describing the actually-available memory.
1783 * If we cannot accurately determine the physical memory map, then use
1784 * value from the 0xE801 call, and failing that, the RTC.
1786 * Total memory size may be set by the kernel environment variable
1787 * hw.physmem or the compile-time define MAXMEM.
1789 * XXX first should be vm_paddr_t.
1793 getmemsize(int first)
1795 int off, physmap_idx, pa_indx, da_indx;
1796 u_long physmem_tunable, memtest;
1797 vm_paddr_t physmap[PHYSMAP_SIZE];
1799 quad_t dcons_addr, dcons_size;
1806 bzero(physmap, sizeof(physmap));
1808 /* XXX - some of EPSON machines can't use PG_N */
1810 if (pc98_machine_type & M_EPSON_PC98) {
1811 switch (epson_machine_id) {
1815 case EPSON_PC486_HX:
1816 case EPSON_PC486_HG:
1817 case EPSON_PC486_HA:
1823 under16 = pc98_getmemsize(&basemem, &extmem);
1827 physmap[1] = basemem * 1024;
1829 physmap[physmap_idx] = 0x100000;
1830 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1833 * Now, physmap contains a map of physical memory.
1837 /* make hole for AP bootstrap code */
1838 physmap[1] = mp_bootaddress(physmap[1]);
1842 * Maxmem isn't the "maximum memory", it's one larger than the
1843 * highest page of the physical address space. It should be
1844 * called something like "Maxphyspage". We may adjust this
1845 * based on ``hw.physmem'' and the results of the memory test.
1847 Maxmem = atop(physmap[physmap_idx + 1]);
1850 Maxmem = MAXMEM / 4;
1853 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1854 Maxmem = atop(physmem_tunable);
1857 * By default keep the memtest enabled. Use a general name so that
1858 * one could eventually do more with the code than just disable it.
1861 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1863 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1864 (boothowto & RB_VERBOSE))
1865 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1868 * If Maxmem has been increased beyond what the system has detected,
1869 * extend the last memory segment to the new limit.
1871 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1872 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1875 * We need to divide chunk if Maxmem is larger than 16MB and
1876 * under 16MB area is not full of memory.
1877 * (1) system area (15-16MB region) is cut off
1878 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1880 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1881 /* 15M - 16M region is cut off, so need to divide chunk */
1882 physmap[physmap_idx + 1] = under16 * 1024;
1884 physmap[physmap_idx] = 0x1000000;
1885 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1888 /* call pmap initialization to make new kernel address space */
1889 pmap_bootstrap(first);
1892 * Size up each available chunk of physical memory.
1894 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1897 phys_avail[pa_indx++] = physmap[0];
1898 phys_avail[pa_indx] = physmap[0];
1899 dump_avail[da_indx] = physmap[0];
1903 * Get dcons buffer address
1905 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1906 getenv_quad("dcons.size", &dcons_size) == 0)
1910 * physmap is in bytes, so when converting to page boundaries,
1911 * round up the start address and round down the end address.
1913 for (i = 0; i <= physmap_idx; i += 2) {
1916 end = ptoa((vm_paddr_t)Maxmem);
1917 if (physmap[i + 1] < end)
1918 end = trunc_page(physmap[i + 1]);
1919 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1920 int tmp, page_bad, full;
1921 int *ptr = (int *)CADDR3;
1925 * block out kernel memory as not available.
1927 if (pa >= KERNLOAD && pa < first)
1931 * block out dcons buffer
1934 && pa >= trunc_page(dcons_addr)
1935 && pa < dcons_addr + dcons_size)
1943 * map page into kernel: valid, read/write,non-cacheable
1945 *pte = pa | PG_V | PG_RW | pg_n;
1950 * Test for alternating 1's and 0's
1952 *(volatile int *)ptr = 0xaaaaaaaa;
1953 if (*(volatile int *)ptr != 0xaaaaaaaa)
1956 * Test for alternating 0's and 1's
1958 *(volatile int *)ptr = 0x55555555;
1959 if (*(volatile int *)ptr != 0x55555555)
1964 *(volatile int *)ptr = 0xffffffff;
1965 if (*(volatile int *)ptr != 0xffffffff)
1970 *(volatile int *)ptr = 0x0;
1971 if (*(volatile int *)ptr != 0x0)
1974 * Restore original value.
1980 * Adjust array of valid/good pages.
1982 if (page_bad == TRUE)
1985 * If this good page is a continuation of the
1986 * previous set of good pages, then just increase
1987 * the end pointer. Otherwise start a new chunk.
1988 * Note that "end" points one higher than end,
1989 * making the range >= start and < end.
1990 * If we're also doing a speculative memory
1991 * test and we at or past the end, bump up Maxmem
1992 * so that we keep going. The first bad page
1993 * will terminate the loop.
1995 if (phys_avail[pa_indx] == pa) {
1996 phys_avail[pa_indx] += PAGE_SIZE;
1999 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2001 "Too many holes in the physical address space, giving up\n");
2006 phys_avail[pa_indx++] = pa; /* start */
2007 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2011 if (dump_avail[da_indx] == pa) {
2012 dump_avail[da_indx] += PAGE_SIZE;
2015 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2019 dump_avail[da_indx++] = pa; /* start */
2020 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2032 * The last chunk must contain at least one page plus the message
2033 * buffer to avoid complicating other code (message buffer address
2034 * calculation, etc.).
2036 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2037 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2038 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2039 phys_avail[pa_indx--] = 0;
2040 phys_avail[pa_indx--] = 0;
2043 Maxmem = atop(phys_avail[pa_indx]);
2045 /* Trim off space for the message buffer. */
2046 phys_avail[pa_indx] -= round_page(msgbufsize);
2048 /* Map the message buffer. */
2049 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2050 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2055 getmemsize(int first)
2057 int has_smap, off, physmap_idx, pa_indx, da_indx;
2059 vm_paddr_t physmap[PHYSMAP_SIZE];
2061 quad_t dcons_addr, dcons_size, physmem_tunable;
2062 int hasbrokenint12, i, res;
2064 struct vm86frame vmf;
2065 struct vm86context vmc;
2067 struct bios_smap *smap, *smapbase;
2072 if (arch_i386_is_xbox) {
2074 * We queried the memory size before, so chop off 4MB for
2075 * the framebuffer and inform the OS of this.
2078 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2083 bzero(&vmf, sizeof(vmf));
2084 bzero(physmap, sizeof(physmap));
2088 * Check if the loader supplied an SMAP memory map. If so,
2089 * use that and do not make any VM86 calls.
2092 kmdp = preload_search_by_type("elf kernel");
2094 kmdp = preload_search_by_type("elf32 kernel");
2095 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2096 MODINFO_METADATA | MODINFOMD_SMAP);
2097 if (smapbase != NULL) {
2098 add_smap_entries(smapbase, physmap, &physmap_idx);
2104 * Some newer BIOSes have a broken INT 12H implementation
2105 * which causes a kernel panic immediately. In this case, we
2106 * need use the SMAP to determine the base memory size.
2109 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2110 if (hasbrokenint12 == 0) {
2111 /* Use INT12 to determine base memory size. */
2112 vm86_intcall(0x12, &vmf);
2113 basemem = vmf.vmf_ax;
2118 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2119 * the kernel page table so we can use it as a buffer. The
2120 * kernel will unmap this page later.
2122 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2124 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2125 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2126 KASSERT(res != 0, ("vm86_getptr() failed: address not found"));
2130 vmf.vmf_eax = 0xE820;
2131 vmf.vmf_edx = SMAP_SIG;
2132 vmf.vmf_ecx = sizeof(struct bios_smap);
2133 i = vm86_datacall(0x15, &vmf, &vmc);
2134 if (i || vmf.vmf_eax != SMAP_SIG)
2137 if (!add_smap_entry(smap, physmap, &physmap_idx))
2139 } while (vmf.vmf_ebx != 0);
2143 * If we didn't fetch the "base memory" size from INT12,
2144 * figure it out from the SMAP (or just guess).
2147 for (i = 0; i <= physmap_idx; i += 2) {
2148 if (physmap[i] == 0x00000000) {
2149 basemem = physmap[i + 1] / 1024;
2154 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2160 if (physmap[1] != 0)
2164 * If we failed to find an SMAP, figure out the extended
2165 * memory size. We will then build a simple memory map with
2166 * two segments, one for "base memory" and the second for
2167 * "extended memory". Note that "extended memory" starts at a
2168 * physical address of 1MB and that both basemem and extmem
2169 * are in units of 1KB.
2171 * First, try to fetch the extended memory size via INT 15:E801.
2173 vmf.vmf_ax = 0xE801;
2174 if (vm86_intcall(0x15, &vmf) == 0) {
2175 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2178 * If INT15:E801 fails, this is our last ditch effort
2179 * to determine the extended memory size. Currently
2180 * we prefer the RTC value over INT15:88.
2184 vm86_intcall(0x15, &vmf);
2185 extmem = vmf.vmf_ax;
2187 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2192 * Special hack for chipsets that still remap the 384k hole when
2193 * there's 16MB of memory - this really confuses people that
2194 * are trying to use bus mastering ISA controllers with the
2195 * "16MB limit"; they only have 16MB, but the remapping puts
2196 * them beyond the limit.
2198 * If extended memory is between 15-16MB (16-17MB phys address range),
2201 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2205 physmap[1] = basemem * 1024;
2207 physmap[physmap_idx] = 0x100000;
2208 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2212 * Now, physmap contains a map of physical memory.
2216 /* make hole for AP bootstrap code */
2217 physmap[1] = mp_bootaddress(physmap[1]);
2221 * Maxmem isn't the "maximum memory", it's one larger than the
2222 * highest page of the physical address space. It should be
2223 * called something like "Maxphyspage". We may adjust this
2224 * based on ``hw.physmem'' and the results of the memory test.
2226 * This is especially confusing when it is much larger than the
2227 * memory size and is displayed as "realmem".
2229 Maxmem = atop(physmap[physmap_idx + 1]);
2232 Maxmem = MAXMEM / 4;
2235 if (TUNABLE_QUAD_FETCH("hw.physmem", &physmem_tunable))
2236 Maxmem = atop(physmem_tunable);
2239 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2240 * the amount of memory in the system.
2242 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2243 Maxmem = atop(physmap[physmap_idx + 1]);
2246 * By default enable the memory test on real hardware, and disable
2247 * it if we appear to be running in a VM. This avoids touching all
2248 * pages unnecessarily, which doesn't matter on real hardware but is
2249 * bad for shared VM hosts. Use a general name so that
2250 * one could eventually do more with the code than just disable it.
2252 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2253 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2255 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2256 (boothowto & RB_VERBOSE))
2257 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2260 * If Maxmem has been increased beyond what the system has detected,
2261 * extend the last memory segment to the new limit.
2263 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2264 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2266 /* call pmap initialization to make new kernel address space */
2267 pmap_bootstrap(first);
2270 * Size up each available chunk of physical memory.
2272 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2275 phys_avail[pa_indx++] = physmap[0];
2276 phys_avail[pa_indx] = physmap[0];
2277 dump_avail[da_indx] = physmap[0];
2281 * Get dcons buffer address
2283 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2284 getenv_quad("dcons.size", &dcons_size) == 0)
2288 * physmap is in bytes, so when converting to page boundaries,
2289 * round up the start address and round down the end address.
2291 for (i = 0; i <= physmap_idx; i += 2) {
2294 end = ptoa((vm_paddr_t)Maxmem);
2295 if (physmap[i + 1] < end)
2296 end = trunc_page(physmap[i + 1]);
2297 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2298 int tmp, page_bad, full;
2299 int *ptr = (int *)CADDR3;
2303 * block out kernel memory as not available.
2305 if (pa >= KERNLOAD && pa < first)
2309 * block out dcons buffer
2312 && pa >= trunc_page(dcons_addr)
2313 && pa < dcons_addr + dcons_size)
2321 * map page into kernel: valid, read/write,non-cacheable
2323 *pte = pa | PG_V | PG_RW | PG_N;
2328 * Test for alternating 1's and 0's
2330 *(volatile int *)ptr = 0xaaaaaaaa;
2331 if (*(volatile int *)ptr != 0xaaaaaaaa)
2334 * Test for alternating 0's and 1's
2336 *(volatile int *)ptr = 0x55555555;
2337 if (*(volatile int *)ptr != 0x55555555)
2342 *(volatile int *)ptr = 0xffffffff;
2343 if (*(volatile int *)ptr != 0xffffffff)
2348 *(volatile int *)ptr = 0x0;
2349 if (*(volatile int *)ptr != 0x0)
2352 * Restore original value.
2358 * Adjust array of valid/good pages.
2360 if (page_bad == TRUE)
2363 * If this good page is a continuation of the
2364 * previous set of good pages, then just increase
2365 * the end pointer. Otherwise start a new chunk.
2366 * Note that "end" points one higher than end,
2367 * making the range >= start and < end.
2368 * If we're also doing a speculative memory
2369 * test and we at or past the end, bump up Maxmem
2370 * so that we keep going. The first bad page
2371 * will terminate the loop.
2373 if (phys_avail[pa_indx] == pa) {
2374 phys_avail[pa_indx] += PAGE_SIZE;
2377 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2379 "Too many holes in the physical address space, giving up\n");
2384 phys_avail[pa_indx++] = pa; /* start */
2385 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2389 if (dump_avail[da_indx] == pa) {
2390 dump_avail[da_indx] += PAGE_SIZE;
2393 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2397 dump_avail[da_indx++] = pa; /* start */
2398 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2410 * The last chunk must contain at least one page plus the message
2411 * buffer to avoid complicating other code (message buffer address
2412 * calculation, etc.).
2414 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2415 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2416 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2417 phys_avail[pa_indx--] = 0;
2418 phys_avail[pa_indx--] = 0;
2421 Maxmem = atop(phys_avail[pa_indx]);
2423 /* Trim off space for the message buffer. */
2424 phys_avail[pa_indx] -= round_page(msgbufsize);
2426 /* Map the message buffer. */
2427 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2428 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2437 db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab);
2441 if (boothowto & RB_KDB)
2442 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2450 struct gate_descriptor *gdp;
2451 int gsel_tss, metadata_missing, x, pa;
2453 #ifdef CPU_ENABLE_SSE
2454 struct xstate_hdr *xhdr;
2458 thread0.td_kstack = proc0kstack;
2459 thread0.td_kstack_pages = TD0_KSTACK_PAGES;
2462 * This may be done better later if it gets more high level
2463 * components in it. If so just link td->td_proc here.
2465 proc_linkup0(&proc0, &thread0);
2474 metadata_missing = 0;
2475 if (bootinfo.bi_modulep) {
2476 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2477 preload_bootstrap_relocate(KERNBASE);
2479 metadata_missing = 1;
2482 if (bootinfo.bi_envp != 0)
2483 init_static_kenv((char *)bootinfo.bi_envp + KERNBASE, 0);
2485 init_static_kenv(NULL, 0);
2487 /* Init basic tunables, hz etc */
2491 * Make gdt memory segments. All segments cover the full 4GB
2492 * of address space and permissions are enforced at page level.
2494 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2495 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2496 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2497 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2498 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2499 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2502 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2503 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2504 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2506 for (x = 0; x < NGDT; x++)
2507 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2509 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2510 r_gdt.rd_base = (int) gdt;
2511 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2514 pcpu_init(pc, 0, sizeof(struct pcpu));
2515 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2516 pmap_kenter(pa + KERNBASE, pa);
2517 dpcpu_init((void *)(first + KERNBASE), 0);
2518 first += DPCPU_SIZE;
2519 PCPU_SET(prvspace, pc);
2520 PCPU_SET(curthread, &thread0);
2521 /* Non-late cninit() and printf() can be moved up to here. */
2524 * Initialize mutexes.
2526 * icu_lock: in order to allow an interrupt to occur in a critical
2527 * section, to set pcpu->ipending (etc...) properly, we
2528 * must be able to get the icu lock, so it can't be
2532 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2534 /* make ldt memory segments */
2535 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2536 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2537 for (x = 0; x < nitems(ldt_segs); x++)
2538 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2540 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2542 PCPU_SET(currentldt, _default_ldt);
2545 for (x = 0; x < NIDT; x++)
2546 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2547 GSEL(GCODE_SEL, SEL_KPL));
2548 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2549 GSEL(GCODE_SEL, SEL_KPL));
2550 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2551 GSEL(GCODE_SEL, SEL_KPL));
2552 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2553 GSEL(GCODE_SEL, SEL_KPL));
2554 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2555 GSEL(GCODE_SEL, SEL_KPL));
2556 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2557 GSEL(GCODE_SEL, SEL_KPL));
2558 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2559 GSEL(GCODE_SEL, SEL_KPL));
2560 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2561 GSEL(GCODE_SEL, SEL_KPL));
2562 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2563 , GSEL(GCODE_SEL, SEL_KPL));
2564 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2565 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2566 GSEL(GCODE_SEL, SEL_KPL));
2567 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2568 GSEL(GCODE_SEL, SEL_KPL));
2569 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2570 GSEL(GCODE_SEL, SEL_KPL));
2571 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2572 GSEL(GCODE_SEL, SEL_KPL));
2573 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2574 GSEL(GCODE_SEL, SEL_KPL));
2575 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2576 GSEL(GCODE_SEL, SEL_KPL));
2577 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2578 GSEL(GCODE_SEL, SEL_KPL));
2579 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2580 GSEL(GCODE_SEL, SEL_KPL));
2581 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2582 GSEL(GCODE_SEL, SEL_KPL));
2583 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2584 GSEL(GCODE_SEL, SEL_KPL));
2585 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2586 GSEL(GCODE_SEL, SEL_KPL));
2587 #ifdef KDTRACE_HOOKS
2588 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2589 GSEL(GCODE_SEL, SEL_KPL));
2592 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYS386IGT, SEL_UPL,
2593 GSEL(GCODE_SEL, SEL_KPL));
2596 r_idt.rd_limit = sizeof(idt0) - 1;
2597 r_idt.rd_base = (int) idt;
2602 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2603 * This should be 0x10de / 0x02a5.
2605 * This is exactly what Linux does.
2607 outl(0xcf8, 0x80000000);
2608 if (inl(0xcfc) == 0x02a510de) {
2609 arch_i386_is_xbox = 1;
2610 pic16l_setled(XBOX_LED_GREEN);
2613 * We are an XBOX, but we may have either 64MB or 128MB of
2614 * memory. The PCI host bridge should be programmed for this,
2615 * so we just query it.
2617 outl(0xcf8, 0x80000084);
2618 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2623 * Initialize the clock before the console so that console
2624 * initialization can use DELAY().
2628 finishidentcpu(); /* Final stage of CPU initialization */
2629 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2630 GSEL(GCODE_SEL, SEL_KPL));
2631 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2632 GSEL(GCODE_SEL, SEL_KPL));
2633 initializecpu(); /* Initialize CPU registers */
2634 initializecpucache();
2636 /* pointer to selector slot for %fs/%gs */
2637 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2639 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2640 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2641 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2642 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2643 #if defined(PAE) || defined(PAE_TABLES)
2644 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2646 dblfault_tss.tss_cr3 = (int)IdlePTD;
2648 dblfault_tss.tss_eip = (int)dblfault_handler;
2649 dblfault_tss.tss_eflags = PSL_KERNEL;
2650 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2651 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2652 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2653 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2654 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2656 /* Initialize the tss (except for the final esp0) early for vm86. */
2657 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2658 thread0.td_kstack_pages * PAGE_SIZE - 16);
2659 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2660 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2661 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2662 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2663 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2666 /* Initialize the PIC early for vm86 calls. */
2674 /* Reset and mask the atpics and leave them shut down. */
2678 * Point the ICU spurious interrupt vectors at the APIC spurious
2679 * interrupt handler.
2681 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2682 GSEL(GCODE_SEL, SEL_KPL));
2683 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2684 GSEL(GCODE_SEL, SEL_KPL));
2689 * The console and kdb should be initialized even earlier than here,
2690 * but some console drivers don't work until after getmemsize().
2691 * Default to late console initialization to support these drivers.
2692 * This loses mainly printf()s in getmemsize() and early debugging.
2695 TUNABLE_INT_FETCH("debug.late_console", &late_console);
2696 if (!late_console) {
2703 init_param2(physmem);
2705 /* now running on new page tables, configured,and u/iom is accessible */
2710 if (metadata_missing)
2711 printf("WARNING: loader(8) metadata is missing!\n");
2716 msgbufinit(msgbufp, msgbufsize);
2721 * Set up thread0 pcb after npxinit calculated pcb + fpu save
2722 * area size. Zero out the extended state header in fpu save
2725 thread0.td_pcb = get_pcb_td(&thread0);
2726 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2727 #ifdef CPU_ENABLE_SSE
2729 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2731 xhdr->xstate_bv = xsave_mask;
2734 PCPU_SET(curpcb, thread0.td_pcb);
2735 /* Move esp0 in the tss to its final place. */
2736 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2737 PCPU_SET(common_tss.tss_esp0, (vm_offset_t)thread0.td_pcb - 16);
2738 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; /* clear busy bit */
2741 /* make a call gate to reenter kernel with */
2742 gdp = &ldt[LSYS5CALLS_SEL].gd;
2744 x = (int) &IDTVEC(lcall_syscall);
2745 gdp->gd_looffset = x;
2746 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2748 gdp->gd_type = SDT_SYS386CGT;
2749 gdp->gd_dpl = SEL_UPL;
2751 gdp->gd_hioffset = x >> 16;
2753 /* XXX does this work? */
2755 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2756 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2758 /* transfer to user mode */
2760 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2761 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2763 /* setup proc 0's pcb */
2764 thread0.td_pcb->pcb_flags = 0;
2765 #if defined(PAE) || defined(PAE_TABLES)
2766 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2768 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2770 thread0.td_pcb->pcb_ext = 0;
2771 thread0.td_frame = &proc0_tf;
2779 /* Location of kernel stack for locore */
2780 return ((register_t)thread0.td_pcb);
2784 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2787 pcpu->pc_acpi_id = 0xffffffff;
2792 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
2794 struct bios_smap *smapbase;
2795 struct bios_smap_xattr smap;
2798 int count, error, i;
2800 /* Retrieve the system memory map from the loader. */
2801 kmdp = preload_search_by_type("elf kernel");
2803 kmdp = preload_search_by_type("elf32 kernel");
2804 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2805 MODINFO_METADATA | MODINFOMD_SMAP);
2806 if (smapbase == NULL)
2808 smapattr = (uint32_t *)preload_search_info(kmdp,
2809 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
2810 count = *((u_int32_t *)smapbase - 1) / sizeof(*smapbase);
2812 for (i = 0; i < count; i++) {
2813 smap.base = smapbase[i].base;
2814 smap.length = smapbase[i].length;
2815 smap.type = smapbase[i].type;
2816 if (smapattr != NULL)
2817 smap.xattr = smapattr[i];
2820 error = SYSCTL_OUT(req, &smap, sizeof(smap));
2824 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2825 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
2829 spinlock_enter(void)
2835 if (td->td_md.md_spinlock_count == 0) {
2836 flags = intr_disable();
2837 td->td_md.md_spinlock_count = 1;
2838 td->td_md.md_saved_flags = flags;
2840 td->td_md.md_spinlock_count++;
2852 flags = td->td_md.md_saved_flags;
2853 td->td_md.md_spinlock_count--;
2854 if (td->td_md.md_spinlock_count == 0)
2855 intr_restore(flags);
2858 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2859 static void f00f_hack(void *unused);
2860 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2863 f00f_hack(void *unused)
2865 struct gate_descriptor *new_idt;
2873 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2875 tmp = kmem_malloc(kernel_arena, PAGE_SIZE * 2, M_WAITOK | M_ZERO);
2877 panic("kmem_malloc returned 0");
2879 /* Put the problematic entry (#6) at the end of the lower page. */
2880 new_idt = (struct gate_descriptor*)
2881 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2882 bcopy(idt, new_idt, sizeof(idt0));
2883 r_idt.rd_base = (u_int)new_idt;
2886 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
2888 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2891 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2892 * we want to start a backtrace from the function that caused us to enter
2893 * the debugger. We have the context in the trapframe, but base the trace
2894 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2895 * enough for a backtrace.
2898 makectx(struct trapframe *tf, struct pcb *pcb)
2901 pcb->pcb_edi = tf->tf_edi;
2902 pcb->pcb_esi = tf->tf_esi;
2903 pcb->pcb_ebp = tf->tf_ebp;
2904 pcb->pcb_ebx = tf->tf_ebx;
2905 pcb->pcb_eip = tf->tf_eip;
2906 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2907 pcb->pcb_gs = rgs();
2911 ptrace_set_pc(struct thread *td, u_long addr)
2914 td->td_frame->tf_eip = addr;
2919 ptrace_single_step(struct thread *td)
2921 td->td_frame->tf_eflags |= PSL_T;
2926 ptrace_clear_single_step(struct thread *td)
2928 td->td_frame->tf_eflags &= ~PSL_T;
2933 fill_regs(struct thread *td, struct reg *regs)
2936 struct trapframe *tp;
2940 regs->r_gs = pcb->pcb_gs;
2941 return (fill_frame_regs(tp, regs));
2945 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2947 regs->r_fs = tp->tf_fs;
2948 regs->r_es = tp->tf_es;
2949 regs->r_ds = tp->tf_ds;
2950 regs->r_edi = tp->tf_edi;
2951 regs->r_esi = tp->tf_esi;
2952 regs->r_ebp = tp->tf_ebp;
2953 regs->r_ebx = tp->tf_ebx;
2954 regs->r_edx = tp->tf_edx;
2955 regs->r_ecx = tp->tf_ecx;
2956 regs->r_eax = tp->tf_eax;
2957 regs->r_eip = tp->tf_eip;
2958 regs->r_cs = tp->tf_cs;
2959 regs->r_eflags = tp->tf_eflags;
2960 regs->r_esp = tp->tf_esp;
2961 regs->r_ss = tp->tf_ss;
2966 set_regs(struct thread *td, struct reg *regs)
2969 struct trapframe *tp;
2972 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2973 !CS_SECURE(regs->r_cs))
2976 tp->tf_fs = regs->r_fs;
2977 tp->tf_es = regs->r_es;
2978 tp->tf_ds = regs->r_ds;
2979 tp->tf_edi = regs->r_edi;
2980 tp->tf_esi = regs->r_esi;
2981 tp->tf_ebp = regs->r_ebp;
2982 tp->tf_ebx = regs->r_ebx;
2983 tp->tf_edx = regs->r_edx;
2984 tp->tf_ecx = regs->r_ecx;
2985 tp->tf_eax = regs->r_eax;
2986 tp->tf_eip = regs->r_eip;
2987 tp->tf_cs = regs->r_cs;
2988 tp->tf_eflags = regs->r_eflags;
2989 tp->tf_esp = regs->r_esp;
2990 tp->tf_ss = regs->r_ss;
2991 pcb->pcb_gs = regs->r_gs;
2996 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2999 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
3000 P_SHOULDSTOP(td->td_proc),
3001 ("not suspended thread %p", td));
3005 bzero(fpregs, sizeof(*fpregs));
3007 #ifdef CPU_ENABLE_SSE
3009 npx_fill_fpregs_xmm(&get_pcb_user_save_td(td)->sv_xmm,
3010 (struct save87 *)fpregs);
3012 #endif /* CPU_ENABLE_SSE */
3013 bcopy(&get_pcb_user_save_td(td)->sv_87, fpregs,
3019 set_fpregs(struct thread *td, struct fpreg *fpregs)
3022 #ifdef CPU_ENABLE_SSE
3024 npx_set_fpregs_xmm((struct save87 *)fpregs,
3025 &get_pcb_user_save_td(td)->sv_xmm);
3027 #endif /* CPU_ENABLE_SSE */
3028 bcopy(fpregs, &get_pcb_user_save_td(td)->sv_87,
3037 * Get machine context.
3040 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3042 struct trapframe *tp;
3043 struct segment_descriptor *sdp;
3047 PROC_LOCK(curthread->td_proc);
3048 mcp->mc_onstack = sigonstack(tp->tf_esp);
3049 PROC_UNLOCK(curthread->td_proc);
3050 mcp->mc_gs = td->td_pcb->pcb_gs;
3051 mcp->mc_fs = tp->tf_fs;
3052 mcp->mc_es = tp->tf_es;
3053 mcp->mc_ds = tp->tf_ds;
3054 mcp->mc_edi = tp->tf_edi;
3055 mcp->mc_esi = tp->tf_esi;
3056 mcp->mc_ebp = tp->tf_ebp;
3057 mcp->mc_isp = tp->tf_isp;
3058 mcp->mc_eflags = tp->tf_eflags;
3059 if (flags & GET_MC_CLEAR_RET) {
3062 mcp->mc_eflags &= ~PSL_C;
3064 mcp->mc_eax = tp->tf_eax;
3065 mcp->mc_edx = tp->tf_edx;
3067 mcp->mc_ebx = tp->tf_ebx;
3068 mcp->mc_ecx = tp->tf_ecx;
3069 mcp->mc_eip = tp->tf_eip;
3070 mcp->mc_cs = tp->tf_cs;
3071 mcp->mc_esp = tp->tf_esp;
3072 mcp->mc_ss = tp->tf_ss;
3073 mcp->mc_len = sizeof(*mcp);
3074 get_fpcontext(td, mcp, NULL, 0);
3075 sdp = &td->td_pcb->pcb_fsd;
3076 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3077 sdp = &td->td_pcb->pcb_gsd;
3078 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3080 mcp->mc_xfpustate = 0;
3081 mcp->mc_xfpustate_len = 0;
3082 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3087 * Set machine context.
3089 * However, we don't set any but the user modifiable flags, and we won't
3090 * touch the cs selector.
3093 set_mcontext(struct thread *td, mcontext_t *mcp)
3095 struct trapframe *tp;
3100 if (mcp->mc_len != sizeof(*mcp) ||
3101 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
3103 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3104 (tp->tf_eflags & ~PSL_USERCHANGE);
3105 if (mcp->mc_flags & _MC_HASFPXSTATE) {
3106 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
3107 sizeof(union savefpu))
3109 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
3110 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
3111 mcp->mc_xfpustate_len);
3116 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
3119 tp->tf_fs = mcp->mc_fs;
3120 tp->tf_es = mcp->mc_es;
3121 tp->tf_ds = mcp->mc_ds;
3122 tp->tf_edi = mcp->mc_edi;
3123 tp->tf_esi = mcp->mc_esi;
3124 tp->tf_ebp = mcp->mc_ebp;
3125 tp->tf_ebx = mcp->mc_ebx;
3126 tp->tf_edx = mcp->mc_edx;
3127 tp->tf_ecx = mcp->mc_ecx;
3128 tp->tf_eax = mcp->mc_eax;
3129 tp->tf_eip = mcp->mc_eip;
3130 tp->tf_eflags = eflags;
3131 tp->tf_esp = mcp->mc_esp;
3132 tp->tf_ss = mcp->mc_ss;
3133 td->td_pcb->pcb_gs = mcp->mc_gs;
3138 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
3139 size_t xfpusave_len)
3141 #ifdef CPU_ENABLE_SSE
3142 size_t max_len, len;
3146 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3147 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3148 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3150 mcp->mc_ownedfp = npxgetregs(td);
3151 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
3152 sizeof(mcp->mc_fpstate));
3153 mcp->mc_fpformat = npxformat();
3154 #ifdef CPU_ENABLE_SSE
3155 if (!use_xsave || xfpusave_len == 0)
3157 max_len = cpu_max_ext_state_size - sizeof(union savefpu);
3159 if (len > max_len) {
3161 bzero(xfpusave + max_len, len - max_len);
3163 mcp->mc_flags |= _MC_HASFPXSTATE;
3164 mcp->mc_xfpustate_len = len;
3165 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
3171 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
3172 size_t xfpustate_len)
3174 union savefpu *fpstate;
3177 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3179 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3180 mcp->mc_fpformat != _MC_FPFMT_XMM)
3182 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
3183 /* We don't care what state is left in the FPU or PCB. */
3186 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3187 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3189 fpstate = (union savefpu *)&mcp->mc_fpstate;
3190 #ifdef CPU_ENABLE_SSE
3192 fpstate->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
3194 error = npxsetregs(td, fpstate, xfpustate, xfpustate_len);
3204 fpstate_drop(struct thread *td)
3207 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3210 if (PCPU_GET(fpcurthread) == td)
3214 * XXX force a full drop of the npx. The above only drops it if we
3215 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3217 * XXX I don't much like npxgetregs()'s semantics of doing a full
3218 * drop. Dropping only to the pcb matches fnsave's behaviour.
3219 * We only need to drop to !PCB_INITDONE in sendsig(). But
3220 * sendsig() is the only caller of npxgetregs()... perhaps we just
3221 * have too many layers.
3223 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3224 PCB_NPXUSERINITDONE);
3229 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3234 dbregs->dr[0] = rdr0();
3235 dbregs->dr[1] = rdr1();
3236 dbregs->dr[2] = rdr2();
3237 dbregs->dr[3] = rdr3();
3238 dbregs->dr[4] = rdr4();
3239 dbregs->dr[5] = rdr5();
3240 dbregs->dr[6] = rdr6();
3241 dbregs->dr[7] = rdr7();
3244 dbregs->dr[0] = pcb->pcb_dr0;
3245 dbregs->dr[1] = pcb->pcb_dr1;
3246 dbregs->dr[2] = pcb->pcb_dr2;
3247 dbregs->dr[3] = pcb->pcb_dr3;
3250 dbregs->dr[6] = pcb->pcb_dr6;
3251 dbregs->dr[7] = pcb->pcb_dr7;
3257 set_dbregs(struct thread *td, struct dbreg *dbregs)
3263 load_dr0(dbregs->dr[0]);
3264 load_dr1(dbregs->dr[1]);
3265 load_dr2(dbregs->dr[2]);
3266 load_dr3(dbregs->dr[3]);
3267 load_dr4(dbregs->dr[4]);
3268 load_dr5(dbregs->dr[5]);
3269 load_dr6(dbregs->dr[6]);
3270 load_dr7(dbregs->dr[7]);
3273 * Don't let an illegal value for dr7 get set. Specifically,
3274 * check for undefined settings. Setting these bit patterns
3275 * result in undefined behaviour and can lead to an unexpected
3278 for (i = 0; i < 4; i++) {
3279 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3281 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3288 * Don't let a process set a breakpoint that is not within the
3289 * process's address space. If a process could do this, it
3290 * could halt the system by setting a breakpoint in the kernel
3291 * (if ddb was enabled). Thus, we need to check to make sure
3292 * that no breakpoints are being enabled for addresses outside
3293 * process's address space.
3295 * XXX - what about when the watched area of the user's
3296 * address space is written into from within the kernel
3297 * ... wouldn't that still cause a breakpoint to be generated
3298 * from within kernel mode?
3301 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3302 /* dr0 is enabled */
3303 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3307 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3308 /* dr1 is enabled */
3309 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3313 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3314 /* dr2 is enabled */
3315 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3319 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3320 /* dr3 is enabled */
3321 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3325 pcb->pcb_dr0 = dbregs->dr[0];
3326 pcb->pcb_dr1 = dbregs->dr[1];
3327 pcb->pcb_dr2 = dbregs->dr[2];
3328 pcb->pcb_dr3 = dbregs->dr[3];
3329 pcb->pcb_dr6 = dbregs->dr[6];
3330 pcb->pcb_dr7 = dbregs->dr[7];
3332 pcb->pcb_flags |= PCB_DBREGS;
3339 * Return > 0 if a hardware breakpoint has been hit, and the
3340 * breakpoint was in user space. Return 0, otherwise.
3343 user_dbreg_trap(void)
3345 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3346 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3347 int nbp; /* number of breakpoints that triggered */
3348 caddr_t addr[4]; /* breakpoint addresses */
3352 if ((dr7 & 0x000000ff) == 0) {
3354 * all GE and LE bits in the dr7 register are zero,
3355 * thus the trap couldn't have been caused by the
3356 * hardware debug registers
3363 bp = dr6 & 0x0000000f;
3367 * None of the breakpoint bits are set meaning this
3368 * trap was not caused by any of the debug registers
3374 * at least one of the breakpoints were hit, check to see
3375 * which ones and if any of them are user space addresses
3379 addr[nbp++] = (caddr_t)rdr0();
3382 addr[nbp++] = (caddr_t)rdr1();
3385 addr[nbp++] = (caddr_t)rdr2();
3388 addr[nbp++] = (caddr_t)rdr3();
3391 for (i = 0; i < nbp; i++) {
3392 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3394 * addr[i] is in user space
3401 * None of the breakpoints are in user space.
3409 * Provide inb() and outb() as functions. They are normally only available as
3410 * inline functions, thus cannot be called from the debugger.
3413 /* silence compiler warnings */
3414 u_char inb_(u_short);
3415 void outb_(u_short, u_char);
3424 outb_(u_short port, u_char data)