2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2018 The FreeBSD Foundation
5 * Copyright (c) 1992 Terrence R. Lambert.
6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
9 * This code is derived from software contributed to Berkeley by
12 * Portions of this software were developed by A. Joseph Koshy under
13 * sponsorship from the FreeBSD Foundation and Google, Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
46 #include <sys/cdefs.h>
47 __FBSDID("$FreeBSD$");
50 #include "opt_atpic.h"
55 #include "opt_kstack_pages.h"
56 #include "opt_maxmem.h"
57 #include "opt_perfmon.h"
58 #include "opt_platform.h"
60 #include <sys/param.h>
62 #include <sys/systm.h>
66 #include <sys/callout.h>
69 #include <sys/eventhandler.h>
71 #include <sys/imgact.h>
73 #include <sys/kernel.h>
75 #include <sys/linker.h>
77 #include <sys/malloc.h>
78 #include <sys/memrange.h>
79 #include <sys/msgbuf.h>
80 #include <sys/mutex.h>
82 #include <sys/ptrace.h>
83 #include <sys/reboot.h>
85 #include <sys/rwlock.h>
86 #include <sys/sched.h>
87 #include <sys/signalvar.h>
89 #include <sys/syscallsubr.h>
90 #include <sys/sysctl.h>
91 #include <sys/sysent.h>
92 #include <sys/sysproto.h>
93 #include <sys/ucontext.h>
94 #include <sys/vmmeter.h>
97 #include <vm/vm_param.h>
98 #include <vm/vm_extern.h>
99 #include <vm/vm_kern.h>
100 #include <vm/vm_page.h>
101 #include <vm/vm_map.h>
102 #include <vm/vm_object.h>
103 #include <vm/vm_pager.h>
104 #include <vm/vm_phys.h>
105 #include <vm/vm_dumpset.h>
109 #error KDB must be enabled in order for DDB to work!
112 #include <ddb/db_sym.h>
117 #include <net/netisr.h>
119 #include <dev/smbios/smbios.h>
121 #include <machine/bootinfo.h>
122 #include <machine/clock.h>
123 #include <machine/cpu.h>
124 #include <machine/cputypes.h>
125 #include <machine/intr_machdep.h>
127 #include <machine/md_var.h>
128 #include <machine/metadata.h>
129 #include <machine/pc/bios.h>
130 #include <machine/pcb.h>
131 #include <machine/pcb_ext.h>
132 #include <machine/proc.h>
133 #include <machine/sigframe.h>
134 #include <machine/specialreg.h>
135 #include <machine/sysarch.h>
136 #include <machine/trap.h>
137 #include <x86/ucode.h>
138 #include <machine/vm86.h>
139 #include <x86/init.h>
141 #include <machine/perfmon.h>
144 #include <machine/smp.h>
151 #include <x86/apicvar.h>
155 #include <x86/isa/icu.h>
158 /* Sanity check for __curthread() */
159 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
161 register_t init386(int first);
162 void dblfault_handler(void);
163 void identify_cpu(void);
165 static void cpu_startup(void *);
166 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
168 /* Intel ICH registers */
169 #define ICH_PMBASE 0x400
170 #define ICH_SMI_EN ICH_PMBASE + 0x30
172 int _udatasel, _ucodesel;
174 static int above4g_allow = 1;
175 static int above24g_allow = 0;
181 int late_console = 1;
184 FEATURE(pae, "Physical Address Extensions");
187 struct kva_md_info kmi;
189 static struct trapframe proc0_tf;
190 struct pcpu __pcpu[MAXCPU];
192 static void i386_clock_source_init(void);
196 struct mem_range_softc mem_range_softc;
198 extern char start_exceptions[], end_exceptions[];
200 extern struct sysentvec elf32_freebsd_sysvec;
202 /* Default init_ops implementation. */
203 struct init_ops init_ops = {
204 .early_clock_source_init = i386_clock_source_init,
205 .early_delay = i8254_delay,
209 i386_clock_source_init(void)
215 cpu_startup(void *dummy)
221 * On MacBooks, we need to disallow the legacy USB circuit to
222 * generate an SMI# because this can cause several problems,
223 * namely: incorrect CPU frequency detection and failure to
225 * We do this by disabling a bit in the SMI_EN (SMI Control and
226 * Enable register) of the Intel ICH LPC Interface Bridge.
228 sysenv = kern_getenv("smbios.system.product");
229 if (sysenv != NULL) {
230 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
231 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
232 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
233 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
234 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
235 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
236 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
237 strncmp(sysenv, "Macmini1,1", 10) == 0) {
239 printf("Disabling LEGACY_USB_EN bit on "
241 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
247 * Good {morning,afternoon,evening,night}.
251 panicifcpuunsupported();
257 * Display physical memory if SMBIOS reports reasonable amount.
260 sysenv = kern_getenv("smbios.memory.enabled");
261 if (sysenv != NULL) {
262 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
265 if (memsize < ptoa((uintmax_t)vm_free_count()))
266 memsize = ptoa((uintmax_t)Maxmem);
267 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
268 realmem = atop(memsize);
271 * Display any holes after the first chunk of extended memory.
276 printf("Physical memory chunk(s):\n");
277 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
280 size = phys_avail[indx + 1] - phys_avail[indx];
282 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
283 (uintmax_t)phys_avail[indx],
284 (uintmax_t)phys_avail[indx + 1] - 1,
285 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
289 vm_ksubmap_init(&kmi);
291 printf("avail memory = %ju (%ju MB)\n",
292 ptoa((uintmax_t)vm_free_count()),
293 ptoa((uintmax_t)vm_free_count()) / 1048576);
296 * Set up buffers, so they can be used to read disk labels.
299 vm_pager_bufferinit();
311 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
313 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
314 * instructions. We must set the CR0_MP bit and use the CR0_TS
315 * bit to control the trap, because setting the CR0_EM bit does
316 * not cause WAIT instructions to trap. It's important to trap
317 * WAIT instructions - otherwise the "wait" variants of no-wait
318 * control instructions would degenerate to the "no-wait" variants
319 * after FP context switches but work correctly otherwise. It's
320 * particularly important to trap WAITs when there is no NPX -
321 * otherwise the "wait" variants would always degenerate.
323 * Try setting CR0_NE to get correct error reporting on 486DX's.
324 * Setting it should fail or do nothing on lesser processors.
326 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
331 u_long bootdev; /* not a struct cdev *- encoding is different */
332 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
333 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
336 * Initialize 386 and configure to run kernel
340 * Initialize segments & interrupt table
345 struct mtx dt_lock; /* lock for GDT and LDT */
347 union descriptor gdt0[NGDT]; /* initial global descriptor table */
348 union descriptor *gdt = gdt0; /* global descriptor table */
350 union descriptor *ldt; /* local descriptor table */
352 static struct gate_descriptor idt0[NIDT];
353 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
355 static struct i386tss *dblfault_tss;
356 static char *dblfault_stack;
358 static struct i386tss common_tss0;
360 vm_offset_t proc0kstack;
363 * software prototypes -- in more palatable form.
365 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
366 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
368 struct soft_segment_descriptor gdt_segs[] = {
369 /* GNULL_SEL 0 Null Descriptor */
375 .ssd_xx = 0, .ssd_xx1 = 0,
378 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
380 .ssd_limit = 0xfffff,
381 .ssd_type = SDT_MEMRWA,
384 .ssd_xx = 0, .ssd_xx1 = 0,
387 /* GUFS_SEL 2 %fs Descriptor for user */
389 .ssd_limit = 0xfffff,
390 .ssd_type = SDT_MEMRWA,
393 .ssd_xx = 0, .ssd_xx1 = 0,
396 /* GUGS_SEL 3 %gs Descriptor for user */
398 .ssd_limit = 0xfffff,
399 .ssd_type = SDT_MEMRWA,
402 .ssd_xx = 0, .ssd_xx1 = 0,
405 /* GCODE_SEL 4 Code Descriptor for kernel */
407 .ssd_limit = 0xfffff,
408 .ssd_type = SDT_MEMERA,
411 .ssd_xx = 0, .ssd_xx1 = 0,
414 /* GDATA_SEL 5 Data Descriptor for kernel */
416 .ssd_limit = 0xfffff,
417 .ssd_type = SDT_MEMRWA,
420 .ssd_xx = 0, .ssd_xx1 = 0,
423 /* GUCODE_SEL 6 Code Descriptor for user */
425 .ssd_limit = 0xfffff,
426 .ssd_type = SDT_MEMERA,
429 .ssd_xx = 0, .ssd_xx1 = 0,
432 /* GUDATA_SEL 7 Data Descriptor for user */
434 .ssd_limit = 0xfffff,
435 .ssd_type = SDT_MEMRWA,
438 .ssd_xx = 0, .ssd_xx1 = 0,
441 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
443 .ssd_limit = 0xfffff,
444 .ssd_type = SDT_MEMRWA,
447 .ssd_xx = 0, .ssd_xx1 = 0,
450 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
453 .ssd_limit = sizeof(struct i386tss)-1,
454 .ssd_type = SDT_SYS386TSS,
457 .ssd_xx = 0, .ssd_xx1 = 0,
460 /* GLDT_SEL 10 LDT Descriptor */
462 .ssd_limit = sizeof(union descriptor) * NLDT - 1,
463 .ssd_type = SDT_SYSLDT,
466 .ssd_xx = 0, .ssd_xx1 = 0,
469 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
471 .ssd_limit = (512 * sizeof(union descriptor)-1),
472 .ssd_type = SDT_SYSLDT,
475 .ssd_xx = 0, .ssd_xx1 = 0,
478 /* GPANIC_SEL 12 Panic Tss Descriptor */
480 .ssd_limit = sizeof(struct i386tss)-1,
481 .ssd_type = SDT_SYS386TSS,
484 .ssd_xx = 0, .ssd_xx1 = 0,
487 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
489 .ssd_limit = 0xfffff,
490 .ssd_type = SDT_MEMERA,
493 .ssd_xx = 0, .ssd_xx1 = 0,
496 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
498 .ssd_limit = 0xfffff,
499 .ssd_type = SDT_MEMERA,
502 .ssd_xx = 0, .ssd_xx1 = 0,
505 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
507 .ssd_limit = 0xfffff,
508 .ssd_type = SDT_MEMRWA,
511 .ssd_xx = 0, .ssd_xx1 = 0,
514 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
516 .ssd_limit = 0xfffff,
517 .ssd_type = SDT_MEMRWA,
520 .ssd_xx = 0, .ssd_xx1 = 0,
523 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
525 .ssd_limit = 0xfffff,
526 .ssd_type = SDT_MEMRWA,
529 .ssd_xx = 0, .ssd_xx1 = 0,
532 /* GNDIS_SEL 18 NDIS Descriptor */
538 .ssd_xx = 0, .ssd_xx1 = 0,
543 static struct soft_segment_descriptor ldt_segs[] = {
544 /* Null Descriptor - overwritten by call gate */
550 .ssd_xx = 0, .ssd_xx1 = 0,
553 /* Null Descriptor - overwritten by call gate */
559 .ssd_xx = 0, .ssd_xx1 = 0,
562 /* Null Descriptor - overwritten by call gate */
568 .ssd_xx = 0, .ssd_xx1 = 0,
571 /* Code Descriptor for user */
573 .ssd_limit = 0xfffff,
574 .ssd_type = SDT_MEMERA,
577 .ssd_xx = 0, .ssd_xx1 = 0,
580 /* Null Descriptor - overwritten by call gate */
586 .ssd_xx = 0, .ssd_xx1 = 0,
589 /* Data Descriptor for user */
591 .ssd_limit = 0xfffff,
592 .ssd_type = SDT_MEMRWA,
595 .ssd_xx = 0, .ssd_xx1 = 0,
603 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
607 off = func != NULL ? (uintptr_t)func + setidt_disp : 0;
608 setidt_nodisp(idx, off, typ, dpl, selec);
612 setidt_nodisp(int idx, uintptr_t off, int typ, int dpl, int selec)
614 struct gate_descriptor *ip;
617 ip->gd_looffset = off;
618 ip->gd_selector = selec;
624 ip->gd_hioffset = ((u_int)off) >> 16 ;
628 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
629 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
630 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
631 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
637 IDTVEC(xen_intr_upcall),
639 IDTVEC(int0x80_syscall);
643 * Display the index and function name of any IDT entries that don't use
644 * the default 'rsvd' entry point.
646 DB_SHOW_COMMAND_FLAGS(idt, db_show_idt, DB_CMD_MEMSAFE)
648 struct gate_descriptor *ip;
650 uintptr_t func, func_trm;
654 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
655 if (ip->gd_type == SDT_SYSTASKGT) {
656 db_printf("%3d\t<TASK>\n", idx);
658 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
659 if (func >= PMAP_TRM_MIN_ADDRESS) {
665 if (func != (uintptr_t)&IDTVEC(rsvd)) {
666 db_printf("%3d\t", idx);
667 db_printsym(func, DB_STGY_PROC);
669 db_printf(" (trampoline %#x)",
678 /* Show privileged registers. */
679 DB_SHOW_COMMAND_FLAGS(sysregs, db_show_sysregs, DB_CMD_MEMSAFE)
684 db_printf("idtr\t0x%08x/%04x\n",
685 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
687 db_printf("gdtr\t0x%08x/%04x\n",
688 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
689 db_printf("ldtr\t0x%04x\n", rldt());
690 db_printf("tr\t0x%04x\n", rtr());
691 db_printf("cr0\t0x%08x\n", rcr0());
692 db_printf("cr2\t0x%08x\n", rcr2());
693 db_printf("cr3\t0x%08x\n", rcr3());
694 db_printf("cr4\t0x%08x\n", rcr4());
695 if (rcr4() & CR4_XSAVE)
696 db_printf("xcr0\t0x%016llx\n", rxcr(0));
697 if (amd_feature & (AMDID_NX | AMDID_LM))
698 db_printf("EFER\t0x%016llx\n", rdmsr(MSR_EFER));
699 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
700 db_printf("FEATURES_CTL\t0x%016llx\n",
701 rdmsr(MSR_IA32_FEATURE_CONTROL));
702 if (((cpu_vendor_id == CPU_VENDOR_INTEL ||
703 cpu_vendor_id == CPU_VENDOR_AMD) && CPUID_TO_FAMILY(cpu_id) >= 6) ||
704 cpu_vendor_id == CPU_VENDOR_HYGON)
705 db_printf("DEBUG_CTL\t0x%016llx\n", rdmsr(MSR_DEBUGCTLMSR));
706 if (cpu_feature & CPUID_PAT)
707 db_printf("PAT\t0x%016llx\n", rdmsr(MSR_PAT));
710 DB_SHOW_COMMAND_FLAGS(dbregs, db_show_dbregs, DB_CMD_MEMSAFE)
713 db_printf("dr0\t0x%08x\n", rdr0());
714 db_printf("dr1\t0x%08x\n", rdr1());
715 db_printf("dr2\t0x%08x\n", rdr2());
716 db_printf("dr3\t0x%08x\n", rdr3());
717 db_printf("dr6\t0x%08x\n", rdr6());
718 db_printf("dr7\t0x%08x\n", rdr7());
721 DB_SHOW_COMMAND(frame, db_show_frame)
723 struct trapframe *frame;
725 frame = have_addr ? (struct trapframe *)addr : curthread->td_frame;
726 printf("ss %#x esp %#x efl %#x cs %#x eip %#x\n",
727 frame->tf_ss, frame->tf_esp, frame->tf_eflags, frame->tf_cs,
729 printf("err %#x trapno %d\n", frame->tf_err, frame->tf_trapno);
730 printf("ds %#x es %#x fs %#x\n",
731 frame->tf_ds, frame->tf_es, frame->tf_fs);
732 printf("eax %#x ecx %#x edx %#x ebx %#x\n",
733 frame->tf_eax, frame->tf_ecx, frame->tf_edx, frame->tf_ebx);
734 printf("ebp %#x esi %#x edi %#x\n",
735 frame->tf_ebp, frame->tf_esi, frame->tf_edi);
741 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
743 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
744 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
745 ssd->ssd_type = sd->sd_type;
746 ssd->ssd_dpl = sd->sd_dpl;
747 ssd->ssd_p = sd->sd_p;
748 ssd->ssd_def32 = sd->sd_def32;
749 ssd->ssd_gran = sd->sd_gran;
753 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
757 int i, insert_idx, physmap_idx;
759 physmap_idx = *physmap_idxp;
764 lim = 0x100000000; /* 4G */
765 if (pae_mode && above4g_allow)
766 lim = above24g_allow ? -1ULL : 0x600000000; /* 24G */
768 printf("%uK of memory above %uGB ignored, pae %d "
769 "above4g_allow %d above24g_allow %d\n",
770 (u_int)(length / 1024), (u_int)(lim >> 30), pae_mode,
771 above4g_allow, above24g_allow);
774 if (base + length >= lim) {
775 ign = base + length - lim;
777 printf("%uK of memory above %uGB ignored, pae %d "
778 "above4g_allow %d above24g_allow %d\n",
779 (u_int)(ign / 1024), (u_int)(lim >> 30), pae_mode,
780 above4g_allow, above24g_allow);
784 * Find insertion point while checking for overlap. Start off by
785 * assuming the new entry will be added to the end.
787 insert_idx = physmap_idx + 2;
788 for (i = 0; i <= physmap_idx; i += 2) {
789 if (base < physmap[i + 1]) {
790 if (base + length <= physmap[i]) {
794 if (boothowto & RB_VERBOSE)
796 "Overlapping memory regions, ignoring second region\n");
801 /* See if we can prepend to the next entry. */
802 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
803 physmap[insert_idx] = base;
807 /* See if we can append to the previous entry. */
808 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
809 physmap[insert_idx - 1] += length;
814 *physmap_idxp = physmap_idx;
815 if (physmap_idx == PHYS_AVAIL_ENTRIES) {
817 "Too many segments in the physical address map, giving up\n");
822 * Move the last 'N' entries down to make room for the new
825 for (i = physmap_idx; i > insert_idx; i -= 2) {
826 physmap[i] = physmap[i - 2];
827 physmap[i + 1] = physmap[i - 1];
830 /* Insert the new entry. */
831 physmap[insert_idx] = base;
832 physmap[insert_idx + 1] = base + length;
837 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
839 if (boothowto & RB_VERBOSE)
840 printf("SMAP type=%02x base=%016llx len=%016llx\n",
841 smap->type, smap->base, smap->length);
843 if (smap->type != SMAP_TYPE_MEMORY)
846 return (add_physmap_entry(smap->base, smap->length, physmap,
851 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
854 struct bios_smap *smap, *smapend;
857 * Memory map from INT 15:E820.
859 * subr_module.c says:
860 * "Consumer may safely assume that size value precedes data."
861 * ie: an int32_t immediately precedes SMAP.
863 smapsize = *((u_int32_t *)smapbase - 1);
864 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
866 for (smap = smapbase; smap < smapend; smap++)
867 if (!add_smap_entry(smap, physmap, physmap_idxp))
876 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
881 pmap_basemem_setup(basemem);
885 * Populate the (physmap) array with base/bound pairs describing the
886 * available physical memory in the system, then test this memory and
887 * build the phys_avail array describing the actually-available memory.
889 * If we cannot accurately determine the physical memory map, then use
890 * value from the 0xE801 call, and failing that, the RTC.
892 * Total memory size may be set by the kernel environment variable
893 * hw.physmem or the compile-time define MAXMEM.
895 * XXX first should be vm_paddr_t.
898 getmemsize(int first)
900 int has_smap, off, physmap_idx, pa_indx, da_indx;
902 vm_paddr_t physmap[PHYS_AVAIL_ENTRIES];
903 quad_t dcons_addr, dcons_size, physmem_tunable;
904 int hasbrokenint12, i, res __diagused;
906 struct vm86frame vmf;
907 struct vm86context vmc;
909 struct bios_smap *smap, *smapbase;
913 bzero(&vmf, sizeof(vmf));
914 bzero(physmap, sizeof(physmap));
918 * Tell the physical memory allocator about pages used to store
919 * the kernel and preloaded data. See kmem_bootstrap_free().
921 vm_phys_early_add_seg((vm_paddr_t)KERNLOAD, trunc_page(first));
923 TUNABLE_INT_FETCH("hw.above4g_allow", &above4g_allow);
924 TUNABLE_INT_FETCH("hw.above24g_allow", &above24g_allow);
927 * Check if the loader supplied an SMAP memory map. If so,
928 * use that and do not make any VM86 calls.
931 kmdp = preload_search_by_type("elf kernel");
933 kmdp = preload_search_by_type("elf32 kernel");
934 smapbase = (struct bios_smap *)preload_search_info(kmdp,
935 MODINFO_METADATA | MODINFOMD_SMAP);
936 if (smapbase != NULL) {
937 add_smap_entries(smapbase, physmap, &physmap_idx);
943 * Some newer BIOSes have a broken INT 12H implementation
944 * which causes a kernel panic immediately. In this case, we
945 * need use the SMAP to determine the base memory size.
948 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
949 if (hasbrokenint12 == 0) {
950 /* Use INT12 to determine base memory size. */
951 vm86_intcall(0x12, &vmf);
952 basemem = vmf.vmf_ax;
957 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
958 * the kernel page table so we can use it as a buffer. The
959 * kernel will unmap this page later.
962 smap = (void *)vm86_addpage(&vmc, 1, PMAP_MAP_LOW + ptoa(1));
963 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
964 KASSERT(res != 0, ("vm86_getptr() failed: address not found"));
968 vmf.vmf_eax = 0xE820;
969 vmf.vmf_edx = SMAP_SIG;
970 vmf.vmf_ecx = sizeof(struct bios_smap);
971 i = vm86_datacall(0x15, &vmf, &vmc);
972 if (i || vmf.vmf_eax != SMAP_SIG)
975 if (!add_smap_entry(smap, physmap, &physmap_idx))
977 } while (vmf.vmf_ebx != 0);
981 * If we didn't fetch the "base memory" size from INT12,
982 * figure it out from the SMAP (or just guess).
985 for (i = 0; i <= physmap_idx; i += 2) {
986 if (physmap[i] == 0x00000000) {
987 basemem = physmap[i + 1] / 1024;
992 /* XXX: If we couldn't find basemem from SMAP, just guess. */
1002 * If we failed to find an SMAP, figure out the extended
1003 * memory size. We will then build a simple memory map with
1004 * two segments, one for "base memory" and the second for
1005 * "extended memory". Note that "extended memory" starts at a
1006 * physical address of 1MB and that both basemem and extmem
1007 * are in units of 1KB.
1009 * First, try to fetch the extended memory size via INT 15:E801.
1011 vmf.vmf_ax = 0xE801;
1012 if (vm86_intcall(0x15, &vmf) == 0) {
1013 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1016 * If INT15:E801 fails, this is our last ditch effort
1017 * to determine the extended memory size. Currently
1018 * we prefer the RTC value over INT15:88.
1022 vm86_intcall(0x15, &vmf);
1023 extmem = vmf.vmf_ax;
1025 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1030 * Special hack for chipsets that still remap the 384k hole when
1031 * there's 16MB of memory - this really confuses people that
1032 * are trying to use bus mastering ISA controllers with the
1033 * "16MB limit"; they only have 16MB, but the remapping puts
1034 * them beyond the limit.
1036 * If extended memory is between 15-16MB (16-17MB phys address range),
1039 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1043 physmap[1] = basemem * 1024;
1045 physmap[physmap_idx] = 0x100000;
1046 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1050 * Now, physmap contains a map of physical memory.
1054 /* make hole for AP bootstrap code */
1055 alloc_ap_trampoline(physmap, &physmap_idx);
1059 * Maxmem isn't the "maximum memory", it's one larger than the
1060 * highest page of the physical address space. It should be
1061 * called something like "Maxphyspage". We may adjust this
1062 * based on ``hw.physmem'' and the results of the memory test.
1064 * This is especially confusing when it is much larger than the
1065 * memory size and is displayed as "realmem".
1067 Maxmem = atop(physmap[physmap_idx + 1]);
1070 Maxmem = MAXMEM / 4;
1073 if (TUNABLE_QUAD_FETCH("hw.physmem", &physmem_tunable))
1074 Maxmem = atop(physmem_tunable);
1077 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
1078 * the amount of memory in the system.
1080 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
1081 Maxmem = atop(physmap[physmap_idx + 1]);
1084 * The boot memory test is disabled by default, as it takes a
1085 * significant amount of time on large-memory systems, and is
1086 * unfriendly to virtual machines as it unnecessarily touches all
1089 * A general name is used as the code may be extended to support
1090 * additional tests beyond the current "page present" test.
1093 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1095 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1096 (boothowto & RB_VERBOSE))
1097 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1100 * If Maxmem has been increased beyond what the system has detected,
1101 * extend the last memory segment to the new limit.
1103 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1104 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1106 /* call pmap initialization to make new kernel address space */
1107 pmap_bootstrap(first);
1110 * Size up each available chunk of physical memory.
1112 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1115 phys_avail[pa_indx++] = physmap[0];
1116 phys_avail[pa_indx] = physmap[0];
1117 dump_avail[da_indx] = physmap[0];
1120 * Get dcons buffer address
1122 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1123 getenv_quad("dcons.size", &dcons_size) == 0)
1127 * physmap is in bytes, so when converting to page boundaries,
1128 * round up the start address and round down the end address.
1130 for (i = 0; i <= physmap_idx; i += 2) {
1133 end = ptoa((vm_paddr_t)Maxmem);
1134 if (physmap[i + 1] < end)
1135 end = trunc_page(physmap[i + 1]);
1136 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1137 int tmp, page_bad, full;
1142 * block out kernel memory as not available.
1144 if (pa >= KERNLOAD && pa < first)
1148 * block out dcons buffer
1151 && pa >= trunc_page(dcons_addr)
1152 && pa < dcons_addr + dcons_size)
1160 * map page into kernel: valid, read/write,non-cacheable
1162 ptr = (int *)pmap_cmap3(pa, PG_V | PG_RW | PG_N);
1166 * Test for alternating 1's and 0's
1168 *(volatile int *)ptr = 0xaaaaaaaa;
1169 if (*(volatile int *)ptr != 0xaaaaaaaa)
1172 * Test for alternating 0's and 1's
1174 *(volatile int *)ptr = 0x55555555;
1175 if (*(volatile int *)ptr != 0x55555555)
1180 *(volatile int *)ptr = 0xffffffff;
1181 if (*(volatile int *)ptr != 0xffffffff)
1186 *(volatile int *)ptr = 0x0;
1187 if (*(volatile int *)ptr != 0x0)
1190 * Restore original value.
1196 * Adjust array of valid/good pages.
1198 if (page_bad == TRUE)
1201 * If this good page is a continuation of the
1202 * previous set of good pages, then just increase
1203 * the end pointer. Otherwise start a new chunk.
1204 * Note that "end" points one higher than end,
1205 * making the range >= start and < end.
1206 * If we're also doing a speculative memory
1207 * test and we at or past the end, bump up Maxmem
1208 * so that we keep going. The first bad page
1209 * will terminate the loop.
1211 if (phys_avail[pa_indx] == pa) {
1212 phys_avail[pa_indx] += PAGE_SIZE;
1215 if (pa_indx == PHYS_AVAIL_ENTRIES) {
1217 "Too many holes in the physical address space, giving up\n");
1222 phys_avail[pa_indx++] = pa; /* start */
1223 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1227 if (dump_avail[da_indx] == pa) {
1228 dump_avail[da_indx] += PAGE_SIZE;
1231 if (da_indx == PHYS_AVAIL_ENTRIES) {
1235 dump_avail[da_indx++] = pa; /* start */
1236 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1247 * The last chunk must contain at least one page plus the message
1248 * buffer to avoid complicating other code (message buffer address
1249 * calculation, etc.).
1251 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1252 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1253 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1254 phys_avail[pa_indx--] = 0;
1255 phys_avail[pa_indx--] = 0;
1258 Maxmem = atop(phys_avail[pa_indx]);
1260 /* Trim off space for the message buffer. */
1261 phys_avail[pa_indx] -= round_page(msgbufsize);
1263 /* Map the message buffer. */
1264 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
1265 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1273 db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab, 0);
1277 if (boothowto & RB_KDB)
1278 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
1285 struct gate_descriptor *ip;
1289 for (x = 0; x < NIDT; x++) {
1291 if (ip->gd_type != SDT_SYS386IGT &&
1292 ip->gd_type != SDT_SYS386TGT)
1294 off = ip->gd_looffset + (((u_int)ip->gd_hioffset) << 16);
1295 KASSERT(off >= (uintptr_t)start_exceptions &&
1296 off < (uintptr_t)end_exceptions,
1297 ("IDT[%d] type %d off %#x", x, ip->gd_type, off));
1299 MPASS(off >= PMAP_TRM_MIN_ADDRESS &&
1300 off < PMAP_TRM_MAX_ADDRESS);
1301 ip->gd_looffset = off;
1302 ip->gd_hioffset = off >> 16;
1312 for (x = 0; x < NIDT; x++)
1313 setidt(x, &IDTVEC(rsvd), SDT_SYS386IGT, SEL_KPL,
1314 GSEL(GCODE_SEL, SEL_KPL));
1315 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386IGT, SEL_KPL,
1316 GSEL(GCODE_SEL, SEL_KPL));
1317 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
1318 GSEL(GCODE_SEL, SEL_KPL));
1319 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
1320 GSEL(GCODE_SEL, SEL_KPL));
1321 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
1322 GSEL(GCODE_SEL, SEL_KPL));
1323 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386IGT, SEL_UPL,
1324 GSEL(GCODE_SEL, SEL_KPL));
1325 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386IGT, SEL_KPL,
1326 GSEL(GCODE_SEL, SEL_KPL));
1327 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL,
1328 GSEL(GCODE_SEL, SEL_KPL));
1329 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386IGT, SEL_KPL,
1330 GSEL(GCODE_SEL, SEL_KPL));
1331 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL,
1333 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386IGT,
1334 SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1335 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386IGT, SEL_KPL,
1336 GSEL(GCODE_SEL, SEL_KPL));
1337 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386IGT, SEL_KPL,
1338 GSEL(GCODE_SEL, SEL_KPL));
1339 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386IGT, SEL_KPL,
1340 GSEL(GCODE_SEL, SEL_KPL));
1341 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL,
1342 GSEL(GCODE_SEL, SEL_KPL));
1343 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
1344 GSEL(GCODE_SEL, SEL_KPL));
1345 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386IGT, SEL_KPL,
1346 GSEL(GCODE_SEL, SEL_KPL));
1347 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386IGT, SEL_KPL,
1348 GSEL(GCODE_SEL, SEL_KPL));
1349 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386IGT, SEL_KPL,
1350 GSEL(GCODE_SEL, SEL_KPL));
1351 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386IGT, SEL_KPL,
1352 GSEL(GCODE_SEL, SEL_KPL));
1353 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall),
1354 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1355 #ifdef KDTRACE_HOOKS
1356 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret),
1357 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1360 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall),
1361 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1369 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL,
1370 GSEL(GCODE_SEL, SEL_KPL));
1371 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL,
1372 GSEL(GCODE_SEL, SEL_KPL));
1375 #if defined(DEV_ISA) && !defined(DEV_ATPIC)
1380 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint),
1381 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1382 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint),
1383 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1390 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1391 int gsel_tss, metadata_missing, x, pa;
1393 struct xstate_hdr *xhdr;
1398 thread0.td_kstack = proc0kstack;
1399 thread0.td_kstack_pages = TD0_KSTACK_PAGES;
1402 * This may be done better later if it gets more high level
1403 * components in it. If so just link td->td_proc here.
1405 proc_linkup0(&proc0, &thread0);
1407 if (bootinfo.bi_modulep) {
1408 metadata_missing = 0;
1409 addend = (vm_paddr_t)bootinfo.bi_modulep < KERNBASE ?
1411 preload_metadata = (caddr_t)bootinfo.bi_modulep + addend;
1412 preload_bootstrap_relocate(addend);
1414 metadata_missing = 1;
1417 if (bootinfo.bi_envp != 0) {
1418 addend = (vm_paddr_t)bootinfo.bi_envp < KERNBASE ?
1420 init_static_kenv((char *)bootinfo.bi_envp + addend, 0);
1422 init_static_kenv(NULL, 0);
1426 * Re-evaluate CPU features if we loaded a microcode update.
1428 ucode_len = ucode_load_bsp(first);
1429 if (ucode_len != 0) {
1431 first = roundup2(first + ucode_len, PAGE_SIZE);
1434 identify_hypervisor();
1435 identify_hypervisor_smbios();
1437 /* Init basic tunables, hz etc */
1440 /* Set bootmethod to BIOS: it's the only supported on i386. */
1441 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1444 * Make gdt memory segments. All segments cover the full 4GB
1445 * of address space and permissions are enforced at page level.
1447 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1448 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1449 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
1450 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
1451 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
1452 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
1455 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
1456 gdt_segs[GPRIV_SEL].ssd_base = (int)pc;
1457 gdt_segs[GPROC0_SEL].ssd_base = (int)&common_tss0;
1459 for (x = 0; x < NGDT; x++)
1460 ssdtosd(&gdt_segs[x], &gdt0[x].sd);
1462 r_gdt.rd_limit = NGDT * sizeof(gdt0[0]) - 1;
1463 r_gdt.rd_base = (int)gdt0;
1464 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
1467 pcpu_init(pc, 0, sizeof(struct pcpu));
1468 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
1469 pmap_kenter(pa, pa);
1470 dpcpu_init((void *)first, 0);
1471 first += DPCPU_SIZE;
1472 PCPU_SET(prvspace, pc);
1473 PCPU_SET(curthread, &thread0);
1474 /* Non-late cninit() and printf() can be moved up to here. */
1477 * Initialize mutexes.
1479 * icu_lock: in order to allow an interrupt to occur in a critical
1480 * section, to set pcpu->ipending (etc...) properly, we
1481 * must be able to get the icu lock, so it can't be
1485 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
1489 r_idt.rd_limit = sizeof(idt0) - 1;
1490 r_idt.rd_base = (int) idt;
1493 finishidentcpu(); /* Final stage of CPU initialization */
1496 * Initialize the clock before the console so that console
1497 * initialization can use DELAY().
1503 initializecpu(); /* Initialize CPU registers */
1504 initializecpucache();
1506 /* pointer to selector slot for %fs/%gs */
1507 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
1509 /* Initialize the tss (except for the final esp0) early for vm86. */
1510 common_tss0.tss_esp0 = thread0.td_kstack + thread0.td_kstack_pages *
1511 PAGE_SIZE - VM86_STACK_SPACE;
1512 common_tss0.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
1513 common_tss0.tss_ioopt = sizeof(struct i386tss) << 16;
1514 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1515 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
1516 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
1519 /* Initialize the PIC early for vm86 calls. */
1525 /* Reset and mask the atpics and leave them shut down. */
1529 * Point the ICU spurious interrupt vectors at the APIC spurious
1530 * interrupt handler.
1537 * The console and kdb should be initialized even earlier than here,
1538 * but some console drivers don't work until after getmemsize().
1539 * Default to late console initialization to support these drivers.
1540 * This loses mainly printf()s in getmemsize() and early debugging.
1542 TUNABLE_INT_FETCH("debug.late_console", &late_console);
1543 if (!late_console) {
1548 if (cpu_fxsr && (cpu_feature2 & CPUID2_XSAVE) != 0) {
1550 TUNABLE_INT_FETCH("hw.use_xsave", &use_xsave);
1553 kmdp = preload_search_by_type("elf kernel");
1554 link_elf_ireloc(kmdp);
1558 init_param2(physmem);
1560 /* now running on new page tables, configured,and u/iom is accessible */
1565 if (metadata_missing)
1566 printf("WARNING: loader(8) metadata is missing!\n");
1571 msgbufinit(msgbufp, msgbufsize);
1575 * Set up thread0 pcb after npxinit calculated pcb + fpu save
1576 * area size. Zero out the extended state header in fpu save
1579 thread0.td_pcb = get_pcb_td(&thread0);
1580 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
1581 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
1583 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1585 xhdr->xstate_bv = xsave_mask;
1587 PCPU_SET(curpcb, thread0.td_pcb);
1588 /* Move esp0 in the tss to its final place. */
1589 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
1590 common_tss0.tss_esp0 = (vm_offset_t)thread0.td_pcb - VM86_STACK_SPACE;
1591 PCPU_SET(kesp0, common_tss0.tss_esp0);
1592 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; /* clear busy bit */
1595 /* transfer to user mode */
1597 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1598 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1600 /* setup proc 0's pcb */
1601 thread0.td_pcb->pcb_flags = 0;
1602 thread0.td_pcb->pcb_cr3 = pmap_get_kcr3();
1603 thread0.td_pcb->pcb_ext = 0;
1604 thread0.td_frame = &proc0_tf;
1610 /* Location of kernel stack for locore */
1611 return ((register_t)thread0.td_pcb);
1615 machdep_init_trampoline(void)
1617 struct region_descriptor r_gdt, r_idt;
1618 struct i386tss *tss;
1619 char *copyout_buf, *trampoline, *tramp_stack_base;
1622 gdt = pmap_trm_alloc(sizeof(union descriptor) * NGDT * mp_ncpus,
1624 bcopy(gdt0, gdt, sizeof(union descriptor) * NGDT);
1625 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1626 r_gdt.rd_base = (int)gdt;
1629 tss = pmap_trm_alloc(sizeof(struct i386tss) * mp_ncpus,
1631 bcopy(&common_tss0, tss, sizeof(struct i386tss));
1632 gdt[GPROC0_SEL].sd.sd_lobase = (int)tss;
1633 gdt[GPROC0_SEL].sd.sd_hibase = (u_int)tss >> 24;
1634 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
1636 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
1637 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
1638 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
1639 PCPU_SET(common_tssp, tss);
1640 ltr(GSEL(GPROC0_SEL, SEL_KPL));
1642 trampoline = pmap_trm_alloc(end_exceptions - start_exceptions,
1644 bcopy(start_exceptions, trampoline, end_exceptions - start_exceptions);
1645 tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT);
1646 PCPU_SET(trampstk, (uintptr_t)tramp_stack_base + TRAMP_STACK_SZ -
1648 tss[0].tss_esp0 = PCPU_GET(trampstk);
1650 idt = pmap_trm_alloc(sizeof(idt0), M_NOWAIT | M_ZERO);
1651 bcopy(idt0, idt, sizeof(idt0));
1653 /* Re-initialize new IDT since the handlers were relocated */
1654 setidt_disp = trampoline - start_exceptions;
1656 printf("Trampoline disposition %#zx\n", setidt_disp);
1659 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1;
1660 r_idt.rd_base = (int)idt;
1664 dblfault_tss = pmap_trm_alloc(sizeof(struct i386tss), M_NOWAIT | M_ZERO);
1665 dblfault_stack = pmap_trm_alloc(PAGE_SIZE, M_NOWAIT);
1666 dblfault_tss->tss_esp = dblfault_tss->tss_esp0 =
1667 dblfault_tss->tss_esp1 = dblfault_tss->tss_esp2 =
1668 (int)dblfault_stack + PAGE_SIZE;
1669 dblfault_tss->tss_ss = dblfault_tss->tss_ss0 = dblfault_tss->tss_ss1 =
1670 dblfault_tss->tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1671 dblfault_tss->tss_cr3 = pmap_get_kcr3();
1672 dblfault_tss->tss_eip = (int)dblfault_handler;
1673 dblfault_tss->tss_eflags = PSL_KERNEL;
1674 dblfault_tss->tss_ds = dblfault_tss->tss_es =
1675 dblfault_tss->tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1676 dblfault_tss->tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1677 dblfault_tss->tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1678 dblfault_tss->tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1679 gdt[GPANIC_SEL].sd.sd_lobase = (int)dblfault_tss;
1680 gdt[GPANIC_SEL].sd.sd_hibase = (u_int)dblfault_tss >> 24;
1682 /* make ldt memory segments */
1683 ldt = pmap_trm_alloc(sizeof(union descriptor) * NLDT,
1685 gdt[GLDT_SEL].sd.sd_lobase = (int)ldt;
1686 gdt[GLDT_SEL].sd.sd_hibase = (u_int)ldt >> 24;
1687 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
1688 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
1689 for (x = 0; x < nitems(ldt_segs); x++)
1690 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1692 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1694 PCPU_SET(currentldt, _default_ldt);
1696 copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT);
1697 PCPU_SET(copyout_buf, copyout_buf);
1698 copyout_init_tramp();
1700 SYSINIT(vm_mem, SI_SUB_VM, SI_ORDER_SECOND, machdep_init_trampoline, NULL);
1704 i386_setup_lcall_gate(void)
1706 struct sysentvec *sv;
1707 struct user_segment_descriptor desc;
1710 sv = &elf32_freebsd_sysvec;
1711 lcall_addr = (uintptr_t)sv->sv_psstrings - sz_lcall_tramp;
1713 bzero(&desc, sizeof(desc));
1714 desc.sd_type = SDT_MEMERA;
1715 desc.sd_dpl = SEL_UPL;
1719 desc.sd_lolimit = 0xffff;
1720 desc.sd_hilimit = 0xf;
1721 desc.sd_lobase = lcall_addr;
1722 desc.sd_hibase = lcall_addr >> 24;
1723 bcopy(&desc, &ldt[LSYS5CALLS_SEL], sizeof(desc));
1725 SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_ANY, i386_setup_lcall_gate, NULL);
1729 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1732 pcpu->pc_acpi_id = 0xffffffff;
1736 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
1738 struct bios_smap *smapbase;
1739 struct bios_smap_xattr smap;
1742 int count, error, i;
1744 /* Retrieve the system memory map from the loader. */
1745 kmdp = preload_search_by_type("elf kernel");
1747 kmdp = preload_search_by_type("elf32 kernel");
1748 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1749 MODINFO_METADATA | MODINFOMD_SMAP);
1750 if (smapbase == NULL)
1752 smapattr = (uint32_t *)preload_search_info(kmdp,
1753 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
1754 count = *((u_int32_t *)smapbase - 1) / sizeof(*smapbase);
1756 for (i = 0; i < count; i++) {
1757 smap.base = smapbase[i].base;
1758 smap.length = smapbase[i].length;
1759 smap.type = smapbase[i].type;
1760 if (smapattr != NULL)
1761 smap.xattr = smapattr[i];
1764 error = SYSCTL_OUT(req, &smap, sizeof(smap));
1768 SYSCTL_PROC(_machdep, OID_AUTO, smap,
1769 CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, 0,
1770 smap_sysctl_handler, "S,bios_smap_xattr",
1771 "Raw BIOS SMAP data");
1774 spinlock_enter(void)
1780 if (td->td_md.md_spinlock_count == 0) {
1781 flags = intr_disable();
1782 td->td_md.md_spinlock_count = 1;
1783 td->td_md.md_saved_flags = flags;
1786 td->td_md.md_spinlock_count++;
1796 flags = td->td_md.md_saved_flags;
1797 td->td_md.md_spinlock_count--;
1798 if (td->td_md.md_spinlock_count == 0) {
1800 intr_restore(flags);
1804 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1805 static void f00f_hack(void *unused);
1806 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1809 f00f_hack(void *unused)
1811 struct region_descriptor r_idt;
1812 struct gate_descriptor *new_idt;
1818 printf("Intel Pentium detected, installing workaround for F00F bug\n");
1820 tmp = (vm_offset_t)pmap_trm_alloc(PAGE_SIZE * 3, M_NOWAIT | M_ZERO);
1822 panic("kmem_malloc returned 0");
1823 tmp = round_page(tmp);
1825 /* Put the problematic entry (#6) at the end of the lower page. */
1826 new_idt = (struct gate_descriptor *)
1827 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
1828 bcopy(idt, new_idt, sizeof(idt0));
1829 r_idt.rd_base = (u_int)new_idt;
1830 r_idt.rd_limit = sizeof(idt0) - 1;
1832 /* SMP machines do not need the F00F hack. */
1834 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
1836 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1839 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1840 * we want to start a backtrace from the function that caused us to enter
1841 * the debugger. We have the context in the trapframe, but base the trace
1842 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1843 * enough for a backtrace.
1846 makectx(struct trapframe *tf, struct pcb *pcb)
1849 pcb->pcb_edi = tf->tf_edi;
1850 pcb->pcb_esi = tf->tf_esi;
1851 pcb->pcb_ebp = tf->tf_ebp;
1852 pcb->pcb_ebx = tf->tf_ebx;
1853 pcb->pcb_eip = tf->tf_eip;
1854 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
1855 pcb->pcb_gs = rgs();
1861 * Provide inb() and outb() as functions. They are normally only available as
1862 * inline functions, thus cannot be called from the debugger.
1865 /* silence compiler warnings */
1866 u_char inb_(u_short);
1867 void outb_(u_short, u_char);
1876 outb_(u_short port, u_char data)