2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2018 The FreeBSD Foundation
5 * Copyright (c) 1992 Terrence R. Lambert.
6 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
9 * This code is derived from software contributed to Berkeley by
12 * Portions of this software were developed by A. Joseph Koshy under
13 * sponsorship from the FreeBSD Foundation and Google, Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
46 #include <sys/cdefs.h>
47 __FBSDID("$FreeBSD$");
50 #include "opt_atpic.h"
55 #include "opt_kstack_pages.h"
56 #include "opt_maxmem.h"
57 #include "opt_mp_watchdog.h"
58 #include "opt_perfmon.h"
59 #include "opt_platform.h"
61 #include <sys/param.h>
63 #include <sys/systm.h>
67 #include <sys/callout.h>
70 #include <sys/eventhandler.h>
72 #include <sys/imgact.h>
74 #include <sys/kernel.h>
76 #include <sys/linker.h>
78 #include <sys/malloc.h>
79 #include <sys/memrange.h>
80 #include <sys/msgbuf.h>
81 #include <sys/mutex.h>
83 #include <sys/ptrace.h>
84 #include <sys/reboot.h>
85 #include <sys/rwlock.h>
86 #include <sys/sched.h>
87 #include <sys/signalvar.h>
89 #include <sys/syscallsubr.h>
90 #include <sys/sysctl.h>
91 #include <sys/sysent.h>
92 #include <sys/sysproto.h>
93 #include <sys/ucontext.h>
94 #include <sys/vmmeter.h>
97 #include <vm/vm_extern.h>
98 #include <vm/vm_kern.h>
99 #include <vm/vm_page.h>
100 #include <vm/vm_map.h>
101 #include <vm/vm_object.h>
102 #include <vm/vm_pager.h>
103 #include <vm/vm_param.h>
107 #error KDB must be enabled in order for DDB to work!
110 #include <ddb/db_sym.h>
115 #include <net/netisr.h>
117 #include <machine/bootinfo.h>
118 #include <machine/clock.h>
119 #include <machine/cpu.h>
120 #include <machine/cputypes.h>
121 #include <machine/intr_machdep.h>
123 #include <machine/md_var.h>
124 #include <machine/metadata.h>
125 #include <machine/mp_watchdog.h>
126 #include <machine/pc/bios.h>
127 #include <machine/pcb.h>
128 #include <machine/pcb_ext.h>
129 #include <machine/proc.h>
130 #include <machine/reg.h>
131 #include <machine/sigframe.h>
132 #include <machine/specialreg.h>
133 #include <machine/sysarch.h>
134 #include <machine/trap.h>
135 #include <machine/vm86.h>
136 #include <x86/init.h>
138 #include <machine/perfmon.h>
141 #include <machine/smp.h>
148 #include <x86/apicvar.h>
152 #include <x86/isa/icu.h>
155 /* Sanity check for __curthread() */
156 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
158 register_t init386(int first);
159 void dblfault_handler(void);
161 static void cpu_startup(void *);
162 static void fpstate_drop(struct thread *td);
163 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
164 char *xfpusave, size_t xfpusave_len);
165 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
166 char *xfpustate, size_t xfpustate_len);
167 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
169 /* Intel ICH registers */
170 #define ICH_PMBASE 0x400
171 #define ICH_SMI_EN ICH_PMBASE + 0x30
173 int _udatasel, _ucodesel;
179 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
181 #ifdef COMPAT_FREEBSD4
182 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
189 FEATURE(pae, "Physical Address Extensions");
193 * The number of PHYSMAP entries must be one less than the number of
194 * PHYSSEG entries because the PHYSMAP entry that spans the largest
195 * physical address that is accessible by ISA DMA is split into two
198 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
200 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
201 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
203 /* must be 2 less so 0 0 can signal end of chunks */
204 #define PHYS_AVAIL_ARRAY_END (nitems(phys_avail) - 2)
205 #define DUMP_AVAIL_ARRAY_END (nitems(dump_avail) - 2)
207 struct kva_md_info kmi;
209 static struct trapframe proc0_tf;
210 struct pcpu __pcpu[MAXCPU];
214 struct mem_range_softc mem_range_softc;
216 extern char start_exceptions[], end_exceptions[];
218 extern struct sysentvec elf32_freebsd_sysvec;
220 /* Default init_ops implementation. */
221 struct init_ops init_ops = {
222 .early_clock_source_init = i8254_init,
223 .early_delay = i8254_delay,
225 .msi_init = msi_init,
237 * On MacBooks, we need to disallow the legacy USB circuit to
238 * generate an SMI# because this can cause several problems,
239 * namely: incorrect CPU frequency detection and failure to
241 * We do this by disabling a bit in the SMI_EN (SMI Control and
242 * Enable register) of the Intel ICH LPC Interface Bridge.
244 sysenv = kern_getenv("smbios.system.product");
245 if (sysenv != NULL) {
246 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
247 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
248 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
249 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
250 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
251 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
252 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
253 strncmp(sysenv, "Macmini1,1", 10) == 0) {
255 printf("Disabling LEGACY_USB_EN bit on "
257 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
263 * Good {morning,afternoon,evening,night}.
267 panicifcpuunsupported();
273 * Display physical memory if SMBIOS reports reasonable amount.
276 sysenv = kern_getenv("smbios.memory.enabled");
277 if (sysenv != NULL) {
278 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
281 if (memsize < ptoa((uintmax_t)vm_free_count()))
282 memsize = ptoa((uintmax_t)Maxmem);
283 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
284 realmem = atop(memsize);
287 * Display any holes after the first chunk of extended memory.
292 printf("Physical memory chunk(s):\n");
293 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
296 size = phys_avail[indx + 1] - phys_avail[indx];
298 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
299 (uintmax_t)phys_avail[indx],
300 (uintmax_t)phys_avail[indx + 1] - 1,
301 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
305 vm_ksubmap_init(&kmi);
307 printf("avail memory = %ju (%ju MB)\n",
308 ptoa((uintmax_t)vm_free_count()),
309 ptoa((uintmax_t)vm_free_count()) / 1048576);
312 * Set up buffers, so they can be used to read disk labels.
315 vm_pager_bufferinit();
320 * Send an interrupt to process.
322 * Stack is set up to allow sigcode stored
323 * at top to call routine, followed by call
324 * to sigreturn routine below. After sigreturn
325 * resets the signal mask, the stack, and the
326 * frame pointer, it returns to the user
331 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
333 struct osigframe sf, *fp;
337 struct trapframe *regs;
343 PROC_LOCK_ASSERT(p, MA_OWNED);
344 sig = ksi->ksi_signo;
346 mtx_assert(&psp->ps_mtx, MA_OWNED);
348 oonstack = sigonstack(regs->tf_esp);
350 /* Allocate space for the signal handler context. */
351 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
352 SIGISMEMBER(psp->ps_sigonstack, sig)) {
353 fp = (struct osigframe *)((uintptr_t)td->td_sigstk.ss_sp +
354 td->td_sigstk.ss_size - sizeof(struct osigframe));
355 #if defined(COMPAT_43)
356 td->td_sigstk.ss_flags |= SS_ONSTACK;
359 fp = (struct osigframe *)regs->tf_esp - 1;
361 /* Build the argument list for the signal handler. */
363 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
364 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
365 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
366 /* Signal handler installed with SA_SIGINFO. */
367 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
368 sf.sf_siginfo.si_signo = sig;
369 sf.sf_siginfo.si_code = ksi->ksi_code;
370 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
373 /* Old FreeBSD-style arguments. */
374 sf.sf_arg2 = ksi->ksi_code;
375 sf.sf_addr = (register_t)ksi->ksi_addr;
376 sf.sf_ahu.sf_handler = catcher;
378 mtx_unlock(&psp->ps_mtx);
381 /* Save most if not all of trap frame. */
382 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
383 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
384 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
385 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
386 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
387 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
388 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
389 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
390 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
391 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
392 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
393 sf.sf_siginfo.si_sc.sc_gs = rgs();
394 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
396 /* Build the signal context to be used by osigreturn(). */
397 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
398 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
399 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
400 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
401 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
402 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
403 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
404 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
407 * If we're a vm86 process, we want to save the segment registers.
408 * We also change eflags to be our emulated eflags, not the actual
411 if (regs->tf_eflags & PSL_VM) {
412 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
413 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
414 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
416 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
417 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
418 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
419 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
421 if (vm86->vm86_has_vme == 0)
422 sf.sf_siginfo.si_sc.sc_ps =
423 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
424 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
426 /* See sendsig() for comments. */
427 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
431 * Copy the sigframe out to the user's stack.
433 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
438 regs->tf_esp = (int)fp;
439 if (p->p_sysent->sv_sigcode_base != 0) {
440 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
443 /* a.out sysentvec does not use shared page */
444 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
446 regs->tf_eflags &= ~(PSL_T | PSL_D);
447 regs->tf_cs = _ucodesel;
448 regs->tf_ds = _udatasel;
449 regs->tf_es = _udatasel;
450 regs->tf_fs = _udatasel;
452 regs->tf_ss = _udatasel;
454 mtx_lock(&psp->ps_mtx);
456 #endif /* COMPAT_43 */
458 #ifdef COMPAT_FREEBSD4
460 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
462 struct sigframe4 sf, *sfp;
466 struct trapframe *regs;
472 PROC_LOCK_ASSERT(p, MA_OWNED);
473 sig = ksi->ksi_signo;
475 mtx_assert(&psp->ps_mtx, MA_OWNED);
477 oonstack = sigonstack(regs->tf_esp);
479 /* Save user context. */
480 bzero(&sf, sizeof(sf));
481 sf.sf_uc.uc_sigmask = *mask;
482 sf.sf_uc.uc_stack = td->td_sigstk;
483 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
484 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
485 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
486 sf.sf_uc.uc_mcontext.mc_gs = rgs();
487 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
488 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
489 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
490 bzero(sf.sf_uc.uc_mcontext.__spare__,
491 sizeof(sf.sf_uc.uc_mcontext.__spare__));
492 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
494 /* Allocate space for the signal handler context. */
495 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
496 SIGISMEMBER(psp->ps_sigonstack, sig)) {
497 sfp = (struct sigframe4 *)((uintptr_t)td->td_sigstk.ss_sp +
498 td->td_sigstk.ss_size - sizeof(struct sigframe4));
499 #if defined(COMPAT_43)
500 td->td_sigstk.ss_flags |= SS_ONSTACK;
503 sfp = (struct sigframe4 *)regs->tf_esp - 1;
505 /* Build the argument list for the signal handler. */
507 sf.sf_ucontext = (register_t)&sfp->sf_uc;
508 bzero(&sf.sf_si, sizeof(sf.sf_si));
509 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
510 /* Signal handler installed with SA_SIGINFO. */
511 sf.sf_siginfo = (register_t)&sfp->sf_si;
512 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
514 /* Fill in POSIX parts */
515 sf.sf_si.si_signo = sig;
516 sf.sf_si.si_code = ksi->ksi_code;
517 sf.sf_si.si_addr = ksi->ksi_addr;
519 /* Old FreeBSD-style arguments. */
520 sf.sf_siginfo = ksi->ksi_code;
521 sf.sf_addr = (register_t)ksi->ksi_addr;
522 sf.sf_ahu.sf_handler = catcher;
524 mtx_unlock(&psp->ps_mtx);
528 * If we're a vm86 process, we want to save the segment registers.
529 * We also change eflags to be our emulated eflags, not the actual
532 if (regs->tf_eflags & PSL_VM) {
533 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
534 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
536 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
537 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
538 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
539 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
541 if (vm86->vm86_has_vme == 0)
542 sf.sf_uc.uc_mcontext.mc_eflags =
543 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
544 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
547 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
548 * syscalls made by the signal handler. This just avoids
549 * wasting time for our lazy fixup of such faults. PSL_NT
550 * does nothing in vm86 mode, but vm86 programs can set it
551 * almost legitimately in probes for old cpu types.
553 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
557 * Copy the sigframe out to the user's stack.
559 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
564 regs->tf_esp = (int)sfp;
565 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
567 regs->tf_eflags &= ~(PSL_T | PSL_D);
568 regs->tf_cs = _ucodesel;
569 regs->tf_ds = _udatasel;
570 regs->tf_es = _udatasel;
571 regs->tf_fs = _udatasel;
572 regs->tf_ss = _udatasel;
574 mtx_lock(&psp->ps_mtx);
576 #endif /* COMPAT_FREEBSD4 */
579 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
581 struct sigframe sf, *sfp;
586 struct trapframe *regs;
587 struct segment_descriptor *sdp;
595 PROC_LOCK_ASSERT(p, MA_OWNED);
596 sig = ksi->ksi_signo;
598 mtx_assert(&psp->ps_mtx, MA_OWNED);
599 #ifdef COMPAT_FREEBSD4
600 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
601 freebsd4_sendsig(catcher, ksi, mask);
606 if (SIGISMEMBER(psp->ps_osigset, sig)) {
607 osendsig(catcher, ksi, mask);
612 oonstack = sigonstack(regs->tf_esp);
614 if (cpu_max_ext_state_size > sizeof(union savefpu) && use_xsave) {
615 xfpusave_len = cpu_max_ext_state_size - sizeof(union savefpu);
616 xfpusave = __builtin_alloca(xfpusave_len);
622 /* Save user context. */
623 bzero(&sf, sizeof(sf));
624 sf.sf_uc.uc_sigmask = *mask;
625 sf.sf_uc.uc_stack = td->td_sigstk;
626 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
627 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
628 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
629 sf.sf_uc.uc_mcontext.mc_gs = rgs();
630 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
631 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
632 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
635 * Unconditionally fill the fsbase and gsbase into the mcontext.
637 sdp = &td->td_pcb->pcb_fsd;
638 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
640 sdp = &td->td_pcb->pcb_gsd;
641 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
643 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
644 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
645 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
647 /* Allocate space for the signal handler context. */
648 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
649 SIGISMEMBER(psp->ps_sigonstack, sig)) {
650 sp = (char *)td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
651 #if defined(COMPAT_43)
652 td->td_sigstk.ss_flags |= SS_ONSTACK;
655 sp = (char *)regs->tf_esp - 128;
656 if (xfpusave != NULL) {
658 sp = (char *)((unsigned int)sp & ~0x3F);
659 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
661 sp -= sizeof(struct sigframe);
663 /* Align to 16 bytes. */
664 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
666 /* Build the argument list for the signal handler. */
668 sf.sf_ucontext = (register_t)&sfp->sf_uc;
669 bzero(&sf.sf_si, sizeof(sf.sf_si));
670 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
671 /* Signal handler installed with SA_SIGINFO. */
672 sf.sf_siginfo = (register_t)&sfp->sf_si;
673 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
675 /* Fill in POSIX parts */
676 sf.sf_si = ksi->ksi_info;
677 sf.sf_si.si_signo = sig; /* maybe a translated signal */
679 /* Old FreeBSD-style arguments. */
680 sf.sf_siginfo = ksi->ksi_code;
681 sf.sf_addr = (register_t)ksi->ksi_addr;
682 sf.sf_ahu.sf_handler = catcher;
684 mtx_unlock(&psp->ps_mtx);
688 * If we're a vm86 process, we want to save the segment registers.
689 * We also change eflags to be our emulated eflags, not the actual
692 if (regs->tf_eflags & PSL_VM) {
693 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
694 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
696 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
697 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
698 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
699 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
701 if (vm86->vm86_has_vme == 0)
702 sf.sf_uc.uc_mcontext.mc_eflags =
703 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
704 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
707 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
708 * syscalls made by the signal handler. This just avoids
709 * wasting time for our lazy fixup of such faults. PSL_NT
710 * does nothing in vm86 mode, but vm86 programs can set it
711 * almost legitimately in probes for old cpu types.
713 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
717 * Copy the sigframe out to the user's stack.
719 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
720 (xfpusave != NULL && copyout(xfpusave,
721 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
727 regs->tf_esp = (int)sfp;
728 regs->tf_eip = p->p_sysent->sv_sigcode_base;
729 if (regs->tf_eip == 0)
730 regs->tf_eip = p->p_sysent->sv_psstrings - szsigcode;
731 regs->tf_eflags &= ~(PSL_T | PSL_D);
732 regs->tf_cs = _ucodesel;
733 regs->tf_ds = _udatasel;
734 regs->tf_es = _udatasel;
735 regs->tf_fs = _udatasel;
736 regs->tf_ss = _udatasel;
738 mtx_lock(&psp->ps_mtx);
742 * System call to cleanup state after a signal
743 * has been taken. Reset signal mask and
744 * stack state from context left by sendsig (above).
745 * Return to previous pc and psl as specified by
746 * context left by sendsig. Check carefully to
747 * make sure that the user has not modified the
748 * state to gain improper privileges.
756 struct osigreturn_args /* {
757 struct osigcontext *sigcntxp;
760 struct osigcontext sc;
761 struct trapframe *regs;
762 struct osigcontext *scp;
767 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
772 if (eflags & PSL_VM) {
773 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
774 struct vm86_kernel *vm86;
777 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
778 * set up the vm86 area, and we can't enter vm86 mode.
780 if (td->td_pcb->pcb_ext == 0)
782 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
783 if (vm86->vm86_inited == 0)
786 /* Go back to user mode if both flags are set. */
787 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
788 ksiginfo_init_trap(&ksi);
789 ksi.ksi_signo = SIGBUS;
790 ksi.ksi_code = BUS_OBJERR;
791 ksi.ksi_addr = (void *)regs->tf_eip;
792 trapsignal(td, &ksi);
795 if (vm86->vm86_has_vme) {
796 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
797 (eflags & VME_USERCHANGE) | PSL_VM;
799 vm86->vm86_eflags = eflags; /* save VIF, VIP */
800 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
801 (eflags & VM_USERCHANGE) | PSL_VM;
803 tf->tf_vm86_ds = scp->sc_ds;
804 tf->tf_vm86_es = scp->sc_es;
805 tf->tf_vm86_fs = scp->sc_fs;
806 tf->tf_vm86_gs = scp->sc_gs;
807 tf->tf_ds = _udatasel;
808 tf->tf_es = _udatasel;
809 tf->tf_fs = _udatasel;
812 * Don't allow users to change privileged or reserved flags.
814 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
819 * Don't allow users to load a valid privileged %cs. Let the
820 * hardware check for invalid selectors, excess privilege in
821 * other selectors, invalid %eip's and invalid %esp's.
823 if (!CS_SECURE(scp->sc_cs)) {
824 ksiginfo_init_trap(&ksi);
825 ksi.ksi_signo = SIGBUS;
826 ksi.ksi_code = BUS_OBJERR;
827 ksi.ksi_trapno = T_PROTFLT;
828 ksi.ksi_addr = (void *)regs->tf_eip;
829 trapsignal(td, &ksi);
832 regs->tf_ds = scp->sc_ds;
833 regs->tf_es = scp->sc_es;
834 regs->tf_fs = scp->sc_fs;
837 /* Restore remaining registers. */
838 regs->tf_eax = scp->sc_eax;
839 regs->tf_ebx = scp->sc_ebx;
840 regs->tf_ecx = scp->sc_ecx;
841 regs->tf_edx = scp->sc_edx;
842 regs->tf_esi = scp->sc_esi;
843 regs->tf_edi = scp->sc_edi;
844 regs->tf_cs = scp->sc_cs;
845 regs->tf_ss = scp->sc_ss;
846 regs->tf_isp = scp->sc_isp;
847 regs->tf_ebp = scp->sc_fp;
848 regs->tf_esp = scp->sc_sp;
849 regs->tf_eip = scp->sc_pc;
850 regs->tf_eflags = eflags;
852 #if defined(COMPAT_43)
853 if (scp->sc_onstack & 1)
854 td->td_sigstk.ss_flags |= SS_ONSTACK;
856 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
858 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
860 return (EJUSTRETURN);
862 #endif /* COMPAT_43 */
864 #ifdef COMPAT_FREEBSD4
869 freebsd4_sigreturn(td, uap)
871 struct freebsd4_sigreturn_args /* {
872 const ucontext4 *sigcntxp;
876 struct trapframe *regs;
877 struct ucontext4 *ucp;
878 int cs, eflags, error;
881 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
886 eflags = ucp->uc_mcontext.mc_eflags;
887 if (eflags & PSL_VM) {
888 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
889 struct vm86_kernel *vm86;
892 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
893 * set up the vm86 area, and we can't enter vm86 mode.
895 if (td->td_pcb->pcb_ext == 0)
897 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
898 if (vm86->vm86_inited == 0)
901 /* Go back to user mode if both flags are set. */
902 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
903 ksiginfo_init_trap(&ksi);
904 ksi.ksi_signo = SIGBUS;
905 ksi.ksi_code = BUS_OBJERR;
906 ksi.ksi_addr = (void *)regs->tf_eip;
907 trapsignal(td, &ksi);
909 if (vm86->vm86_has_vme) {
910 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
911 (eflags & VME_USERCHANGE) | PSL_VM;
913 vm86->vm86_eflags = eflags; /* save VIF, VIP */
914 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
915 (eflags & VM_USERCHANGE) | PSL_VM;
917 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
918 tf->tf_eflags = eflags;
919 tf->tf_vm86_ds = tf->tf_ds;
920 tf->tf_vm86_es = tf->tf_es;
921 tf->tf_vm86_fs = tf->tf_fs;
922 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
923 tf->tf_ds = _udatasel;
924 tf->tf_es = _udatasel;
925 tf->tf_fs = _udatasel;
928 * Don't allow users to change privileged or reserved flags.
930 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
931 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
932 td->td_proc->p_pid, td->td_name, eflags);
937 * Don't allow users to load a valid privileged %cs. Let the
938 * hardware check for invalid selectors, excess privilege in
939 * other selectors, invalid %eip's and invalid %esp's.
941 cs = ucp->uc_mcontext.mc_cs;
942 if (!CS_SECURE(cs)) {
943 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
944 td->td_proc->p_pid, td->td_name, cs);
945 ksiginfo_init_trap(&ksi);
946 ksi.ksi_signo = SIGBUS;
947 ksi.ksi_code = BUS_OBJERR;
948 ksi.ksi_trapno = T_PROTFLT;
949 ksi.ksi_addr = (void *)regs->tf_eip;
950 trapsignal(td, &ksi);
954 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
957 #if defined(COMPAT_43)
958 if (ucp->uc_mcontext.mc_onstack & 1)
959 td->td_sigstk.ss_flags |= SS_ONSTACK;
961 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
963 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
964 return (EJUSTRETURN);
966 #endif /* COMPAT_FREEBSD4 */
972 sys_sigreturn(td, uap)
974 struct sigreturn_args /* {
975 const struct __ucontext *sigcntxp;
980 struct trapframe *regs;
983 size_t xfpustate_len;
984 int cs, eflags, error, ret;
989 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
993 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
994 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
995 td->td_name, ucp->uc_mcontext.mc_flags);
999 eflags = ucp->uc_mcontext.mc_eflags;
1000 if (eflags & PSL_VM) {
1001 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1002 struct vm86_kernel *vm86;
1005 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1006 * set up the vm86 area, and we can't enter vm86 mode.
1008 if (td->td_pcb->pcb_ext == 0)
1010 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1011 if (vm86->vm86_inited == 0)
1014 /* Go back to user mode if both flags are set. */
1015 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1016 ksiginfo_init_trap(&ksi);
1017 ksi.ksi_signo = SIGBUS;
1018 ksi.ksi_code = BUS_OBJERR;
1019 ksi.ksi_addr = (void *)regs->tf_eip;
1020 trapsignal(td, &ksi);
1023 if (vm86->vm86_has_vme) {
1024 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1025 (eflags & VME_USERCHANGE) | PSL_VM;
1027 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1028 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1029 (eflags & VM_USERCHANGE) | PSL_VM;
1031 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1032 tf->tf_eflags = eflags;
1033 tf->tf_vm86_ds = tf->tf_ds;
1034 tf->tf_vm86_es = tf->tf_es;
1035 tf->tf_vm86_fs = tf->tf_fs;
1036 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1037 tf->tf_ds = _udatasel;
1038 tf->tf_es = _udatasel;
1039 tf->tf_fs = _udatasel;
1042 * Don't allow users to change privileged or reserved flags.
1044 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
1045 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1046 td->td_proc->p_pid, td->td_name, eflags);
1051 * Don't allow users to load a valid privileged %cs. Let the
1052 * hardware check for invalid selectors, excess privilege in
1053 * other selectors, invalid %eip's and invalid %esp's.
1055 cs = ucp->uc_mcontext.mc_cs;
1056 if (!CS_SECURE(cs)) {
1057 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1058 td->td_proc->p_pid, td->td_name, cs);
1059 ksiginfo_init_trap(&ksi);
1060 ksi.ksi_signo = SIGBUS;
1061 ksi.ksi_code = BUS_OBJERR;
1062 ksi.ksi_trapno = T_PROTFLT;
1063 ksi.ksi_addr = (void *)regs->tf_eip;
1064 trapsignal(td, &ksi);
1068 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
1069 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
1070 if (xfpustate_len > cpu_max_ext_state_size -
1071 sizeof(union savefpu)) {
1073 "pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
1074 p->p_pid, td->td_name, xfpustate_len);
1077 xfpustate = __builtin_alloca(xfpustate_len);
1078 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
1079 xfpustate, xfpustate_len);
1082 "pid %d (%s): sigreturn copying xfpustate failed\n",
1083 p->p_pid, td->td_name);
1090 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate,
1094 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1097 #if defined(COMPAT_43)
1098 if (ucp->uc_mcontext.mc_onstack & 1)
1099 td->td_sigstk.ss_flags |= SS_ONSTACK;
1101 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1104 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1105 return (EJUSTRETURN);
1110 setup_priv_lcall_gate(struct proc *p)
1112 struct i386_ldt_args uap;
1113 union descriptor desc;
1116 bzero(&uap, sizeof(uap));
1119 lcall_addr = p->p_sysent->sv_psstrings - sz_lcall_tramp;
1120 bzero(&desc, sizeof(desc));
1121 desc.sd.sd_type = SDT_MEMERA;
1122 desc.sd.sd_dpl = SEL_UPL;
1124 desc.sd.sd_def32 = 1;
1125 desc.sd.sd_gran = 1;
1126 desc.sd.sd_lolimit = 0xffff;
1127 desc.sd.sd_hilimit = 0xf;
1128 desc.sd.sd_lobase = lcall_addr;
1129 desc.sd.sd_hibase = lcall_addr >> 24;
1130 i386_set_ldt(curthread, &uap, &desc);
1135 * Reset registers to default values on exec.
1138 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1140 struct trapframe *regs;
1142 register_t saved_eflags;
1144 regs = td->td_frame;
1147 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1148 pcb->pcb_gs = _udatasel;
1151 mtx_lock_spin(&dt_lock);
1152 if (td->td_proc->p_md.md_ldt != NULL)
1155 mtx_unlock_spin(&dt_lock);
1158 if (td->td_proc->p_sysent->sv_psstrings !=
1159 elf32_freebsd_sysvec.sv_psstrings)
1160 setup_priv_lcall_gate(td->td_proc);
1164 * Reset the fs and gs bases. The values from the old address
1165 * space do not make sense for the new program. In particular,
1166 * gsbase might be the TLS base for the old program but the new
1167 * program has no TLS now.
1172 /* Make sure edx is 0x0 on entry. Linux binaries depend on it. */
1173 saved_eflags = regs->tf_eflags & PSL_T;
1174 bzero((char *)regs, sizeof(struct trapframe));
1175 regs->tf_eip = imgp->entry_addr;
1176 regs->tf_esp = stack;
1177 regs->tf_eflags = PSL_USER | saved_eflags;
1178 regs->tf_ss = _udatasel;
1179 regs->tf_ds = _udatasel;
1180 regs->tf_es = _udatasel;
1181 regs->tf_fs = _udatasel;
1182 regs->tf_cs = _ucodesel;
1184 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1185 regs->tf_ebx = imgp->ps_strings;
1188 * Reset the hardware debug registers if they were in use.
1189 * They won't have any meaning for the newly exec'd process.
1191 if (pcb->pcb_flags & PCB_DBREGS) {
1198 if (pcb == curpcb) {
1200 * Clear the debug registers on the running
1201 * CPU, otherwise they will end up affecting
1202 * the next process we switch to.
1206 pcb->pcb_flags &= ~PCB_DBREGS;
1209 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1212 * Drop the FP state if we hold it, so that the process gets a
1213 * clean FP state if it uses the FPU again.
1226 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1228 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1229 * instructions. We must set the CR0_MP bit and use the CR0_TS
1230 * bit to control the trap, because setting the CR0_EM bit does
1231 * not cause WAIT instructions to trap. It's important to trap
1232 * WAIT instructions - otherwise the "wait" variants of no-wait
1233 * control instructions would degenerate to the "no-wait" variants
1234 * after FP context switches but work correctly otherwise. It's
1235 * particularly important to trap WAITs when there is no NPX -
1236 * otherwise the "wait" variants would always degenerate.
1238 * Try setting CR0_NE to get correct error reporting on 486DX's.
1239 * Setting it should fail or do nothing on lesser processors.
1241 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1246 u_long bootdev; /* not a struct cdev *- encoding is different */
1247 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1248 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1250 static char bootmethod[16] = "BIOS";
1251 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1252 "System firmware boot method");
1255 * Initialize 386 and configure to run kernel
1259 * Initialize segments & interrupt table
1264 struct mtx dt_lock; /* lock for GDT and LDT */
1266 union descriptor gdt0[NGDT]; /* initial global descriptor table */
1267 union descriptor *gdt = gdt0; /* global descriptor table */
1269 union descriptor *ldt; /* local descriptor table */
1271 static struct gate_descriptor idt0[NIDT];
1272 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1274 static struct i386tss *dblfault_tss;
1275 static char *dblfault_stack;
1277 static struct i386tss common_tss0;
1279 vm_offset_t proc0kstack;
1282 * software prototypes -- in more palatable form.
1284 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1285 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1287 struct soft_segment_descriptor gdt_segs[] = {
1288 /* GNULL_SEL 0 Null Descriptor */
1294 .ssd_xx = 0, .ssd_xx1 = 0,
1297 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1299 .ssd_limit = 0xfffff,
1300 .ssd_type = SDT_MEMRWA,
1303 .ssd_xx = 0, .ssd_xx1 = 0,
1306 /* GUFS_SEL 2 %fs Descriptor for user */
1308 .ssd_limit = 0xfffff,
1309 .ssd_type = SDT_MEMRWA,
1312 .ssd_xx = 0, .ssd_xx1 = 0,
1315 /* GUGS_SEL 3 %gs Descriptor for user */
1317 .ssd_limit = 0xfffff,
1318 .ssd_type = SDT_MEMRWA,
1321 .ssd_xx = 0, .ssd_xx1 = 0,
1324 /* GCODE_SEL 4 Code Descriptor for kernel */
1326 .ssd_limit = 0xfffff,
1327 .ssd_type = SDT_MEMERA,
1330 .ssd_xx = 0, .ssd_xx1 = 0,
1333 /* GDATA_SEL 5 Data Descriptor for kernel */
1335 .ssd_limit = 0xfffff,
1336 .ssd_type = SDT_MEMRWA,
1339 .ssd_xx = 0, .ssd_xx1 = 0,
1342 /* GUCODE_SEL 6 Code Descriptor for user */
1344 .ssd_limit = 0xfffff,
1345 .ssd_type = SDT_MEMERA,
1348 .ssd_xx = 0, .ssd_xx1 = 0,
1351 /* GUDATA_SEL 7 Data Descriptor for user */
1353 .ssd_limit = 0xfffff,
1354 .ssd_type = SDT_MEMRWA,
1357 .ssd_xx = 0, .ssd_xx1 = 0,
1360 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1361 { .ssd_base = 0x400,
1362 .ssd_limit = 0xfffff,
1363 .ssd_type = SDT_MEMRWA,
1366 .ssd_xx = 0, .ssd_xx1 = 0,
1369 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1372 .ssd_limit = sizeof(struct i386tss)-1,
1373 .ssd_type = SDT_SYS386TSS,
1376 .ssd_xx = 0, .ssd_xx1 = 0,
1379 /* GLDT_SEL 10 LDT Descriptor */
1381 .ssd_limit = sizeof(union descriptor) * NLDT - 1,
1382 .ssd_type = SDT_SYSLDT,
1385 .ssd_xx = 0, .ssd_xx1 = 0,
1388 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1390 .ssd_limit = (512 * sizeof(union descriptor)-1),
1391 .ssd_type = SDT_SYSLDT,
1394 .ssd_xx = 0, .ssd_xx1 = 0,
1397 /* GPANIC_SEL 12 Panic Tss Descriptor */
1399 .ssd_limit = sizeof(struct i386tss)-1,
1400 .ssd_type = SDT_SYS386TSS,
1403 .ssd_xx = 0, .ssd_xx1 = 0,
1406 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1408 .ssd_limit = 0xfffff,
1409 .ssd_type = SDT_MEMERA,
1412 .ssd_xx = 0, .ssd_xx1 = 0,
1415 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1417 .ssd_limit = 0xfffff,
1418 .ssd_type = SDT_MEMERA,
1421 .ssd_xx = 0, .ssd_xx1 = 0,
1424 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1426 .ssd_limit = 0xfffff,
1427 .ssd_type = SDT_MEMRWA,
1430 .ssd_xx = 0, .ssd_xx1 = 0,
1433 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1435 .ssd_limit = 0xfffff,
1436 .ssd_type = SDT_MEMRWA,
1439 .ssd_xx = 0, .ssd_xx1 = 0,
1442 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1444 .ssd_limit = 0xfffff,
1445 .ssd_type = SDT_MEMRWA,
1448 .ssd_xx = 0, .ssd_xx1 = 0,
1451 /* GNDIS_SEL 18 NDIS Descriptor */
1457 .ssd_xx = 0, .ssd_xx1 = 0,
1462 static struct soft_segment_descriptor ldt_segs[] = {
1463 /* Null Descriptor - overwritten by call gate */
1469 .ssd_xx = 0, .ssd_xx1 = 0,
1472 /* Null Descriptor - overwritten by call gate */
1478 .ssd_xx = 0, .ssd_xx1 = 0,
1481 /* Null Descriptor - overwritten by call gate */
1487 .ssd_xx = 0, .ssd_xx1 = 0,
1490 /* Code Descriptor for user */
1492 .ssd_limit = 0xfffff,
1493 .ssd_type = SDT_MEMERA,
1496 .ssd_xx = 0, .ssd_xx1 = 0,
1499 /* Null Descriptor - overwritten by call gate */
1505 .ssd_xx = 0, .ssd_xx1 = 0,
1508 /* Data Descriptor for user */
1510 .ssd_limit = 0xfffff,
1511 .ssd_type = SDT_MEMRWA,
1514 .ssd_xx = 0, .ssd_xx1 = 0,
1519 uintptr_t setidt_disp;
1522 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1526 off = func != NULL ? (uintptr_t)func + setidt_disp : 0;
1527 setidt_nodisp(idx, off, typ, dpl, selec);
1531 setidt_nodisp(int idx, uintptr_t off, int typ, int dpl, int selec)
1533 struct gate_descriptor *ip;
1536 ip->gd_looffset = off;
1537 ip->gd_selector = selec;
1543 ip->gd_hioffset = ((u_int)off) >> 16 ;
1547 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1548 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1549 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1550 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1552 #ifdef KDTRACE_HOOKS
1556 IDTVEC(xen_intr_upcall),
1558 IDTVEC(int0x80_syscall);
1562 * Display the index and function name of any IDT entries that don't use
1563 * the default 'rsvd' entry point.
1565 DB_SHOW_COMMAND(idt, db_show_idt)
1567 struct gate_descriptor *ip;
1569 uintptr_t func, func_trm;
1573 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1574 if (ip->gd_type == SDT_SYSTASKGT) {
1575 db_printf("%3d\t<TASK>\n", idx);
1577 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1578 if (func >= PMAP_TRM_MIN_ADDRESS) {
1580 func -= setidt_disp;
1584 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1585 db_printf("%3d\t", idx);
1586 db_printsym(func, DB_STGY_PROC);
1588 db_printf(" (trampoline %#x)",
1597 /* Show privileged registers. */
1598 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1600 uint64_t idtr, gdtr;
1603 db_printf("idtr\t0x%08x/%04x\n",
1604 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1606 db_printf("gdtr\t0x%08x/%04x\n",
1607 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1608 db_printf("ldtr\t0x%04x\n", rldt());
1609 db_printf("tr\t0x%04x\n", rtr());
1610 db_printf("cr0\t0x%08x\n", rcr0());
1611 db_printf("cr2\t0x%08x\n", rcr2());
1612 db_printf("cr3\t0x%08x\n", rcr3());
1613 db_printf("cr4\t0x%08x\n", rcr4());
1614 if (rcr4() & CR4_XSAVE)
1615 db_printf("xcr0\t0x%016llx\n", rxcr(0));
1616 if (amd_feature & (AMDID_NX | AMDID_LM))
1617 db_printf("EFER\t0x%016llx\n", rdmsr(MSR_EFER));
1618 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
1619 db_printf("FEATURES_CTL\t0x%016llx\n",
1620 rdmsr(MSR_IA32_FEATURE_CONTROL));
1621 if ((cpu_vendor_id == CPU_VENDOR_INTEL ||
1622 cpu_vendor_id == CPU_VENDOR_AMD) && CPUID_TO_FAMILY(cpu_id) >= 6)
1623 db_printf("DEBUG_CTL\t0x%016llx\n", rdmsr(MSR_DEBUGCTLMSR));
1624 if (cpu_feature & CPUID_PAT)
1625 db_printf("PAT\t0x%016llx\n", rdmsr(MSR_PAT));
1628 DB_SHOW_COMMAND(dbregs, db_show_dbregs)
1631 db_printf("dr0\t0x%08x\n", rdr0());
1632 db_printf("dr1\t0x%08x\n", rdr1());
1633 db_printf("dr2\t0x%08x\n", rdr2());
1634 db_printf("dr3\t0x%08x\n", rdr3());
1635 db_printf("dr6\t0x%08x\n", rdr6());
1636 db_printf("dr7\t0x%08x\n", rdr7());
1639 DB_SHOW_COMMAND(frame, db_show_frame)
1641 struct trapframe *frame;
1643 frame = have_addr ? (struct trapframe *)addr : curthread->td_frame;
1644 printf("ss %#x esp %#x efl %#x cs %#x eip %#x\n",
1645 frame->tf_ss, frame->tf_esp, frame->tf_eflags, frame->tf_cs,
1647 printf("err %#x trapno %d\n", frame->tf_err, frame->tf_trapno);
1648 printf("ds %#x es %#x fs %#x\n",
1649 frame->tf_ds, frame->tf_es, frame->tf_fs);
1650 printf("eax %#x ecx %#x edx %#x ebx %#x\n",
1651 frame->tf_eax, frame->tf_ecx, frame->tf_edx, frame->tf_ebx);
1652 printf("ebp %#x esi %#x edi %#x\n",
1653 frame->tf_ebp, frame->tf_esi, frame->tf_edi);
1660 struct segment_descriptor *sd;
1661 struct soft_segment_descriptor *ssd;
1663 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1664 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1665 ssd->ssd_type = sd->sd_type;
1666 ssd->ssd_dpl = sd->sd_dpl;
1667 ssd->ssd_p = sd->sd_p;
1668 ssd->ssd_def32 = sd->sd_def32;
1669 ssd->ssd_gran = sd->sd_gran;
1673 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1676 int i, insert_idx, physmap_idx;
1678 physmap_idx = *physmap_idxp;
1684 if (base > 0xffffffff) {
1685 printf("%uK of memory above 4GB ignored\n",
1686 (u_int)(length / 1024));
1692 * Find insertion point while checking for overlap. Start off by
1693 * assuming the new entry will be added to the end.
1695 insert_idx = physmap_idx + 2;
1696 for (i = 0; i <= physmap_idx; i += 2) {
1697 if (base < physmap[i + 1]) {
1698 if (base + length <= physmap[i]) {
1702 if (boothowto & RB_VERBOSE)
1704 "Overlapping memory regions, ignoring second region\n");
1709 /* See if we can prepend to the next entry. */
1710 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1711 physmap[insert_idx] = base;
1715 /* See if we can append to the previous entry. */
1716 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1717 physmap[insert_idx - 1] += length;
1722 *physmap_idxp = physmap_idx;
1723 if (physmap_idx == PHYSMAP_SIZE) {
1725 "Too many segments in the physical address map, giving up\n");
1730 * Move the last 'N' entries down to make room for the new
1733 for (i = physmap_idx; i > insert_idx; i -= 2) {
1734 physmap[i] = physmap[i - 2];
1735 physmap[i + 1] = physmap[i - 1];
1738 /* Insert the new entry. */
1739 physmap[insert_idx] = base;
1740 physmap[insert_idx + 1] = base + length;
1745 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1747 if (boothowto & RB_VERBOSE)
1748 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1749 smap->type, smap->base, smap->length);
1751 if (smap->type != SMAP_TYPE_MEMORY)
1754 return (add_physmap_entry(smap->base, smap->length, physmap,
1759 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
1762 struct bios_smap *smap, *smapend;
1765 * Memory map from INT 15:E820.
1767 * subr_module.c says:
1768 * "Consumer may safely assume that size value precedes data."
1769 * ie: an int32_t immediately precedes SMAP.
1771 smapsize = *((u_int32_t *)smapbase - 1);
1772 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1774 for (smap = smapbase; smap < smapend; smap++)
1775 if (!add_smap_entry(smap, physmap, physmap_idxp))
1785 if (basemem > 640) {
1786 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1792 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1793 * the vm86 page table so that vm86 can scribble on them using
1794 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1795 * page 0, at least as initialized here?
1797 pte = (pt_entry_t *)vm86paddr;
1798 for (i = basemem / 4; i < 160; i++)
1799 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1803 * Populate the (physmap) array with base/bound pairs describing the
1804 * available physical memory in the system, then test this memory and
1805 * build the phys_avail array describing the actually-available memory.
1807 * If we cannot accurately determine the physical memory map, then use
1808 * value from the 0xE801 call, and failing that, the RTC.
1810 * Total memory size may be set by the kernel environment variable
1811 * hw.physmem or the compile-time define MAXMEM.
1813 * XXX first should be vm_paddr_t.
1816 getmemsize(int first)
1818 int has_smap, off, physmap_idx, pa_indx, da_indx;
1820 vm_paddr_t physmap[PHYSMAP_SIZE];
1822 quad_t dcons_addr, dcons_size, physmem_tunable;
1823 int hasbrokenint12, i, res;
1825 struct vm86frame vmf;
1826 struct vm86context vmc;
1828 struct bios_smap *smap, *smapbase;
1832 bzero(&vmf, sizeof(vmf));
1833 bzero(physmap, sizeof(physmap));
1837 * Check if the loader supplied an SMAP memory map. If so,
1838 * use that and do not make any VM86 calls.
1841 kmdp = preload_search_by_type("elf kernel");
1843 kmdp = preload_search_by_type("elf32 kernel");
1844 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1845 MODINFO_METADATA | MODINFOMD_SMAP);
1846 if (smapbase != NULL) {
1847 add_smap_entries(smapbase, physmap, &physmap_idx);
1853 * Some newer BIOSes have a broken INT 12H implementation
1854 * which causes a kernel panic immediately. In this case, we
1855 * need use the SMAP to determine the base memory size.
1858 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1859 if (hasbrokenint12 == 0) {
1860 /* Use INT12 to determine base memory size. */
1861 vm86_intcall(0x12, &vmf);
1862 basemem = vmf.vmf_ax;
1867 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
1868 * the kernel page table so we can use it as a buffer. The
1869 * kernel will unmap this page later.
1872 smap = (void *)vm86_addpage(&vmc, 1, PMAP_MAP_LOW + ptoa(1));
1873 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1874 KASSERT(res != 0, ("vm86_getptr() failed: address not found"));
1878 vmf.vmf_eax = 0xE820;
1879 vmf.vmf_edx = SMAP_SIG;
1880 vmf.vmf_ecx = sizeof(struct bios_smap);
1881 i = vm86_datacall(0x15, &vmf, &vmc);
1882 if (i || vmf.vmf_eax != SMAP_SIG)
1885 if (!add_smap_entry(smap, physmap, &physmap_idx))
1887 } while (vmf.vmf_ebx != 0);
1891 * If we didn't fetch the "base memory" size from INT12,
1892 * figure it out from the SMAP (or just guess).
1895 for (i = 0; i <= physmap_idx; i += 2) {
1896 if (physmap[i] == 0x00000000) {
1897 basemem = physmap[i + 1] / 1024;
1902 /* XXX: If we couldn't find basemem from SMAP, just guess. */
1908 if (physmap[1] != 0)
1912 * If we failed to find an SMAP, figure out the extended
1913 * memory size. We will then build a simple memory map with
1914 * two segments, one for "base memory" and the second for
1915 * "extended memory". Note that "extended memory" starts at a
1916 * physical address of 1MB and that both basemem and extmem
1917 * are in units of 1KB.
1919 * First, try to fetch the extended memory size via INT 15:E801.
1921 vmf.vmf_ax = 0xE801;
1922 if (vm86_intcall(0x15, &vmf) == 0) {
1923 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1926 * If INT15:E801 fails, this is our last ditch effort
1927 * to determine the extended memory size. Currently
1928 * we prefer the RTC value over INT15:88.
1932 vm86_intcall(0x15, &vmf);
1933 extmem = vmf.vmf_ax;
1935 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1940 * Special hack for chipsets that still remap the 384k hole when
1941 * there's 16MB of memory - this really confuses people that
1942 * are trying to use bus mastering ISA controllers with the
1943 * "16MB limit"; they only have 16MB, but the remapping puts
1944 * them beyond the limit.
1946 * If extended memory is between 15-16MB (16-17MB phys address range),
1949 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1953 physmap[1] = basemem * 1024;
1955 physmap[physmap_idx] = 0x100000;
1956 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1960 * Now, physmap contains a map of physical memory.
1964 /* make hole for AP bootstrap code */
1965 alloc_ap_trampoline(physmap, &physmap_idx);
1969 * Maxmem isn't the "maximum memory", it's one larger than the
1970 * highest page of the physical address space. It should be
1971 * called something like "Maxphyspage". We may adjust this
1972 * based on ``hw.physmem'' and the results of the memory test.
1974 * This is especially confusing when it is much larger than the
1975 * memory size and is displayed as "realmem".
1977 Maxmem = atop(physmap[physmap_idx + 1]);
1980 Maxmem = MAXMEM / 4;
1983 if (TUNABLE_QUAD_FETCH("hw.physmem", &physmem_tunable))
1984 Maxmem = atop(physmem_tunable);
1987 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
1988 * the amount of memory in the system.
1990 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
1991 Maxmem = atop(physmap[physmap_idx + 1]);
1994 * By default enable the memory test on real hardware, and disable
1995 * it if we appear to be running in a VM. This avoids touching all
1996 * pages unnecessarily, which doesn't matter on real hardware but is
1997 * bad for shared VM hosts. Use a general name so that
1998 * one could eventually do more with the code than just disable it.
2000 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2001 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2003 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2004 (boothowto & RB_VERBOSE))
2005 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2008 * If Maxmem has been increased beyond what the system has detected,
2009 * extend the last memory segment to the new limit.
2011 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2012 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2014 /* call pmap initialization to make new kernel address space */
2015 pmap_bootstrap(first);
2018 * Size up each available chunk of physical memory.
2020 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2023 phys_avail[pa_indx++] = physmap[0];
2024 phys_avail[pa_indx] = physmap[0];
2025 dump_avail[da_indx] = physmap[0];
2029 * Get dcons buffer address
2031 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2032 getenv_quad("dcons.size", &dcons_size) == 0)
2036 * physmap is in bytes, so when converting to page boundaries,
2037 * round up the start address and round down the end address.
2039 for (i = 0; i <= physmap_idx; i += 2) {
2042 end = ptoa((vm_paddr_t)Maxmem);
2043 if (physmap[i + 1] < end)
2044 end = trunc_page(physmap[i + 1]);
2045 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2046 int tmp, page_bad, full;
2047 int *ptr = (int *)CADDR3;
2051 * block out kernel memory as not available.
2053 if (pa >= KERNLOAD && pa < first)
2057 * block out dcons buffer
2060 && pa >= trunc_page(dcons_addr)
2061 && pa < dcons_addr + dcons_size)
2069 * map page into kernel: valid, read/write,non-cacheable
2071 *pte = pa | PG_V | PG_RW | PG_N;
2076 * Test for alternating 1's and 0's
2078 *(volatile int *)ptr = 0xaaaaaaaa;
2079 if (*(volatile int *)ptr != 0xaaaaaaaa)
2082 * Test for alternating 0's and 1's
2084 *(volatile int *)ptr = 0x55555555;
2085 if (*(volatile int *)ptr != 0x55555555)
2090 *(volatile int *)ptr = 0xffffffff;
2091 if (*(volatile int *)ptr != 0xffffffff)
2096 *(volatile int *)ptr = 0x0;
2097 if (*(volatile int *)ptr != 0x0)
2100 * Restore original value.
2106 * Adjust array of valid/good pages.
2108 if (page_bad == TRUE)
2111 * If this good page is a continuation of the
2112 * previous set of good pages, then just increase
2113 * the end pointer. Otherwise start a new chunk.
2114 * Note that "end" points one higher than end,
2115 * making the range >= start and < end.
2116 * If we're also doing a speculative memory
2117 * test and we at or past the end, bump up Maxmem
2118 * so that we keep going. The first bad page
2119 * will terminate the loop.
2121 if (phys_avail[pa_indx] == pa) {
2122 phys_avail[pa_indx] += PAGE_SIZE;
2125 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2127 "Too many holes in the physical address space, giving up\n");
2132 phys_avail[pa_indx++] = pa; /* start */
2133 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2137 if (dump_avail[da_indx] == pa) {
2138 dump_avail[da_indx] += PAGE_SIZE;
2141 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2145 dump_avail[da_indx++] = pa; /* start */
2146 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2158 * The last chunk must contain at least one page plus the message
2159 * buffer to avoid complicating other code (message buffer address
2160 * calculation, etc.).
2162 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2163 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2164 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2165 phys_avail[pa_indx--] = 0;
2166 phys_avail[pa_indx--] = 0;
2169 Maxmem = atop(phys_avail[pa_indx]);
2171 /* Trim off space for the message buffer. */
2172 phys_avail[pa_indx] -= round_page(msgbufsize);
2174 /* Map the message buffer. */
2175 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2176 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2184 db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab);
2188 if (boothowto & RB_KDB)
2189 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2196 struct gate_descriptor *ip;
2200 for (x = 0; x < NIDT; x++) {
2202 if (ip->gd_type != SDT_SYS386IGT &&
2203 ip->gd_type != SDT_SYS386TGT)
2205 off = ip->gd_looffset + (((u_int)ip->gd_hioffset) << 16);
2206 KASSERT(off >= (uintptr_t)start_exceptions &&
2207 off < (uintptr_t)end_exceptions,
2208 ("IDT[%d] type %d off %#x", x, ip->gd_type, off));
2210 MPASS(off >= PMAP_TRM_MIN_ADDRESS &&
2211 off < PMAP_TRM_MAX_ADDRESS);
2212 ip->gd_looffset = off;
2213 ip->gd_hioffset = off >> 16;
2223 for (x = 0; x < NIDT; x++)
2224 setidt(x, &IDTVEC(rsvd), SDT_SYS386IGT, SEL_KPL,
2225 GSEL(GCODE_SEL, SEL_KPL));
2226 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386IGT, SEL_KPL,
2227 GSEL(GCODE_SEL, SEL_KPL));
2228 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2229 GSEL(GCODE_SEL, SEL_KPL));
2230 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2231 GSEL(GCODE_SEL, SEL_KPL));
2232 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2233 GSEL(GCODE_SEL, SEL_KPL));
2234 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386IGT, SEL_UPL,
2235 GSEL(GCODE_SEL, SEL_KPL));
2236 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386IGT, SEL_KPL,
2237 GSEL(GCODE_SEL, SEL_KPL));
2238 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL,
2239 GSEL(GCODE_SEL, SEL_KPL));
2240 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386IGT, SEL_KPL,
2241 GSEL(GCODE_SEL, SEL_KPL));
2242 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL,
2244 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386IGT,
2245 SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2246 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386IGT, SEL_KPL,
2247 GSEL(GCODE_SEL, SEL_KPL));
2248 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386IGT, SEL_KPL,
2249 GSEL(GCODE_SEL, SEL_KPL));
2250 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386IGT, SEL_KPL,
2251 GSEL(GCODE_SEL, SEL_KPL));
2252 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL,
2253 GSEL(GCODE_SEL, SEL_KPL));
2254 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2255 GSEL(GCODE_SEL, SEL_KPL));
2256 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2257 GSEL(GCODE_SEL, SEL_KPL));
2258 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386IGT, SEL_KPL,
2259 GSEL(GCODE_SEL, SEL_KPL));
2260 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386IGT, SEL_KPL,
2261 GSEL(GCODE_SEL, SEL_KPL));
2262 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386IGT, SEL_KPL,
2263 GSEL(GCODE_SEL, SEL_KPL));
2264 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall),
2265 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2266 #ifdef KDTRACE_HOOKS
2267 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret),
2268 SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2271 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall),
2272 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2280 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL,
2281 GSEL(GCODE_SEL, SEL_KPL));
2282 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL,
2283 GSEL(GCODE_SEL, SEL_KPL));
2286 #if defined(DEV_ISA) && !defined(DEV_ATPIC)
2291 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint),
2292 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2293 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint),
2294 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2301 struct region_descriptor r_gdt, r_idt; /* table descriptors */
2302 int gsel_tss, metadata_missing, x, pa;
2304 struct xstate_hdr *xhdr;
2309 thread0.td_kstack = proc0kstack;
2310 thread0.td_kstack_pages = TD0_KSTACK_PAGES;
2313 * This may be done better later if it gets more high level
2314 * components in it. If so just link td->td_proc here.
2316 proc_linkup0(&proc0, &thread0);
2318 if (bootinfo.bi_modulep) {
2319 metadata_missing = 0;
2320 addend = (vm_paddr_t)bootinfo.bi_modulep < KERNBASE ?
2322 preload_metadata = (caddr_t)bootinfo.bi_modulep + addend;
2323 preload_bootstrap_relocate(addend);
2325 metadata_missing = 1;
2328 if (bootinfo.bi_envp != 0) {
2329 addend = (vm_paddr_t)bootinfo.bi_envp < KERNBASE ?
2331 init_static_kenv((char *)bootinfo.bi_envp + addend, 0);
2333 init_static_kenv(NULL, 0);
2336 identify_hypervisor();
2338 /* Init basic tunables, hz etc */
2342 * Make gdt memory segments. All segments cover the full 4GB
2343 * of address space and permissions are enforced at page level.
2345 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2346 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2347 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2348 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2349 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2350 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2353 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2354 gdt_segs[GPRIV_SEL].ssd_base = (int)pc;
2355 gdt_segs[GPROC0_SEL].ssd_base = (int)&common_tss0;
2357 for (x = 0; x < NGDT; x++)
2358 ssdtosd(&gdt_segs[x], &gdt0[x].sd);
2360 r_gdt.rd_limit = NGDT * sizeof(gdt0[0]) - 1;
2361 r_gdt.rd_base = (int)gdt0;
2362 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2365 pcpu_init(pc, 0, sizeof(struct pcpu));
2366 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2367 pmap_kenter(pa, pa);
2368 dpcpu_init((void *)first, 0);
2369 first += DPCPU_SIZE;
2370 PCPU_SET(prvspace, pc);
2371 PCPU_SET(curthread, &thread0);
2372 /* Non-late cninit() and printf() can be moved up to here. */
2375 * Initialize mutexes.
2377 * icu_lock: in order to allow an interrupt to occur in a critical
2378 * section, to set pcpu->ipending (etc...) properly, we
2379 * must be able to get the icu lock, so it can't be
2383 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2387 r_idt.rd_limit = sizeof(idt0) - 1;
2388 r_idt.rd_base = (int) idt;
2392 * Initialize the clock before the console so that console
2393 * initialization can use DELAY().
2397 finishidentcpu(); /* Final stage of CPU initialization */
2399 initializecpu(); /* Initialize CPU registers */
2400 initializecpucache();
2402 /* pointer to selector slot for %fs/%gs */
2403 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2405 /* Initialize the tss (except for the final esp0) early for vm86. */
2406 common_tss0.tss_esp0 = thread0.td_kstack + thread0.td_kstack_pages *
2407 PAGE_SIZE - VM86_STACK_SPACE;
2408 common_tss0.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
2409 common_tss0.tss_ioopt = sizeof(struct i386tss) << 16;
2410 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2411 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2412 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2415 /* Initialize the PIC early for vm86 calls. */
2421 /* Reset and mask the atpics and leave them shut down. */
2425 * Point the ICU spurious interrupt vectors at the APIC spurious
2426 * interrupt handler.
2433 * The console and kdb should be initialized even earlier than here,
2434 * but some console drivers don't work until after getmemsize().
2435 * Default to late console initialization to support these drivers.
2436 * This loses mainly printf()s in getmemsize() and early debugging.
2439 TUNABLE_INT_FETCH("debug.late_console", &late_console);
2440 if (!late_console) {
2445 kmdp = preload_search_by_type("elf kernel");
2446 link_elf_ireloc(kmdp);
2450 init_param2(physmem);
2452 /* now running on new page tables, configured,and u/iom is accessible */
2457 if (metadata_missing)
2458 printf("WARNING: loader(8) metadata is missing!\n");
2463 msgbufinit(msgbufp, msgbufsize);
2466 * Set up thread0 pcb after npxinit calculated pcb + fpu save
2467 * area size. Zero out the extended state header in fpu save
2470 thread0.td_pcb = get_pcb_td(&thread0);
2471 thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
2472 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2474 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2476 xhdr->xstate_bv = xsave_mask;
2478 PCPU_SET(curpcb, thread0.td_pcb);
2479 /* Move esp0 in the tss to its final place. */
2480 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2481 common_tss0.tss_esp0 = (vm_offset_t)thread0.td_pcb - VM86_STACK_SPACE;
2482 PCPU_SET(kesp0, common_tss0.tss_esp0);
2483 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; /* clear busy bit */
2486 /* transfer to user mode */
2488 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2489 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2491 /* setup proc 0's pcb */
2492 thread0.td_pcb->pcb_flags = 0;
2493 #if defined(PAE) || defined(PAE_TABLES)
2494 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2496 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2498 thread0.td_pcb->pcb_ext = 0;
2499 thread0.td_frame = &proc0_tf;
2507 /* Location of kernel stack for locore */
2508 return ((register_t)thread0.td_pcb);
2512 machdep_init_trampoline(void)
2514 struct region_descriptor r_gdt, r_idt;
2515 struct i386tss *tss;
2516 char *copyout_buf, *trampoline, *tramp_stack_base;
2519 gdt = pmap_trm_alloc(sizeof(union descriptor) * NGDT * mp_ncpus,
2521 bcopy(gdt0, gdt, sizeof(union descriptor) * NGDT);
2522 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2523 r_gdt.rd_base = (int)gdt;
2526 tss = pmap_trm_alloc(sizeof(struct i386tss) * mp_ncpus,
2528 bcopy(&common_tss0, tss, sizeof(struct i386tss));
2529 gdt[GPROC0_SEL].sd.sd_lobase = (int)tss;
2530 gdt[GPROC0_SEL].sd.sd_hibase = (u_int)tss >> 24;
2531 gdt[GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
2533 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2534 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2535 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2536 PCPU_SET(common_tssp, tss);
2537 ltr(GSEL(GPROC0_SEL, SEL_KPL));
2539 trampoline = pmap_trm_alloc(end_exceptions - start_exceptions,
2541 bcopy(start_exceptions, trampoline, end_exceptions - start_exceptions);
2542 tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT);
2543 PCPU_SET(trampstk, (uintptr_t)tramp_stack_base + TRAMP_STACK_SZ -
2545 tss[0].tss_esp0 = PCPU_GET(trampstk);
2547 idt = pmap_trm_alloc(sizeof(idt0), M_NOWAIT | M_ZERO);
2548 bcopy(idt0, idt, sizeof(idt0));
2550 /* Re-initialize new IDT since the handlers were relocated */
2551 setidt_disp = trampoline - start_exceptions;
2554 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1;
2555 r_idt.rd_base = (int)idt;
2559 dblfault_tss = pmap_trm_alloc(sizeof(struct i386tss), M_NOWAIT | M_ZERO);
2560 dblfault_stack = pmap_trm_alloc(PAGE_SIZE, M_NOWAIT);
2561 dblfault_tss->tss_esp = dblfault_tss->tss_esp0 =
2562 dblfault_tss->tss_esp1 = dblfault_tss->tss_esp2 =
2563 (int)dblfault_stack + PAGE_SIZE;
2564 dblfault_tss->tss_ss = dblfault_tss->tss_ss0 = dblfault_tss->tss_ss1 =
2565 dblfault_tss->tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2566 #if defined(PAE) || defined(PAE_TABLES)
2567 dblfault_tss->tss_cr3 = (int)IdlePDPT;
2569 dblfault_tss->tss_cr3 = (int)IdlePTD;
2571 dblfault_tss->tss_eip = (int)dblfault_handler;
2572 dblfault_tss->tss_eflags = PSL_KERNEL;
2573 dblfault_tss->tss_ds = dblfault_tss->tss_es =
2574 dblfault_tss->tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2575 dblfault_tss->tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2576 dblfault_tss->tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2577 dblfault_tss->tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2578 gdt[GPANIC_SEL].sd.sd_lobase = (int)dblfault_tss;
2579 gdt[GPANIC_SEL].sd.sd_hibase = (u_int)dblfault_tss >> 24;
2581 /* make ldt memory segments */
2582 ldt = pmap_trm_alloc(sizeof(union descriptor) * NLDT,
2584 gdt[GLDT_SEL].sd.sd_lobase = (int)ldt;
2585 gdt[GLDT_SEL].sd.sd_hibase = (u_int)ldt >> 24;
2586 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2587 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2588 for (x = 0; x < nitems(ldt_segs); x++)
2589 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2591 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2593 PCPU_SET(currentldt, _default_ldt);
2595 copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT);
2596 PCPU_SET(copyout_buf, copyout_buf);
2597 copyout_init_tramp();
2599 SYSINIT(vm_mem, SI_SUB_VM, SI_ORDER_SECOND, machdep_init_trampoline, NULL);
2603 i386_setup_lcall_gate(void)
2605 struct sysentvec *sv;
2606 struct user_segment_descriptor desc;
2609 sv = &elf32_freebsd_sysvec;
2610 lcall_addr = (uintptr_t)sv->sv_psstrings - sz_lcall_tramp;
2612 bzero(&desc, sizeof(desc));
2613 desc.sd_type = SDT_MEMERA;
2614 desc.sd_dpl = SEL_UPL;
2618 desc.sd_lolimit = 0xffff;
2619 desc.sd_hilimit = 0xf;
2620 desc.sd_lobase = lcall_addr;
2621 desc.sd_hibase = lcall_addr >> 24;
2622 bcopy(&desc, &ldt[LSYS5CALLS_SEL], sizeof(desc));
2624 SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_ANY, i386_setup_lcall_gate, NULL);
2628 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2631 pcpu->pc_acpi_id = 0xffffffff;
2635 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
2637 struct bios_smap *smapbase;
2638 struct bios_smap_xattr smap;
2641 int count, error, i;
2643 /* Retrieve the system memory map from the loader. */
2644 kmdp = preload_search_by_type("elf kernel");
2646 kmdp = preload_search_by_type("elf32 kernel");
2647 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2648 MODINFO_METADATA | MODINFOMD_SMAP);
2649 if (smapbase == NULL)
2651 smapattr = (uint32_t *)preload_search_info(kmdp,
2652 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
2653 count = *((u_int32_t *)smapbase - 1) / sizeof(*smapbase);
2655 for (i = 0; i < count; i++) {
2656 smap.base = smapbase[i].base;
2657 smap.length = smapbase[i].length;
2658 smap.type = smapbase[i].type;
2659 if (smapattr != NULL)
2660 smap.xattr = smapattr[i];
2663 error = SYSCTL_OUT(req, &smap, sizeof(smap));
2667 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2668 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
2671 spinlock_enter(void)
2677 if (td->td_md.md_spinlock_count == 0) {
2678 flags = intr_disable();
2679 td->td_md.md_spinlock_count = 1;
2680 td->td_md.md_saved_flags = flags;
2682 td->td_md.md_spinlock_count++;
2694 flags = td->td_md.md_saved_flags;
2695 td->td_md.md_spinlock_count--;
2696 if (td->td_md.md_spinlock_count == 0)
2697 intr_restore(flags);
2700 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2701 static void f00f_hack(void *unused);
2702 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2705 f00f_hack(void *unused)
2707 struct region_descriptor r_idt;
2708 struct gate_descriptor *new_idt;
2716 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2718 tmp = (vm_offset_t)pmap_trm_alloc(PAGE_SIZE * 3, M_NOWAIT | M_ZERO);
2720 panic("kmem_malloc returned 0");
2721 tmp = round_page(tmp);
2723 /* Put the problematic entry (#6) at the end of the lower page. */
2724 new_idt = (struct gate_descriptor *)
2725 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2726 bcopy(idt, new_idt, sizeof(idt0));
2727 r_idt.rd_base = (u_int)new_idt;
2728 r_idt.rd_limit = sizeof(idt0) - 1;
2730 /* SMP machines do not need the F00F hack. */
2732 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
2734 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2737 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2738 * we want to start a backtrace from the function that caused us to enter
2739 * the debugger. We have the context in the trapframe, but base the trace
2740 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2741 * enough for a backtrace.
2744 makectx(struct trapframe *tf, struct pcb *pcb)
2747 pcb->pcb_edi = tf->tf_edi;
2748 pcb->pcb_esi = tf->tf_esi;
2749 pcb->pcb_ebp = tf->tf_ebp;
2750 pcb->pcb_ebx = tf->tf_ebx;
2751 pcb->pcb_eip = tf->tf_eip;
2752 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2753 pcb->pcb_gs = rgs();
2757 ptrace_set_pc(struct thread *td, u_long addr)
2760 td->td_frame->tf_eip = addr;
2765 ptrace_single_step(struct thread *td)
2767 td->td_frame->tf_eflags |= PSL_T;
2772 ptrace_clear_single_step(struct thread *td)
2774 td->td_frame->tf_eflags &= ~PSL_T;
2779 fill_regs(struct thread *td, struct reg *regs)
2782 struct trapframe *tp;
2786 regs->r_gs = pcb->pcb_gs;
2787 return (fill_frame_regs(tp, regs));
2791 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2793 regs->r_fs = tp->tf_fs;
2794 regs->r_es = tp->tf_es;
2795 regs->r_ds = tp->tf_ds;
2796 regs->r_edi = tp->tf_edi;
2797 regs->r_esi = tp->tf_esi;
2798 regs->r_ebp = tp->tf_ebp;
2799 regs->r_ebx = tp->tf_ebx;
2800 regs->r_edx = tp->tf_edx;
2801 regs->r_ecx = tp->tf_ecx;
2802 regs->r_eax = tp->tf_eax;
2803 regs->r_eip = tp->tf_eip;
2804 regs->r_cs = tp->tf_cs;
2805 regs->r_eflags = tp->tf_eflags;
2806 regs->r_esp = tp->tf_esp;
2807 regs->r_ss = tp->tf_ss;
2812 set_regs(struct thread *td, struct reg *regs)
2815 struct trapframe *tp;
2818 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2819 !CS_SECURE(regs->r_cs))
2822 tp->tf_fs = regs->r_fs;
2823 tp->tf_es = regs->r_es;
2824 tp->tf_ds = regs->r_ds;
2825 tp->tf_edi = regs->r_edi;
2826 tp->tf_esi = regs->r_esi;
2827 tp->tf_ebp = regs->r_ebp;
2828 tp->tf_ebx = regs->r_ebx;
2829 tp->tf_edx = regs->r_edx;
2830 tp->tf_ecx = regs->r_ecx;
2831 tp->tf_eax = regs->r_eax;
2832 tp->tf_eip = regs->r_eip;
2833 tp->tf_cs = regs->r_cs;
2834 tp->tf_eflags = regs->r_eflags;
2835 tp->tf_esp = regs->r_esp;
2836 tp->tf_ss = regs->r_ss;
2837 pcb->pcb_gs = regs->r_gs;
2842 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2845 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2846 P_SHOULDSTOP(td->td_proc),
2847 ("not suspended thread %p", td));
2850 npx_fill_fpregs_xmm(&get_pcb_user_save_td(td)->sv_xmm,
2851 (struct save87 *)fpregs);
2853 bcopy(&get_pcb_user_save_td(td)->sv_87, fpregs,
2859 set_fpregs(struct thread *td, struct fpreg *fpregs)
2863 npx_set_fpregs_xmm((struct save87 *)fpregs,
2864 &get_pcb_user_save_td(td)->sv_xmm);
2866 bcopy(fpregs, &get_pcb_user_save_td(td)->sv_87,
2873 * Get machine context.
2876 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2878 struct trapframe *tp;
2879 struct segment_descriptor *sdp;
2883 PROC_LOCK(curthread->td_proc);
2884 mcp->mc_onstack = sigonstack(tp->tf_esp);
2885 PROC_UNLOCK(curthread->td_proc);
2886 mcp->mc_gs = td->td_pcb->pcb_gs;
2887 mcp->mc_fs = tp->tf_fs;
2888 mcp->mc_es = tp->tf_es;
2889 mcp->mc_ds = tp->tf_ds;
2890 mcp->mc_edi = tp->tf_edi;
2891 mcp->mc_esi = tp->tf_esi;
2892 mcp->mc_ebp = tp->tf_ebp;
2893 mcp->mc_isp = tp->tf_isp;
2894 mcp->mc_eflags = tp->tf_eflags;
2895 if (flags & GET_MC_CLEAR_RET) {
2898 mcp->mc_eflags &= ~PSL_C;
2900 mcp->mc_eax = tp->tf_eax;
2901 mcp->mc_edx = tp->tf_edx;
2903 mcp->mc_ebx = tp->tf_ebx;
2904 mcp->mc_ecx = tp->tf_ecx;
2905 mcp->mc_eip = tp->tf_eip;
2906 mcp->mc_cs = tp->tf_cs;
2907 mcp->mc_esp = tp->tf_esp;
2908 mcp->mc_ss = tp->tf_ss;
2909 mcp->mc_len = sizeof(*mcp);
2910 get_fpcontext(td, mcp, NULL, 0);
2911 sdp = &td->td_pcb->pcb_fsd;
2912 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2913 sdp = &td->td_pcb->pcb_gsd;
2914 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2916 mcp->mc_xfpustate = 0;
2917 mcp->mc_xfpustate_len = 0;
2918 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
2923 * Set machine context.
2925 * However, we don't set any but the user modifiable flags, and we won't
2926 * touch the cs selector.
2929 set_mcontext(struct thread *td, mcontext_t *mcp)
2931 struct trapframe *tp;
2936 if (mcp->mc_len != sizeof(*mcp) ||
2937 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2939 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2940 (tp->tf_eflags & ~PSL_USERCHANGE);
2941 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2942 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2943 sizeof(union savefpu))
2945 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2946 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2947 mcp->mc_xfpustate_len);
2952 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2955 tp->tf_fs = mcp->mc_fs;
2956 tp->tf_es = mcp->mc_es;
2957 tp->tf_ds = mcp->mc_ds;
2958 tp->tf_edi = mcp->mc_edi;
2959 tp->tf_esi = mcp->mc_esi;
2960 tp->tf_ebp = mcp->mc_ebp;
2961 tp->tf_ebx = mcp->mc_ebx;
2962 tp->tf_edx = mcp->mc_edx;
2963 tp->tf_ecx = mcp->mc_ecx;
2964 tp->tf_eax = mcp->mc_eax;
2965 tp->tf_eip = mcp->mc_eip;
2966 tp->tf_eflags = eflags;
2967 tp->tf_esp = mcp->mc_esp;
2968 tp->tf_ss = mcp->mc_ss;
2969 td->td_pcb->pcb_gs = mcp->mc_gs;
2974 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2975 size_t xfpusave_len)
2977 size_t max_len, len;
2979 mcp->mc_ownedfp = npxgetregs(td);
2980 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2981 sizeof(mcp->mc_fpstate));
2982 mcp->mc_fpformat = npxformat();
2983 if (!use_xsave || xfpusave_len == 0)
2985 max_len = cpu_max_ext_state_size - sizeof(union savefpu);
2987 if (len > max_len) {
2989 bzero(xfpusave + max_len, len - max_len);
2991 mcp->mc_flags |= _MC_HASFPXSTATE;
2992 mcp->mc_xfpustate_len = len;
2993 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2997 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
2998 size_t xfpustate_len)
3002 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3004 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3005 mcp->mc_fpformat != _MC_FPFMT_XMM)
3007 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
3008 /* We don't care what state is left in the FPU or PCB. */
3011 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3012 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3013 error = npxsetregs(td, (union savefpu *)&mcp->mc_fpstate,
3014 xfpustate, xfpustate_len);
3021 fpstate_drop(struct thread *td)
3024 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3026 if (PCPU_GET(fpcurthread) == td)
3029 * XXX force a full drop of the npx. The above only drops it if we
3030 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3032 * XXX I don't much like npxgetregs()'s semantics of doing a full
3033 * drop. Dropping only to the pcb matches fnsave's behaviour.
3034 * We only need to drop to !PCB_INITDONE in sendsig(). But
3035 * sendsig() is the only caller of npxgetregs()... perhaps we just
3036 * have too many layers.
3038 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3039 PCB_NPXUSERINITDONE);
3044 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3049 dbregs->dr[0] = rdr0();
3050 dbregs->dr[1] = rdr1();
3051 dbregs->dr[2] = rdr2();
3052 dbregs->dr[3] = rdr3();
3053 dbregs->dr[6] = rdr6();
3054 dbregs->dr[7] = rdr7();
3057 dbregs->dr[0] = pcb->pcb_dr0;
3058 dbregs->dr[1] = pcb->pcb_dr1;
3059 dbregs->dr[2] = pcb->pcb_dr2;
3060 dbregs->dr[3] = pcb->pcb_dr3;
3061 dbregs->dr[6] = pcb->pcb_dr6;
3062 dbregs->dr[7] = pcb->pcb_dr7;
3070 set_dbregs(struct thread *td, struct dbreg *dbregs)
3076 load_dr0(dbregs->dr[0]);
3077 load_dr1(dbregs->dr[1]);
3078 load_dr2(dbregs->dr[2]);
3079 load_dr3(dbregs->dr[3]);
3080 load_dr6(dbregs->dr[6]);
3081 load_dr7(dbregs->dr[7]);
3084 * Don't let an illegal value for dr7 get set. Specifically,
3085 * check for undefined settings. Setting these bit patterns
3086 * result in undefined behaviour and can lead to an unexpected
3089 for (i = 0; i < 4; i++) {
3090 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3092 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3099 * Don't let a process set a breakpoint that is not within the
3100 * process's address space. If a process could do this, it
3101 * could halt the system by setting a breakpoint in the kernel
3102 * (if ddb was enabled). Thus, we need to check to make sure
3103 * that no breakpoints are being enabled for addresses outside
3104 * process's address space.
3106 * XXX - what about when the watched area of the user's
3107 * address space is written into from within the kernel
3108 * ... wouldn't that still cause a breakpoint to be generated
3109 * from within kernel mode?
3112 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3113 /* dr0 is enabled */
3114 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3118 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3119 /* dr1 is enabled */
3120 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3124 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3125 /* dr2 is enabled */
3126 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3130 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3131 /* dr3 is enabled */
3132 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3136 pcb->pcb_dr0 = dbregs->dr[0];
3137 pcb->pcb_dr1 = dbregs->dr[1];
3138 pcb->pcb_dr2 = dbregs->dr[2];
3139 pcb->pcb_dr3 = dbregs->dr[3];
3140 pcb->pcb_dr6 = dbregs->dr[6];
3141 pcb->pcb_dr7 = dbregs->dr[7];
3143 pcb->pcb_flags |= PCB_DBREGS;
3150 * Return > 0 if a hardware breakpoint has been hit, and the
3151 * breakpoint was in user space. Return 0, otherwise.
3154 user_dbreg_trap(void)
3156 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3157 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3158 int nbp; /* number of breakpoints that triggered */
3159 caddr_t addr[4]; /* breakpoint addresses */
3163 if ((dr7 & 0x000000ff) == 0) {
3165 * all GE and LE bits in the dr7 register are zero,
3166 * thus the trap couldn't have been caused by the
3167 * hardware debug registers
3174 bp = dr6 & 0x0000000f;
3178 * None of the breakpoint bits are set meaning this
3179 * trap was not caused by any of the debug registers
3185 * at least one of the breakpoints were hit, check to see
3186 * which ones and if any of them are user space addresses
3190 addr[nbp++] = (caddr_t)rdr0();
3193 addr[nbp++] = (caddr_t)rdr1();
3196 addr[nbp++] = (caddr_t)rdr2();
3199 addr[nbp++] = (caddr_t)rdr3();
3202 for (i = 0; i < nbp; i++) {
3203 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3205 * addr[i] is in user space
3212 * None of the breakpoints are in user space.
3220 * Provide inb() and outb() as functions. They are normally only available as
3221 * inline functions, thus cannot be called from the debugger.
3224 /* silence compiler warnings */
3225 u_char inb_(u_short);
3226 void outb_(u_short, u_char);
3235 outb_(u_short port, u_char data)