2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
66 #include <sys/eventhandler.h>
68 #include <sys/imgact.h>
70 #include <sys/kernel.h>
72 #include <sys/linker.h>
74 #include <sys/malloc.h>
75 #include <sys/memrange.h>
76 #include <sys/msgbuf.h>
77 #include <sys/mutex.h>
79 #include <sys/ptrace.h>
80 #include <sys/reboot.h>
81 #include <sys/sched.h>
82 #include <sys/signalvar.h>
83 #include <sys/sysctl.h>
84 #include <sys/sysent.h>
85 #include <sys/sysproto.h>
86 #include <sys/ucontext.h>
87 #include <sys/vmmeter.h>
90 #include <vm/vm_extern.h>
91 #include <vm/vm_kern.h>
92 #include <vm/vm_page.h>
93 #include <vm/vm_map.h>
94 #include <vm/vm_object.h>
95 #include <vm/vm_pager.h>
96 #include <vm/vm_param.h>
100 #error KDB must be enabled in order for DDB to work!
103 #include <ddb/db_sym.h>
108 #include <net/netisr.h>
110 #include <machine/bootinfo.h>
111 #include <machine/clock.h>
112 #include <machine/cpu.h>
113 #include <machine/cputypes.h>
114 #include <machine/intr_machdep.h>
115 #include <machine/md_var.h>
116 #include <machine/pc/bios.h>
117 #include <machine/pcb.h>
118 #include <machine/pcb_ext.h>
119 #include <machine/proc.h>
120 #include <machine/reg.h>
121 #include <machine/sigframe.h>
122 #include <machine/specialreg.h>
123 #include <machine/vm86.h>
125 #include <machine/perfmon.h>
128 #include <machine/privatespace.h>
129 #include <machine/smp.h>
133 #include <i386/isa/icu.h>
136 /* Sanity check for __curthread() */
137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
139 extern void init386(int first);
140 extern void dblfault_handler(void);
142 extern void printcpuinfo(void); /* XXX header file */
143 extern void finishidentcpu(void);
144 extern void panicifcpuunsupported(void);
145 extern void initializecpu(void);
147 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
148 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
150 #if !defined(CPU_ENABLE_SSE) && defined(I686_CPU)
151 #define CPU_ENABLE_SSE
153 #if defined(CPU_DISABLE_SSE)
154 #undef CPU_ENABLE_SSE
157 static void cpu_startup(void *);
158 static void fpstate_drop(struct thread *td);
159 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
160 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
161 #ifdef CPU_ENABLE_SSE
162 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
163 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
164 #endif /* CPU_ENABLE_SSE */
165 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
168 extern vm_offset_t ksym_start, ksym_end;
171 int _udatasel, _ucodesel;
177 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code);
179 #ifdef COMPAT_FREEBSD4
180 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask,
187 vm_paddr_t phys_avail[10];
189 /* must be 2 less so 0 0 can signal end of chunks */
190 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
192 struct kva_md_info kmi;
194 static struct trapframe proc0_tf;
196 static struct pcpu __pcpu;
201 struct mem_range_softc mem_range_softc;
208 * Good {morning,afternoon,evening,night}.
212 panicifcpuunsupported();
216 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
217 ptoa((uintmax_t)Maxmem) / 1048576);
220 * Display any holes after the first chunk of extended memory.
225 printf("Physical memory chunk(s):\n");
226 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
229 size = phys_avail[indx + 1] - phys_avail[indx];
231 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
232 (uintmax_t)phys_avail[indx],
233 (uintmax_t)phys_avail[indx + 1] - 1,
234 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
238 vm_ksubmap_init(&kmi);
240 printf("avail memory = %ju (%ju MB)\n",
241 ptoa((uintmax_t)cnt.v_free_count),
242 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
245 * Set up buffers, so they can be used to read disk labels.
248 vm_pager_bufferinit();
254 * Send an interrupt to process.
256 * Stack is set up to allow sigcode stored
257 * at top to call routine, followed by kcall
258 * to sigreturn routine below. After sigreturn
259 * resets the signal mask, the stack, and the
260 * frame pointer, it returns to the user
265 osendsig(catcher, sig, mask, code)
271 struct osigframe sf, *fp;
275 struct trapframe *regs;
280 PROC_LOCK_ASSERT(p, MA_OWNED);
282 mtx_assert(&psp->ps_mtx, MA_OWNED);
284 oonstack = sigonstack(regs->tf_esp);
286 /* Allocate space for the signal handler context. */
287 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
288 SIGISMEMBER(psp->ps_sigonstack, sig)) {
289 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
290 td->td_sigstk.ss_size - sizeof(struct osigframe));
291 #if defined(COMPAT_43)
292 td->td_sigstk.ss_flags |= SS_ONSTACK;
295 fp = (struct osigframe *)regs->tf_esp - 1;
297 /* Translate the signal if appropriate. */
298 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
299 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
301 /* Build the argument list for the signal handler. */
303 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
304 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
305 /* Signal handler installed with SA_SIGINFO. */
306 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
307 sf.sf_siginfo.si_signo = sig;
308 sf.sf_siginfo.si_code = code;
309 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
311 /* Old FreeBSD-style arguments. */
313 sf.sf_addr = regs->tf_err;
314 sf.sf_ahu.sf_handler = catcher;
316 mtx_unlock(&psp->ps_mtx);
319 /* Save most if not all of trap frame. */
320 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
321 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
322 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
323 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
324 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
325 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
326 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
327 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
328 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
329 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
330 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
331 sf.sf_siginfo.si_sc.sc_gs = rgs();
332 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
334 /* Build the signal context to be used by osigreturn(). */
335 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
336 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
337 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
338 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
339 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
340 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
341 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
342 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
345 * If we're a vm86 process, we want to save the segment registers.
346 * We also change eflags to be our emulated eflags, not the actual
349 if (regs->tf_eflags & PSL_VM) {
350 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
351 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
352 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
354 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
355 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
356 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
357 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
359 if (vm86->vm86_has_vme == 0)
360 sf.sf_siginfo.si_sc.sc_ps =
361 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
362 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
364 /* See sendsig() for comments. */
365 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
369 * Copy the sigframe out to the user's stack.
371 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
373 printf("process %ld has trashed its stack\n", (long)p->p_pid);
379 regs->tf_esp = (int)fp;
380 regs->tf_eip = PS_STRINGS - szosigcode;
381 regs->tf_eflags &= ~PSL_T;
382 regs->tf_cs = _ucodesel;
383 regs->tf_ds = _udatasel;
384 regs->tf_es = _udatasel;
385 regs->tf_fs = _udatasel;
387 regs->tf_ss = _udatasel;
389 mtx_lock(&psp->ps_mtx);
391 #endif /* COMPAT_43 */
393 #ifdef COMPAT_FREEBSD4
395 freebsd4_sendsig(catcher, sig, mask, code)
401 struct sigframe4 sf, *sfp;
405 struct trapframe *regs;
410 PROC_LOCK_ASSERT(p, MA_OWNED);
412 mtx_assert(&psp->ps_mtx, MA_OWNED);
414 oonstack = sigonstack(regs->tf_esp);
416 /* Save user context. */
417 bzero(&sf, sizeof(sf));
418 sf.sf_uc.uc_sigmask = *mask;
419 sf.sf_uc.uc_stack = td->td_sigstk;
420 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
421 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
422 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
423 sf.sf_uc.uc_mcontext.mc_gs = rgs();
424 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
426 /* Allocate space for the signal handler context. */
427 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
428 SIGISMEMBER(psp->ps_sigonstack, sig)) {
429 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
430 td->td_sigstk.ss_size - sizeof(struct sigframe4));
431 #if defined(COMPAT_43)
432 td->td_sigstk.ss_flags |= SS_ONSTACK;
435 sfp = (struct sigframe4 *)regs->tf_esp - 1;
437 /* Translate the signal if appropriate. */
438 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
439 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
441 /* Build the argument list for the signal handler. */
443 sf.sf_ucontext = (register_t)&sfp->sf_uc;
444 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
445 /* Signal handler installed with SA_SIGINFO. */
446 sf.sf_siginfo = (register_t)&sfp->sf_si;
447 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
449 /* Fill in POSIX parts */
450 sf.sf_si.si_signo = sig;
451 sf.sf_si.si_code = code;
452 sf.sf_si.si_addr = (void *)regs->tf_err;
454 /* Old FreeBSD-style arguments. */
455 sf.sf_siginfo = code;
456 sf.sf_addr = regs->tf_err;
457 sf.sf_ahu.sf_handler = catcher;
459 mtx_unlock(&psp->ps_mtx);
463 * If we're a vm86 process, we want to save the segment registers.
464 * We also change eflags to be our emulated eflags, not the actual
467 if (regs->tf_eflags & PSL_VM) {
468 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
469 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
471 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
472 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
473 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
474 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
476 if (vm86->vm86_has_vme == 0)
477 sf.sf_uc.uc_mcontext.mc_eflags =
478 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
479 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
482 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
483 * syscalls made by the signal handler. This just avoids
484 * wasting time for our lazy fixup of such faults. PSL_NT
485 * does nothing in vm86 mode, but vm86 programs can set it
486 * almost legitimately in probes for old cpu types.
488 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
492 * Copy the sigframe out to the user's stack.
494 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
496 printf("process %ld has trashed its stack\n", (long)p->p_pid);
502 regs->tf_esp = (int)sfp;
503 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
504 regs->tf_eflags &= ~PSL_T;
505 regs->tf_cs = _ucodesel;
506 regs->tf_ds = _udatasel;
507 regs->tf_es = _udatasel;
508 regs->tf_fs = _udatasel;
509 regs->tf_ss = _udatasel;
511 mtx_lock(&psp->ps_mtx);
513 #endif /* COMPAT_FREEBSD4 */
516 sendsig(catcher, sig, mask, code)
522 struct sigframe sf, *sfp;
527 struct trapframe *regs;
532 PROC_LOCK_ASSERT(p, MA_OWNED);
534 mtx_assert(&psp->ps_mtx, MA_OWNED);
535 #ifdef COMPAT_FREEBSD4
536 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
537 freebsd4_sendsig(catcher, sig, mask, code);
542 if (SIGISMEMBER(psp->ps_osigset, sig)) {
543 osendsig(catcher, sig, mask, code);
548 oonstack = sigonstack(regs->tf_esp);
550 /* Save user context. */
551 bzero(&sf, sizeof(sf));
552 sf.sf_uc.uc_sigmask = *mask;
553 sf.sf_uc.uc_stack = td->td_sigstk;
554 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
555 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
556 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
557 sf.sf_uc.uc_mcontext.mc_gs = rgs();
558 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
559 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
560 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
563 /* Allocate space for the signal handler context. */
564 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
565 SIGISMEMBER(psp->ps_sigonstack, sig)) {
566 sp = td->td_sigstk.ss_sp +
567 td->td_sigstk.ss_size - sizeof(struct sigframe);
568 #if defined(COMPAT_43)
569 td->td_sigstk.ss_flags |= SS_ONSTACK;
572 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
573 /* Align to 16 bytes. */
574 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
576 /* Translate the signal if appropriate. */
577 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
578 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
580 /* Build the argument list for the signal handler. */
582 sf.sf_ucontext = (register_t)&sfp->sf_uc;
583 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
584 /* Signal handler installed with SA_SIGINFO. */
585 sf.sf_siginfo = (register_t)&sfp->sf_si;
586 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
588 /* Fill in POSIX parts */
589 sf.sf_si.si_signo = sig;
590 sf.sf_si.si_code = code;
591 sf.sf_si.si_addr = (void *)regs->tf_err;
593 /* Old FreeBSD-style arguments. */
594 sf.sf_siginfo = code;
595 sf.sf_addr = regs->tf_err;
596 sf.sf_ahu.sf_handler = catcher;
598 mtx_unlock(&psp->ps_mtx);
602 * If we're a vm86 process, we want to save the segment registers.
603 * We also change eflags to be our emulated eflags, not the actual
606 if (regs->tf_eflags & PSL_VM) {
607 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
608 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
610 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
611 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
612 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
613 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
615 if (vm86->vm86_has_vme == 0)
616 sf.sf_uc.uc_mcontext.mc_eflags =
617 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
618 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
621 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
622 * syscalls made by the signal handler. This just avoids
623 * wasting time for our lazy fixup of such faults. PSL_NT
624 * does nothing in vm86 mode, but vm86 programs can set it
625 * almost legitimately in probes for old cpu types.
627 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
631 * Copy the sigframe out to the user's stack.
633 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
635 printf("process %ld has trashed its stack\n", (long)p->p_pid);
641 regs->tf_esp = (int)sfp;
642 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
643 regs->tf_eflags &= ~PSL_T;
644 regs->tf_cs = _ucodesel;
645 regs->tf_ds = _udatasel;
646 regs->tf_es = _udatasel;
647 regs->tf_fs = _udatasel;
648 regs->tf_ss = _udatasel;
650 mtx_lock(&psp->ps_mtx);
654 * Build siginfo_t for SA thread
657 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
664 PROC_LOCK_ASSERT(p, MA_OWNED);
666 bzero(si, sizeof(*si));
669 si->si_addr = (void *)td->td_frame->tf_err;
670 /* XXXKSE fill other fields */
674 * System call to cleanup state after a signal
675 * has been taken. Reset signal mask and
676 * stack state from context left by sendsig (above).
677 * Return to previous pc and psl as specified by
678 * context left by sendsig. Check carefully to
679 * make sure that the user has not modified the
680 * state to gain improper privileges.
688 struct osigreturn_args /* {
689 struct osigcontext *sigcntxp;
692 struct osigcontext sc;
693 struct trapframe *regs;
694 struct osigcontext *scp;
695 struct proc *p = td->td_proc;
699 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
704 if (eflags & PSL_VM) {
705 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
706 struct vm86_kernel *vm86;
709 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
710 * set up the vm86 area, and we can't enter vm86 mode.
712 if (td->td_pcb->pcb_ext == 0)
714 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
715 if (vm86->vm86_inited == 0)
718 /* Go back to user mode if both flags are set. */
719 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
720 trapsignal(td, SIGBUS, 0);
722 if (vm86->vm86_has_vme) {
723 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
724 (eflags & VME_USERCHANGE) | PSL_VM;
726 vm86->vm86_eflags = eflags; /* save VIF, VIP */
727 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
728 (eflags & VM_USERCHANGE) | PSL_VM;
730 tf->tf_vm86_ds = scp->sc_ds;
731 tf->tf_vm86_es = scp->sc_es;
732 tf->tf_vm86_fs = scp->sc_fs;
733 tf->tf_vm86_gs = scp->sc_gs;
734 tf->tf_ds = _udatasel;
735 tf->tf_es = _udatasel;
736 tf->tf_fs = _udatasel;
739 * Don't allow users to change privileged or reserved flags.
742 * XXX do allow users to change the privileged flag PSL_RF.
743 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
744 * should sometimes set it there too. tf_eflags is kept in
745 * the signal context during signal handling and there is no
746 * other place to remember it, so the PSL_RF bit may be
747 * corrupted by the signal handler without us knowing.
748 * Corruption of the PSL_RF bit at worst causes one more or
749 * one less debugger trap, so allowing it is fairly harmless.
751 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
756 * Don't allow users to load a valid privileged %cs. Let the
757 * hardware check for invalid selectors, excess privilege in
758 * other selectors, invalid %eip's and invalid %esp's.
760 if (!CS_SECURE(scp->sc_cs)) {
761 trapsignal(td, SIGBUS, T_PROTFLT);
764 regs->tf_ds = scp->sc_ds;
765 regs->tf_es = scp->sc_es;
766 regs->tf_fs = scp->sc_fs;
769 /* Restore remaining registers. */
770 regs->tf_eax = scp->sc_eax;
771 regs->tf_ebx = scp->sc_ebx;
772 regs->tf_ecx = scp->sc_ecx;
773 regs->tf_edx = scp->sc_edx;
774 regs->tf_esi = scp->sc_esi;
775 regs->tf_edi = scp->sc_edi;
776 regs->tf_cs = scp->sc_cs;
777 regs->tf_ss = scp->sc_ss;
778 regs->tf_isp = scp->sc_isp;
779 regs->tf_ebp = scp->sc_fp;
780 regs->tf_esp = scp->sc_sp;
781 regs->tf_eip = scp->sc_pc;
782 regs->tf_eflags = eflags;
785 #if defined(COMPAT_43)
786 if (scp->sc_onstack & 1)
787 td->td_sigstk.ss_flags |= SS_ONSTACK;
789 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
791 SIGSETOLD(td->td_sigmask, scp->sc_mask);
792 SIG_CANTMASK(td->td_sigmask);
795 return (EJUSTRETURN);
797 #endif /* COMPAT_43 */
799 #ifdef COMPAT_FREEBSD4
804 freebsd4_sigreturn(td, uap)
806 struct freebsd4_sigreturn_args /* {
807 const ucontext4 *sigcntxp;
811 struct proc *p = td->td_proc;
812 struct trapframe *regs;
813 const struct ucontext4 *ucp;
814 int cs, eflags, error;
816 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
821 eflags = ucp->uc_mcontext.mc_eflags;
822 if (eflags & PSL_VM) {
823 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
824 struct vm86_kernel *vm86;
827 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
828 * set up the vm86 area, and we can't enter vm86 mode.
830 if (td->td_pcb->pcb_ext == 0)
832 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
833 if (vm86->vm86_inited == 0)
836 /* Go back to user mode if both flags are set. */
837 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
838 trapsignal(td, SIGBUS, 0);
840 if (vm86->vm86_has_vme) {
841 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
842 (eflags & VME_USERCHANGE) | PSL_VM;
844 vm86->vm86_eflags = eflags; /* save VIF, VIP */
845 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
846 (eflags & VM_USERCHANGE) | PSL_VM;
848 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
849 tf->tf_eflags = eflags;
850 tf->tf_vm86_ds = tf->tf_ds;
851 tf->tf_vm86_es = tf->tf_es;
852 tf->tf_vm86_fs = tf->tf_fs;
853 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
854 tf->tf_ds = _udatasel;
855 tf->tf_es = _udatasel;
856 tf->tf_fs = _udatasel;
859 * Don't allow users to change privileged or reserved flags.
862 * XXX do allow users to change the privileged flag PSL_RF.
863 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
864 * should sometimes set it there too. tf_eflags is kept in
865 * the signal context during signal handling and there is no
866 * other place to remember it, so the PSL_RF bit may be
867 * corrupted by the signal handler without us knowing.
868 * Corruption of the PSL_RF bit at worst causes one more or
869 * one less debugger trap, so allowing it is fairly harmless.
871 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
872 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
877 * Don't allow users to load a valid privileged %cs. Let the
878 * hardware check for invalid selectors, excess privilege in
879 * other selectors, invalid %eip's and invalid %esp's.
881 cs = ucp->uc_mcontext.mc_cs;
882 if (!CS_SECURE(cs)) {
883 printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
884 trapsignal(td, SIGBUS, T_PROTFLT);
888 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
892 #if defined(COMPAT_43)
893 if (ucp->uc_mcontext.mc_onstack & 1)
894 td->td_sigstk.ss_flags |= SS_ONSTACK;
896 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
899 td->td_sigmask = ucp->uc_sigmask;
900 SIG_CANTMASK(td->td_sigmask);
903 return (EJUSTRETURN);
905 #endif /* COMPAT_FREEBSD4 */
913 struct sigreturn_args /* {
914 const __ucontext *sigcntxp;
918 struct proc *p = td->td_proc;
919 struct trapframe *regs;
920 const ucontext_t *ucp;
921 int cs, eflags, error, ret;
923 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
928 eflags = ucp->uc_mcontext.mc_eflags;
929 if (eflags & PSL_VM) {
930 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
931 struct vm86_kernel *vm86;
934 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
935 * set up the vm86 area, and we can't enter vm86 mode.
937 if (td->td_pcb->pcb_ext == 0)
939 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
940 if (vm86->vm86_inited == 0)
943 /* Go back to user mode if both flags are set. */
944 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
945 trapsignal(td, SIGBUS, 0);
947 if (vm86->vm86_has_vme) {
948 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
949 (eflags & VME_USERCHANGE) | PSL_VM;
951 vm86->vm86_eflags = eflags; /* save VIF, VIP */
952 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
953 (eflags & VM_USERCHANGE) | PSL_VM;
955 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
956 tf->tf_eflags = eflags;
957 tf->tf_vm86_ds = tf->tf_ds;
958 tf->tf_vm86_es = tf->tf_es;
959 tf->tf_vm86_fs = tf->tf_fs;
960 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
961 tf->tf_ds = _udatasel;
962 tf->tf_es = _udatasel;
963 tf->tf_fs = _udatasel;
966 * Don't allow users to change privileged or reserved flags.
969 * XXX do allow users to change the privileged flag PSL_RF.
970 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
971 * should sometimes set it there too. tf_eflags is kept in
972 * the signal context during signal handling and there is no
973 * other place to remember it, so the PSL_RF bit may be
974 * corrupted by the signal handler without us knowing.
975 * Corruption of the PSL_RF bit at worst causes one more or
976 * one less debugger trap, so allowing it is fairly harmless.
978 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
979 printf("sigreturn: eflags = 0x%x\n", eflags);
984 * Don't allow users to load a valid privileged %cs. Let the
985 * hardware check for invalid selectors, excess privilege in
986 * other selectors, invalid %eip's and invalid %esp's.
988 cs = ucp->uc_mcontext.mc_cs;
989 if (!CS_SECURE(cs)) {
990 printf("sigreturn: cs = 0x%x\n", cs);
991 trapsignal(td, SIGBUS, T_PROTFLT);
995 ret = set_fpcontext(td, &ucp->uc_mcontext);
998 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1002 #if defined(COMPAT_43)
1003 if (ucp->uc_mcontext.mc_onstack & 1)
1004 td->td_sigstk.ss_flags |= SS_ONSTACK;
1006 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1009 td->td_sigmask = ucp->uc_sigmask;
1010 SIG_CANTMASK(td->td_sigmask);
1013 return (EJUSTRETURN);
1017 * Machine dependent boot() routine
1019 * I haven't seen anything to put here yet
1020 * Possibly some stuff might be grafted back here from boot()
1027 /* Get current clock frequency for the given cpu id. */
1029 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1032 uint64_t tsc1, tsc2;
1034 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1037 return (EOPNOTSUPP);
1039 /* If we're booting, trust the rate calibrated moments ago. */
1046 /* Schedule ourselves on the indicated cpu. */
1047 mtx_lock_spin(&sched_lock);
1048 sched_bind(curthread, cpu_id);
1049 mtx_unlock_spin(&sched_lock);
1052 /* Calibrate by measuring a short delay. */
1053 reg = intr_disable();
1060 mtx_lock_spin(&sched_lock);
1061 sched_unbind(curthread);
1062 mtx_unlock_spin(&sched_lock);
1066 * Calculate the difference in readings, convert to Mhz, and
1067 * subtract 0.5% of the total. Empirical testing has shown that
1068 * overhead in DELAY() works out to approximately this value.
1071 *rate = tsc2 * 1000 - tsc2 * 5;
1076 * Shutdown the CPU as much as possible
1086 * Hook to idle the CPU when possible. In the SMP case we default to
1087 * off because a halted cpu will not currently pick up a new thread in the
1088 * run queue until the next timer tick. If turned on this will result in
1089 * approximately a 4.2% loss in real time performance in buildworld tests
1090 * (but improves user and sys times oddly enough), and saves approximately
1091 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
1093 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
1094 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
1095 * Then we can have our cake and eat it too.
1097 * XXX I'm turning it on for SMP as well by default for now. It seems to
1098 * help lock contention somewhat, and this is critical for HTT. -Peter
1100 static int cpu_idle_hlt = 1;
1101 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
1102 &cpu_idle_hlt, 0, "Idle loop HLT enable");
1105 cpu_idle_default(void)
1108 * we must absolutely guarentee that hlt is the
1109 * absolute next instruction after sti or we
1110 * introduce a timing window.
1112 __asm __volatile("sti; hlt");
1116 * Note that we have to be careful here to avoid a race between checking
1117 * sched_runnable() and actually halting. If we don't do this, we may waste
1118 * the time between calling hlt and the next interrupt even though there
1119 * is a runnable process.
1126 if (mp_grab_cpu_hlt())
1132 if (sched_runnable())
1139 /* Other subsystems (e.g., ACPI) can hook this later. */
1140 void (*cpu_idle_hook)(void) = cpu_idle_default;
1143 * Clear registers on exec
1146 exec_setregs(td, entry, stack, ps_strings)
1152 struct trapframe *regs = td->td_frame;
1153 struct pcb *pcb = td->td_pcb;
1155 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1156 pcb->pcb_gs = _udatasel;
1159 if (td->td_proc->p_md.md_ldt)
1162 bzero((char *)regs, sizeof(struct trapframe));
1163 regs->tf_eip = entry;
1164 regs->tf_esp = stack;
1165 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1166 regs->tf_ss = _udatasel;
1167 regs->tf_ds = _udatasel;
1168 regs->tf_es = _udatasel;
1169 regs->tf_fs = _udatasel;
1170 regs->tf_cs = _ucodesel;
1172 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1173 regs->tf_ebx = ps_strings;
1176 * Reset the hardware debug registers if they were in use.
1177 * They won't have any meaning for the newly exec'd process.
1179 if (pcb->pcb_flags & PCB_DBREGS) {
1186 if (pcb == PCPU_GET(curpcb)) {
1188 * Clear the debug registers on the running
1189 * CPU, otherwise they will end up affecting
1190 * the next process we switch to.
1194 pcb->pcb_flags &= ~PCB_DBREGS;
1198 * Initialize the math emulator (if any) for the current process.
1199 * Actually, just clear the bit that says that the emulator has
1200 * been initialized. Initialization is delayed until the process
1201 * traps to the emulator (if it is done at all) mainly because
1202 * emulators don't provide an entry point for initialization.
1204 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1207 * Drop the FP state if we hold it, so that the process gets a
1208 * clean FP state if it uses the FPU again.
1213 * XXX - Linux emulator
1214 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1217 td->td_retval[1] = 0;
1227 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1228 * BSP. See the comments there about why we set them.
1230 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1236 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1239 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1241 if (!error && req->newptr)
1246 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1247 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1249 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1250 CTLFLAG_RW, &disable_rtc_set, 0, "");
1252 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1253 CTLFLAG_RD, &bootinfo, bootinfo, "");
1255 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1256 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1258 u_long bootdev; /* not a struct cdev *- encoding is different */
1259 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1260 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1263 * Initialize 386 and configure to run kernel
1267 * Initialize segments & interrupt table
1271 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1272 static struct gate_descriptor idt0[NIDT];
1273 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1274 union descriptor ldt[NLDT]; /* local descriptor table */
1275 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1277 int private_tss; /* flag indicating private tss */
1279 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1280 extern int has_f00f_bug;
1283 static struct i386tss dblfault_tss;
1284 static char dblfault_stack[PAGE_SIZE];
1286 extern vm_offset_t proc0kstack;
1290 * software prototypes -- in more palatable form.
1292 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1293 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1295 struct soft_segment_descriptor gdt_segs[] = {
1296 /* GNULL_SEL 0 Null Descriptor */
1297 { 0x0, /* segment base address */
1299 0, /* segment type */
1300 0, /* segment descriptor priority level */
1301 0, /* segment descriptor present */
1303 0, /* default 32 vs 16 bit size */
1304 0 /* limit granularity (byte/page units)*/ },
1305 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1306 { 0x0, /* segment base address */
1307 0xfffff, /* length - all address space */
1308 SDT_MEMRWA, /* segment type */
1309 0, /* segment descriptor priority level */
1310 1, /* segment descriptor present */
1312 1, /* default 32 vs 16 bit size */
1313 1 /* limit granularity (byte/page units)*/ },
1314 /* GUFS_SEL 2 %fs Descriptor for user */
1315 { 0x0, /* segment base address */
1316 0xfffff, /* length - all address space */
1317 SDT_MEMRWA, /* segment type */
1318 SEL_UPL, /* segment descriptor priority level */
1319 1, /* segment descriptor present */
1321 1, /* default 32 vs 16 bit size */
1322 1 /* limit granularity (byte/page units)*/ },
1323 /* GUGS_SEL 3 %gs Descriptor for user */
1324 { 0x0, /* segment base address */
1325 0xfffff, /* length - all address space */
1326 SDT_MEMRWA, /* segment type */
1327 SEL_UPL, /* segment descriptor priority level */
1328 1, /* segment descriptor present */
1330 1, /* default 32 vs 16 bit size */
1331 1 /* limit granularity (byte/page units)*/ },
1332 /* GCODE_SEL 4 Code Descriptor for kernel */
1333 { 0x0, /* segment base address */
1334 0xfffff, /* length - all address space */
1335 SDT_MEMERA, /* segment type */
1336 0, /* segment descriptor priority level */
1337 1, /* segment descriptor present */
1339 1, /* default 32 vs 16 bit size */
1340 1 /* limit granularity (byte/page units)*/ },
1341 /* GDATA_SEL 5 Data Descriptor for kernel */
1342 { 0x0, /* segment base address */
1343 0xfffff, /* length - all address space */
1344 SDT_MEMRWA, /* segment type */
1345 0, /* segment descriptor priority level */
1346 1, /* segment descriptor present */
1348 1, /* default 32 vs 16 bit size */
1349 1 /* limit granularity (byte/page units)*/ },
1350 /* GUCODE_SEL 6 Code Descriptor for user */
1351 { 0x0, /* segment base address */
1352 0xfffff, /* length - all address space */
1353 SDT_MEMERA, /* segment type */
1354 SEL_UPL, /* segment descriptor priority level */
1355 1, /* segment descriptor present */
1357 1, /* default 32 vs 16 bit size */
1358 1 /* limit granularity (byte/page units)*/ },
1359 /* GUDATA_SEL 7 Data Descriptor for user */
1360 { 0x0, /* segment base address */
1361 0xfffff, /* length - all address space */
1362 SDT_MEMRWA, /* segment type */
1363 SEL_UPL, /* segment descriptor priority level */
1364 1, /* segment descriptor present */
1366 1, /* default 32 vs 16 bit size */
1367 1 /* limit granularity (byte/page units)*/ },
1368 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1369 { 0x400, /* segment base address */
1370 0xfffff, /* length */
1371 SDT_MEMRWA, /* segment type */
1372 0, /* segment descriptor priority level */
1373 1, /* segment descriptor present */
1375 1, /* default 32 vs 16 bit size */
1376 1 /* limit granularity (byte/page units)*/ },
1377 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1379 0x0, /* segment base address */
1380 sizeof(struct i386tss)-1,/* length */
1381 SDT_SYS386TSS, /* segment type */
1382 0, /* segment descriptor priority level */
1383 1, /* segment descriptor present */
1385 0, /* unused - default 32 vs 16 bit size */
1386 0 /* limit granularity (byte/page units)*/ },
1387 /* GLDT_SEL 10 LDT Descriptor */
1388 { (int) ldt, /* segment base address */
1389 sizeof(ldt)-1, /* length - all address space */
1390 SDT_SYSLDT, /* segment type */
1391 SEL_UPL, /* segment descriptor priority level */
1392 1, /* segment descriptor present */
1394 0, /* unused - default 32 vs 16 bit size */
1395 0 /* limit granularity (byte/page units)*/ },
1396 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1397 { (int) ldt, /* segment base address */
1398 (512 * sizeof(union descriptor)-1), /* length */
1399 SDT_SYSLDT, /* segment type */
1400 0, /* segment descriptor priority level */
1401 1, /* segment descriptor present */
1403 0, /* unused - default 32 vs 16 bit size */
1404 0 /* limit granularity (byte/page units)*/ },
1405 /* GPANIC_SEL 12 Panic Tss Descriptor */
1406 { (int) &dblfault_tss, /* segment base address */
1407 sizeof(struct i386tss)-1,/* length - all address space */
1408 SDT_SYS386TSS, /* segment type */
1409 0, /* segment descriptor priority level */
1410 1, /* segment descriptor present */
1412 0, /* unused - default 32 vs 16 bit size */
1413 0 /* limit granularity (byte/page units)*/ },
1414 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1415 { 0, /* segment base address (overwritten) */
1416 0xfffff, /* length */
1417 SDT_MEMERA, /* segment type */
1418 0, /* segment descriptor priority level */
1419 1, /* segment descriptor present */
1421 0, /* default 32 vs 16 bit size */
1422 1 /* limit granularity (byte/page units)*/ },
1423 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1424 { 0, /* segment base address (overwritten) */
1425 0xfffff, /* length */
1426 SDT_MEMERA, /* segment type */
1427 0, /* segment descriptor priority level */
1428 1, /* segment descriptor present */
1430 0, /* default 32 vs 16 bit size */
1431 1 /* limit granularity (byte/page units)*/ },
1432 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1433 { 0, /* segment base address (overwritten) */
1434 0xfffff, /* length */
1435 SDT_MEMRWA, /* segment type */
1436 0, /* segment descriptor priority level */
1437 1, /* segment descriptor present */
1439 1, /* default 32 vs 16 bit size */
1440 1 /* limit granularity (byte/page units)*/ },
1441 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1442 { 0, /* segment base address (overwritten) */
1443 0xfffff, /* length */
1444 SDT_MEMRWA, /* segment type */
1445 0, /* segment descriptor priority level */
1446 1, /* segment descriptor present */
1448 0, /* default 32 vs 16 bit size */
1449 1 /* limit granularity (byte/page units)*/ },
1450 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1451 { 0, /* segment base address (overwritten) */
1452 0xfffff, /* length */
1453 SDT_MEMRWA, /* segment type */
1454 0, /* segment descriptor priority level */
1455 1, /* segment descriptor present */
1457 0, /* default 32 vs 16 bit size */
1458 1 /* limit granularity (byte/page units)*/ },
1459 /* GNDIS_SEL 18 NDIS Descriptor */
1460 { 0x0, /* segment base address */
1462 0, /* segment type */
1463 0, /* segment descriptor priority level */
1464 0, /* segment descriptor present */
1466 0, /* default 32 vs 16 bit size */
1467 0 /* limit granularity (byte/page units)*/ },
1470 static struct soft_segment_descriptor ldt_segs[] = {
1471 /* Null Descriptor - overwritten by call gate */
1472 { 0x0, /* segment base address */
1473 0x0, /* length - all address space */
1474 0, /* segment type */
1475 0, /* segment descriptor priority level */
1476 0, /* segment descriptor present */
1478 0, /* default 32 vs 16 bit size */
1479 0 /* limit granularity (byte/page units)*/ },
1480 /* Null Descriptor - overwritten by call gate */
1481 { 0x0, /* segment base address */
1482 0x0, /* length - all address space */
1483 0, /* segment type */
1484 0, /* segment descriptor priority level */
1485 0, /* segment descriptor present */
1487 0, /* default 32 vs 16 bit size */
1488 0 /* limit granularity (byte/page units)*/ },
1489 /* Null Descriptor - overwritten by call gate */
1490 { 0x0, /* segment base address */
1491 0x0, /* length - all address space */
1492 0, /* segment type */
1493 0, /* segment descriptor priority level */
1494 0, /* segment descriptor present */
1496 0, /* default 32 vs 16 bit size */
1497 0 /* limit granularity (byte/page units)*/ },
1498 /* Code Descriptor for user */
1499 { 0x0, /* segment base address */
1500 0xfffff, /* length - all address space */
1501 SDT_MEMERA, /* segment type */
1502 SEL_UPL, /* segment descriptor priority level */
1503 1, /* segment descriptor present */
1505 1, /* default 32 vs 16 bit size */
1506 1 /* limit granularity (byte/page units)*/ },
1507 /* Null Descriptor - overwritten by call gate */
1508 { 0x0, /* segment base address */
1509 0x0, /* length - all address space */
1510 0, /* segment type */
1511 0, /* segment descriptor priority level */
1512 0, /* segment descriptor present */
1514 0, /* default 32 vs 16 bit size */
1515 0 /* limit granularity (byte/page units)*/ },
1516 /* Data Descriptor for user */
1517 { 0x0, /* segment base address */
1518 0xfffff, /* length - all address space */
1519 SDT_MEMRWA, /* segment type */
1520 SEL_UPL, /* segment descriptor priority level */
1521 1, /* segment descriptor present */
1523 1, /* default 32 vs 16 bit size */
1524 1 /* limit granularity (byte/page units)*/ },
1528 setidt(idx, func, typ, dpl, selec)
1535 struct gate_descriptor *ip;
1538 ip->gd_looffset = (int)func;
1539 ip->gd_selector = selec;
1545 ip->gd_hioffset = ((int)func)>>16 ;
1548 #define IDTVEC(name) __CONCAT(X,name)
1551 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1552 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1553 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1554 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1555 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1559 * Display the index and function name of any IDT entries that don't use
1560 * the default 'rsvd' entry point.
1562 DB_SHOW_COMMAND(idt, db_show_idt)
1564 struct gate_descriptor *ip;
1569 db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
1570 for (idx = 0, quit = 0; idx < NIDT; idx++) {
1571 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1572 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1573 db_printf("%3d\t", idx);
1574 db_printsym(func, DB_STGY_PROC);
1584 struct segment_descriptor *sd;
1585 struct soft_segment_descriptor *ssd;
1587 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1588 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1589 ssd->ssd_type = sd->sd_type;
1590 ssd->ssd_dpl = sd->sd_dpl;
1591 ssd->ssd_p = sd->sd_p;
1592 ssd->ssd_def32 = sd->sd_def32;
1593 ssd->ssd_gran = sd->sd_gran;
1596 #define PHYSMAP_SIZE (2 * 8)
1599 * Populate the (physmap) array with base/bound pairs describing the
1600 * available physical memory in the system, then test this memory and
1601 * build the phys_avail array describing the actually-available memory.
1603 * If we cannot accurately determine the physical memory map, then use
1604 * value from the 0xE801 call, and failing that, the RTC.
1606 * Total memory size may be set by the kernel environment variable
1607 * hw.physmem or the compile-time define MAXMEM.
1609 * XXX first should be vm_paddr_t.
1612 getmemsize(int first)
1614 int i, physmap_idx, pa_indx;
1616 u_long physmem_tunable;
1618 struct vm86frame vmf;
1619 struct vm86context vmc;
1620 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1622 struct bios_smap *smap;
1623 quad_t dcons_addr, dcons_size;
1626 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1627 bzero(&vmf, sizeof(vmf));
1628 bzero(physmap, sizeof(physmap));
1632 * Some newer BIOSes has broken INT 12H implementation which cause
1633 * kernel panic immediately. In this case, we need to scan SMAP
1634 * with INT 15:E820 first, then determine base memory size.
1636 if (hasbrokenint12) {
1641 * Perform "base memory" related probes & setup
1643 vm86_intcall(0x12, &vmf);
1644 basemem = vmf.vmf_ax;
1645 if (basemem > 640) {
1646 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1652 * XXX if biosbasemem is now < 640, there is a `hole'
1653 * between the end of base memory and the start of
1654 * ISA memory. The hole may be empty or it may
1655 * contain BIOS code or data. Map it read/write so
1656 * that the BIOS can write to it. (Memory from 0 to
1657 * the physical end of the kernel is mapped read-only
1658 * to begin with and then parts of it are remapped.
1659 * The parts that aren't remapped form holes that
1660 * remain read-only and are unused by the kernel.
1661 * The base memory area is below the physical end of
1662 * the kernel and right now forms a read-only hole.
1663 * The part of it from PAGE_SIZE to
1664 * (trunc_page(biosbasemem * 1024) - 1) will be
1665 * remapped and used by the kernel later.)
1667 * This code is similar to the code used in
1668 * pmap_mapdev, but since no memory needs to be
1669 * allocated we simply change the mapping.
1671 for (pa = trunc_page(basemem * 1024);
1672 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1673 pmap_kenter(KERNBASE + pa, pa);
1676 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1677 * the vm86 page table so that vm86 can scribble on them using
1678 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1679 * page 0, at least as initialized here?
1681 pte = (pt_entry_t *)vm86paddr;
1682 for (i = basemem / 4; i < 160; i++)
1683 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1687 * map page 1 R/W into the kernel page table so we can use it
1688 * as a buffer. The kernel will unmap this page later.
1690 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
1693 * get memory map with INT 15:E820
1696 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1697 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1702 vmf.vmf_eax = 0xE820;
1703 vmf.vmf_edx = SMAP_SIG;
1704 vmf.vmf_ecx = sizeof(struct bios_smap);
1705 i = vm86_datacall(0x15, &vmf, &vmc);
1706 if (i || vmf.vmf_eax != SMAP_SIG)
1708 if (boothowto & RB_VERBOSE)
1709 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1710 smap->type, smap->base, smap->length);
1712 if (smap->type != 0x01)
1715 if (smap->length == 0)
1719 if (smap->base >= 0xffffffff) {
1720 printf("%uK of memory above 4GB ignored\n",
1721 (u_int)(smap->length / 1024));
1726 for (i = 0; i <= physmap_idx; i += 2) {
1727 if (smap->base < physmap[i + 1]) {
1728 if (boothowto & RB_VERBOSE)
1730 "Overlapping or non-montonic memory region, ignoring second region\n");
1735 if (smap->base == physmap[physmap_idx + 1]) {
1736 physmap[physmap_idx + 1] += smap->length;
1741 if (physmap_idx == PHYSMAP_SIZE) {
1743 "Too many segments in the physical address map, giving up\n");
1746 physmap[physmap_idx] = smap->base;
1747 physmap[physmap_idx + 1] = smap->base + smap->length;
1748 } while (vmf.vmf_ebx != 0);
1751 * Perform "base memory" related probes & setup based on SMAP
1754 for (i = 0; i <= physmap_idx; i += 2) {
1755 if (physmap[i] == 0x00000000) {
1756 basemem = physmap[i + 1] / 1024;
1762 * XXX this function is horribly organized and has to the same
1763 * things that it does above here.
1767 if (basemem > 640) {
1769 "Preposterous BIOS basemem of %uK, truncating to 640K\n",
1775 * Let vm86 scribble on pages between basemem and
1776 * ISA_HOLE_START, as above.
1778 for (pa = trunc_page(basemem * 1024);
1779 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1780 pmap_kenter(KERNBASE + pa, pa);
1781 pte = (pt_entry_t *)vm86paddr;
1782 for (i = basemem / 4; i < 160; i++)
1783 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1786 if (physmap[1] != 0)
1790 * If we failed above, try memory map with INT 15:E801
1792 vmf.vmf_ax = 0xE801;
1793 if (vm86_intcall(0x15, &vmf) == 0) {
1794 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1798 vm86_intcall(0x15, &vmf);
1799 extmem = vmf.vmf_ax;
1802 * Prefer the RTC value for extended memory.
1804 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1809 * Special hack for chipsets that still remap the 384k hole when
1810 * there's 16MB of memory - this really confuses people that
1811 * are trying to use bus mastering ISA controllers with the
1812 * "16MB limit"; they only have 16MB, but the remapping puts
1813 * them beyond the limit.
1815 * If extended memory is between 15-16MB (16-17MB phys address range),
1818 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1822 physmap[1] = basemem * 1024;
1824 physmap[physmap_idx] = 0x100000;
1825 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1829 * Now, physmap contains a map of physical memory.
1833 /* make hole for AP bootstrap code */
1834 physmap[1] = mp_bootaddress(physmap[1]);
1838 * Maxmem isn't the "maximum memory", it's one larger than the
1839 * highest page of the physical address space. It should be
1840 * called something like "Maxphyspage". We may adjust this
1841 * based on ``hw.physmem'' and the results of the memory test.
1843 Maxmem = atop(physmap[physmap_idx + 1]);
1846 Maxmem = MAXMEM / 4;
1849 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1850 Maxmem = atop(physmem_tunable);
1852 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1853 (boothowto & RB_VERBOSE))
1854 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1857 * If Maxmem has been increased beyond what the system has detected,
1858 * extend the last memory segment to the new limit.
1860 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1861 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1863 /* call pmap initialization to make new kernel address space */
1864 pmap_bootstrap(first, 0);
1867 * Size up each available chunk of physical memory.
1869 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1871 phys_avail[pa_indx++] = physmap[0];
1872 phys_avail[pa_indx] = physmap[0];
1876 * Get dcons buffer address
1878 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1879 getenv_quad("dcons.size", &dcons_size) == 0)
1883 * physmap is in bytes, so when converting to page boundaries,
1884 * round up the start address and round down the end address.
1886 for (i = 0; i <= physmap_idx; i += 2) {
1889 end = ptoa((vm_paddr_t)Maxmem);
1890 if (physmap[i + 1] < end)
1891 end = trunc_page(physmap[i + 1]);
1892 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1894 int *ptr = (int *)CADDR1;
1897 * block out kernel memory as not available.
1899 if (pa >= KERNLOAD && pa < first)
1903 * block out dcons buffer
1906 && pa >= trunc_page(dcons_addr)
1907 && pa < dcons_addr + dcons_size)
1913 * map page into kernel: valid, read/write,non-cacheable
1915 *pte = pa | PG_V | PG_RW | PG_N;
1920 * Test for alternating 1's and 0's
1922 *(volatile int *)ptr = 0xaaaaaaaa;
1923 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1927 * Test for alternating 0's and 1's
1929 *(volatile int *)ptr = 0x55555555;
1930 if (*(volatile int *)ptr != 0x55555555) {
1936 *(volatile int *)ptr = 0xffffffff;
1937 if (*(volatile int *)ptr != 0xffffffff) {
1943 *(volatile int *)ptr = 0x0;
1944 if (*(volatile int *)ptr != 0x0) {
1948 * Restore original value.
1953 * Adjust array of valid/good pages.
1955 if (page_bad == TRUE) {
1959 * If this good page is a continuation of the
1960 * previous set of good pages, then just increase
1961 * the end pointer. Otherwise start a new chunk.
1962 * Note that "end" points one higher than end,
1963 * making the range >= start and < end.
1964 * If we're also doing a speculative memory
1965 * test and we at or past the end, bump up Maxmem
1966 * so that we keep going. The first bad page
1967 * will terminate the loop.
1969 if (phys_avail[pa_indx] == pa) {
1970 phys_avail[pa_indx] += PAGE_SIZE;
1973 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1975 "Too many holes in the physical address space, giving up\n");
1979 phys_avail[pa_indx++] = pa; /* start */
1980 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1990 * The last chunk must contain at least one page plus the message
1991 * buffer to avoid complicating other code (message buffer address
1992 * calculation, etc.).
1994 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1995 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1996 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1997 phys_avail[pa_indx--] = 0;
1998 phys_avail[pa_indx--] = 0;
2001 Maxmem = atop(phys_avail[pa_indx]);
2003 /* Trim off space for the message buffer. */
2004 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2006 avail_end = phys_avail[pa_indx];
2013 struct gate_descriptor *gdp;
2014 int gsel_tss, metadata_missing, off, x;
2017 thread0.td_kstack = proc0kstack;
2018 thread0.td_pcb = (struct pcb *)
2019 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2022 * This may be done better later if it gets more high level
2023 * components in it. If so just link td->td_proc here.
2025 proc_linkup(&proc0, &ksegrp0, &thread0);
2027 metadata_missing = 0;
2028 if (bootinfo.bi_modulep) {
2029 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2030 preload_bootstrap_relocate(KERNBASE);
2032 metadata_missing = 1;
2035 kern_envp = static_env;
2036 else if (bootinfo.bi_envp)
2037 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2039 /* Init basic tunables, hz etc */
2043 * Make gdt memory segments. All segments cover the full 4GB
2044 * of address space and permissions are enforced at page level.
2046 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2047 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2048 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2049 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2050 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2051 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2054 pc = &SMP_prvspace[0].pcpu;
2058 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2059 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2060 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2062 for (x = 0; x < NGDT; x++)
2063 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2065 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2066 r_gdt.rd_base = (int) gdt;
2069 pcpu_init(pc, 0, sizeof(struct pcpu));
2070 PCPU_SET(prvspace, pc);
2071 PCPU_SET(curthread, &thread0);
2072 PCPU_SET(curpcb, thread0.td_pcb);
2075 * Initialize mutexes.
2077 * icu_lock: in order to allow an interrupt to occur in a critical
2078 * section, to set pcpu->ipending (etc...) properly, we
2079 * must be able to get the icu lock, so it can't be
2083 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN);
2084 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
2086 /* make ldt memory segments */
2087 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2088 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2089 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2090 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2092 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2094 PCPU_SET(currentldt, _default_ldt);
2097 for (x = 0; x < NIDT; x++)
2098 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2099 GSEL(GCODE_SEL, SEL_KPL));
2100 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2101 GSEL(GCODE_SEL, SEL_KPL));
2102 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2103 GSEL(GCODE_SEL, SEL_KPL));
2104 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL,
2105 GSEL(GCODE_SEL, SEL_KPL));
2106 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2107 GSEL(GCODE_SEL, SEL_KPL));
2108 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2109 GSEL(GCODE_SEL, SEL_KPL));
2110 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2111 GSEL(GCODE_SEL, SEL_KPL));
2112 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2113 GSEL(GCODE_SEL, SEL_KPL));
2114 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2115 , GSEL(GCODE_SEL, SEL_KPL));
2116 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2117 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2118 GSEL(GCODE_SEL, SEL_KPL));
2119 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2120 GSEL(GCODE_SEL, SEL_KPL));
2121 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2122 GSEL(GCODE_SEL, SEL_KPL));
2123 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2124 GSEL(GCODE_SEL, SEL_KPL));
2125 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2126 GSEL(GCODE_SEL, SEL_KPL));
2127 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2128 GSEL(GCODE_SEL, SEL_KPL));
2129 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2130 GSEL(GCODE_SEL, SEL_KPL));
2131 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2132 GSEL(GCODE_SEL, SEL_KPL));
2133 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2134 GSEL(GCODE_SEL, SEL_KPL));
2135 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2136 GSEL(GCODE_SEL, SEL_KPL));
2137 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2138 GSEL(GCODE_SEL, SEL_KPL));
2140 r_idt.rd_limit = sizeof(idt0) - 1;
2141 r_idt.rd_base = (int) idt;
2145 * Initialize the console before we print anything out.
2149 if (metadata_missing)
2150 printf("WARNING: loader(8) metadata is missing!\n");
2158 ksym_start = bootinfo.bi_symtab;
2159 ksym_end = bootinfo.bi_esymtab;
2165 if (boothowto & RB_KDB)
2166 kdb_enter("Boot flags requested debugger");
2169 finishidentcpu(); /* Final stage of CPU initialization */
2170 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2171 GSEL(GCODE_SEL, SEL_KPL));
2172 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2173 GSEL(GCODE_SEL, SEL_KPL));
2174 initializecpu(); /* Initialize CPU registers */
2176 /* make an initial tss so cpu can get interrupt stack on syscall! */
2177 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2178 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2179 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2180 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2181 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2183 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2184 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2185 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2188 /* pointer to selector slot for %fs/%gs */
2189 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2191 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2192 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2193 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2194 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2196 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2198 dblfault_tss.tss_cr3 = (int)IdlePTD;
2200 dblfault_tss.tss_eip = (int)dblfault_handler;
2201 dblfault_tss.tss_eflags = PSL_KERNEL;
2202 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2203 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2204 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2205 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2206 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2210 init_param2(physmem);
2212 /* now running on new page tables, configured,and u/iom is accessible */
2214 /* Map the message buffer. */
2215 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2216 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2218 msgbufinit(msgbufp, MSGBUF_SIZE);
2220 /* make a call gate to reenter kernel with */
2221 gdp = &ldt[LSYS5CALLS_SEL].gd;
2223 x = (int) &IDTVEC(lcall_syscall);
2224 gdp->gd_looffset = x;
2225 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2227 gdp->gd_type = SDT_SYS386CGT;
2228 gdp->gd_dpl = SEL_UPL;
2230 gdp->gd_hioffset = x >> 16;
2232 /* XXX does this work? */
2234 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2235 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2237 /* transfer to user mode */
2239 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2240 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2242 /* setup proc 0's pcb */
2243 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
2245 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2247 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2249 thread0.td_pcb->pcb_ext = 0;
2250 thread0.td_frame = &proc0_tf;
2254 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2257 pcpu->pc_acpi_id = 0xffffffff;
2261 spinlock_enter(void)
2266 if (td->td_md.md_spinlock_count == 0)
2267 td->td_md.md_saved_flags = intr_disable();
2268 td->td_md.md_spinlock_count++;
2279 td->td_md.md_spinlock_count--;
2280 if (td->td_md.md_spinlock_count == 0)
2281 intr_restore(td->td_md.md_saved_flags);
2284 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2285 static void f00f_hack(void *unused);
2286 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL)
2289 f00f_hack(void *unused)
2291 struct gate_descriptor *new_idt;
2299 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2301 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2303 panic("kmem_alloc returned 0");
2305 /* Put the problematic entry (#6) at the end of the lower page. */
2306 new_idt = (struct gate_descriptor*)
2307 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2308 bcopy(idt, new_idt, sizeof(idt0));
2309 r_idt.rd_base = (u_int)new_idt;
2312 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2313 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2314 panic("vm_map_protect failed");
2316 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2319 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2320 * we want to start a backtrace from the function that caused us to enter
2321 * the debugger. We have the context in the trapframe, but base the trace
2322 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2323 * enough for a backtrace.
2326 makectx(struct trapframe *tf, struct pcb *pcb)
2329 pcb->pcb_edi = tf->tf_edi;
2330 pcb->pcb_esi = tf->tf_esi;
2331 pcb->pcb_ebp = tf->tf_ebp;
2332 pcb->pcb_ebx = tf->tf_ebx;
2333 pcb->pcb_eip = tf->tf_eip;
2334 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2338 ptrace_set_pc(struct thread *td, u_long addr)
2341 td->td_frame->tf_eip = addr;
2346 ptrace_single_step(struct thread *td)
2348 td->td_frame->tf_eflags |= PSL_T;
2353 ptrace_clear_single_step(struct thread *td)
2355 td->td_frame->tf_eflags &= ~PSL_T;
2360 fill_regs(struct thread *td, struct reg *regs)
2363 struct trapframe *tp;
2367 regs->r_fs = tp->tf_fs;
2368 regs->r_es = tp->tf_es;
2369 regs->r_ds = tp->tf_ds;
2370 regs->r_edi = tp->tf_edi;
2371 regs->r_esi = tp->tf_esi;
2372 regs->r_ebp = tp->tf_ebp;
2373 regs->r_ebx = tp->tf_ebx;
2374 regs->r_edx = tp->tf_edx;
2375 regs->r_ecx = tp->tf_ecx;
2376 regs->r_eax = tp->tf_eax;
2377 regs->r_eip = tp->tf_eip;
2378 regs->r_cs = tp->tf_cs;
2379 regs->r_eflags = tp->tf_eflags;
2380 regs->r_esp = tp->tf_esp;
2381 regs->r_ss = tp->tf_ss;
2382 regs->r_gs = pcb->pcb_gs;
2387 set_regs(struct thread *td, struct reg *regs)
2390 struct trapframe *tp;
2393 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2394 !CS_SECURE(regs->r_cs))
2397 tp->tf_fs = regs->r_fs;
2398 tp->tf_es = regs->r_es;
2399 tp->tf_ds = regs->r_ds;
2400 tp->tf_edi = regs->r_edi;
2401 tp->tf_esi = regs->r_esi;
2402 tp->tf_ebp = regs->r_ebp;
2403 tp->tf_ebx = regs->r_ebx;
2404 tp->tf_edx = regs->r_edx;
2405 tp->tf_ecx = regs->r_ecx;
2406 tp->tf_eax = regs->r_eax;
2407 tp->tf_eip = regs->r_eip;
2408 tp->tf_cs = regs->r_cs;
2409 tp->tf_eflags = regs->r_eflags;
2410 tp->tf_esp = regs->r_esp;
2411 tp->tf_ss = regs->r_ss;
2412 pcb->pcb_gs = regs->r_gs;
2416 #ifdef CPU_ENABLE_SSE
2418 fill_fpregs_xmm(sv_xmm, sv_87)
2419 struct savexmm *sv_xmm;
2420 struct save87 *sv_87;
2422 register struct env87 *penv_87 = &sv_87->sv_env;
2423 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2426 bzero(sv_87, sizeof(*sv_87));
2428 /* FPU control/status */
2429 penv_87->en_cw = penv_xmm->en_cw;
2430 penv_87->en_sw = penv_xmm->en_sw;
2431 penv_87->en_tw = penv_xmm->en_tw;
2432 penv_87->en_fip = penv_xmm->en_fip;
2433 penv_87->en_fcs = penv_xmm->en_fcs;
2434 penv_87->en_opcode = penv_xmm->en_opcode;
2435 penv_87->en_foo = penv_xmm->en_foo;
2436 penv_87->en_fos = penv_xmm->en_fos;
2439 for (i = 0; i < 8; ++i)
2440 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2444 set_fpregs_xmm(sv_87, sv_xmm)
2445 struct save87 *sv_87;
2446 struct savexmm *sv_xmm;
2448 register struct env87 *penv_87 = &sv_87->sv_env;
2449 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2452 /* FPU control/status */
2453 penv_xmm->en_cw = penv_87->en_cw;
2454 penv_xmm->en_sw = penv_87->en_sw;
2455 penv_xmm->en_tw = penv_87->en_tw;
2456 penv_xmm->en_fip = penv_87->en_fip;
2457 penv_xmm->en_fcs = penv_87->en_fcs;
2458 penv_xmm->en_opcode = penv_87->en_opcode;
2459 penv_xmm->en_foo = penv_87->en_foo;
2460 penv_xmm->en_fos = penv_87->en_fos;
2463 for (i = 0; i < 8; ++i)
2464 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2466 #endif /* CPU_ENABLE_SSE */
2469 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2471 #ifdef CPU_ENABLE_SSE
2473 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2474 (struct save87 *)fpregs);
2477 #endif /* CPU_ENABLE_SSE */
2478 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2483 set_fpregs(struct thread *td, struct fpreg *fpregs)
2485 #ifdef CPU_ENABLE_SSE
2487 set_fpregs_xmm((struct save87 *)fpregs,
2488 &td->td_pcb->pcb_save.sv_xmm);
2491 #endif /* CPU_ENABLE_SSE */
2492 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2497 * Get machine context.
2500 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2502 struct trapframe *tp;
2506 PROC_LOCK(curthread->td_proc);
2507 mcp->mc_onstack = sigonstack(tp->tf_esp);
2508 PROC_UNLOCK(curthread->td_proc);
2509 mcp->mc_gs = td->td_pcb->pcb_gs;
2510 mcp->mc_fs = tp->tf_fs;
2511 mcp->mc_es = tp->tf_es;
2512 mcp->mc_ds = tp->tf_ds;
2513 mcp->mc_edi = tp->tf_edi;
2514 mcp->mc_esi = tp->tf_esi;
2515 mcp->mc_ebp = tp->tf_ebp;
2516 mcp->mc_isp = tp->tf_isp;
2517 if (flags & GET_MC_CLEAR_RET) {
2521 mcp->mc_eax = tp->tf_eax;
2522 mcp->mc_edx = tp->tf_edx;
2524 mcp->mc_ebx = tp->tf_ebx;
2525 mcp->mc_ecx = tp->tf_ecx;
2526 mcp->mc_eip = tp->tf_eip;
2527 mcp->mc_cs = tp->tf_cs;
2528 mcp->mc_eflags = tp->tf_eflags;
2529 mcp->mc_esp = tp->tf_esp;
2530 mcp->mc_ss = tp->tf_ss;
2531 mcp->mc_len = sizeof(*mcp);
2532 get_fpcontext(td, mcp);
2537 * Set machine context.
2539 * However, we don't set any but the user modifiable flags, and we won't
2540 * touch the cs selector.
2543 set_mcontext(struct thread *td, const mcontext_t *mcp)
2545 struct trapframe *tp;
2549 if (mcp->mc_len != sizeof(*mcp))
2551 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2552 (tp->tf_eflags & ~PSL_USERCHANGE);
2553 if ((ret = set_fpcontext(td, mcp)) == 0) {
2554 tp->tf_fs = mcp->mc_fs;
2555 tp->tf_es = mcp->mc_es;
2556 tp->tf_ds = mcp->mc_ds;
2557 tp->tf_edi = mcp->mc_edi;
2558 tp->tf_esi = mcp->mc_esi;
2559 tp->tf_ebp = mcp->mc_ebp;
2560 tp->tf_ebx = mcp->mc_ebx;
2561 tp->tf_edx = mcp->mc_edx;
2562 tp->tf_ecx = mcp->mc_ecx;
2563 tp->tf_eax = mcp->mc_eax;
2564 tp->tf_eip = mcp->mc_eip;
2565 tp->tf_eflags = eflags;
2566 tp->tf_esp = mcp->mc_esp;
2567 tp->tf_ss = mcp->mc_ss;
2568 td->td_pcb->pcb_gs = mcp->mc_gs;
2575 get_fpcontext(struct thread *td, mcontext_t *mcp)
2578 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2579 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2581 union savefpu *addr;
2584 * XXX mc_fpstate might be misaligned, since its declaration is not
2585 * unportabilized using __attribute__((aligned(16))) like the
2586 * declaration of struct savemm, and anyway, alignment doesn't work
2587 * for auto variables since we don't use gcc's pessimal stack
2588 * alignment. Work around this by abusing the spare fields after
2591 * XXX unpessimize most cases by only aligning when fxsave might be
2592 * called, although this requires knowing too much about
2593 * npxgetregs()'s internals.
2595 addr = (union savefpu *)&mcp->mc_fpstate;
2596 if (td == PCPU_GET(fpcurthread) &&
2597 #ifdef CPU_ENABLE_SSE
2600 ((uintptr_t)(void *)addr & 0xF)) {
2602 addr = (void *)((char *)addr + 4);
2603 while ((uintptr_t)(void *)addr & 0xF);
2605 mcp->mc_ownedfp = npxgetregs(td, addr);
2606 if (addr != (union savefpu *)&mcp->mc_fpstate) {
2607 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2608 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
2610 mcp->mc_fpformat = npxformat();
2615 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2617 union savefpu *addr;
2619 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2621 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2622 mcp->mc_fpformat != _MC_FPFMT_XMM)
2624 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2625 /* We don't care what state is left in the FPU or PCB. */
2627 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2628 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2629 /* XXX align as above. */
2630 addr = (union savefpu *)&mcp->mc_fpstate;
2631 if (td == PCPU_GET(fpcurthread) &&
2632 #ifdef CPU_ENABLE_SSE
2635 ((uintptr_t)(void *)addr & 0xF)) {
2637 addr = (void *)((char *)addr + 4);
2638 while ((uintptr_t)(void *)addr & 0xF);
2639 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
2643 * XXX we violate the dubious requirement that npxsetregs()
2644 * be called with interrupts disabled.
2646 npxsetregs(td, addr);
2649 * Don't bother putting things back where they were in the
2650 * misaligned case, since we know that the caller won't use
2659 fpstate_drop(struct thread *td)
2665 if (PCPU_GET(fpcurthread) == td)
2669 * XXX force a full drop of the npx. The above only drops it if we
2670 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2672 * XXX I don't much like npxgetregs()'s semantics of doing a full
2673 * drop. Dropping only to the pcb matches fnsave's behaviour.
2674 * We only need to drop to !PCB_INITDONE in sendsig(). But
2675 * sendsig() is the only caller of npxgetregs()... perhaps we just
2676 * have too many layers.
2678 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
2683 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2688 dbregs->dr[0] = rdr0();
2689 dbregs->dr[1] = rdr1();
2690 dbregs->dr[2] = rdr2();
2691 dbregs->dr[3] = rdr3();
2692 dbregs->dr[4] = rdr4();
2693 dbregs->dr[5] = rdr5();
2694 dbregs->dr[6] = rdr6();
2695 dbregs->dr[7] = rdr7();
2698 dbregs->dr[0] = pcb->pcb_dr0;
2699 dbregs->dr[1] = pcb->pcb_dr1;
2700 dbregs->dr[2] = pcb->pcb_dr2;
2701 dbregs->dr[3] = pcb->pcb_dr3;
2704 dbregs->dr[6] = pcb->pcb_dr6;
2705 dbregs->dr[7] = pcb->pcb_dr7;
2711 set_dbregs(struct thread *td, struct dbreg *dbregs)
2715 u_int32_t mask1, mask2;
2718 load_dr0(dbregs->dr[0]);
2719 load_dr1(dbregs->dr[1]);
2720 load_dr2(dbregs->dr[2]);
2721 load_dr3(dbregs->dr[3]);
2722 load_dr4(dbregs->dr[4]);
2723 load_dr5(dbregs->dr[5]);
2724 load_dr6(dbregs->dr[6]);
2725 load_dr7(dbregs->dr[7]);
2728 * Don't let an illegal value for dr7 get set. Specifically,
2729 * check for undefined settings. Setting these bit patterns
2730 * result in undefined behaviour and can lead to an unexpected
2733 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2734 i++, mask1 <<= 2, mask2 <<= 2)
2735 if ((dbregs->dr[7] & mask1) == mask2)
2741 * Don't let a process set a breakpoint that is not within the
2742 * process's address space. If a process could do this, it
2743 * could halt the system by setting a breakpoint in the kernel
2744 * (if ddb was enabled). Thus, we need to check to make sure
2745 * that no breakpoints are being enabled for addresses outside
2746 * process's address space, unless, perhaps, we were called by
2749 * XXX - what about when the watched area of the user's
2750 * address space is written into from within the kernel
2751 * ... wouldn't that still cause a breakpoint to be generated
2752 * from within kernel mode?
2755 if (suser(td) != 0) {
2756 if (dbregs->dr[7] & 0x3) {
2757 /* dr0 is enabled */
2758 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2762 if (dbregs->dr[7] & (0x3<<2)) {
2763 /* dr1 is enabled */
2764 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2768 if (dbregs->dr[7] & (0x3<<4)) {
2769 /* dr2 is enabled */
2770 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2774 if (dbregs->dr[7] & (0x3<<6)) {
2775 /* dr3 is enabled */
2776 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2781 pcb->pcb_dr0 = dbregs->dr[0];
2782 pcb->pcb_dr1 = dbregs->dr[1];
2783 pcb->pcb_dr2 = dbregs->dr[2];
2784 pcb->pcb_dr3 = dbregs->dr[3];
2785 pcb->pcb_dr6 = dbregs->dr[6];
2786 pcb->pcb_dr7 = dbregs->dr[7];
2788 pcb->pcb_flags |= PCB_DBREGS;
2795 * Return > 0 if a hardware breakpoint has been hit, and the
2796 * breakpoint was in user space. Return 0, otherwise.
2799 user_dbreg_trap(void)
2801 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2802 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2803 int nbp; /* number of breakpoints that triggered */
2804 caddr_t addr[4]; /* breakpoint addresses */
2808 if ((dr7 & 0x000000ff) == 0) {
2810 * all GE and LE bits in the dr7 register are zero,
2811 * thus the trap couldn't have been caused by the
2812 * hardware debug registers
2819 bp = dr6 & 0x0000000f;
2823 * None of the breakpoint bits are set meaning this
2824 * trap was not caused by any of the debug registers
2830 * at least one of the breakpoints were hit, check to see
2831 * which ones and if any of them are user space addresses
2835 addr[nbp++] = (caddr_t)rdr0();
2838 addr[nbp++] = (caddr_t)rdr1();
2841 addr[nbp++] = (caddr_t)rdr2();
2844 addr[nbp++] = (caddr_t)rdr3();
2847 for (i=0; i<nbp; i++) {
2849 (caddr_t)VM_MAXUSER_ADDRESS) {
2851 * addr[i] is in user space
2858 * None of the breakpoints are in user space.
2864 #include <machine/apicvar.h>
2867 * Provide stub functions so that the MADT APIC enumerator in the acpi
2868 * kernel module will link against a kernel without 'device apic'.
2870 * XXX - This is a gross hack.
2873 apic_register_enumerator(struct apic_enumerator *enumerator)
2878 ioapic_create(uintptr_t addr, int32_t id, int intbase)
2884 ioapic_disable_pin(void *cookie, u_int pin)
2890 ioapic_get_vector(void *cookie, u_int pin)
2896 ioapic_register(void *cookie)
2901 ioapic_remap_vector(void *cookie, u_int pin, int vector)
2907 ioapic_set_extint(void *cookie, u_int pin)
2913 ioapic_set_nmi(void *cookie, u_int pin)
2919 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
2925 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
2931 lapic_create(u_int apic_id, int boot_cpu)
2936 lapic_init(uintptr_t addr)
2941 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
2947 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
2953 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
2962 * Provide inb() and outb() as functions. They are normally only
2963 * available as macros calling inlined functions, thus cannot be
2964 * called from the debugger.
2966 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2972 /* silence compiler warnings */
2974 void outb(u_int, u_char);
2981 * We use %%dx and not %1 here because i/o is done at %dx and not at
2982 * %edx, while gcc generates inferior code (movw instead of movl)
2983 * if we tell it to load (u_short) port.
2985 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2990 outb(u_int port, u_char data)
2994 * Use an unnecessary assignment to help gcc's register allocator.
2995 * This make a large difference for gcc-1.40 and a tiny difference
2996 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2997 * best results. gcc-2.6.0 can't handle this.
3000 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));