2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
101 #error KDB must be enabled in order for DDB to work!
104 #include <ddb/db_sym.h>
109 #include <net/netisr.h>
111 #include <machine/bootinfo.h>
112 #include <machine/clock.h>
113 #include <machine/cpu.h>
114 #include <machine/cputypes.h>
115 #include <machine/intr_machdep.h>
116 #include <machine/md_var.h>
117 #include <machine/pc/bios.h>
118 #include <machine/pcb.h>
119 #include <machine/pcb_ext.h>
120 #include <machine/proc.h>
121 #include <machine/reg.h>
122 #include <machine/sigframe.h>
123 #include <machine/specialreg.h>
124 #include <machine/vm86.h>
126 #include <machine/perfmon.h>
129 #include <machine/privatespace.h>
130 #include <machine/smp.h>
134 #include <i386/isa/icu.h>
138 #include <machine/xbox.h>
140 int arch_i386_is_xbox = 0;
141 uint32_t arch_i386_xbox_memsize = 0;
144 /* Sanity check for __curthread() */
145 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
147 extern void init386(int first);
148 extern void dblfault_handler(void);
150 extern void printcpuinfo(void); /* XXX header file */
151 extern void finishidentcpu(void);
152 extern void panicifcpuunsupported(void);
153 extern void initializecpu(void);
155 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
156 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
158 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
159 #define CPU_ENABLE_SSE
162 static void cpu_startup(void *);
163 static void fpstate_drop(struct thread *td);
164 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
165 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
166 #ifdef CPU_ENABLE_SSE
167 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
168 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
169 #endif /* CPU_ENABLE_SSE */
170 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
173 extern vm_offset_t ksym_start, ksym_end;
176 int _udatasel, _ucodesel;
182 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
184 #ifdef COMPAT_FREEBSD4
185 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
191 vm_paddr_t phys_avail[10];
192 vm_paddr_t dump_avail[10];
194 /* must be 2 less so 0 0 can signal end of chunks */
195 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
196 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
198 struct kva_md_info kmi;
200 static struct trapframe proc0_tf;
202 static struct pcpu __pcpu;
207 struct mem_range_softc mem_range_softc;
214 * Good {morning,afternoon,evening,night}.
218 panicifcpuunsupported();
222 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
223 ptoa((uintmax_t)Maxmem) / 1048576);
226 * Display any holes after the first chunk of extended memory.
231 printf("Physical memory chunk(s):\n");
232 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
235 size = phys_avail[indx + 1] - phys_avail[indx];
237 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
238 (uintmax_t)phys_avail[indx],
239 (uintmax_t)phys_avail[indx + 1] - 1,
240 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
244 vm_ksubmap_init(&kmi);
246 printf("avail memory = %ju (%ju MB)\n",
247 ptoa((uintmax_t)cnt.v_free_count),
248 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
251 * Set up buffers, so they can be used to read disk labels.
254 vm_pager_bufferinit();
260 * Send an interrupt to process.
262 * Stack is set up to allow sigcode stored
263 * at top to call routine, followed by kcall
264 * to sigreturn routine below. After sigreturn
265 * resets the signal mask, the stack, and the
266 * frame pointer, it returns to the user
271 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
273 struct osigframe sf, *fp;
277 struct trapframe *regs;
283 PROC_LOCK_ASSERT(p, MA_OWNED);
284 sig = ksi->ksi_signo;
286 mtx_assert(&psp->ps_mtx, MA_OWNED);
288 oonstack = sigonstack(regs->tf_esp);
290 /* Allocate space for the signal handler context. */
291 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
292 SIGISMEMBER(psp->ps_sigonstack, sig)) {
293 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
294 td->td_sigstk.ss_size - sizeof(struct osigframe));
295 #if defined(COMPAT_43)
296 td->td_sigstk.ss_flags |= SS_ONSTACK;
299 fp = (struct osigframe *)regs->tf_esp - 1;
301 /* Translate the signal if appropriate. */
302 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
303 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
305 /* Build the argument list for the signal handler. */
307 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
308 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
309 /* Signal handler installed with SA_SIGINFO. */
310 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
311 sf.sf_siginfo.si_signo = sig;
312 sf.sf_siginfo.si_code = ksi->ksi_code;
313 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
315 /* Old FreeBSD-style arguments. */
316 sf.sf_arg2 = ksi->ksi_code;
317 sf.sf_addr = (register_t)ksi->ksi_addr;
318 sf.sf_ahu.sf_handler = catcher;
320 mtx_unlock(&psp->ps_mtx);
323 /* Save most if not all of trap frame. */
324 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
325 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
326 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
327 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
328 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
329 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
330 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
331 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
332 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
333 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
334 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
335 sf.sf_siginfo.si_sc.sc_gs = rgs();
336 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
338 /* Build the signal context to be used by osigreturn(). */
339 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
340 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
341 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
342 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
343 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
344 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
345 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
346 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
349 * If we're a vm86 process, we want to save the segment registers.
350 * We also change eflags to be our emulated eflags, not the actual
353 if (regs->tf_eflags & PSL_VM) {
354 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
355 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
356 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
358 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
359 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
360 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
361 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
363 if (vm86->vm86_has_vme == 0)
364 sf.sf_siginfo.si_sc.sc_ps =
365 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
366 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
368 /* See sendsig() for comments. */
369 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
373 * Copy the sigframe out to the user's stack.
375 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
377 printf("process %ld has trashed its stack\n", (long)p->p_pid);
383 regs->tf_esp = (int)fp;
384 regs->tf_eip = PS_STRINGS - szosigcode;
385 regs->tf_eflags &= ~PSL_T;
386 regs->tf_cs = _ucodesel;
387 regs->tf_ds = _udatasel;
388 regs->tf_es = _udatasel;
389 regs->tf_fs = _udatasel;
391 regs->tf_ss = _udatasel;
393 mtx_lock(&psp->ps_mtx);
395 #endif /* COMPAT_43 */
397 #ifdef COMPAT_FREEBSD4
399 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
401 struct sigframe4 sf, *sfp;
405 struct trapframe *regs;
411 PROC_LOCK_ASSERT(p, MA_OWNED);
412 sig = ksi->ksi_signo;
414 mtx_assert(&psp->ps_mtx, MA_OWNED);
416 oonstack = sigonstack(regs->tf_esp);
418 /* Save user context. */
419 bzero(&sf, sizeof(sf));
420 sf.sf_uc.uc_sigmask = *mask;
421 sf.sf_uc.uc_stack = td->td_sigstk;
422 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
423 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
424 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
425 sf.sf_uc.uc_mcontext.mc_gs = rgs();
426 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
428 /* Allocate space for the signal handler context. */
429 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
430 SIGISMEMBER(psp->ps_sigonstack, sig)) {
431 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
432 td->td_sigstk.ss_size - sizeof(struct sigframe4));
433 #if defined(COMPAT_43)
434 td->td_sigstk.ss_flags |= SS_ONSTACK;
437 sfp = (struct sigframe4 *)regs->tf_esp - 1;
439 /* Translate the signal if appropriate. */
440 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
441 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
443 /* Build the argument list for the signal handler. */
445 sf.sf_ucontext = (register_t)&sfp->sf_uc;
446 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
447 /* Signal handler installed with SA_SIGINFO. */
448 sf.sf_siginfo = (register_t)&sfp->sf_si;
449 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
451 /* Fill in POSIX parts */
452 sf.sf_si.si_signo = sig;
453 sf.sf_si.si_code = ksi->ksi_code;
454 sf.sf_si.si_addr = ksi->ksi_addr;
456 /* Old FreeBSD-style arguments. */
457 sf.sf_siginfo = ksi->ksi_code;
458 sf.sf_addr = (register_t)ksi->ksi_addr;
459 sf.sf_ahu.sf_handler = catcher;
461 mtx_unlock(&psp->ps_mtx);
465 * If we're a vm86 process, we want to save the segment registers.
466 * We also change eflags to be our emulated eflags, not the actual
469 if (regs->tf_eflags & PSL_VM) {
470 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
471 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
473 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
474 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
475 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
476 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
478 if (vm86->vm86_has_vme == 0)
479 sf.sf_uc.uc_mcontext.mc_eflags =
480 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
481 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
484 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
485 * syscalls made by the signal handler. This just avoids
486 * wasting time for our lazy fixup of such faults. PSL_NT
487 * does nothing in vm86 mode, but vm86 programs can set it
488 * almost legitimately in probes for old cpu types.
490 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
494 * Copy the sigframe out to the user's stack.
496 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
498 printf("process %ld has trashed its stack\n", (long)p->p_pid);
504 regs->tf_esp = (int)sfp;
505 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
506 regs->tf_eflags &= ~PSL_T;
507 regs->tf_cs = _ucodesel;
508 regs->tf_ds = _udatasel;
509 regs->tf_es = _udatasel;
510 regs->tf_fs = _udatasel;
511 regs->tf_ss = _udatasel;
513 mtx_lock(&psp->ps_mtx);
515 #endif /* COMPAT_FREEBSD4 */
518 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
520 struct sigframe sf, *sfp;
525 struct trapframe *regs;
531 PROC_LOCK_ASSERT(p, MA_OWNED);
532 sig = ksi->ksi_signo;
534 mtx_assert(&psp->ps_mtx, MA_OWNED);
535 #ifdef COMPAT_FREEBSD4
536 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
537 freebsd4_sendsig(catcher, ksi, mask);
542 if (SIGISMEMBER(psp->ps_osigset, sig)) {
543 osendsig(catcher, ksi, mask);
548 oonstack = sigonstack(regs->tf_esp);
550 /* Save user context. */
551 bzero(&sf, sizeof(sf));
552 sf.sf_uc.uc_sigmask = *mask;
553 sf.sf_uc.uc_stack = td->td_sigstk;
554 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
555 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
556 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
557 sf.sf_uc.uc_mcontext.mc_gs = rgs();
558 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
559 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
560 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
563 /* Allocate space for the signal handler context. */
564 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
565 SIGISMEMBER(psp->ps_sigonstack, sig)) {
566 sp = td->td_sigstk.ss_sp +
567 td->td_sigstk.ss_size - sizeof(struct sigframe);
568 #if defined(COMPAT_43)
569 td->td_sigstk.ss_flags |= SS_ONSTACK;
572 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
573 /* Align to 16 bytes. */
574 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
576 /* Translate the signal if appropriate. */
577 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
578 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
580 /* Build the argument list for the signal handler. */
582 sf.sf_ucontext = (register_t)&sfp->sf_uc;
583 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
584 /* Signal handler installed with SA_SIGINFO. */
585 sf.sf_siginfo = (register_t)&sfp->sf_si;
586 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
588 /* Fill in POSIX parts */
589 sf.sf_si = ksi->ksi_info;
590 sf.sf_si.si_signo = sig; /* maybe a translated signal */
592 /* Old FreeBSD-style arguments. */
593 sf.sf_siginfo = ksi->ksi_code;
594 sf.sf_addr = (register_t)ksi->ksi_addr;
595 sf.sf_ahu.sf_handler = catcher;
597 mtx_unlock(&psp->ps_mtx);
601 * If we're a vm86 process, we want to save the segment registers.
602 * We also change eflags to be our emulated eflags, not the actual
605 if (regs->tf_eflags & PSL_VM) {
606 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
607 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
609 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
610 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
611 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
612 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
614 if (vm86->vm86_has_vme == 0)
615 sf.sf_uc.uc_mcontext.mc_eflags =
616 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
617 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
620 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
621 * syscalls made by the signal handler. This just avoids
622 * wasting time for our lazy fixup of such faults. PSL_NT
623 * does nothing in vm86 mode, but vm86 programs can set it
624 * almost legitimately in probes for old cpu types.
626 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
630 * Copy the sigframe out to the user's stack.
632 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
634 printf("process %ld has trashed its stack\n", (long)p->p_pid);
640 regs->tf_esp = (int)sfp;
641 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
642 regs->tf_eflags &= ~PSL_T;
643 regs->tf_cs = _ucodesel;
644 regs->tf_ds = _udatasel;
645 regs->tf_es = _udatasel;
646 regs->tf_fs = _udatasel;
647 regs->tf_ss = _udatasel;
649 mtx_lock(&psp->ps_mtx);
653 * System call to cleanup state after a signal
654 * has been taken. Reset signal mask and
655 * stack state from context left by sendsig (above).
656 * Return to previous pc and psl as specified by
657 * context left by sendsig. Check carefully to
658 * make sure that the user has not modified the
659 * state to gain improper privileges.
667 struct osigreturn_args /* {
668 struct osigcontext *sigcntxp;
671 struct osigcontext sc;
672 struct trapframe *regs;
673 struct osigcontext *scp;
674 struct proc *p = td->td_proc;
679 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
684 if (eflags & PSL_VM) {
685 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
686 struct vm86_kernel *vm86;
689 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
690 * set up the vm86 area, and we can't enter vm86 mode.
692 if (td->td_pcb->pcb_ext == 0)
694 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
695 if (vm86->vm86_inited == 0)
698 /* Go back to user mode if both flags are set. */
699 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
700 ksiginfo_init_trap(&ksi);
701 ksi.ksi_signo = SIGBUS;
702 ksi.ksi_code = BUS_OBJERR;
703 ksi.ksi_addr = (void *)regs->tf_eip;
704 trapsignal(td, &ksi);
707 if (vm86->vm86_has_vme) {
708 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
709 (eflags & VME_USERCHANGE) | PSL_VM;
711 vm86->vm86_eflags = eflags; /* save VIF, VIP */
712 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
713 (eflags & VM_USERCHANGE) | PSL_VM;
715 tf->tf_vm86_ds = scp->sc_ds;
716 tf->tf_vm86_es = scp->sc_es;
717 tf->tf_vm86_fs = scp->sc_fs;
718 tf->tf_vm86_gs = scp->sc_gs;
719 tf->tf_ds = _udatasel;
720 tf->tf_es = _udatasel;
721 tf->tf_fs = _udatasel;
724 * Don't allow users to change privileged or reserved flags.
727 * XXX do allow users to change the privileged flag PSL_RF.
728 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
729 * should sometimes set it there too. tf_eflags is kept in
730 * the signal context during signal handling and there is no
731 * other place to remember it, so the PSL_RF bit may be
732 * corrupted by the signal handler without us knowing.
733 * Corruption of the PSL_RF bit at worst causes one more or
734 * one less debugger trap, so allowing it is fairly harmless.
736 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
741 * Don't allow users to load a valid privileged %cs. Let the
742 * hardware check for invalid selectors, excess privilege in
743 * other selectors, invalid %eip's and invalid %esp's.
745 if (!CS_SECURE(scp->sc_cs)) {
746 ksiginfo_init_trap(&ksi);
747 ksi.ksi_signo = SIGBUS;
748 ksi.ksi_code = BUS_OBJERR;
749 ksi.ksi_trapno = T_PROTFLT;
750 ksi.ksi_addr = (void *)regs->tf_eip;
751 trapsignal(td, &ksi);
754 regs->tf_ds = scp->sc_ds;
755 regs->tf_es = scp->sc_es;
756 regs->tf_fs = scp->sc_fs;
759 /* Restore remaining registers. */
760 regs->tf_eax = scp->sc_eax;
761 regs->tf_ebx = scp->sc_ebx;
762 regs->tf_ecx = scp->sc_ecx;
763 regs->tf_edx = scp->sc_edx;
764 regs->tf_esi = scp->sc_esi;
765 regs->tf_edi = scp->sc_edi;
766 regs->tf_cs = scp->sc_cs;
767 regs->tf_ss = scp->sc_ss;
768 regs->tf_isp = scp->sc_isp;
769 regs->tf_ebp = scp->sc_fp;
770 regs->tf_esp = scp->sc_sp;
771 regs->tf_eip = scp->sc_pc;
772 regs->tf_eflags = eflags;
775 #if defined(COMPAT_43)
776 if (scp->sc_onstack & 1)
777 td->td_sigstk.ss_flags |= SS_ONSTACK;
779 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
781 SIGSETOLD(td->td_sigmask, scp->sc_mask);
782 SIG_CANTMASK(td->td_sigmask);
785 return (EJUSTRETURN);
787 #endif /* COMPAT_43 */
789 #ifdef COMPAT_FREEBSD4
794 freebsd4_sigreturn(td, uap)
796 struct freebsd4_sigreturn_args /* {
797 const ucontext4 *sigcntxp;
801 struct proc *p = td->td_proc;
802 struct trapframe *regs;
803 const struct ucontext4 *ucp;
804 int cs, eflags, error;
807 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
812 eflags = ucp->uc_mcontext.mc_eflags;
813 if (eflags & PSL_VM) {
814 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
815 struct vm86_kernel *vm86;
818 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
819 * set up the vm86 area, and we can't enter vm86 mode.
821 if (td->td_pcb->pcb_ext == 0)
823 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
824 if (vm86->vm86_inited == 0)
827 /* Go back to user mode if both flags are set. */
828 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
829 ksiginfo_init_trap(&ksi);
830 ksi.ksi_signo = SIGBUS;
831 ksi.ksi_code = BUS_OBJERR;
832 ksi.ksi_addr = (void *)regs->tf_eip;
833 trapsignal(td, &ksi);
835 if (vm86->vm86_has_vme) {
836 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
837 (eflags & VME_USERCHANGE) | PSL_VM;
839 vm86->vm86_eflags = eflags; /* save VIF, VIP */
840 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
841 (eflags & VM_USERCHANGE) | PSL_VM;
843 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
844 tf->tf_eflags = eflags;
845 tf->tf_vm86_ds = tf->tf_ds;
846 tf->tf_vm86_es = tf->tf_es;
847 tf->tf_vm86_fs = tf->tf_fs;
848 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
849 tf->tf_ds = _udatasel;
850 tf->tf_es = _udatasel;
851 tf->tf_fs = _udatasel;
854 * Don't allow users to change privileged or reserved flags.
857 * XXX do allow users to change the privileged flag PSL_RF.
858 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
859 * should sometimes set it there too. tf_eflags is kept in
860 * the signal context during signal handling and there is no
861 * other place to remember it, so the PSL_RF bit may be
862 * corrupted by the signal handler without us knowing.
863 * Corruption of the PSL_RF bit at worst causes one more or
864 * one less debugger trap, so allowing it is fairly harmless.
866 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
867 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
872 * Don't allow users to load a valid privileged %cs. Let the
873 * hardware check for invalid selectors, excess privilege in
874 * other selectors, invalid %eip's and invalid %esp's.
876 cs = ucp->uc_mcontext.mc_cs;
877 if (!CS_SECURE(cs)) {
878 printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
879 ksiginfo_init_trap(&ksi);
880 ksi.ksi_signo = SIGBUS;
881 ksi.ksi_code = BUS_OBJERR;
882 ksi.ksi_trapno = T_PROTFLT;
883 ksi.ksi_addr = (void *)regs->tf_eip;
884 trapsignal(td, &ksi);
888 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
892 #if defined(COMPAT_43)
893 if (ucp->uc_mcontext.mc_onstack & 1)
894 td->td_sigstk.ss_flags |= SS_ONSTACK;
896 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
899 td->td_sigmask = ucp->uc_sigmask;
900 SIG_CANTMASK(td->td_sigmask);
903 return (EJUSTRETURN);
905 #endif /* COMPAT_FREEBSD4 */
913 struct sigreturn_args /* {
914 const struct __ucontext *sigcntxp;
918 struct proc *p = td->td_proc;
919 struct trapframe *regs;
920 const ucontext_t *ucp;
921 int cs, eflags, error, ret;
924 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
929 eflags = ucp->uc_mcontext.mc_eflags;
930 if (eflags & PSL_VM) {
931 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
932 struct vm86_kernel *vm86;
935 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
936 * set up the vm86 area, and we can't enter vm86 mode.
938 if (td->td_pcb->pcb_ext == 0)
940 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
941 if (vm86->vm86_inited == 0)
944 /* Go back to user mode if both flags are set. */
945 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
946 ksiginfo_init_trap(&ksi);
947 ksi.ksi_signo = SIGBUS;
948 ksi.ksi_code = BUS_OBJERR;
949 ksi.ksi_addr = (void *)regs->tf_eip;
950 trapsignal(td, &ksi);
953 if (vm86->vm86_has_vme) {
954 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
955 (eflags & VME_USERCHANGE) | PSL_VM;
957 vm86->vm86_eflags = eflags; /* save VIF, VIP */
958 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
959 (eflags & VM_USERCHANGE) | PSL_VM;
961 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
962 tf->tf_eflags = eflags;
963 tf->tf_vm86_ds = tf->tf_ds;
964 tf->tf_vm86_es = tf->tf_es;
965 tf->tf_vm86_fs = tf->tf_fs;
966 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
967 tf->tf_ds = _udatasel;
968 tf->tf_es = _udatasel;
969 tf->tf_fs = _udatasel;
972 * Don't allow users to change privileged or reserved flags.
975 * XXX do allow users to change the privileged flag PSL_RF.
976 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
977 * should sometimes set it there too. tf_eflags is kept in
978 * the signal context during signal handling and there is no
979 * other place to remember it, so the PSL_RF bit may be
980 * corrupted by the signal handler without us knowing.
981 * Corruption of the PSL_RF bit at worst causes one more or
982 * one less debugger trap, so allowing it is fairly harmless.
984 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
985 printf("sigreturn: eflags = 0x%x\n", eflags);
990 * Don't allow users to load a valid privileged %cs. Let the
991 * hardware check for invalid selectors, excess privilege in
992 * other selectors, invalid %eip's and invalid %esp's.
994 cs = ucp->uc_mcontext.mc_cs;
995 if (!CS_SECURE(cs)) {
996 printf("sigreturn: cs = 0x%x\n", cs);
997 ksiginfo_init_trap(&ksi);
998 ksi.ksi_signo = SIGBUS;
999 ksi.ksi_code = BUS_OBJERR;
1000 ksi.ksi_trapno = T_PROTFLT;
1001 ksi.ksi_addr = (void *)regs->tf_eip;
1002 trapsignal(td, &ksi);
1006 ret = set_fpcontext(td, &ucp->uc_mcontext);
1009 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1013 #if defined(COMPAT_43)
1014 if (ucp->uc_mcontext.mc_onstack & 1)
1015 td->td_sigstk.ss_flags |= SS_ONSTACK;
1017 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1020 td->td_sigmask = ucp->uc_sigmask;
1021 SIG_CANTMASK(td->td_sigmask);
1024 return (EJUSTRETURN);
1028 * Machine dependent boot() routine
1030 * I haven't seen anything to put here yet
1031 * Possibly some stuff might be grafted back here from boot()
1038 /* Get current clock frequency for the given cpu id. */
1040 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1043 uint64_t tsc1, tsc2;
1045 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1048 return (EOPNOTSUPP);
1050 /* If we're booting, trust the rate calibrated moments ago. */
1057 /* Schedule ourselves on the indicated cpu. */
1058 mtx_lock_spin(&sched_lock);
1059 sched_bind(curthread, cpu_id);
1060 mtx_unlock_spin(&sched_lock);
1063 /* Calibrate by measuring a short delay. */
1064 reg = intr_disable();
1071 mtx_lock_spin(&sched_lock);
1072 sched_unbind(curthread);
1073 mtx_unlock_spin(&sched_lock);
1077 * Calculate the difference in readings, convert to Mhz, and
1078 * subtract 0.5% of the total. Empirical testing has shown that
1079 * overhead in DELAY() works out to approximately this value.
1082 *rate = tsc2 * 1000 - tsc2 * 5;
1087 * Shutdown the CPU as much as possible
1097 * Hook to idle the CPU when possible. In the SMP case we default to
1098 * off because a halted cpu will not currently pick up a new thread in the
1099 * run queue until the next timer tick. If turned on this will result in
1100 * approximately a 4.2% loss in real time performance in buildworld tests
1101 * (but improves user and sys times oddly enough), and saves approximately
1102 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
1104 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
1105 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
1106 * Then we can have our cake and eat it too.
1108 * XXX I'm turning it on for SMP as well by default for now. It seems to
1109 * help lock contention somewhat, and this is critical for HTT. -Peter
1111 static int cpu_idle_hlt = 1;
1112 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
1113 &cpu_idle_hlt, 0, "Idle loop HLT enable");
1116 cpu_idle_default(void)
1119 * we must absolutely guarentee that hlt is the
1120 * absolute next instruction after sti or we
1121 * introduce a timing window.
1123 __asm __volatile("sti; hlt");
1127 * Note that we have to be careful here to avoid a race between checking
1128 * sched_runnable() and actually halting. If we don't do this, we may waste
1129 * the time between calling hlt and the next interrupt even though there
1130 * is a runnable process.
1137 if (mp_grab_cpu_hlt())
1143 if (sched_runnable())
1150 /* Other subsystems (e.g., ACPI) can hook this later. */
1151 void (*cpu_idle_hook)(void) = cpu_idle_default;
1154 * Clear registers on exec
1157 exec_setregs(td, entry, stack, ps_strings)
1163 struct trapframe *regs = td->td_frame;
1164 struct pcb *pcb = td->td_pcb;
1166 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1167 pcb->pcb_gs = _udatasel;
1170 if (td->td_proc->p_md.md_ldt)
1173 bzero((char *)regs, sizeof(struct trapframe));
1174 regs->tf_eip = entry;
1175 regs->tf_esp = stack;
1176 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1177 regs->tf_ss = _udatasel;
1178 regs->tf_ds = _udatasel;
1179 regs->tf_es = _udatasel;
1180 regs->tf_fs = _udatasel;
1181 regs->tf_cs = _ucodesel;
1183 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1184 regs->tf_ebx = ps_strings;
1187 * Reset the hardware debug registers if they were in use.
1188 * They won't have any meaning for the newly exec'd process.
1190 if (pcb->pcb_flags & PCB_DBREGS) {
1197 if (pcb == PCPU_GET(curpcb)) {
1199 * Clear the debug registers on the running
1200 * CPU, otherwise they will end up affecting
1201 * the next process we switch to.
1205 pcb->pcb_flags &= ~PCB_DBREGS;
1209 * Initialize the math emulator (if any) for the current process.
1210 * Actually, just clear the bit that says that the emulator has
1211 * been initialized. Initialization is delayed until the process
1212 * traps to the emulator (if it is done at all) mainly because
1213 * emulators don't provide an entry point for initialization.
1215 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1218 * Drop the FP state if we hold it, so that the process gets a
1219 * clean FP state if it uses the FPU again.
1224 * XXX - Linux emulator
1225 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1228 td->td_retval[1] = 0;
1238 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1239 * BSP. See the comments there about why we set them.
1241 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1247 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1250 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1252 if (!error && req->newptr)
1257 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1258 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1260 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1261 CTLFLAG_RW, &disable_rtc_set, 0, "");
1263 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1264 CTLFLAG_RD, &bootinfo, bootinfo, "");
1266 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1267 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1269 u_long bootdev; /* not a struct cdev *- encoding is different */
1270 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1271 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1274 * Initialize 386 and configure to run kernel
1278 * Initialize segments & interrupt table
1282 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1283 static struct gate_descriptor idt0[NIDT];
1284 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1285 union descriptor ldt[NLDT]; /* local descriptor table */
1286 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1288 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1289 extern int has_f00f_bug;
1292 static struct i386tss dblfault_tss;
1293 static char dblfault_stack[PAGE_SIZE];
1295 extern vm_offset_t proc0kstack;
1299 * software prototypes -- in more palatable form.
1301 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1302 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1304 struct soft_segment_descriptor gdt_segs[] = {
1305 /* GNULL_SEL 0 Null Descriptor */
1306 { 0x0, /* segment base address */
1308 0, /* segment type */
1309 0, /* segment descriptor priority level */
1310 0, /* segment descriptor present */
1312 0, /* default 32 vs 16 bit size */
1313 0 /* limit granularity (byte/page units)*/ },
1314 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1315 { 0x0, /* segment base address */
1316 0xfffff, /* length - all address space */
1317 SDT_MEMRWA, /* segment type */
1318 0, /* segment descriptor priority level */
1319 1, /* segment descriptor present */
1321 1, /* default 32 vs 16 bit size */
1322 1 /* limit granularity (byte/page units)*/ },
1323 /* GUFS_SEL 2 %fs Descriptor for user */
1324 { 0x0, /* segment base address */
1325 0xfffff, /* length - all address space */
1326 SDT_MEMRWA, /* segment type */
1327 SEL_UPL, /* segment descriptor priority level */
1328 1, /* segment descriptor present */
1330 1, /* default 32 vs 16 bit size */
1331 1 /* limit granularity (byte/page units)*/ },
1332 /* GUGS_SEL 3 %gs Descriptor for user */
1333 { 0x0, /* segment base address */
1334 0xfffff, /* length - all address space */
1335 SDT_MEMRWA, /* segment type */
1336 SEL_UPL, /* segment descriptor priority level */
1337 1, /* segment descriptor present */
1339 1, /* default 32 vs 16 bit size */
1340 1 /* limit granularity (byte/page units)*/ },
1341 /* GCODE_SEL 4 Code Descriptor for kernel */
1342 { 0x0, /* segment base address */
1343 0xfffff, /* length - all address space */
1344 SDT_MEMERA, /* segment type */
1345 0, /* segment descriptor priority level */
1346 1, /* segment descriptor present */
1348 1, /* default 32 vs 16 bit size */
1349 1 /* limit granularity (byte/page units)*/ },
1350 /* GDATA_SEL 5 Data Descriptor for kernel */
1351 { 0x0, /* segment base address */
1352 0xfffff, /* length - all address space */
1353 SDT_MEMRWA, /* segment type */
1354 0, /* segment descriptor priority level */
1355 1, /* segment descriptor present */
1357 1, /* default 32 vs 16 bit size */
1358 1 /* limit granularity (byte/page units)*/ },
1359 /* GUCODE_SEL 6 Code Descriptor for user */
1360 { 0x0, /* segment base address */
1361 0xfffff, /* length - all address space */
1362 SDT_MEMERA, /* segment type */
1363 SEL_UPL, /* segment descriptor priority level */
1364 1, /* segment descriptor present */
1366 1, /* default 32 vs 16 bit size */
1367 1 /* limit granularity (byte/page units)*/ },
1368 /* GUDATA_SEL 7 Data Descriptor for user */
1369 { 0x0, /* segment base address */
1370 0xfffff, /* length - all address space */
1371 SDT_MEMRWA, /* segment type */
1372 SEL_UPL, /* segment descriptor priority level */
1373 1, /* segment descriptor present */
1375 1, /* default 32 vs 16 bit size */
1376 1 /* limit granularity (byte/page units)*/ },
1377 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1378 { 0x400, /* segment base address */
1379 0xfffff, /* length */
1380 SDT_MEMRWA, /* segment type */
1381 0, /* segment descriptor priority level */
1382 1, /* segment descriptor present */
1384 1, /* default 32 vs 16 bit size */
1385 1 /* limit granularity (byte/page units)*/ },
1386 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1388 0x0, /* segment base address */
1389 sizeof(struct i386tss)-1,/* length */
1390 SDT_SYS386TSS, /* segment type */
1391 0, /* segment descriptor priority level */
1392 1, /* segment descriptor present */
1394 0, /* unused - default 32 vs 16 bit size */
1395 0 /* limit granularity (byte/page units)*/ },
1396 /* GLDT_SEL 10 LDT Descriptor */
1397 { (int) ldt, /* segment base address */
1398 sizeof(ldt)-1, /* length - all address space */
1399 SDT_SYSLDT, /* segment type */
1400 SEL_UPL, /* segment descriptor priority level */
1401 1, /* segment descriptor present */
1403 0, /* unused - default 32 vs 16 bit size */
1404 0 /* limit granularity (byte/page units)*/ },
1405 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1406 { (int) ldt, /* segment base address */
1407 (512 * sizeof(union descriptor)-1), /* length */
1408 SDT_SYSLDT, /* segment type */
1409 0, /* segment descriptor priority level */
1410 1, /* segment descriptor present */
1412 0, /* unused - default 32 vs 16 bit size */
1413 0 /* limit granularity (byte/page units)*/ },
1414 /* GPANIC_SEL 12 Panic Tss Descriptor */
1415 { (int) &dblfault_tss, /* segment base address */
1416 sizeof(struct i386tss)-1,/* length - all address space */
1417 SDT_SYS386TSS, /* segment type */
1418 0, /* segment descriptor priority level */
1419 1, /* segment descriptor present */
1421 0, /* unused - default 32 vs 16 bit size */
1422 0 /* limit granularity (byte/page units)*/ },
1423 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1424 { 0, /* segment base address (overwritten) */
1425 0xfffff, /* length */
1426 SDT_MEMERA, /* segment type */
1427 0, /* segment descriptor priority level */
1428 1, /* segment descriptor present */
1430 0, /* default 32 vs 16 bit size */
1431 1 /* limit granularity (byte/page units)*/ },
1432 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1433 { 0, /* segment base address (overwritten) */
1434 0xfffff, /* length */
1435 SDT_MEMERA, /* segment type */
1436 0, /* segment descriptor priority level */
1437 1, /* segment descriptor present */
1439 0, /* default 32 vs 16 bit size */
1440 1 /* limit granularity (byte/page units)*/ },
1441 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1442 { 0, /* segment base address (overwritten) */
1443 0xfffff, /* length */
1444 SDT_MEMRWA, /* segment type */
1445 0, /* segment descriptor priority level */
1446 1, /* segment descriptor present */
1448 1, /* default 32 vs 16 bit size */
1449 1 /* limit granularity (byte/page units)*/ },
1450 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1451 { 0, /* segment base address (overwritten) */
1452 0xfffff, /* length */
1453 SDT_MEMRWA, /* segment type */
1454 0, /* segment descriptor priority level */
1455 1, /* segment descriptor present */
1457 0, /* default 32 vs 16 bit size */
1458 1 /* limit granularity (byte/page units)*/ },
1459 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1460 { 0, /* segment base address (overwritten) */
1461 0xfffff, /* length */
1462 SDT_MEMRWA, /* segment type */
1463 0, /* segment descriptor priority level */
1464 1, /* segment descriptor present */
1466 0, /* default 32 vs 16 bit size */
1467 1 /* limit granularity (byte/page units)*/ },
1468 /* GNDIS_SEL 18 NDIS Descriptor */
1469 { 0x0, /* segment base address */
1471 0, /* segment type */
1472 0, /* segment descriptor priority level */
1473 0, /* segment descriptor present */
1475 0, /* default 32 vs 16 bit size */
1476 0 /* limit granularity (byte/page units)*/ },
1479 static struct soft_segment_descriptor ldt_segs[] = {
1480 /* Null Descriptor - overwritten by call gate */
1481 { 0x0, /* segment base address */
1482 0x0, /* length - all address space */
1483 0, /* segment type */
1484 0, /* segment descriptor priority level */
1485 0, /* segment descriptor present */
1487 0, /* default 32 vs 16 bit size */
1488 0 /* limit granularity (byte/page units)*/ },
1489 /* Null Descriptor - overwritten by call gate */
1490 { 0x0, /* segment base address */
1491 0x0, /* length - all address space */
1492 0, /* segment type */
1493 0, /* segment descriptor priority level */
1494 0, /* segment descriptor present */
1496 0, /* default 32 vs 16 bit size */
1497 0 /* limit granularity (byte/page units)*/ },
1498 /* Null Descriptor - overwritten by call gate */
1499 { 0x0, /* segment base address */
1500 0x0, /* length - all address space */
1501 0, /* segment type */
1502 0, /* segment descriptor priority level */
1503 0, /* segment descriptor present */
1505 0, /* default 32 vs 16 bit size */
1506 0 /* limit granularity (byte/page units)*/ },
1507 /* Code Descriptor for user */
1508 { 0x0, /* segment base address */
1509 0xfffff, /* length - all address space */
1510 SDT_MEMERA, /* segment type */
1511 SEL_UPL, /* segment descriptor priority level */
1512 1, /* segment descriptor present */
1514 1, /* default 32 vs 16 bit size */
1515 1 /* limit granularity (byte/page units)*/ },
1516 /* Null Descriptor - overwritten by call gate */
1517 { 0x0, /* segment base address */
1518 0x0, /* length - all address space */
1519 0, /* segment type */
1520 0, /* segment descriptor priority level */
1521 0, /* segment descriptor present */
1523 0, /* default 32 vs 16 bit size */
1524 0 /* limit granularity (byte/page units)*/ },
1525 /* Data Descriptor for user */
1526 { 0x0, /* segment base address */
1527 0xfffff, /* length - all address space */
1528 SDT_MEMRWA, /* segment type */
1529 SEL_UPL, /* segment descriptor priority level */
1530 1, /* segment descriptor present */
1532 1, /* default 32 vs 16 bit size */
1533 1 /* limit granularity (byte/page units)*/ },
1537 setidt(idx, func, typ, dpl, selec)
1544 struct gate_descriptor *ip;
1547 ip->gd_looffset = (int)func;
1548 ip->gd_selector = selec;
1554 ip->gd_hioffset = ((int)func)>>16 ;
1557 #define IDTVEC(name) __CONCAT(X,name)
1560 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1561 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1562 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1563 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1564 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1568 * Display the index and function name of any IDT entries that don't use
1569 * the default 'rsvd' entry point.
1571 DB_SHOW_COMMAND(idt, db_show_idt)
1573 struct gate_descriptor *ip;
1578 db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
1579 for (idx = 0, quit = 0; idx < NIDT; idx++) {
1580 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1581 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1582 db_printf("%3d\t", idx);
1583 db_printsym(func, DB_STGY_PROC);
1593 struct segment_descriptor *sd;
1594 struct soft_segment_descriptor *ssd;
1596 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1597 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1598 ssd->ssd_type = sd->sd_type;
1599 ssd->ssd_dpl = sd->sd_dpl;
1600 ssd->ssd_p = sd->sd_p;
1601 ssd->ssd_def32 = sd->sd_def32;
1602 ssd->ssd_gran = sd->sd_gran;
1605 #define PHYSMAP_SIZE (2 * 8)
1608 * Populate the (physmap) array with base/bound pairs describing the
1609 * available physical memory in the system, then test this memory and
1610 * build the phys_avail array describing the actually-available memory.
1612 * If we cannot accurately determine the physical memory map, then use
1613 * value from the 0xE801 call, and failing that, the RTC.
1615 * Total memory size may be set by the kernel environment variable
1616 * hw.physmem or the compile-time define MAXMEM.
1618 * XXX first should be vm_paddr_t.
1621 getmemsize(int first)
1623 int i, physmap_idx, pa_indx, da_indx;
1625 u_long physmem_tunable;
1627 struct vm86frame vmf;
1628 struct vm86context vmc;
1629 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1631 struct bios_smap *smap;
1632 quad_t dcons_addr, dcons_size;
1635 if (arch_i386_is_xbox) {
1637 * We queried the memory size before, so chop off 4MB for
1638 * the framebuffer and inform the OS of this.
1641 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
1648 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1649 bzero(&vmf, sizeof(vmf));
1650 bzero(physmap, sizeof(physmap));
1654 * Some newer BIOSes has broken INT 12H implementation which cause
1655 * kernel panic immediately. In this case, we need to scan SMAP
1656 * with INT 15:E820 first, then determine base memory size.
1658 if (hasbrokenint12) {
1663 * Perform "base memory" related probes & setup
1665 vm86_intcall(0x12, &vmf);
1666 basemem = vmf.vmf_ax;
1667 if (basemem > 640) {
1668 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1674 * XXX if biosbasemem is now < 640, there is a `hole'
1675 * between the end of base memory and the start of
1676 * ISA memory. The hole may be empty or it may
1677 * contain BIOS code or data. Map it read/write so
1678 * that the BIOS can write to it. (Memory from 0 to
1679 * the physical end of the kernel is mapped read-only
1680 * to begin with and then parts of it are remapped.
1681 * The parts that aren't remapped form holes that
1682 * remain read-only and are unused by the kernel.
1683 * The base memory area is below the physical end of
1684 * the kernel and right now forms a read-only hole.
1685 * The part of it from PAGE_SIZE to
1686 * (trunc_page(biosbasemem * 1024) - 1) will be
1687 * remapped and used by the kernel later.)
1689 * This code is similar to the code used in
1690 * pmap_mapdev, but since no memory needs to be
1691 * allocated we simply change the mapping.
1693 for (pa = trunc_page(basemem * 1024);
1694 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1695 pmap_kenter(KERNBASE + pa, pa);
1698 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1699 * the vm86 page table so that vm86 can scribble on them using
1700 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1701 * page 0, at least as initialized here?
1703 pte = (pt_entry_t *)vm86paddr;
1704 for (i = basemem / 4; i < 160; i++)
1705 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1709 * map page 1 R/W into the kernel page table so we can use it
1710 * as a buffer. The kernel will unmap this page later.
1712 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
1715 * get memory map with INT 15:E820
1718 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1719 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1724 vmf.vmf_eax = 0xE820;
1725 vmf.vmf_edx = SMAP_SIG;
1726 vmf.vmf_ecx = sizeof(struct bios_smap);
1727 i = vm86_datacall(0x15, &vmf, &vmc);
1728 if (i || vmf.vmf_eax != SMAP_SIG)
1730 if (boothowto & RB_VERBOSE)
1731 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1732 smap->type, smap->base, smap->length);
1734 if (smap->type != 0x01)
1737 if (smap->length == 0)
1741 if (smap->base >= 0xffffffff) {
1742 printf("%uK of memory above 4GB ignored\n",
1743 (u_int)(smap->length / 1024));
1748 for (i = 0; i <= physmap_idx; i += 2) {
1749 if (smap->base < physmap[i + 1]) {
1750 if (boothowto & RB_VERBOSE)
1752 "Overlapping or non-montonic memory region, ignoring second region\n");
1757 if (smap->base == physmap[physmap_idx + 1]) {
1758 physmap[physmap_idx + 1] += smap->length;
1763 if (physmap_idx == PHYSMAP_SIZE) {
1765 "Too many segments in the physical address map, giving up\n");
1768 physmap[physmap_idx] = smap->base;
1769 physmap[physmap_idx + 1] = smap->base + smap->length;
1770 } while (vmf.vmf_ebx != 0);
1773 * Perform "base memory" related probes & setup based on SMAP
1776 for (i = 0; i <= physmap_idx; i += 2) {
1777 if (physmap[i] == 0x00000000) {
1778 basemem = physmap[i + 1] / 1024;
1784 * XXX this function is horribly organized and has to the same
1785 * things that it does above here.
1789 if (basemem > 640) {
1791 "Preposterous BIOS basemem of %uK, truncating to 640K\n",
1797 * Let vm86 scribble on pages between basemem and
1798 * ISA_HOLE_START, as above.
1800 for (pa = trunc_page(basemem * 1024);
1801 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1802 pmap_kenter(KERNBASE + pa, pa);
1803 pte = (pt_entry_t *)vm86paddr;
1804 for (i = basemem / 4; i < 160; i++)
1805 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1808 if (physmap[1] != 0)
1812 * If we failed above, try memory map with INT 15:E801
1814 vmf.vmf_ax = 0xE801;
1815 if (vm86_intcall(0x15, &vmf) == 0) {
1816 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1820 vm86_intcall(0x15, &vmf);
1821 extmem = vmf.vmf_ax;
1824 * Prefer the RTC value for extended memory.
1826 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1831 * Special hack for chipsets that still remap the 384k hole when
1832 * there's 16MB of memory - this really confuses people that
1833 * are trying to use bus mastering ISA controllers with the
1834 * "16MB limit"; they only have 16MB, but the remapping puts
1835 * them beyond the limit.
1837 * If extended memory is between 15-16MB (16-17MB phys address range),
1840 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1844 physmap[1] = basemem * 1024;
1846 physmap[physmap_idx] = 0x100000;
1847 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1851 * Now, physmap contains a map of physical memory.
1855 /* make hole for AP bootstrap code */
1856 physmap[1] = mp_bootaddress(physmap[1]);
1860 * Maxmem isn't the "maximum memory", it's one larger than the
1861 * highest page of the physical address space. It should be
1862 * called something like "Maxphyspage". We may adjust this
1863 * based on ``hw.physmem'' and the results of the memory test.
1865 Maxmem = atop(physmap[physmap_idx + 1]);
1868 Maxmem = MAXMEM / 4;
1871 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1872 Maxmem = atop(physmem_tunable);
1874 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1875 (boothowto & RB_VERBOSE))
1876 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1879 * If Maxmem has been increased beyond what the system has detected,
1880 * extend the last memory segment to the new limit.
1882 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1883 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1885 /* call pmap initialization to make new kernel address space */
1886 pmap_bootstrap(first, 0);
1889 * Size up each available chunk of physical memory.
1891 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1894 phys_avail[pa_indx++] = physmap[0];
1895 phys_avail[pa_indx] = physmap[0];
1896 dump_avail[da_indx] = physmap[0];
1900 * Get dcons buffer address
1902 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1903 getenv_quad("dcons.size", &dcons_size) == 0)
1907 * physmap is in bytes, so when converting to page boundaries,
1908 * round up the start address and round down the end address.
1910 for (i = 0; i <= physmap_idx; i += 2) {
1913 end = ptoa((vm_paddr_t)Maxmem);
1914 if (physmap[i + 1] < end)
1915 end = trunc_page(physmap[i + 1]);
1916 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1917 int tmp, page_bad, full;
1918 int *ptr = (int *)CADDR1;
1922 * block out kernel memory as not available.
1924 if (pa >= KERNLOAD && pa < first)
1928 * block out dcons buffer
1931 && pa >= trunc_page(dcons_addr)
1932 && pa < dcons_addr + dcons_size)
1938 * map page into kernel: valid, read/write,non-cacheable
1940 *pte = pa | PG_V | PG_RW | PG_N;
1945 * Test for alternating 1's and 0's
1947 *(volatile int *)ptr = 0xaaaaaaaa;
1948 if (*(volatile int *)ptr != 0xaaaaaaaa)
1951 * Test for alternating 0's and 1's
1953 *(volatile int *)ptr = 0x55555555;
1954 if (*(volatile int *)ptr != 0x55555555)
1959 *(volatile int *)ptr = 0xffffffff;
1960 if (*(volatile int *)ptr != 0xffffffff)
1965 *(volatile int *)ptr = 0x0;
1966 if (*(volatile int *)ptr != 0x0)
1969 * Restore original value.
1974 * Adjust array of valid/good pages.
1976 if (page_bad == TRUE)
1979 * If this good page is a continuation of the
1980 * previous set of good pages, then just increase
1981 * the end pointer. Otherwise start a new chunk.
1982 * Note that "end" points one higher than end,
1983 * making the range >= start and < end.
1984 * If we're also doing a speculative memory
1985 * test and we at or past the end, bump up Maxmem
1986 * so that we keep going. The first bad page
1987 * will terminate the loop.
1989 if (phys_avail[pa_indx] == pa) {
1990 phys_avail[pa_indx] += PAGE_SIZE;
1993 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1995 "Too many holes in the physical address space, giving up\n");
2000 phys_avail[pa_indx++] = pa; /* start */
2001 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2005 if (dump_avail[da_indx] == pa) {
2006 dump_avail[da_indx] += PAGE_SIZE;
2009 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2013 dump_avail[da_indx++] = pa; /* start */
2014 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2026 * The last chunk must contain at least one page plus the message
2027 * buffer to avoid complicating other code (message buffer address
2028 * calculation, etc.).
2030 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2031 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
2032 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2033 phys_avail[pa_indx--] = 0;
2034 phys_avail[pa_indx--] = 0;
2037 Maxmem = atop(phys_avail[pa_indx]);
2039 /* Trim off space for the message buffer. */
2040 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2042 avail_end = phys_avail[pa_indx];
2049 struct gate_descriptor *gdp;
2050 int gsel_tss, metadata_missing, off, x;
2053 thread0.td_kstack = proc0kstack;
2054 thread0.td_pcb = (struct pcb *)
2055 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2058 * This may be done better later if it gets more high level
2059 * components in it. If so just link td->td_proc here.
2061 proc_linkup(&proc0, &ksegrp0, &thread0);
2063 metadata_missing = 0;
2064 if (bootinfo.bi_modulep) {
2065 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2066 preload_bootstrap_relocate(KERNBASE);
2068 metadata_missing = 1;
2071 kern_envp = static_env;
2072 else if (bootinfo.bi_envp)
2073 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2075 /* Init basic tunables, hz etc */
2079 * Make gdt memory segments. All segments cover the full 4GB
2080 * of address space and permissions are enforced at page level.
2082 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2083 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2084 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2085 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2086 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2087 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2090 pc = &SMP_prvspace[0].pcpu;
2094 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2095 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2096 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2098 for (x = 0; x < NGDT; x++)
2099 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2101 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2102 r_gdt.rd_base = (int) gdt;
2105 pcpu_init(pc, 0, sizeof(struct pcpu));
2106 PCPU_SET(prvspace, pc);
2107 PCPU_SET(curthread, &thread0);
2108 PCPU_SET(curpcb, thread0.td_pcb);
2111 * Initialize mutexes.
2113 * icu_lock: in order to allow an interrupt to occur in a critical
2114 * section, to set pcpu->ipending (etc...) properly, we
2115 * must be able to get the icu lock, so it can't be
2119 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN);
2120 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
2122 /* make ldt memory segments */
2123 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2124 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2125 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2126 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2128 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2130 PCPU_SET(currentldt, _default_ldt);
2133 for (x = 0; x < NIDT; x++)
2134 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2135 GSEL(GCODE_SEL, SEL_KPL));
2136 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2137 GSEL(GCODE_SEL, SEL_KPL));
2138 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2139 GSEL(GCODE_SEL, SEL_KPL));
2140 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2141 GSEL(GCODE_SEL, SEL_KPL));
2142 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2143 GSEL(GCODE_SEL, SEL_KPL));
2144 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2145 GSEL(GCODE_SEL, SEL_KPL));
2146 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2147 GSEL(GCODE_SEL, SEL_KPL));
2148 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2149 GSEL(GCODE_SEL, SEL_KPL));
2150 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2151 , GSEL(GCODE_SEL, SEL_KPL));
2152 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2153 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2154 GSEL(GCODE_SEL, SEL_KPL));
2155 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2156 GSEL(GCODE_SEL, SEL_KPL));
2157 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2158 GSEL(GCODE_SEL, SEL_KPL));
2159 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2160 GSEL(GCODE_SEL, SEL_KPL));
2161 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2162 GSEL(GCODE_SEL, SEL_KPL));
2163 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2164 GSEL(GCODE_SEL, SEL_KPL));
2165 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2166 GSEL(GCODE_SEL, SEL_KPL));
2167 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2168 GSEL(GCODE_SEL, SEL_KPL));
2169 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2170 GSEL(GCODE_SEL, SEL_KPL));
2171 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2172 GSEL(GCODE_SEL, SEL_KPL));
2173 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2174 GSEL(GCODE_SEL, SEL_KPL));
2176 r_idt.rd_limit = sizeof(idt0) - 1;
2177 r_idt.rd_base = (int) idt;
2182 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2183 * This should be 0x10de / 0x02a5.
2185 * This is exactly what Linux does.
2187 outl(0xcf8, 0x80000000);
2188 if (inl(0xcfc) == 0x02a510de) {
2189 arch_i386_is_xbox = 1;
2190 pic16l_setled(XBOX_LED_GREEN);
2193 * We are an XBOX, but we may have either 64MB or 128MB of
2194 * memory. The PCI host bridge should be programmed for this,
2195 * so we just query it.
2197 outl (0xcf8, 0x80000084);
2198 arch_i386_xbox_memsize = (inl (0xcfc) == 0x7FFFFFF) ? 128 : 64;
2203 * Initialize the console before we print anything out.
2207 if (metadata_missing)
2208 printf("WARNING: loader(8) metadata is missing!\n");
2216 ksym_start = bootinfo.bi_symtab;
2217 ksym_end = bootinfo.bi_esymtab;
2223 if (boothowto & RB_KDB)
2224 kdb_enter("Boot flags requested debugger");
2227 finishidentcpu(); /* Final stage of CPU initialization */
2228 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2229 GSEL(GCODE_SEL, SEL_KPL));
2230 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2231 GSEL(GCODE_SEL, SEL_KPL));
2232 initializecpu(); /* Initialize CPU registers */
2234 /* make an initial tss so cpu can get interrupt stack on syscall! */
2235 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2236 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2237 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2238 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2239 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2240 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2241 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2242 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2245 /* pointer to selector slot for %fs/%gs */
2246 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2248 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2249 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2250 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2251 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2253 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2255 dblfault_tss.tss_cr3 = (int)IdlePTD;
2257 dblfault_tss.tss_eip = (int)dblfault_handler;
2258 dblfault_tss.tss_eflags = PSL_KERNEL;
2259 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2260 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2261 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2262 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2263 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2267 init_param2(physmem);
2269 /* now running on new page tables, configured,and u/iom is accessible */
2271 /* Map the message buffer. */
2272 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2273 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2275 msgbufinit(msgbufp, MSGBUF_SIZE);
2277 /* make a call gate to reenter kernel with */
2278 gdp = &ldt[LSYS5CALLS_SEL].gd;
2280 x = (int) &IDTVEC(lcall_syscall);
2281 gdp->gd_looffset = x;
2282 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2284 gdp->gd_type = SDT_SYS386CGT;
2285 gdp->gd_dpl = SEL_UPL;
2287 gdp->gd_hioffset = x >> 16;
2289 /* XXX does this work? */
2291 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2292 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2294 /* transfer to user mode */
2296 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2297 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2299 /* setup proc 0's pcb */
2300 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
2302 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2304 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2306 thread0.td_pcb->pcb_ext = 0;
2307 thread0.td_frame = &proc0_tf;
2311 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2314 pcpu->pc_acpi_id = 0xffffffff;
2318 spinlock_enter(void)
2323 if (td->td_md.md_spinlock_count == 0)
2324 td->td_md.md_saved_flags = intr_disable();
2325 td->td_md.md_spinlock_count++;
2336 td->td_md.md_spinlock_count--;
2337 if (td->td_md.md_spinlock_count == 0)
2338 intr_restore(td->td_md.md_saved_flags);
2341 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2342 static void f00f_hack(void *unused);
2343 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL)
2346 f00f_hack(void *unused)
2348 struct gate_descriptor *new_idt;
2356 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2358 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2360 panic("kmem_alloc returned 0");
2362 /* Put the problematic entry (#6) at the end of the lower page. */
2363 new_idt = (struct gate_descriptor*)
2364 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2365 bcopy(idt, new_idt, sizeof(idt0));
2366 r_idt.rd_base = (u_int)new_idt;
2369 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2370 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2371 panic("vm_map_protect failed");
2373 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2376 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2377 * we want to start a backtrace from the function that caused us to enter
2378 * the debugger. We have the context in the trapframe, but base the trace
2379 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2380 * enough for a backtrace.
2383 makectx(struct trapframe *tf, struct pcb *pcb)
2386 pcb->pcb_edi = tf->tf_edi;
2387 pcb->pcb_esi = tf->tf_esi;
2388 pcb->pcb_ebp = tf->tf_ebp;
2389 pcb->pcb_ebx = tf->tf_ebx;
2390 pcb->pcb_eip = tf->tf_eip;
2391 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2395 ptrace_set_pc(struct thread *td, u_long addr)
2398 td->td_frame->tf_eip = addr;
2403 ptrace_single_step(struct thread *td)
2405 td->td_frame->tf_eflags |= PSL_T;
2410 ptrace_clear_single_step(struct thread *td)
2412 td->td_frame->tf_eflags &= ~PSL_T;
2417 fill_regs(struct thread *td, struct reg *regs)
2420 struct trapframe *tp;
2424 regs->r_fs = tp->tf_fs;
2425 regs->r_es = tp->tf_es;
2426 regs->r_ds = tp->tf_ds;
2427 regs->r_edi = tp->tf_edi;
2428 regs->r_esi = tp->tf_esi;
2429 regs->r_ebp = tp->tf_ebp;
2430 regs->r_ebx = tp->tf_ebx;
2431 regs->r_edx = tp->tf_edx;
2432 regs->r_ecx = tp->tf_ecx;
2433 regs->r_eax = tp->tf_eax;
2434 regs->r_eip = tp->tf_eip;
2435 regs->r_cs = tp->tf_cs;
2436 regs->r_eflags = tp->tf_eflags;
2437 regs->r_esp = tp->tf_esp;
2438 regs->r_ss = tp->tf_ss;
2439 regs->r_gs = pcb->pcb_gs;
2444 set_regs(struct thread *td, struct reg *regs)
2447 struct trapframe *tp;
2450 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2451 !CS_SECURE(regs->r_cs))
2454 tp->tf_fs = regs->r_fs;
2455 tp->tf_es = regs->r_es;
2456 tp->tf_ds = regs->r_ds;
2457 tp->tf_edi = regs->r_edi;
2458 tp->tf_esi = regs->r_esi;
2459 tp->tf_ebp = regs->r_ebp;
2460 tp->tf_ebx = regs->r_ebx;
2461 tp->tf_edx = regs->r_edx;
2462 tp->tf_ecx = regs->r_ecx;
2463 tp->tf_eax = regs->r_eax;
2464 tp->tf_eip = regs->r_eip;
2465 tp->tf_cs = regs->r_cs;
2466 tp->tf_eflags = regs->r_eflags;
2467 tp->tf_esp = regs->r_esp;
2468 tp->tf_ss = regs->r_ss;
2469 pcb->pcb_gs = regs->r_gs;
2473 #ifdef CPU_ENABLE_SSE
2475 fill_fpregs_xmm(sv_xmm, sv_87)
2476 struct savexmm *sv_xmm;
2477 struct save87 *sv_87;
2479 register struct env87 *penv_87 = &sv_87->sv_env;
2480 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2483 bzero(sv_87, sizeof(*sv_87));
2485 /* FPU control/status */
2486 penv_87->en_cw = penv_xmm->en_cw;
2487 penv_87->en_sw = penv_xmm->en_sw;
2488 penv_87->en_tw = penv_xmm->en_tw;
2489 penv_87->en_fip = penv_xmm->en_fip;
2490 penv_87->en_fcs = penv_xmm->en_fcs;
2491 penv_87->en_opcode = penv_xmm->en_opcode;
2492 penv_87->en_foo = penv_xmm->en_foo;
2493 penv_87->en_fos = penv_xmm->en_fos;
2496 for (i = 0; i < 8; ++i)
2497 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2501 set_fpregs_xmm(sv_87, sv_xmm)
2502 struct save87 *sv_87;
2503 struct savexmm *sv_xmm;
2505 register struct env87 *penv_87 = &sv_87->sv_env;
2506 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2509 /* FPU control/status */
2510 penv_xmm->en_cw = penv_87->en_cw;
2511 penv_xmm->en_sw = penv_87->en_sw;
2512 penv_xmm->en_tw = penv_87->en_tw;
2513 penv_xmm->en_fip = penv_87->en_fip;
2514 penv_xmm->en_fcs = penv_87->en_fcs;
2515 penv_xmm->en_opcode = penv_87->en_opcode;
2516 penv_xmm->en_foo = penv_87->en_foo;
2517 penv_xmm->en_fos = penv_87->en_fos;
2520 for (i = 0; i < 8; ++i)
2521 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2523 #endif /* CPU_ENABLE_SSE */
2526 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2528 #ifdef CPU_ENABLE_SSE
2530 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2531 (struct save87 *)fpregs);
2534 #endif /* CPU_ENABLE_SSE */
2535 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2540 set_fpregs(struct thread *td, struct fpreg *fpregs)
2542 #ifdef CPU_ENABLE_SSE
2544 set_fpregs_xmm((struct save87 *)fpregs,
2545 &td->td_pcb->pcb_save.sv_xmm);
2548 #endif /* CPU_ENABLE_SSE */
2549 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2554 * Get machine context.
2557 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2559 struct trapframe *tp;
2563 PROC_LOCK(curthread->td_proc);
2564 mcp->mc_onstack = sigonstack(tp->tf_esp);
2565 PROC_UNLOCK(curthread->td_proc);
2566 mcp->mc_gs = td->td_pcb->pcb_gs;
2567 mcp->mc_fs = tp->tf_fs;
2568 mcp->mc_es = tp->tf_es;
2569 mcp->mc_ds = tp->tf_ds;
2570 mcp->mc_edi = tp->tf_edi;
2571 mcp->mc_esi = tp->tf_esi;
2572 mcp->mc_ebp = tp->tf_ebp;
2573 mcp->mc_isp = tp->tf_isp;
2574 mcp->mc_eflags = tp->tf_eflags;
2575 if (flags & GET_MC_CLEAR_RET) {
2578 mcp->mc_eflags &= ~PSL_C;
2580 mcp->mc_eax = tp->tf_eax;
2581 mcp->mc_edx = tp->tf_edx;
2583 mcp->mc_ebx = tp->tf_ebx;
2584 mcp->mc_ecx = tp->tf_ecx;
2585 mcp->mc_eip = tp->tf_eip;
2586 mcp->mc_cs = tp->tf_cs;
2587 mcp->mc_esp = tp->tf_esp;
2588 mcp->mc_ss = tp->tf_ss;
2589 mcp->mc_len = sizeof(*mcp);
2590 get_fpcontext(td, mcp);
2595 * Set machine context.
2597 * However, we don't set any but the user modifiable flags, and we won't
2598 * touch the cs selector.
2601 set_mcontext(struct thread *td, const mcontext_t *mcp)
2603 struct trapframe *tp;
2607 if (mcp->mc_len != sizeof(*mcp))
2609 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2610 (tp->tf_eflags & ~PSL_USERCHANGE);
2611 if ((ret = set_fpcontext(td, mcp)) == 0) {
2612 tp->tf_fs = mcp->mc_fs;
2613 tp->tf_es = mcp->mc_es;
2614 tp->tf_ds = mcp->mc_ds;
2615 tp->tf_edi = mcp->mc_edi;
2616 tp->tf_esi = mcp->mc_esi;
2617 tp->tf_ebp = mcp->mc_ebp;
2618 tp->tf_ebx = mcp->mc_ebx;
2619 tp->tf_edx = mcp->mc_edx;
2620 tp->tf_ecx = mcp->mc_ecx;
2621 tp->tf_eax = mcp->mc_eax;
2622 tp->tf_eip = mcp->mc_eip;
2623 tp->tf_eflags = eflags;
2624 tp->tf_esp = mcp->mc_esp;
2625 tp->tf_ss = mcp->mc_ss;
2626 td->td_pcb->pcb_gs = mcp->mc_gs;
2633 get_fpcontext(struct thread *td, mcontext_t *mcp)
2636 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2637 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2639 union savefpu *addr;
2642 * XXX mc_fpstate might be misaligned, since its declaration is not
2643 * unportabilized using __attribute__((aligned(16))) like the
2644 * declaration of struct savemm, and anyway, alignment doesn't work
2645 * for auto variables since we don't use gcc's pessimal stack
2646 * alignment. Work around this by abusing the spare fields after
2649 * XXX unpessimize most cases by only aligning when fxsave might be
2650 * called, although this requires knowing too much about
2651 * npxgetregs()'s internals.
2653 addr = (union savefpu *)&mcp->mc_fpstate;
2654 if (td == PCPU_GET(fpcurthread) &&
2655 #ifdef CPU_ENABLE_SSE
2658 ((uintptr_t)(void *)addr & 0xF)) {
2660 addr = (void *)((char *)addr + 4);
2661 while ((uintptr_t)(void *)addr & 0xF);
2663 mcp->mc_ownedfp = npxgetregs(td, addr);
2664 if (addr != (union savefpu *)&mcp->mc_fpstate) {
2665 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2666 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
2668 mcp->mc_fpformat = npxformat();
2673 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2675 union savefpu *addr;
2677 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2679 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2680 mcp->mc_fpformat != _MC_FPFMT_XMM)
2682 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2683 /* We don't care what state is left in the FPU or PCB. */
2685 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2686 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2687 /* XXX align as above. */
2688 addr = (union savefpu *)&mcp->mc_fpstate;
2689 if (td == PCPU_GET(fpcurthread) &&
2690 #ifdef CPU_ENABLE_SSE
2693 ((uintptr_t)(void *)addr & 0xF)) {
2695 addr = (void *)((char *)addr + 4);
2696 while ((uintptr_t)(void *)addr & 0xF);
2697 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
2701 * XXX we violate the dubious requirement that npxsetregs()
2702 * be called with interrupts disabled.
2704 npxsetregs(td, addr);
2707 * Don't bother putting things back where they were in the
2708 * misaligned case, since we know that the caller won't use
2717 fpstate_drop(struct thread *td)
2723 if (PCPU_GET(fpcurthread) == td)
2727 * XXX force a full drop of the npx. The above only drops it if we
2728 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2730 * XXX I don't much like npxgetregs()'s semantics of doing a full
2731 * drop. Dropping only to the pcb matches fnsave's behaviour.
2732 * We only need to drop to !PCB_INITDONE in sendsig(). But
2733 * sendsig() is the only caller of npxgetregs()... perhaps we just
2734 * have too many layers.
2736 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
2741 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2746 dbregs->dr[0] = rdr0();
2747 dbregs->dr[1] = rdr1();
2748 dbregs->dr[2] = rdr2();
2749 dbregs->dr[3] = rdr3();
2750 dbregs->dr[4] = rdr4();
2751 dbregs->dr[5] = rdr5();
2752 dbregs->dr[6] = rdr6();
2753 dbregs->dr[7] = rdr7();
2756 dbregs->dr[0] = pcb->pcb_dr0;
2757 dbregs->dr[1] = pcb->pcb_dr1;
2758 dbregs->dr[2] = pcb->pcb_dr2;
2759 dbregs->dr[3] = pcb->pcb_dr3;
2762 dbregs->dr[6] = pcb->pcb_dr6;
2763 dbregs->dr[7] = pcb->pcb_dr7;
2769 set_dbregs(struct thread *td, struct dbreg *dbregs)
2773 u_int32_t mask1, mask2;
2776 load_dr0(dbregs->dr[0]);
2777 load_dr1(dbregs->dr[1]);
2778 load_dr2(dbregs->dr[2]);
2779 load_dr3(dbregs->dr[3]);
2780 load_dr4(dbregs->dr[4]);
2781 load_dr5(dbregs->dr[5]);
2782 load_dr6(dbregs->dr[6]);
2783 load_dr7(dbregs->dr[7]);
2786 * Don't let an illegal value for dr7 get set. Specifically,
2787 * check for undefined settings. Setting these bit patterns
2788 * result in undefined behaviour and can lead to an unexpected
2791 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2792 i++, mask1 <<= 2, mask2 <<= 2)
2793 if ((dbregs->dr[7] & mask1) == mask2)
2799 * Don't let a process set a breakpoint that is not within the
2800 * process's address space. If a process could do this, it
2801 * could halt the system by setting a breakpoint in the kernel
2802 * (if ddb was enabled). Thus, we need to check to make sure
2803 * that no breakpoints are being enabled for addresses outside
2804 * process's address space.
2806 * XXX - what about when the watched area of the user's
2807 * address space is written into from within the kernel
2808 * ... wouldn't that still cause a breakpoint to be generated
2809 * from within kernel mode?
2812 if (dbregs->dr[7] & 0x3) {
2813 /* dr0 is enabled */
2814 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2818 if (dbregs->dr[7] & (0x3<<2)) {
2819 /* dr1 is enabled */
2820 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2824 if (dbregs->dr[7] & (0x3<<4)) {
2825 /* dr2 is enabled */
2826 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2830 if (dbregs->dr[7] & (0x3<<6)) {
2831 /* dr3 is enabled */
2832 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2836 pcb->pcb_dr0 = dbregs->dr[0];
2837 pcb->pcb_dr1 = dbregs->dr[1];
2838 pcb->pcb_dr2 = dbregs->dr[2];
2839 pcb->pcb_dr3 = dbregs->dr[3];
2840 pcb->pcb_dr6 = dbregs->dr[6];
2841 pcb->pcb_dr7 = dbregs->dr[7];
2843 pcb->pcb_flags |= PCB_DBREGS;
2850 * Return > 0 if a hardware breakpoint has been hit, and the
2851 * breakpoint was in user space. Return 0, otherwise.
2854 user_dbreg_trap(void)
2856 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2857 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2858 int nbp; /* number of breakpoints that triggered */
2859 caddr_t addr[4]; /* breakpoint addresses */
2863 if ((dr7 & 0x000000ff) == 0) {
2865 * all GE and LE bits in the dr7 register are zero,
2866 * thus the trap couldn't have been caused by the
2867 * hardware debug registers
2874 bp = dr6 & 0x0000000f;
2878 * None of the breakpoint bits are set meaning this
2879 * trap was not caused by any of the debug registers
2885 * at least one of the breakpoints were hit, check to see
2886 * which ones and if any of them are user space addresses
2890 addr[nbp++] = (caddr_t)rdr0();
2893 addr[nbp++] = (caddr_t)rdr1();
2896 addr[nbp++] = (caddr_t)rdr2();
2899 addr[nbp++] = (caddr_t)rdr3();
2902 for (i=0; i<nbp; i++) {
2904 (caddr_t)VM_MAXUSER_ADDRESS) {
2906 * addr[i] is in user space
2913 * None of the breakpoints are in user space.
2919 #include <machine/apicvar.h>
2922 * Provide stub functions so that the MADT APIC enumerator in the acpi
2923 * kernel module will link against a kernel without 'device apic'.
2925 * XXX - This is a gross hack.
2928 apic_register_enumerator(struct apic_enumerator *enumerator)
2933 ioapic_create(uintptr_t addr, int32_t id, int intbase)
2939 ioapic_disable_pin(void *cookie, u_int pin)
2945 ioapic_get_vector(void *cookie, u_int pin)
2951 ioapic_register(void *cookie)
2956 ioapic_remap_vector(void *cookie, u_int pin, int vector)
2962 ioapic_set_extint(void *cookie, u_int pin)
2968 ioapic_set_nmi(void *cookie, u_int pin)
2974 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
2980 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
2986 lapic_create(u_int apic_id, int boot_cpu)
2991 lapic_init(uintptr_t addr)
2996 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3002 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3008 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3017 * Provide inb() and outb() as functions. They are normally only
3018 * available as macros calling inlined functions, thus cannot be
3019 * called from the debugger.
3021 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
3027 /* silence compiler warnings */
3029 void outb(u_int, u_char);
3036 * We use %%dx and not %1 here because i/o is done at %dx and not at
3037 * %edx, while gcc generates inferior code (movw instead of movl)
3038 * if we tell it to load (u_short) port.
3040 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
3045 outb(u_int port, u_char data)
3049 * Use an unnecessary assignment to help gcc's register allocator.
3050 * This make a large difference for gcc-1.40 and a tiny difference
3051 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
3052 * best results. gcc-2.6.0 can't handle this.
3055 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));