2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atpic.h"
45 #include "opt_compat.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_mp_watchdog.h"
54 #include "opt_perfmon.h"
55 #include "opt_platform.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/rwlock.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
106 #error KDB must be enabled in order for DDB to work!
109 #include <ddb/db_sym.h>
113 #include <pc98/pc98/pc98_machdep.h>
118 #include <net/netisr.h>
120 #include <machine/bootinfo.h>
121 #include <machine/clock.h>
122 #include <machine/cpu.h>
123 #include <machine/cputypes.h>
124 #include <machine/intr_machdep.h>
126 #include <machine/md_var.h>
127 #include <machine/metadata.h>
128 #include <machine/mp_watchdog.h>
129 #include <machine/pc/bios.h>
130 #include <machine/pcb.h>
131 #include <machine/pcb_ext.h>
132 #include <machine/proc.h>
133 #include <machine/reg.h>
134 #include <machine/sigframe.h>
135 #include <machine/specialreg.h>
136 #include <machine/vm86.h>
137 #include <x86/init.h>
139 #include <machine/perfmon.h>
142 #include <machine/smp.h>
149 #include <x86/apicvar.h>
153 #include <x86/isa/icu.h>
157 #include <machine/xbox.h>
159 int arch_i386_is_xbox = 0;
160 uint32_t arch_i386_xbox_memsize = 0;
163 /* Sanity check for __curthread() */
164 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
166 extern register_t init386(int first);
167 extern void dblfault_handler(void);
169 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
170 #define CPU_ENABLE_SSE
173 static void cpu_startup(void *);
174 static void fpstate_drop(struct thread *td);
175 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
176 char *xfpusave, size_t xfpusave_len);
177 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
178 char *xfpustate, size_t xfpustate_len);
179 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
181 /* Intel ICH registers */
182 #define ICH_PMBASE 0x400
183 #define ICH_SMI_EN ICH_PMBASE + 0x30
185 int _udatasel, _ucodesel;
189 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
190 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
192 static int ispc98 = 1;
193 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
199 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
201 #ifdef COMPAT_FREEBSD4
202 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
209 FEATURE(pae, "Physical Address Extensions");
213 * The number of PHYSMAP entries must be one less than the number of
214 * PHYSSEG entries because the PHYSMAP entry that spans the largest
215 * physical address that is accessible by ISA DMA is split into two
218 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
220 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
221 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
223 /* must be 2 less so 0 0 can signal end of chunks */
224 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
225 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
227 struct kva_md_info kmi;
229 static struct trapframe proc0_tf;
230 struct pcpu __pcpu[MAXCPU];
234 struct mem_range_softc mem_range_softc;
236 /* Default init_ops implementation. */
237 struct init_ops init_ops = {
238 .early_clock_source_init = i8254_init,
239 .early_delay = i8254_delay,
241 .msi_init = msi_init,
254 * On MacBooks, we need to disallow the legacy USB circuit to
255 * generate an SMI# because this can cause several problems,
256 * namely: incorrect CPU frequency detection and failure to
258 * We do this by disabling a bit in the SMI_EN (SMI Control and
259 * Enable register) of the Intel ICH LPC Interface Bridge.
261 sysenv = kern_getenv("smbios.system.product");
262 if (sysenv != NULL) {
263 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
264 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
265 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
266 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
267 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
268 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
269 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
270 strncmp(sysenv, "Macmini1,1", 10) == 0) {
272 printf("Disabling LEGACY_USB_EN bit on "
274 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
281 * Good {morning,afternoon,evening,night}.
285 panicifcpuunsupported();
291 * Display physical memory if SMBIOS reports reasonable amount.
294 sysenv = kern_getenv("smbios.memory.enabled");
295 if (sysenv != NULL) {
296 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
299 if (memsize < ptoa((uintmax_t)vm_cnt.v_free_count))
300 memsize = ptoa((uintmax_t)Maxmem);
301 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
302 realmem = atop(memsize);
305 * Display any holes after the first chunk of extended memory.
310 printf("Physical memory chunk(s):\n");
311 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
314 size = phys_avail[indx + 1] - phys_avail[indx];
316 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
317 (uintmax_t)phys_avail[indx],
318 (uintmax_t)phys_avail[indx + 1] - 1,
319 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
323 vm_ksubmap_init(&kmi);
325 printf("avail memory = %ju (%ju MB)\n",
326 ptoa((uintmax_t)vm_cnt.v_free_count),
327 ptoa((uintmax_t)vm_cnt.v_free_count) / 1048576);
330 * Set up buffers, so they can be used to read disk labels.
333 vm_pager_bufferinit();
338 * Send an interrupt to process.
340 * Stack is set up to allow sigcode stored
341 * at top to call routine, followed by call
342 * to sigreturn routine below. After sigreturn
343 * resets the signal mask, the stack, and the
344 * frame pointer, it returns to the user
349 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
351 struct osigframe sf, *fp;
355 struct trapframe *regs;
361 PROC_LOCK_ASSERT(p, MA_OWNED);
362 sig = ksi->ksi_signo;
364 mtx_assert(&psp->ps_mtx, MA_OWNED);
366 oonstack = sigonstack(regs->tf_esp);
368 /* Allocate space for the signal handler context. */
369 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
370 SIGISMEMBER(psp->ps_sigonstack, sig)) {
371 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
372 td->td_sigstk.ss_size - sizeof(struct osigframe));
373 #if defined(COMPAT_43)
374 td->td_sigstk.ss_flags |= SS_ONSTACK;
377 fp = (struct osigframe *)regs->tf_esp - 1;
379 /* Build the argument list for the signal handler. */
381 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
382 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
383 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
384 /* Signal handler installed with SA_SIGINFO. */
385 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
386 sf.sf_siginfo.si_signo = sig;
387 sf.sf_siginfo.si_code = ksi->ksi_code;
388 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
391 /* Old FreeBSD-style arguments. */
392 sf.sf_arg2 = ksi->ksi_code;
393 sf.sf_addr = (register_t)ksi->ksi_addr;
394 sf.sf_ahu.sf_handler = catcher;
396 mtx_unlock(&psp->ps_mtx);
399 /* Save most if not all of trap frame. */
400 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
401 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
402 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
403 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
404 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
405 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
406 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
407 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
408 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
409 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
410 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
411 sf.sf_siginfo.si_sc.sc_gs = rgs();
412 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
414 /* Build the signal context to be used by osigreturn(). */
415 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
416 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
417 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
418 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
419 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
420 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
421 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
422 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
425 * If we're a vm86 process, we want to save the segment registers.
426 * We also change eflags to be our emulated eflags, not the actual
429 if (regs->tf_eflags & PSL_VM) {
430 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
431 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
432 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
434 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
435 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
436 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
437 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
439 if (vm86->vm86_has_vme == 0)
440 sf.sf_siginfo.si_sc.sc_ps =
441 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
442 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
444 /* See sendsig() for comments. */
445 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
449 * Copy the sigframe out to the user's stack.
451 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
453 printf("process %ld has trashed its stack\n", (long)p->p_pid);
459 regs->tf_esp = (int)fp;
460 if (p->p_sysent->sv_sigcode_base != 0) {
461 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
464 /* a.out sysentvec does not use shared page */
465 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
467 regs->tf_eflags &= ~(PSL_T | PSL_D);
468 regs->tf_cs = _ucodesel;
469 regs->tf_ds = _udatasel;
470 regs->tf_es = _udatasel;
471 regs->tf_fs = _udatasel;
473 regs->tf_ss = _udatasel;
475 mtx_lock(&psp->ps_mtx);
477 #endif /* COMPAT_43 */
479 #ifdef COMPAT_FREEBSD4
481 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
483 struct sigframe4 sf, *sfp;
487 struct trapframe *regs;
493 PROC_LOCK_ASSERT(p, MA_OWNED);
494 sig = ksi->ksi_signo;
496 mtx_assert(&psp->ps_mtx, MA_OWNED);
498 oonstack = sigonstack(regs->tf_esp);
500 /* Save user context. */
501 bzero(&sf, sizeof(sf));
502 sf.sf_uc.uc_sigmask = *mask;
503 sf.sf_uc.uc_stack = td->td_sigstk;
504 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
505 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
506 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
507 sf.sf_uc.uc_mcontext.mc_gs = rgs();
508 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
509 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
510 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
511 bzero(sf.sf_uc.uc_mcontext.__spare__,
512 sizeof(sf.sf_uc.uc_mcontext.__spare__));
513 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
515 /* Allocate space for the signal handler context. */
516 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
517 SIGISMEMBER(psp->ps_sigonstack, sig)) {
518 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
519 td->td_sigstk.ss_size - sizeof(struct sigframe4));
520 #if defined(COMPAT_43)
521 td->td_sigstk.ss_flags |= SS_ONSTACK;
524 sfp = (struct sigframe4 *)regs->tf_esp - 1;
526 /* Build the argument list for the signal handler. */
528 sf.sf_ucontext = (register_t)&sfp->sf_uc;
529 bzero(&sf.sf_si, sizeof(sf.sf_si));
530 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
531 /* Signal handler installed with SA_SIGINFO. */
532 sf.sf_siginfo = (register_t)&sfp->sf_si;
533 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
535 /* Fill in POSIX parts */
536 sf.sf_si.si_signo = sig;
537 sf.sf_si.si_code = ksi->ksi_code;
538 sf.sf_si.si_addr = ksi->ksi_addr;
540 /* Old FreeBSD-style arguments. */
541 sf.sf_siginfo = ksi->ksi_code;
542 sf.sf_addr = (register_t)ksi->ksi_addr;
543 sf.sf_ahu.sf_handler = catcher;
545 mtx_unlock(&psp->ps_mtx);
549 * If we're a vm86 process, we want to save the segment registers.
550 * We also change eflags to be our emulated eflags, not the actual
553 if (regs->tf_eflags & PSL_VM) {
554 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
555 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
557 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
558 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
559 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
560 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
562 if (vm86->vm86_has_vme == 0)
563 sf.sf_uc.uc_mcontext.mc_eflags =
564 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
565 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
568 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
569 * syscalls made by the signal handler. This just avoids
570 * wasting time for our lazy fixup of such faults. PSL_NT
571 * does nothing in vm86 mode, but vm86 programs can set it
572 * almost legitimately in probes for old cpu types.
574 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
578 * Copy the sigframe out to the user's stack.
580 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
582 printf("process %ld has trashed its stack\n", (long)p->p_pid);
588 regs->tf_esp = (int)sfp;
589 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
591 regs->tf_eflags &= ~(PSL_T | PSL_D);
592 regs->tf_cs = _ucodesel;
593 regs->tf_ds = _udatasel;
594 regs->tf_es = _udatasel;
595 regs->tf_fs = _udatasel;
596 regs->tf_ss = _udatasel;
598 mtx_lock(&psp->ps_mtx);
600 #endif /* COMPAT_FREEBSD4 */
603 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
605 struct sigframe sf, *sfp;
610 struct trapframe *regs;
611 struct segment_descriptor *sdp;
619 PROC_LOCK_ASSERT(p, MA_OWNED);
620 sig = ksi->ksi_signo;
622 mtx_assert(&psp->ps_mtx, MA_OWNED);
623 #ifdef COMPAT_FREEBSD4
624 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
625 freebsd4_sendsig(catcher, ksi, mask);
630 if (SIGISMEMBER(psp->ps_osigset, sig)) {
631 osendsig(catcher, ksi, mask);
636 oonstack = sigonstack(regs->tf_esp);
638 #ifdef CPU_ENABLE_SSE
639 if (cpu_max_ext_state_size > sizeof(union savefpu) && use_xsave) {
640 xfpusave_len = cpu_max_ext_state_size - sizeof(union savefpu);
641 xfpusave = __builtin_alloca(xfpusave_len);
650 /* Save user context. */
651 bzero(&sf, sizeof(sf));
652 sf.sf_uc.uc_sigmask = *mask;
653 sf.sf_uc.uc_stack = td->td_sigstk;
654 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
655 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
656 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
657 sf.sf_uc.uc_mcontext.mc_gs = rgs();
658 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
659 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
660 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
663 * Unconditionally fill the fsbase and gsbase into the mcontext.
665 sdp = &td->td_pcb->pcb_fsd;
666 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
668 sdp = &td->td_pcb->pcb_gsd;
669 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
671 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
672 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
673 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
675 /* Allocate space for the signal handler context. */
676 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
677 SIGISMEMBER(psp->ps_sigonstack, sig)) {
678 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
679 #if defined(COMPAT_43)
680 td->td_sigstk.ss_flags |= SS_ONSTACK;
683 sp = (char *)regs->tf_esp - 128;
684 if (xfpusave != NULL) {
686 sp = (char *)((unsigned int)sp & ~0x3F);
687 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
689 sp -= sizeof(struct sigframe);
691 /* Align to 16 bytes. */
692 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
694 /* Translate the signal if appropriate. */
695 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
696 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
698 /* Build the argument list for the signal handler. */
700 sf.sf_ucontext = (register_t)&sfp->sf_uc;
701 bzero(&sf.sf_si, sizeof(sf.sf_si));
702 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
703 /* Signal handler installed with SA_SIGINFO. */
704 sf.sf_siginfo = (register_t)&sfp->sf_si;
705 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
707 /* Fill in POSIX parts */
708 sf.sf_si = ksi->ksi_info;
709 sf.sf_si.si_signo = sig; /* maybe a translated signal */
711 /* Old FreeBSD-style arguments. */
712 sf.sf_siginfo = ksi->ksi_code;
713 sf.sf_addr = (register_t)ksi->ksi_addr;
714 sf.sf_ahu.sf_handler = catcher;
716 mtx_unlock(&psp->ps_mtx);
720 * If we're a vm86 process, we want to save the segment registers.
721 * We also change eflags to be our emulated eflags, not the actual
724 if (regs->tf_eflags & PSL_VM) {
725 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
726 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
728 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
729 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
730 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
731 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
733 if (vm86->vm86_has_vme == 0)
734 sf.sf_uc.uc_mcontext.mc_eflags =
735 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
736 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
739 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
740 * syscalls made by the signal handler. This just avoids
741 * wasting time for our lazy fixup of such faults. PSL_NT
742 * does nothing in vm86 mode, but vm86 programs can set it
743 * almost legitimately in probes for old cpu types.
745 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
749 * Copy the sigframe out to the user's stack.
751 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
752 (xfpusave != NULL && copyout(xfpusave,
753 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
756 printf("process %ld has trashed its stack\n", (long)p->p_pid);
762 regs->tf_esp = (int)sfp;
763 regs->tf_eip = p->p_sysent->sv_sigcode_base;
764 if (regs->tf_eip == 0)
765 regs->tf_eip = p->p_sysent->sv_psstrings - szsigcode;
766 regs->tf_eflags &= ~(PSL_T | PSL_D);
767 regs->tf_cs = _ucodesel;
768 regs->tf_ds = _udatasel;
769 regs->tf_es = _udatasel;
770 regs->tf_fs = _udatasel;
771 regs->tf_ss = _udatasel;
773 mtx_lock(&psp->ps_mtx);
777 * System call to cleanup state after a signal
778 * has been taken. Reset signal mask and
779 * stack state from context left by sendsig (above).
780 * Return to previous pc and psl as specified by
781 * context left by sendsig. Check carefully to
782 * make sure that the user has not modified the
783 * state to gain improper privileges.
791 struct osigreturn_args /* {
792 struct osigcontext *sigcntxp;
795 struct osigcontext sc;
796 struct trapframe *regs;
797 struct osigcontext *scp;
802 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
807 if (eflags & PSL_VM) {
808 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
809 struct vm86_kernel *vm86;
812 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
813 * set up the vm86 area, and we can't enter vm86 mode.
815 if (td->td_pcb->pcb_ext == 0)
817 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
818 if (vm86->vm86_inited == 0)
821 /* Go back to user mode if both flags are set. */
822 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
823 ksiginfo_init_trap(&ksi);
824 ksi.ksi_signo = SIGBUS;
825 ksi.ksi_code = BUS_OBJERR;
826 ksi.ksi_addr = (void *)regs->tf_eip;
827 trapsignal(td, &ksi);
830 if (vm86->vm86_has_vme) {
831 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
832 (eflags & VME_USERCHANGE) | PSL_VM;
834 vm86->vm86_eflags = eflags; /* save VIF, VIP */
835 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
836 (eflags & VM_USERCHANGE) | PSL_VM;
838 tf->tf_vm86_ds = scp->sc_ds;
839 tf->tf_vm86_es = scp->sc_es;
840 tf->tf_vm86_fs = scp->sc_fs;
841 tf->tf_vm86_gs = scp->sc_gs;
842 tf->tf_ds = _udatasel;
843 tf->tf_es = _udatasel;
844 tf->tf_fs = _udatasel;
847 * Don't allow users to change privileged or reserved flags.
849 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
854 * Don't allow users to load a valid privileged %cs. Let the
855 * hardware check for invalid selectors, excess privilege in
856 * other selectors, invalid %eip's and invalid %esp's.
858 if (!CS_SECURE(scp->sc_cs)) {
859 ksiginfo_init_trap(&ksi);
860 ksi.ksi_signo = SIGBUS;
861 ksi.ksi_code = BUS_OBJERR;
862 ksi.ksi_trapno = T_PROTFLT;
863 ksi.ksi_addr = (void *)regs->tf_eip;
864 trapsignal(td, &ksi);
867 regs->tf_ds = scp->sc_ds;
868 regs->tf_es = scp->sc_es;
869 regs->tf_fs = scp->sc_fs;
872 /* Restore remaining registers. */
873 regs->tf_eax = scp->sc_eax;
874 regs->tf_ebx = scp->sc_ebx;
875 regs->tf_ecx = scp->sc_ecx;
876 regs->tf_edx = scp->sc_edx;
877 regs->tf_esi = scp->sc_esi;
878 regs->tf_edi = scp->sc_edi;
879 regs->tf_cs = scp->sc_cs;
880 regs->tf_ss = scp->sc_ss;
881 regs->tf_isp = scp->sc_isp;
882 regs->tf_ebp = scp->sc_fp;
883 regs->tf_esp = scp->sc_sp;
884 regs->tf_eip = scp->sc_pc;
885 regs->tf_eflags = eflags;
887 #if defined(COMPAT_43)
888 if (scp->sc_onstack & 1)
889 td->td_sigstk.ss_flags |= SS_ONSTACK;
891 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
893 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
895 return (EJUSTRETURN);
897 #endif /* COMPAT_43 */
899 #ifdef COMPAT_FREEBSD4
904 freebsd4_sigreturn(td, uap)
906 struct freebsd4_sigreturn_args /* {
907 const ucontext4 *sigcntxp;
911 struct trapframe *regs;
912 struct ucontext4 *ucp;
913 int cs, eflags, error;
916 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
921 eflags = ucp->uc_mcontext.mc_eflags;
922 if (eflags & PSL_VM) {
923 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
924 struct vm86_kernel *vm86;
927 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
928 * set up the vm86 area, and we can't enter vm86 mode.
930 if (td->td_pcb->pcb_ext == 0)
932 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
933 if (vm86->vm86_inited == 0)
936 /* Go back to user mode if both flags are set. */
937 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
938 ksiginfo_init_trap(&ksi);
939 ksi.ksi_signo = SIGBUS;
940 ksi.ksi_code = BUS_OBJERR;
941 ksi.ksi_addr = (void *)regs->tf_eip;
942 trapsignal(td, &ksi);
944 if (vm86->vm86_has_vme) {
945 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
946 (eflags & VME_USERCHANGE) | PSL_VM;
948 vm86->vm86_eflags = eflags; /* save VIF, VIP */
949 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
950 (eflags & VM_USERCHANGE) | PSL_VM;
952 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
953 tf->tf_eflags = eflags;
954 tf->tf_vm86_ds = tf->tf_ds;
955 tf->tf_vm86_es = tf->tf_es;
956 tf->tf_vm86_fs = tf->tf_fs;
957 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
958 tf->tf_ds = _udatasel;
959 tf->tf_es = _udatasel;
960 tf->tf_fs = _udatasel;
963 * Don't allow users to change privileged or reserved flags.
965 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
966 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
967 td->td_proc->p_pid, td->td_name, eflags);
972 * Don't allow users to load a valid privileged %cs. Let the
973 * hardware check for invalid selectors, excess privilege in
974 * other selectors, invalid %eip's and invalid %esp's.
976 cs = ucp->uc_mcontext.mc_cs;
977 if (!CS_SECURE(cs)) {
978 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
979 td->td_proc->p_pid, td->td_name, cs);
980 ksiginfo_init_trap(&ksi);
981 ksi.ksi_signo = SIGBUS;
982 ksi.ksi_code = BUS_OBJERR;
983 ksi.ksi_trapno = T_PROTFLT;
984 ksi.ksi_addr = (void *)regs->tf_eip;
985 trapsignal(td, &ksi);
989 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
992 #if defined(COMPAT_43)
993 if (ucp->uc_mcontext.mc_onstack & 1)
994 td->td_sigstk.ss_flags |= SS_ONSTACK;
996 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
998 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
999 return (EJUSTRETURN);
1001 #endif /* COMPAT_FREEBSD4 */
1007 sys_sigreturn(td, uap)
1009 struct sigreturn_args /* {
1010 const struct __ucontext *sigcntxp;
1015 struct trapframe *regs;
1018 size_t xfpustate_len;
1019 int cs, eflags, error, ret;
1024 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1028 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
1029 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
1030 td->td_name, ucp->uc_mcontext.mc_flags);
1033 regs = td->td_frame;
1034 eflags = ucp->uc_mcontext.mc_eflags;
1035 if (eflags & PSL_VM) {
1036 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1037 struct vm86_kernel *vm86;
1040 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1041 * set up the vm86 area, and we can't enter vm86 mode.
1043 if (td->td_pcb->pcb_ext == 0)
1045 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1046 if (vm86->vm86_inited == 0)
1049 /* Go back to user mode if both flags are set. */
1050 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1051 ksiginfo_init_trap(&ksi);
1052 ksi.ksi_signo = SIGBUS;
1053 ksi.ksi_code = BUS_OBJERR;
1054 ksi.ksi_addr = (void *)regs->tf_eip;
1055 trapsignal(td, &ksi);
1058 if (vm86->vm86_has_vme) {
1059 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1060 (eflags & VME_USERCHANGE) | PSL_VM;
1062 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1063 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1064 (eflags & VM_USERCHANGE) | PSL_VM;
1066 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1067 tf->tf_eflags = eflags;
1068 tf->tf_vm86_ds = tf->tf_ds;
1069 tf->tf_vm86_es = tf->tf_es;
1070 tf->tf_vm86_fs = tf->tf_fs;
1071 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1072 tf->tf_ds = _udatasel;
1073 tf->tf_es = _udatasel;
1074 tf->tf_fs = _udatasel;
1077 * Don't allow users to change privileged or reserved flags.
1079 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
1080 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1081 td->td_proc->p_pid, td->td_name, eflags);
1086 * Don't allow users to load a valid privileged %cs. Let the
1087 * hardware check for invalid selectors, excess privilege in
1088 * other selectors, invalid %eip's and invalid %esp's.
1090 cs = ucp->uc_mcontext.mc_cs;
1091 if (!CS_SECURE(cs)) {
1092 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1093 td->td_proc->p_pid, td->td_name, cs);
1094 ksiginfo_init_trap(&ksi);
1095 ksi.ksi_signo = SIGBUS;
1096 ksi.ksi_code = BUS_OBJERR;
1097 ksi.ksi_trapno = T_PROTFLT;
1098 ksi.ksi_addr = (void *)regs->tf_eip;
1099 trapsignal(td, &ksi);
1103 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
1104 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
1105 if (xfpustate_len > cpu_max_ext_state_size -
1106 sizeof(union savefpu)) {
1108 "pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
1109 p->p_pid, td->td_name, xfpustate_len);
1112 xfpustate = __builtin_alloca(xfpustate_len);
1113 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
1114 xfpustate, xfpustate_len);
1117 "pid %d (%s): sigreturn copying xfpustate failed\n",
1118 p->p_pid, td->td_name);
1125 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate,
1129 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1132 #if defined(COMPAT_43)
1133 if (ucp->uc_mcontext.mc_onstack & 1)
1134 td->td_sigstk.ss_flags |= SS_ONSTACK;
1136 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1139 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1140 return (EJUSTRETURN);
1144 * Reset registers to default values on exec.
1147 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1149 struct trapframe *regs = td->td_frame;
1150 struct pcb *pcb = td->td_pcb;
1152 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1153 pcb->pcb_gs = _udatasel;
1156 mtx_lock_spin(&dt_lock);
1157 if (td->td_proc->p_md.md_ldt)
1160 mtx_unlock_spin(&dt_lock);
1162 bzero((char *)regs, sizeof(struct trapframe));
1163 regs->tf_eip = imgp->entry_addr;
1164 regs->tf_esp = stack;
1165 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1166 regs->tf_ss = _udatasel;
1167 regs->tf_ds = _udatasel;
1168 regs->tf_es = _udatasel;
1169 regs->tf_fs = _udatasel;
1170 regs->tf_cs = _ucodesel;
1172 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1173 regs->tf_ebx = imgp->ps_strings;
1176 * Reset the hardware debug registers if they were in use.
1177 * They won't have any meaning for the newly exec'd process.
1179 if (pcb->pcb_flags & PCB_DBREGS) {
1186 if (pcb == curpcb) {
1188 * Clear the debug registers on the running
1189 * CPU, otherwise they will end up affecting
1190 * the next process we switch to.
1194 pcb->pcb_flags &= ~PCB_DBREGS;
1197 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1200 * Drop the FP state if we hold it, so that the process gets a
1201 * clean FP state if it uses the FPU again.
1206 * XXX - Linux emulator
1207 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1210 td->td_retval[1] = 0;
1221 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1223 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1224 * instructions. We must set the CR0_MP bit and use the CR0_TS
1225 * bit to control the trap, because setting the CR0_EM bit does
1226 * not cause WAIT instructions to trap. It's important to trap
1227 * WAIT instructions - otherwise the "wait" variants of no-wait
1228 * control instructions would degenerate to the "no-wait" variants
1229 * after FP context switches but work correctly otherwise. It's
1230 * particularly important to trap WAITs when there is no NPX -
1231 * otherwise the "wait" variants would always degenerate.
1233 * Try setting CR0_NE to get correct error reporting on 486DX's.
1234 * Setting it should fail or do nothing on lesser processors.
1236 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1241 u_long bootdev; /* not a struct cdev *- encoding is different */
1242 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1243 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1245 static char bootmethod[16] = "BIOS";
1246 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1247 "System firmware boot method");
1250 * Initialize 386 and configure to run kernel
1254 * Initialize segments & interrupt table
1259 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1260 union descriptor ldt[NLDT]; /* local descriptor table */
1261 static struct gate_descriptor idt0[NIDT];
1262 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1263 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1264 struct mtx dt_lock; /* lock for GDT and LDT */
1266 static struct i386tss dblfault_tss;
1267 static char dblfault_stack[PAGE_SIZE];
1269 extern vm_offset_t proc0kstack;
1273 * software prototypes -- in more palatable form.
1275 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1276 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1278 struct soft_segment_descriptor gdt_segs[] = {
1279 /* GNULL_SEL 0 Null Descriptor */
1285 .ssd_xx = 0, .ssd_xx1 = 0,
1288 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1290 .ssd_limit = 0xfffff,
1291 .ssd_type = SDT_MEMRWA,
1294 .ssd_xx = 0, .ssd_xx1 = 0,
1297 /* GUFS_SEL 2 %fs Descriptor for user */
1299 .ssd_limit = 0xfffff,
1300 .ssd_type = SDT_MEMRWA,
1303 .ssd_xx = 0, .ssd_xx1 = 0,
1306 /* GUGS_SEL 3 %gs Descriptor for user */
1308 .ssd_limit = 0xfffff,
1309 .ssd_type = SDT_MEMRWA,
1312 .ssd_xx = 0, .ssd_xx1 = 0,
1315 /* GCODE_SEL 4 Code Descriptor for kernel */
1317 .ssd_limit = 0xfffff,
1318 .ssd_type = SDT_MEMERA,
1321 .ssd_xx = 0, .ssd_xx1 = 0,
1324 /* GDATA_SEL 5 Data Descriptor for kernel */
1326 .ssd_limit = 0xfffff,
1327 .ssd_type = SDT_MEMRWA,
1330 .ssd_xx = 0, .ssd_xx1 = 0,
1333 /* GUCODE_SEL 6 Code Descriptor for user */
1335 .ssd_limit = 0xfffff,
1336 .ssd_type = SDT_MEMERA,
1339 .ssd_xx = 0, .ssd_xx1 = 0,
1342 /* GUDATA_SEL 7 Data Descriptor for user */
1344 .ssd_limit = 0xfffff,
1345 .ssd_type = SDT_MEMRWA,
1348 .ssd_xx = 0, .ssd_xx1 = 0,
1351 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1352 { .ssd_base = 0x400,
1353 .ssd_limit = 0xfffff,
1354 .ssd_type = SDT_MEMRWA,
1357 .ssd_xx = 0, .ssd_xx1 = 0,
1360 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1363 .ssd_limit = sizeof(struct i386tss)-1,
1364 .ssd_type = SDT_SYS386TSS,
1367 .ssd_xx = 0, .ssd_xx1 = 0,
1370 /* GLDT_SEL 10 LDT Descriptor */
1371 { .ssd_base = (int) ldt,
1372 .ssd_limit = sizeof(ldt)-1,
1373 .ssd_type = SDT_SYSLDT,
1376 .ssd_xx = 0, .ssd_xx1 = 0,
1379 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1380 { .ssd_base = (int) ldt,
1381 .ssd_limit = (512 * sizeof(union descriptor)-1),
1382 .ssd_type = SDT_SYSLDT,
1385 .ssd_xx = 0, .ssd_xx1 = 0,
1388 /* GPANIC_SEL 12 Panic Tss Descriptor */
1389 { .ssd_base = (int) &dblfault_tss,
1390 .ssd_limit = sizeof(struct i386tss)-1,
1391 .ssd_type = SDT_SYS386TSS,
1394 .ssd_xx = 0, .ssd_xx1 = 0,
1397 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1399 .ssd_limit = 0xfffff,
1400 .ssd_type = SDT_MEMERA,
1403 .ssd_xx = 0, .ssd_xx1 = 0,
1406 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1408 .ssd_limit = 0xfffff,
1409 .ssd_type = SDT_MEMERA,
1412 .ssd_xx = 0, .ssd_xx1 = 0,
1415 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1417 .ssd_limit = 0xfffff,
1418 .ssd_type = SDT_MEMRWA,
1421 .ssd_xx = 0, .ssd_xx1 = 0,
1424 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1426 .ssd_limit = 0xfffff,
1427 .ssd_type = SDT_MEMRWA,
1430 .ssd_xx = 0, .ssd_xx1 = 0,
1433 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1435 .ssd_limit = 0xfffff,
1436 .ssd_type = SDT_MEMRWA,
1439 .ssd_xx = 0, .ssd_xx1 = 0,
1442 /* GNDIS_SEL 18 NDIS Descriptor */
1448 .ssd_xx = 0, .ssd_xx1 = 0,
1453 static struct soft_segment_descriptor ldt_segs[] = {
1454 /* Null Descriptor - overwritten by call gate */
1460 .ssd_xx = 0, .ssd_xx1 = 0,
1463 /* Null Descriptor - overwritten by call gate */
1469 .ssd_xx = 0, .ssd_xx1 = 0,
1472 /* Null Descriptor - overwritten by call gate */
1478 .ssd_xx = 0, .ssd_xx1 = 0,
1481 /* Code Descriptor for user */
1483 .ssd_limit = 0xfffff,
1484 .ssd_type = SDT_MEMERA,
1487 .ssd_xx = 0, .ssd_xx1 = 0,
1490 /* Null Descriptor - overwritten by call gate */
1496 .ssd_xx = 0, .ssd_xx1 = 0,
1499 /* Data Descriptor for user */
1501 .ssd_limit = 0xfffff,
1502 .ssd_type = SDT_MEMRWA,
1505 .ssd_xx = 0, .ssd_xx1 = 0,
1511 setidt(idx, func, typ, dpl, selec)
1518 struct gate_descriptor *ip;
1521 ip->gd_looffset = (int)func;
1522 ip->gd_selector = selec;
1528 ip->gd_hioffset = ((int)func)>>16 ;
1532 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1533 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1534 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1535 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1537 #ifdef KDTRACE_HOOKS
1541 IDTVEC(xen_intr_upcall),
1543 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1547 * Display the index and function name of any IDT entries that don't use
1548 * the default 'rsvd' entry point.
1550 DB_SHOW_COMMAND(idt, db_show_idt)
1552 struct gate_descriptor *ip;
1557 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1558 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1559 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1560 db_printf("%3d\t", idx);
1561 db_printsym(func, DB_STGY_PROC);
1568 /* Show privileged registers. */
1569 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1571 uint64_t idtr, gdtr;
1574 db_printf("idtr\t0x%08x/%04x\n",
1575 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1577 db_printf("gdtr\t0x%08x/%04x\n",
1578 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1579 db_printf("ldtr\t0x%04x\n", rldt());
1580 db_printf("tr\t0x%04x\n", rtr());
1581 db_printf("cr0\t0x%08x\n", rcr0());
1582 db_printf("cr2\t0x%08x\n", rcr2());
1583 db_printf("cr3\t0x%08x\n", rcr3());
1584 db_printf("cr4\t0x%08x\n", rcr4());
1585 if (rcr4() & CR4_XSAVE)
1586 db_printf("xcr0\t0x%016llx\n", rxcr(0));
1587 if (amd_feature & (AMDID_NX | AMDID_LM))
1588 db_printf("EFER\t0x%016llx\n", rdmsr(MSR_EFER));
1589 if (cpu_feature2 & (CPUID2_VMX | CPUID2_SMX))
1590 db_printf("FEATURES_CTL\t0x%016llx\n",
1591 rdmsr(MSR_IA32_FEATURE_CONTROL));
1592 if ((cpu_vendor_id == CPU_VENDOR_INTEL ||
1593 cpu_vendor_id == CPU_VENDOR_AMD) && CPUID_TO_FAMILY(cpu_id) >= 6)
1594 db_printf("DEBUG_CTL\t0x%016llx\n", rdmsr(MSR_DEBUGCTLMSR));
1595 if (cpu_feature & CPUID_PAT)
1596 db_printf("PAT\t0x%016llx\n", rdmsr(MSR_PAT));
1599 DB_SHOW_COMMAND(dbregs, db_show_dbregs)
1602 db_printf("dr0\t0x%08x\n", rdr0());
1603 db_printf("dr1\t0x%08x\n", rdr1());
1604 db_printf("dr2\t0x%08x\n", rdr2());
1605 db_printf("dr3\t0x%08x\n", rdr3());
1606 db_printf("dr6\t0x%08x\n", rdr6());
1607 db_printf("dr7\t0x%08x\n", rdr7());
1613 struct segment_descriptor *sd;
1614 struct soft_segment_descriptor *ssd;
1616 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1617 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1618 ssd->ssd_type = sd->sd_type;
1619 ssd->ssd_dpl = sd->sd_dpl;
1620 ssd->ssd_p = sd->sd_p;
1621 ssd->ssd_def32 = sd->sd_def32;
1622 ssd->ssd_gran = sd->sd_gran;
1627 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1630 int i, insert_idx, physmap_idx;
1632 physmap_idx = *physmap_idxp;
1638 if (base > 0xffffffff) {
1639 printf("%uK of memory above 4GB ignored\n",
1640 (u_int)(length / 1024));
1646 * Find insertion point while checking for overlap. Start off by
1647 * assuming the new entry will be added to the end.
1649 insert_idx = physmap_idx + 2;
1650 for (i = 0; i <= physmap_idx; i += 2) {
1651 if (base < physmap[i + 1]) {
1652 if (base + length <= physmap[i]) {
1656 if (boothowto & RB_VERBOSE)
1658 "Overlapping memory regions, ignoring second region\n");
1663 /* See if we can prepend to the next entry. */
1664 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1665 physmap[insert_idx] = base;
1669 /* See if we can append to the previous entry. */
1670 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1671 physmap[insert_idx - 1] += length;
1676 *physmap_idxp = physmap_idx;
1677 if (physmap_idx == PHYSMAP_SIZE) {
1679 "Too many segments in the physical address map, giving up\n");
1684 * Move the last 'N' entries down to make room for the new
1687 for (i = physmap_idx; i > insert_idx; i -= 2) {
1688 physmap[i] = physmap[i - 2];
1689 physmap[i + 1] = physmap[i - 1];
1692 /* Insert the new entry. */
1693 physmap[insert_idx] = base;
1694 physmap[insert_idx + 1] = base + length;
1699 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1701 if (boothowto & RB_VERBOSE)
1702 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1703 smap->type, smap->base, smap->length);
1705 if (smap->type != SMAP_TYPE_MEMORY)
1708 return (add_physmap_entry(smap->base, smap->length, physmap,
1713 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
1716 struct bios_smap *smap, *smapend;
1719 * Memory map from INT 15:E820.
1721 * subr_module.c says:
1722 * "Consumer may safely assume that size value precedes data."
1723 * ie: an int32_t immediately precedes SMAP.
1725 smapsize = *((u_int32_t *)smapbase - 1);
1726 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1728 for (smap = smapbase; smap < smapend; smap++)
1729 if (!add_smap_entry(smap, physmap, physmap_idxp))
1741 if (basemem > 640) {
1742 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1748 * XXX if biosbasemem is now < 640, there is a `hole'
1749 * between the end of base memory and the start of
1750 * ISA memory. The hole may be empty or it may
1751 * contain BIOS code or data. Map it read/write so
1752 * that the BIOS can write to it. (Memory from 0 to
1753 * the physical end of the kernel is mapped read-only
1754 * to begin with and then parts of it are remapped.
1755 * The parts that aren't remapped form holes that
1756 * remain read-only and are unused by the kernel.
1757 * The base memory area is below the physical end of
1758 * the kernel and right now forms a read-only hole.
1759 * The part of it from PAGE_SIZE to
1760 * (trunc_page(biosbasemem * 1024) - 1) will be
1761 * remapped and used by the kernel later.)
1763 * This code is similar to the code used in
1764 * pmap_mapdev, but since no memory needs to be
1765 * allocated we simply change the mapping.
1767 for (pa = trunc_page(basemem * 1024);
1768 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1769 pmap_kenter(KERNBASE + pa, pa);
1772 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1773 * the vm86 page table so that vm86 can scribble on them using
1774 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1775 * page 0, at least as initialized here?
1777 pte = (pt_entry_t *)vm86paddr;
1778 for (i = basemem / 4; i < 160; i++)
1779 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1783 * Populate the (physmap) array with base/bound pairs describing the
1784 * available physical memory in the system, then test this memory and
1785 * build the phys_avail array describing the actually-available memory.
1787 * If we cannot accurately determine the physical memory map, then use
1788 * value from the 0xE801 call, and failing that, the RTC.
1790 * Total memory size may be set by the kernel environment variable
1791 * hw.physmem or the compile-time define MAXMEM.
1793 * XXX first should be vm_paddr_t.
1797 getmemsize(int first)
1799 int off, physmap_idx, pa_indx, da_indx;
1800 u_long physmem_tunable, memtest;
1801 vm_paddr_t physmap[PHYSMAP_SIZE];
1803 quad_t dcons_addr, dcons_size;
1810 bzero(physmap, sizeof(physmap));
1812 /* XXX - some of EPSON machines can't use PG_N */
1814 if (pc98_machine_type & M_EPSON_PC98) {
1815 switch (epson_machine_id) {
1819 case EPSON_PC486_HX:
1820 case EPSON_PC486_HG:
1821 case EPSON_PC486_HA:
1827 under16 = pc98_getmemsize(&basemem, &extmem);
1831 physmap[1] = basemem * 1024;
1833 physmap[physmap_idx] = 0x100000;
1834 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1837 * Now, physmap contains a map of physical memory.
1841 /* make hole for AP bootstrap code */
1842 physmap[1] = mp_bootaddress(physmap[1]);
1846 * Maxmem isn't the "maximum memory", it's one larger than the
1847 * highest page of the physical address space. It should be
1848 * called something like "Maxphyspage". We may adjust this
1849 * based on ``hw.physmem'' and the results of the memory test.
1851 Maxmem = atop(physmap[physmap_idx + 1]);
1854 Maxmem = MAXMEM / 4;
1857 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1858 Maxmem = atop(physmem_tunable);
1861 * By default keep the memtest enabled. Use a general name so that
1862 * one could eventually do more with the code than just disable it.
1865 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1867 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1868 (boothowto & RB_VERBOSE))
1869 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1872 * If Maxmem has been increased beyond what the system has detected,
1873 * extend the last memory segment to the new limit.
1875 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1876 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1879 * We need to divide chunk if Maxmem is larger than 16MB and
1880 * under 16MB area is not full of memory.
1881 * (1) system area (15-16MB region) is cut off
1882 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1884 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1885 /* 15M - 16M region is cut off, so need to divide chunk */
1886 physmap[physmap_idx + 1] = under16 * 1024;
1888 physmap[physmap_idx] = 0x1000000;
1889 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1892 /* call pmap initialization to make new kernel address space */
1893 pmap_bootstrap(first);
1896 * Size up each available chunk of physical memory.
1898 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1901 phys_avail[pa_indx++] = physmap[0];
1902 phys_avail[pa_indx] = physmap[0];
1903 dump_avail[da_indx] = physmap[0];
1907 * Get dcons buffer address
1909 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1910 getenv_quad("dcons.size", &dcons_size) == 0)
1914 * physmap is in bytes, so when converting to page boundaries,
1915 * round up the start address and round down the end address.
1917 for (i = 0; i <= physmap_idx; i += 2) {
1920 end = ptoa((vm_paddr_t)Maxmem);
1921 if (physmap[i + 1] < end)
1922 end = trunc_page(physmap[i + 1]);
1923 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1924 int tmp, page_bad, full;
1925 int *ptr = (int *)CADDR3;
1929 * block out kernel memory as not available.
1931 if (pa >= KERNLOAD && pa < first)
1935 * block out dcons buffer
1938 && pa >= trunc_page(dcons_addr)
1939 && pa < dcons_addr + dcons_size)
1947 * map page into kernel: valid, read/write,non-cacheable
1949 *pte = pa | PG_V | PG_RW | pg_n;
1954 * Test for alternating 1's and 0's
1956 *(volatile int *)ptr = 0xaaaaaaaa;
1957 if (*(volatile int *)ptr != 0xaaaaaaaa)
1960 * Test for alternating 0's and 1's
1962 *(volatile int *)ptr = 0x55555555;
1963 if (*(volatile int *)ptr != 0x55555555)
1968 *(volatile int *)ptr = 0xffffffff;
1969 if (*(volatile int *)ptr != 0xffffffff)
1974 *(volatile int *)ptr = 0x0;
1975 if (*(volatile int *)ptr != 0x0)
1978 * Restore original value.
1984 * Adjust array of valid/good pages.
1986 if (page_bad == TRUE)
1989 * If this good page is a continuation of the
1990 * previous set of good pages, then just increase
1991 * the end pointer. Otherwise start a new chunk.
1992 * Note that "end" points one higher than end,
1993 * making the range >= start and < end.
1994 * If we're also doing a speculative memory
1995 * test and we at or past the end, bump up Maxmem
1996 * so that we keep going. The first bad page
1997 * will terminate the loop.
1999 if (phys_avail[pa_indx] == pa) {
2000 phys_avail[pa_indx] += PAGE_SIZE;
2003 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2005 "Too many holes in the physical address space, giving up\n");
2010 phys_avail[pa_indx++] = pa; /* start */
2011 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2015 if (dump_avail[da_indx] == pa) {
2016 dump_avail[da_indx] += PAGE_SIZE;
2019 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2023 dump_avail[da_indx++] = pa; /* start */
2024 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2036 * The last chunk must contain at least one page plus the message
2037 * buffer to avoid complicating other code (message buffer address
2038 * calculation, etc.).
2040 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2041 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2042 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2043 phys_avail[pa_indx--] = 0;
2044 phys_avail[pa_indx--] = 0;
2047 Maxmem = atop(phys_avail[pa_indx]);
2049 /* Trim off space for the message buffer. */
2050 phys_avail[pa_indx] -= round_page(msgbufsize);
2052 /* Map the message buffer. */
2053 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2054 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2059 getmemsize(int first)
2061 int has_smap, off, physmap_idx, pa_indx, da_indx;
2063 vm_paddr_t physmap[PHYSMAP_SIZE];
2065 quad_t dcons_addr, dcons_size, physmem_tunable;
2066 int hasbrokenint12, i, res;
2068 struct vm86frame vmf;
2069 struct vm86context vmc;
2071 struct bios_smap *smap, *smapbase;
2076 if (arch_i386_is_xbox) {
2078 * We queried the memory size before, so chop off 4MB for
2079 * the framebuffer and inform the OS of this.
2082 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2087 bzero(&vmf, sizeof(vmf));
2088 bzero(physmap, sizeof(physmap));
2092 * Check if the loader supplied an SMAP memory map. If so,
2093 * use that and do not make any VM86 calls.
2097 kmdp = preload_search_by_type("elf kernel");
2099 kmdp = preload_search_by_type("elf32 kernel");
2101 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2102 MODINFO_METADATA | MODINFOMD_SMAP);
2103 if (smapbase != NULL) {
2104 add_smap_entries(smapbase, physmap, &physmap_idx);
2110 * Some newer BIOSes have a broken INT 12H implementation
2111 * which causes a kernel panic immediately. In this case, we
2112 * need use the SMAP to determine the base memory size.
2115 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2116 if (hasbrokenint12 == 0) {
2117 /* Use INT12 to determine base memory size. */
2118 vm86_intcall(0x12, &vmf);
2119 basemem = vmf.vmf_ax;
2124 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2125 * the kernel page table so we can use it as a buffer. The
2126 * kernel will unmap this page later.
2128 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2130 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2131 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2132 KASSERT(res != 0, ("vm86_getptr() failed: address not found"));
2136 vmf.vmf_eax = 0xE820;
2137 vmf.vmf_edx = SMAP_SIG;
2138 vmf.vmf_ecx = sizeof(struct bios_smap);
2139 i = vm86_datacall(0x15, &vmf, &vmc);
2140 if (i || vmf.vmf_eax != SMAP_SIG)
2143 if (!add_smap_entry(smap, physmap, &physmap_idx))
2145 } while (vmf.vmf_ebx != 0);
2149 * If we didn't fetch the "base memory" size from INT12,
2150 * figure it out from the SMAP (or just guess).
2153 for (i = 0; i <= physmap_idx; i += 2) {
2154 if (physmap[i] == 0x00000000) {
2155 basemem = physmap[i + 1] / 1024;
2160 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2166 if (physmap[1] != 0)
2170 * If we failed to find an SMAP, figure out the extended
2171 * memory size. We will then build a simple memory map with
2172 * two segments, one for "base memory" and the second for
2173 * "extended memory". Note that "extended memory" starts at a
2174 * physical address of 1MB and that both basemem and extmem
2175 * are in units of 1KB.
2177 * First, try to fetch the extended memory size via INT 15:E801.
2179 vmf.vmf_ax = 0xE801;
2180 if (vm86_intcall(0x15, &vmf) == 0) {
2181 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2184 * If INT15:E801 fails, this is our last ditch effort
2185 * to determine the extended memory size. Currently
2186 * we prefer the RTC value over INT15:88.
2190 vm86_intcall(0x15, &vmf);
2191 extmem = vmf.vmf_ax;
2193 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2198 * Special hack for chipsets that still remap the 384k hole when
2199 * there's 16MB of memory - this really confuses people that
2200 * are trying to use bus mastering ISA controllers with the
2201 * "16MB limit"; they only have 16MB, but the remapping puts
2202 * them beyond the limit.
2204 * If extended memory is between 15-16MB (16-17MB phys address range),
2207 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2211 physmap[1] = basemem * 1024;
2213 physmap[physmap_idx] = 0x100000;
2214 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2218 * Now, physmap contains a map of physical memory.
2222 /* make hole for AP bootstrap code */
2223 physmap[1] = mp_bootaddress(physmap[1]);
2227 * Maxmem isn't the "maximum memory", it's one larger than the
2228 * highest page of the physical address space. It should be
2229 * called something like "Maxphyspage". We may adjust this
2230 * based on ``hw.physmem'' and the results of the memory test.
2232 Maxmem = atop(physmap[physmap_idx + 1]);
2235 Maxmem = MAXMEM / 4;
2238 if (TUNABLE_QUAD_FETCH("hw.physmem", &physmem_tunable))
2239 Maxmem = atop(physmem_tunable);
2242 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2243 * the amount of memory in the system.
2245 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2246 Maxmem = atop(physmap[physmap_idx + 1]);
2249 * By default enable the memory test on real hardware, and disable
2250 * it if we appear to be running in a VM. This avoids touching all
2251 * pages unnecessarily, which doesn't matter on real hardware but is
2252 * bad for shared VM hosts. Use a general name so that
2253 * one could eventually do more with the code than just disable it.
2255 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2256 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2258 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2259 (boothowto & RB_VERBOSE))
2260 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2263 * If Maxmem has been increased beyond what the system has detected,
2264 * extend the last memory segment to the new limit.
2266 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2267 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2269 /* call pmap initialization to make new kernel address space */
2270 pmap_bootstrap(first);
2273 * Size up each available chunk of physical memory.
2275 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2278 phys_avail[pa_indx++] = physmap[0];
2279 phys_avail[pa_indx] = physmap[0];
2280 dump_avail[da_indx] = physmap[0];
2284 * Get dcons buffer address
2286 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2287 getenv_quad("dcons.size", &dcons_size) == 0)
2291 * physmap is in bytes, so when converting to page boundaries,
2292 * round up the start address and round down the end address.
2294 for (i = 0; i <= physmap_idx; i += 2) {
2297 end = ptoa((vm_paddr_t)Maxmem);
2298 if (physmap[i + 1] < end)
2299 end = trunc_page(physmap[i + 1]);
2300 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2301 int tmp, page_bad, full;
2302 int *ptr = (int *)CADDR3;
2306 * block out kernel memory as not available.
2308 if (pa >= KERNLOAD && pa < first)
2312 * block out dcons buffer
2315 && pa >= trunc_page(dcons_addr)
2316 && pa < dcons_addr + dcons_size)
2324 * map page into kernel: valid, read/write,non-cacheable
2326 *pte = pa | PG_V | PG_RW | PG_N;
2331 * Test for alternating 1's and 0's
2333 *(volatile int *)ptr = 0xaaaaaaaa;
2334 if (*(volatile int *)ptr != 0xaaaaaaaa)
2337 * Test for alternating 0's and 1's
2339 *(volatile int *)ptr = 0x55555555;
2340 if (*(volatile int *)ptr != 0x55555555)
2345 *(volatile int *)ptr = 0xffffffff;
2346 if (*(volatile int *)ptr != 0xffffffff)
2351 *(volatile int *)ptr = 0x0;
2352 if (*(volatile int *)ptr != 0x0)
2355 * Restore original value.
2361 * Adjust array of valid/good pages.
2363 if (page_bad == TRUE)
2366 * If this good page is a continuation of the
2367 * previous set of good pages, then just increase
2368 * the end pointer. Otherwise start a new chunk.
2369 * Note that "end" points one higher than end,
2370 * making the range >= start and < end.
2371 * If we're also doing a speculative memory
2372 * test and we at or past the end, bump up Maxmem
2373 * so that we keep going. The first bad page
2374 * will terminate the loop.
2376 if (phys_avail[pa_indx] == pa) {
2377 phys_avail[pa_indx] += PAGE_SIZE;
2380 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2382 "Too many holes in the physical address space, giving up\n");
2387 phys_avail[pa_indx++] = pa; /* start */
2388 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2392 if (dump_avail[da_indx] == pa) {
2393 dump_avail[da_indx] += PAGE_SIZE;
2396 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2400 dump_avail[da_indx++] = pa; /* start */
2401 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2413 * The last chunk must contain at least one page plus the message
2414 * buffer to avoid complicating other code (message buffer address
2415 * calculation, etc.).
2417 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2418 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2419 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2420 phys_avail[pa_indx--] = 0;
2421 phys_avail[pa_indx--] = 0;
2424 Maxmem = atop(phys_avail[pa_indx]);
2426 /* Trim off space for the message buffer. */
2427 phys_avail[pa_indx] -= round_page(msgbufsize);
2429 /* Map the message buffer. */
2430 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2431 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2440 struct gate_descriptor *gdp;
2441 int gsel_tss, metadata_missing, x, pa;
2443 #ifdef CPU_ENABLE_SSE
2444 struct xstate_hdr *xhdr;
2447 thread0.td_kstack = proc0kstack;
2448 thread0.td_kstack_pages = KSTACK_PAGES;
2451 * This may be done better later if it gets more high level
2452 * components in it. If so just link td->td_proc here.
2454 proc_linkup0(&proc0, &thread0);
2463 metadata_missing = 0;
2464 if (bootinfo.bi_modulep) {
2465 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2466 preload_bootstrap_relocate(KERNBASE);
2468 metadata_missing = 1;
2471 kern_envp = static_env;
2472 else if (bootinfo.bi_envp)
2473 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2475 /* Init basic tunables, hz etc */
2479 * Make gdt memory segments. All segments cover the full 4GB
2480 * of address space and permissions are enforced at page level.
2482 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2483 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2484 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2485 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2486 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2487 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2490 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2491 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2492 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2494 for (x = 0; x < NGDT; x++)
2495 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2497 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2498 r_gdt.rd_base = (int) gdt;
2499 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2502 pcpu_init(pc, 0, sizeof(struct pcpu));
2503 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2504 pmap_kenter(pa + KERNBASE, pa);
2505 dpcpu_init((void *)(first + KERNBASE), 0);
2506 first += DPCPU_SIZE;
2507 PCPU_SET(prvspace, pc);
2508 PCPU_SET(curthread, &thread0);
2511 * Initialize mutexes.
2513 * icu_lock: in order to allow an interrupt to occur in a critical
2514 * section, to set pcpu->ipending (etc...) properly, we
2515 * must be able to get the icu lock, so it can't be
2519 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2521 /* make ldt memory segments */
2522 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2523 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2524 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2525 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2527 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2529 PCPU_SET(currentldt, _default_ldt);
2532 for (x = 0; x < NIDT; x++)
2533 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2534 GSEL(GCODE_SEL, SEL_KPL));
2535 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2536 GSEL(GCODE_SEL, SEL_KPL));
2537 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2538 GSEL(GCODE_SEL, SEL_KPL));
2539 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2540 GSEL(GCODE_SEL, SEL_KPL));
2541 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2542 GSEL(GCODE_SEL, SEL_KPL));
2543 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2544 GSEL(GCODE_SEL, SEL_KPL));
2545 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2546 GSEL(GCODE_SEL, SEL_KPL));
2547 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2548 GSEL(GCODE_SEL, SEL_KPL));
2549 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2550 , GSEL(GCODE_SEL, SEL_KPL));
2551 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2552 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2553 GSEL(GCODE_SEL, SEL_KPL));
2554 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2555 GSEL(GCODE_SEL, SEL_KPL));
2556 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2557 GSEL(GCODE_SEL, SEL_KPL));
2558 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2559 GSEL(GCODE_SEL, SEL_KPL));
2560 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2561 GSEL(GCODE_SEL, SEL_KPL));
2562 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2563 GSEL(GCODE_SEL, SEL_KPL));
2564 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2565 GSEL(GCODE_SEL, SEL_KPL));
2566 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2567 GSEL(GCODE_SEL, SEL_KPL));
2568 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2569 GSEL(GCODE_SEL, SEL_KPL));
2570 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2571 GSEL(GCODE_SEL, SEL_KPL));
2572 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2573 GSEL(GCODE_SEL, SEL_KPL));
2574 #ifdef KDTRACE_HOOKS
2575 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2576 GSEL(GCODE_SEL, SEL_KPL));
2579 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYS386IGT, SEL_UPL,
2580 GSEL(GCODE_SEL, SEL_KPL));
2583 r_idt.rd_limit = sizeof(idt0) - 1;
2584 r_idt.rd_base = (int) idt;
2589 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2590 * This should be 0x10de / 0x02a5.
2592 * This is exactly what Linux does.
2594 outl(0xcf8, 0x80000000);
2595 if (inl(0xcfc) == 0x02a510de) {
2596 arch_i386_is_xbox = 1;
2597 pic16l_setled(XBOX_LED_GREEN);
2600 * We are an XBOX, but we may have either 64MB or 128MB of
2601 * memory. The PCI host bridge should be programmed for this,
2602 * so we just query it.
2604 outl(0xcf8, 0x80000084);
2605 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2610 * Initialize the clock before the console so that console
2611 * initialization can use DELAY().
2616 * Initialize the console before we print anything out.
2620 if (metadata_missing)
2621 printf("WARNING: loader(8) metadata is missing!\n");
2630 /* Reset and mask the atpics and leave them shut down. */
2634 * Point the ICU spurious interrupt vectors at the APIC spurious
2635 * interrupt handler.
2637 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2638 GSEL(GCODE_SEL, SEL_KPL));
2639 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2640 GSEL(GCODE_SEL, SEL_KPL));
2645 db_fetch_ksymtab(bootinfo.bi_symtab, bootinfo.bi_esymtab);
2651 if (boothowto & RB_KDB)
2652 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2655 finishidentcpu(); /* Final stage of CPU initialization */
2656 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2657 GSEL(GCODE_SEL, SEL_KPL));
2658 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2659 GSEL(GCODE_SEL, SEL_KPL));
2660 initializecpu(); /* Initialize CPU registers */
2661 initializecpucache();
2663 /* pointer to selector slot for %fs/%gs */
2664 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2666 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2667 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2668 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2669 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2670 #if defined(PAE) || defined(PAE_TABLES)
2671 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2673 dblfault_tss.tss_cr3 = (int)IdlePTD;
2675 dblfault_tss.tss_eip = (int)dblfault_handler;
2676 dblfault_tss.tss_eflags = PSL_KERNEL;
2677 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2678 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2679 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2680 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2681 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2685 init_param2(physmem);
2687 /* now running on new page tables, configured,and u/iom is accessible */
2689 msgbufinit(msgbufp, msgbufsize);
2694 * Set up thread0 pcb after npxinit calculated pcb + fpu save
2695 * area size. Zero out the extended state header in fpu save
2698 thread0.td_pcb = get_pcb_td(&thread0);
2699 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2700 #ifdef CPU_ENABLE_SSE
2702 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2704 xhdr->xstate_bv = xsave_mask;
2707 PCPU_SET(curpcb, thread0.td_pcb);
2708 /* make an initial tss so cpu can get interrupt stack on syscall! */
2709 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2710 PCPU_SET(common_tss.tss_esp0, (vm_offset_t)thread0.td_pcb - 16);
2711 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2712 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2713 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2714 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2715 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2718 /* make a call gate to reenter kernel with */
2719 gdp = &ldt[LSYS5CALLS_SEL].gd;
2721 x = (int) &IDTVEC(lcall_syscall);
2722 gdp->gd_looffset = x;
2723 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2725 gdp->gd_type = SDT_SYS386CGT;
2726 gdp->gd_dpl = SEL_UPL;
2728 gdp->gd_hioffset = x >> 16;
2730 /* XXX does this work? */
2732 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2733 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2735 /* transfer to user mode */
2737 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2738 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2740 /* setup proc 0's pcb */
2741 thread0.td_pcb->pcb_flags = 0;
2742 #if defined(PAE) || defined(PAE_TABLES)
2743 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2745 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2747 thread0.td_pcb->pcb_ext = 0;
2748 thread0.td_frame = &proc0_tf;
2756 /* Location of kernel stack for locore */
2757 return ((register_t)thread0.td_pcb);
2761 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2764 pcpu->pc_acpi_id = 0xffffffff;
2769 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
2771 struct bios_smap *smapbase;
2772 struct bios_smap_xattr smap;
2775 int count, error, i;
2777 /* Retrieve the system memory map from the loader. */
2778 kmdp = preload_search_by_type("elf kernel");
2780 kmdp = preload_search_by_type("elf32 kernel");
2783 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2784 MODINFO_METADATA | MODINFOMD_SMAP);
2785 if (smapbase == NULL)
2787 smapattr = (uint32_t *)preload_search_info(kmdp,
2788 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
2789 count = *((u_int32_t *)smapbase - 1) / sizeof(*smapbase);
2791 for (i = 0; i < count; i++) {
2792 smap.base = smapbase[i].base;
2793 smap.length = smapbase[i].length;
2794 smap.type = smapbase[i].type;
2795 if (smapattr != NULL)
2796 smap.xattr = smapattr[i];
2799 error = SYSCTL_OUT(req, &smap, sizeof(smap));
2803 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2804 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
2808 spinlock_enter(void)
2814 if (td->td_md.md_spinlock_count == 0) {
2815 flags = intr_disable();
2816 td->td_md.md_spinlock_count = 1;
2817 td->td_md.md_saved_flags = flags;
2819 td->td_md.md_spinlock_count++;
2831 flags = td->td_md.md_saved_flags;
2832 td->td_md.md_spinlock_count--;
2833 if (td->td_md.md_spinlock_count == 0)
2834 intr_restore(flags);
2837 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2838 static void f00f_hack(void *unused);
2839 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2842 f00f_hack(void *unused)
2844 struct gate_descriptor *new_idt;
2852 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2854 tmp = kmem_malloc(kernel_arena, PAGE_SIZE * 2, M_WAITOK | M_ZERO);
2856 panic("kmem_malloc returned 0");
2858 /* Put the problematic entry (#6) at the end of the lower page. */
2859 new_idt = (struct gate_descriptor*)
2860 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2861 bcopy(idt, new_idt, sizeof(idt0));
2862 r_idt.rd_base = (u_int)new_idt;
2865 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
2867 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2870 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2871 * we want to start a backtrace from the function that caused us to enter
2872 * the debugger. We have the context in the trapframe, but base the trace
2873 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2874 * enough for a backtrace.
2877 makectx(struct trapframe *tf, struct pcb *pcb)
2880 pcb->pcb_edi = tf->tf_edi;
2881 pcb->pcb_esi = tf->tf_esi;
2882 pcb->pcb_ebp = tf->tf_ebp;
2883 pcb->pcb_ebx = tf->tf_ebx;
2884 pcb->pcb_eip = tf->tf_eip;
2885 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2886 pcb->pcb_gs = rgs();
2890 ptrace_set_pc(struct thread *td, u_long addr)
2893 td->td_frame->tf_eip = addr;
2898 ptrace_single_step(struct thread *td)
2900 td->td_frame->tf_eflags |= PSL_T;
2905 ptrace_clear_single_step(struct thread *td)
2907 td->td_frame->tf_eflags &= ~PSL_T;
2912 fill_regs(struct thread *td, struct reg *regs)
2915 struct trapframe *tp;
2919 regs->r_gs = pcb->pcb_gs;
2920 return (fill_frame_regs(tp, regs));
2924 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2926 regs->r_fs = tp->tf_fs;
2927 regs->r_es = tp->tf_es;
2928 regs->r_ds = tp->tf_ds;
2929 regs->r_edi = tp->tf_edi;
2930 regs->r_esi = tp->tf_esi;
2931 regs->r_ebp = tp->tf_ebp;
2932 regs->r_ebx = tp->tf_ebx;
2933 regs->r_edx = tp->tf_edx;
2934 regs->r_ecx = tp->tf_ecx;
2935 regs->r_eax = tp->tf_eax;
2936 regs->r_eip = tp->tf_eip;
2937 regs->r_cs = tp->tf_cs;
2938 regs->r_eflags = tp->tf_eflags;
2939 regs->r_esp = tp->tf_esp;
2940 regs->r_ss = tp->tf_ss;
2945 set_regs(struct thread *td, struct reg *regs)
2948 struct trapframe *tp;
2951 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2952 !CS_SECURE(regs->r_cs))
2955 tp->tf_fs = regs->r_fs;
2956 tp->tf_es = regs->r_es;
2957 tp->tf_ds = regs->r_ds;
2958 tp->tf_edi = regs->r_edi;
2959 tp->tf_esi = regs->r_esi;
2960 tp->tf_ebp = regs->r_ebp;
2961 tp->tf_ebx = regs->r_ebx;
2962 tp->tf_edx = regs->r_edx;
2963 tp->tf_ecx = regs->r_ecx;
2964 tp->tf_eax = regs->r_eax;
2965 tp->tf_eip = regs->r_eip;
2966 tp->tf_cs = regs->r_cs;
2967 tp->tf_eflags = regs->r_eflags;
2968 tp->tf_esp = regs->r_esp;
2969 tp->tf_ss = regs->r_ss;
2970 pcb->pcb_gs = regs->r_gs;
2975 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2978 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2979 P_SHOULDSTOP(td->td_proc),
2980 ("not suspended thread %p", td));
2984 bzero(fpregs, sizeof(*fpregs));
2986 #ifdef CPU_ENABLE_SSE
2988 npx_fill_fpregs_xmm(&get_pcb_user_save_td(td)->sv_xmm,
2989 (struct save87 *)fpregs);
2991 #endif /* CPU_ENABLE_SSE */
2992 bcopy(&get_pcb_user_save_td(td)->sv_87, fpregs,
2998 set_fpregs(struct thread *td, struct fpreg *fpregs)
3001 #ifdef CPU_ENABLE_SSE
3003 npx_set_fpregs_xmm((struct save87 *)fpregs,
3004 &get_pcb_user_save_td(td)->sv_xmm);
3006 #endif /* CPU_ENABLE_SSE */
3007 bcopy(fpregs, &get_pcb_user_save_td(td)->sv_87,
3016 * Get machine context.
3019 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3021 struct trapframe *tp;
3022 struct segment_descriptor *sdp;
3026 PROC_LOCK(curthread->td_proc);
3027 mcp->mc_onstack = sigonstack(tp->tf_esp);
3028 PROC_UNLOCK(curthread->td_proc);
3029 mcp->mc_gs = td->td_pcb->pcb_gs;
3030 mcp->mc_fs = tp->tf_fs;
3031 mcp->mc_es = tp->tf_es;
3032 mcp->mc_ds = tp->tf_ds;
3033 mcp->mc_edi = tp->tf_edi;
3034 mcp->mc_esi = tp->tf_esi;
3035 mcp->mc_ebp = tp->tf_ebp;
3036 mcp->mc_isp = tp->tf_isp;
3037 mcp->mc_eflags = tp->tf_eflags;
3038 if (flags & GET_MC_CLEAR_RET) {
3041 mcp->mc_eflags &= ~PSL_C;
3043 mcp->mc_eax = tp->tf_eax;
3044 mcp->mc_edx = tp->tf_edx;
3046 mcp->mc_ebx = tp->tf_ebx;
3047 mcp->mc_ecx = tp->tf_ecx;
3048 mcp->mc_eip = tp->tf_eip;
3049 mcp->mc_cs = tp->tf_cs;
3050 mcp->mc_esp = tp->tf_esp;
3051 mcp->mc_ss = tp->tf_ss;
3052 mcp->mc_len = sizeof(*mcp);
3053 get_fpcontext(td, mcp, NULL, 0);
3054 sdp = &td->td_pcb->pcb_fsd;
3055 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3056 sdp = &td->td_pcb->pcb_gsd;
3057 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3059 mcp->mc_xfpustate = 0;
3060 mcp->mc_xfpustate_len = 0;
3061 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3066 * Set machine context.
3068 * However, we don't set any but the user modifiable flags, and we won't
3069 * touch the cs selector.
3072 set_mcontext(struct thread *td, mcontext_t *mcp)
3074 struct trapframe *tp;
3079 if (mcp->mc_len != sizeof(*mcp) ||
3080 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
3082 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3083 (tp->tf_eflags & ~PSL_USERCHANGE);
3084 if (mcp->mc_flags & _MC_HASFPXSTATE) {
3085 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
3086 sizeof(union savefpu))
3088 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
3089 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
3090 mcp->mc_xfpustate_len);
3095 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
3098 tp->tf_fs = mcp->mc_fs;
3099 tp->tf_es = mcp->mc_es;
3100 tp->tf_ds = mcp->mc_ds;
3101 tp->tf_edi = mcp->mc_edi;
3102 tp->tf_esi = mcp->mc_esi;
3103 tp->tf_ebp = mcp->mc_ebp;
3104 tp->tf_ebx = mcp->mc_ebx;
3105 tp->tf_edx = mcp->mc_edx;
3106 tp->tf_ecx = mcp->mc_ecx;
3107 tp->tf_eax = mcp->mc_eax;
3108 tp->tf_eip = mcp->mc_eip;
3109 tp->tf_eflags = eflags;
3110 tp->tf_esp = mcp->mc_esp;
3111 tp->tf_ss = mcp->mc_ss;
3112 td->td_pcb->pcb_gs = mcp->mc_gs;
3117 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
3118 size_t xfpusave_len)
3120 #ifdef CPU_ENABLE_SSE
3121 size_t max_len, len;
3125 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3126 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3127 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3129 mcp->mc_ownedfp = npxgetregs(td);
3130 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
3131 sizeof(mcp->mc_fpstate));
3132 mcp->mc_fpformat = npxformat();
3133 #ifdef CPU_ENABLE_SSE
3134 if (!use_xsave || xfpusave_len == 0)
3136 max_len = cpu_max_ext_state_size - sizeof(union savefpu);
3138 if (len > max_len) {
3140 bzero(xfpusave + max_len, len - max_len);
3142 mcp->mc_flags |= _MC_HASFPXSTATE;
3143 mcp->mc_xfpustate_len = len;
3144 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
3150 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
3151 size_t xfpustate_len)
3153 union savefpu *fpstate;
3156 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3158 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3159 mcp->mc_fpformat != _MC_FPFMT_XMM)
3161 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
3162 /* We don't care what state is left in the FPU or PCB. */
3165 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3166 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3168 fpstate = (union savefpu *)&mcp->mc_fpstate;
3169 #ifdef CPU_ENABLE_SSE
3171 fpstate->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
3173 error = npxsetregs(td, fpstate, xfpustate, xfpustate_len);
3183 fpstate_drop(struct thread *td)
3186 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3189 if (PCPU_GET(fpcurthread) == td)
3193 * XXX force a full drop of the npx. The above only drops it if we
3194 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3196 * XXX I don't much like npxgetregs()'s semantics of doing a full
3197 * drop. Dropping only to the pcb matches fnsave's behaviour.
3198 * We only need to drop to !PCB_INITDONE in sendsig(). But
3199 * sendsig() is the only caller of npxgetregs()... perhaps we just
3200 * have too many layers.
3202 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3203 PCB_NPXUSERINITDONE);
3208 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3213 dbregs->dr[0] = rdr0();
3214 dbregs->dr[1] = rdr1();
3215 dbregs->dr[2] = rdr2();
3216 dbregs->dr[3] = rdr3();
3217 dbregs->dr[4] = rdr4();
3218 dbregs->dr[5] = rdr5();
3219 dbregs->dr[6] = rdr6();
3220 dbregs->dr[7] = rdr7();
3223 dbregs->dr[0] = pcb->pcb_dr0;
3224 dbregs->dr[1] = pcb->pcb_dr1;
3225 dbregs->dr[2] = pcb->pcb_dr2;
3226 dbregs->dr[3] = pcb->pcb_dr3;
3229 dbregs->dr[6] = pcb->pcb_dr6;
3230 dbregs->dr[7] = pcb->pcb_dr7;
3236 set_dbregs(struct thread *td, struct dbreg *dbregs)
3242 load_dr0(dbregs->dr[0]);
3243 load_dr1(dbregs->dr[1]);
3244 load_dr2(dbregs->dr[2]);
3245 load_dr3(dbregs->dr[3]);
3246 load_dr4(dbregs->dr[4]);
3247 load_dr5(dbregs->dr[5]);
3248 load_dr6(dbregs->dr[6]);
3249 load_dr7(dbregs->dr[7]);
3252 * Don't let an illegal value for dr7 get set. Specifically,
3253 * check for undefined settings. Setting these bit patterns
3254 * result in undefined behaviour and can lead to an unexpected
3257 for (i = 0; i < 4; i++) {
3258 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3260 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3267 * Don't let a process set a breakpoint that is not within the
3268 * process's address space. If a process could do this, it
3269 * could halt the system by setting a breakpoint in the kernel
3270 * (if ddb was enabled). Thus, we need to check to make sure
3271 * that no breakpoints are being enabled for addresses outside
3272 * process's address space.
3274 * XXX - what about when the watched area of the user's
3275 * address space is written into from within the kernel
3276 * ... wouldn't that still cause a breakpoint to be generated
3277 * from within kernel mode?
3280 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3281 /* dr0 is enabled */
3282 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3286 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3287 /* dr1 is enabled */
3288 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3292 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3293 /* dr2 is enabled */
3294 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3298 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3299 /* dr3 is enabled */
3300 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3304 pcb->pcb_dr0 = dbregs->dr[0];
3305 pcb->pcb_dr1 = dbregs->dr[1];
3306 pcb->pcb_dr2 = dbregs->dr[2];
3307 pcb->pcb_dr3 = dbregs->dr[3];
3308 pcb->pcb_dr6 = dbregs->dr[6];
3309 pcb->pcb_dr7 = dbregs->dr[7];
3311 pcb->pcb_flags |= PCB_DBREGS;
3318 * Return > 0 if a hardware breakpoint has been hit, and the
3319 * breakpoint was in user space. Return 0, otherwise.
3322 user_dbreg_trap(void)
3324 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3325 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3326 int nbp; /* number of breakpoints that triggered */
3327 caddr_t addr[4]; /* breakpoint addresses */
3331 if ((dr7 & 0x000000ff) == 0) {
3333 * all GE and LE bits in the dr7 register are zero,
3334 * thus the trap couldn't have been caused by the
3335 * hardware debug registers
3342 bp = dr6 & 0x0000000f;
3346 * None of the breakpoint bits are set meaning this
3347 * trap was not caused by any of the debug registers
3353 * at least one of the breakpoints were hit, check to see
3354 * which ones and if any of them are user space addresses
3358 addr[nbp++] = (caddr_t)rdr0();
3361 addr[nbp++] = (caddr_t)rdr1();
3364 addr[nbp++] = (caddr_t)rdr2();
3367 addr[nbp++] = (caddr_t)rdr3();
3370 for (i = 0; i < nbp; i++) {
3371 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3373 * addr[i] is in user space
3380 * None of the breakpoints are in user space.
3388 * Provide inb() and outb() as functions. They are normally only available as
3389 * inline functions, thus cannot be called from the debugger.
3392 /* silence compiler warnings */
3393 u_char inb_(u_short);
3394 void outb_(u_short, u_char);
3403 outb_(u_short port, u_char data)