2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
101 #error KDB must be enabled in order for DDB to work!
104 #include <ddb/db_sym.h>
109 #include <net/netisr.h>
111 #include <machine/bootinfo.h>
112 #include <machine/clock.h>
113 #include <machine/cpu.h>
114 #include <machine/cputypes.h>
115 #include <machine/intr_machdep.h>
116 #include <machine/mca.h>
117 #include <machine/md_var.h>
118 #include <machine/metadata.h>
119 #include <machine/pc/bios.h>
120 #include <machine/pcb.h>
121 #include <machine/pcb_ext.h>
122 #include <machine/proc.h>
123 #include <machine/reg.h>
124 #include <machine/sigframe.h>
125 #include <machine/specialreg.h>
126 #include <machine/vm86.h>
128 #include <machine/perfmon.h>
131 #include <machine/smp.h>
135 #include <i386/isa/icu.h>
139 #include <machine/xbox.h>
141 int arch_i386_is_xbox = 0;
142 uint32_t arch_i386_xbox_memsize = 0;
147 #include <machine/xen/xen-os.h>
148 #include <xen/hypervisor.h>
149 #include <machine/xen/xen-os.h>
150 #include <machine/xen/xenvar.h>
151 #include <machine/xen/xenfunc.h>
152 #include <xen/xen_intr.h>
154 void Xhypervisor_callback(void);
155 void failsafe_callback(void);
157 extern trap_info_t trap_table[];
158 struct proc_ldt default_proc_ldt;
159 extern int init_first;
161 extern unsigned long physfree;
164 /* Sanity check for __curthread() */
165 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
167 extern void init386(int first);
168 extern void dblfault_handler(void);
170 extern void printcpuinfo(void); /* XXX header file */
171 extern void finishidentcpu(void);
172 extern void panicifcpuunsupported(void);
173 extern void initializecpu(void);
175 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
176 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
178 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
179 #define CPU_ENABLE_SSE
182 static void cpu_startup(void *);
183 static void fpstate_drop(struct thread *td);
184 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
185 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
186 #ifdef CPU_ENABLE_SSE
187 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
188 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
189 #endif /* CPU_ENABLE_SSE */
190 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
193 extern vm_offset_t ksym_start, ksym_end;
196 /* Intel ICH registers */
197 #define ICH_PMBASE 0x400
198 #define ICH_SMI_EN ICH_PMBASE + 0x30
200 int _udatasel, _ucodesel;
206 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
208 #ifdef COMPAT_FREEBSD4
209 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
216 FEATURE(pae, "Physical Address Extensions");
220 * The number of PHYSMAP entries must be one less than the number of
221 * PHYSSEG entries because the PHYSMAP entry that spans the largest
222 * physical address that is accessible by ISA DMA is split into two
225 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
227 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
228 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
230 /* must be 2 less so 0 0 can signal end of chunks */
231 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
232 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
234 struct kva_md_info kmi;
236 static struct trapframe proc0_tf;
237 struct pcpu __pcpu[MAXCPU];
241 struct mem_range_softc mem_range_softc;
251 * On MacBooks, we need to disallow the legacy USB circuit to
252 * generate an SMI# because this can cause several problems,
253 * namely: incorrect CPU frequency detection and failure to
255 * We do this by disabling a bit in the SMI_EN (SMI Control and
256 * Enable register) of the Intel ICH LPC Interface Bridge.
258 sysenv = getenv("smbios.system.product");
259 if (sysenv != NULL) {
260 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
261 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
262 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
263 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
264 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
265 strncmp(sysenv, "Macmini1,1", 10) == 0) {
267 printf("Disabling LEGACY_USB_EN bit on "
269 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
275 * Good {morning,afternoon,evening,night}.
279 panicifcpuunsupported();
286 * Display physical memory if SMBIOS reports reasonable amount.
289 sysenv = getenv("smbios.memory.enabled");
290 if (sysenv != NULL) {
291 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
294 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
295 memsize = ptoa((uintmax_t)Maxmem);
296 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
299 * Display any holes after the first chunk of extended memory.
304 printf("Physical memory chunk(s):\n");
305 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
308 size = phys_avail[indx + 1] - phys_avail[indx];
310 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
311 (uintmax_t)phys_avail[indx],
312 (uintmax_t)phys_avail[indx + 1] - 1,
313 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
317 vm_ksubmap_init(&kmi);
319 printf("avail memory = %ju (%ju MB)\n",
320 ptoa((uintmax_t)cnt.v_free_count),
321 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
324 * Set up buffers, so they can be used to read disk labels.
327 vm_pager_bufferinit();
335 * Send an interrupt to process.
337 * Stack is set up to allow sigcode stored
338 * at top to call routine, followed by kcall
339 * to sigreturn routine below. After sigreturn
340 * resets the signal mask, the stack, and the
341 * frame pointer, it returns to the user
346 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
348 struct osigframe sf, *fp;
352 struct trapframe *regs;
358 PROC_LOCK_ASSERT(p, MA_OWNED);
359 sig = ksi->ksi_signo;
361 mtx_assert(&psp->ps_mtx, MA_OWNED);
363 oonstack = sigonstack(regs->tf_esp);
365 /* Allocate space for the signal handler context. */
366 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
367 SIGISMEMBER(psp->ps_sigonstack, sig)) {
368 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
369 td->td_sigstk.ss_size - sizeof(struct osigframe));
370 #if defined(COMPAT_43)
371 td->td_sigstk.ss_flags |= SS_ONSTACK;
374 fp = (struct osigframe *)regs->tf_esp - 1;
376 /* Translate the signal if appropriate. */
377 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
378 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
380 /* Build the argument list for the signal handler. */
382 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
383 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
384 /* Signal handler installed with SA_SIGINFO. */
385 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
386 sf.sf_siginfo.si_signo = sig;
387 sf.sf_siginfo.si_code = ksi->ksi_code;
388 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
390 /* Old FreeBSD-style arguments. */
391 sf.sf_arg2 = ksi->ksi_code;
392 sf.sf_addr = (register_t)ksi->ksi_addr;
393 sf.sf_ahu.sf_handler = catcher;
395 mtx_unlock(&psp->ps_mtx);
398 /* Save most if not all of trap frame. */
399 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
400 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
401 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
402 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
403 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
404 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
405 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
406 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
407 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
408 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
409 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
410 sf.sf_siginfo.si_sc.sc_gs = rgs();
411 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
413 /* Build the signal context to be used by osigreturn(). */
414 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
415 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
416 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
417 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
418 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
419 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
420 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
421 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
424 * If we're a vm86 process, we want to save the segment registers.
425 * We also change eflags to be our emulated eflags, not the actual
428 if (regs->tf_eflags & PSL_VM) {
429 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
430 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
431 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
433 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
434 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
435 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
436 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
438 if (vm86->vm86_has_vme == 0)
439 sf.sf_siginfo.si_sc.sc_ps =
440 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
441 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
443 /* See sendsig() for comments. */
444 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
448 * Copy the sigframe out to the user's stack.
450 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
452 printf("process %ld has trashed its stack\n", (long)p->p_pid);
458 regs->tf_esp = (int)fp;
459 regs->tf_eip = PS_STRINGS - szosigcode;
460 regs->tf_eflags &= ~(PSL_T | PSL_D);
461 regs->tf_cs = _ucodesel;
462 regs->tf_ds = _udatasel;
463 regs->tf_es = _udatasel;
464 regs->tf_fs = _udatasel;
466 regs->tf_ss = _udatasel;
468 mtx_lock(&psp->ps_mtx);
470 #endif /* COMPAT_43 */
472 #ifdef COMPAT_FREEBSD4
474 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
476 struct sigframe4 sf, *sfp;
480 struct trapframe *regs;
486 PROC_LOCK_ASSERT(p, MA_OWNED);
487 sig = ksi->ksi_signo;
489 mtx_assert(&psp->ps_mtx, MA_OWNED);
491 oonstack = sigonstack(regs->tf_esp);
493 /* Save user context. */
494 bzero(&sf, sizeof(sf));
495 sf.sf_uc.uc_sigmask = *mask;
496 sf.sf_uc.uc_stack = td->td_sigstk;
497 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
498 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
499 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
500 sf.sf_uc.uc_mcontext.mc_gs = rgs();
501 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
503 /* Allocate space for the signal handler context. */
504 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
505 SIGISMEMBER(psp->ps_sigonstack, sig)) {
506 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
507 td->td_sigstk.ss_size - sizeof(struct sigframe4));
508 #if defined(COMPAT_43)
509 td->td_sigstk.ss_flags |= SS_ONSTACK;
512 sfp = (struct sigframe4 *)regs->tf_esp - 1;
514 /* Translate the signal if appropriate. */
515 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
516 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
518 /* Build the argument list for the signal handler. */
520 sf.sf_ucontext = (register_t)&sfp->sf_uc;
521 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
522 /* Signal handler installed with SA_SIGINFO. */
523 sf.sf_siginfo = (register_t)&sfp->sf_si;
524 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
526 /* Fill in POSIX parts */
527 sf.sf_si.si_signo = sig;
528 sf.sf_si.si_code = ksi->ksi_code;
529 sf.sf_si.si_addr = ksi->ksi_addr;
531 /* Old FreeBSD-style arguments. */
532 sf.sf_siginfo = ksi->ksi_code;
533 sf.sf_addr = (register_t)ksi->ksi_addr;
534 sf.sf_ahu.sf_handler = catcher;
536 mtx_unlock(&psp->ps_mtx);
540 * If we're a vm86 process, we want to save the segment registers.
541 * We also change eflags to be our emulated eflags, not the actual
544 if (regs->tf_eflags & PSL_VM) {
545 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
546 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
548 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
549 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
550 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
551 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
553 if (vm86->vm86_has_vme == 0)
554 sf.sf_uc.uc_mcontext.mc_eflags =
555 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
556 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
559 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
560 * syscalls made by the signal handler. This just avoids
561 * wasting time for our lazy fixup of such faults. PSL_NT
562 * does nothing in vm86 mode, but vm86 programs can set it
563 * almost legitimately in probes for old cpu types.
565 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
569 * Copy the sigframe out to the user's stack.
571 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
573 printf("process %ld has trashed its stack\n", (long)p->p_pid);
579 regs->tf_esp = (int)sfp;
580 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
581 regs->tf_eflags &= ~(PSL_T | PSL_D);
582 regs->tf_cs = _ucodesel;
583 regs->tf_ds = _udatasel;
584 regs->tf_es = _udatasel;
585 regs->tf_fs = _udatasel;
586 regs->tf_ss = _udatasel;
588 mtx_lock(&psp->ps_mtx);
590 #endif /* COMPAT_FREEBSD4 */
593 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
595 struct sigframe sf, *sfp;
600 struct trapframe *regs;
601 struct segment_descriptor *sdp;
607 PROC_LOCK_ASSERT(p, MA_OWNED);
608 sig = ksi->ksi_signo;
610 mtx_assert(&psp->ps_mtx, MA_OWNED);
611 #ifdef COMPAT_FREEBSD4
612 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
613 freebsd4_sendsig(catcher, ksi, mask);
618 if (SIGISMEMBER(psp->ps_osigset, sig)) {
619 osendsig(catcher, ksi, mask);
624 oonstack = sigonstack(regs->tf_esp);
626 /* Save user context. */
627 bzero(&sf, sizeof(sf));
628 sf.sf_uc.uc_sigmask = *mask;
629 sf.sf_uc.uc_stack = td->td_sigstk;
630 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
631 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
632 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
633 sf.sf_uc.uc_mcontext.mc_gs = rgs();
634 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
635 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
636 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
639 * Unconditionally fill the fsbase and gsbase into the mcontext.
641 sdp = &td->td_pcb->pcb_gsd;
642 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
644 sdp = &td->td_pcb->pcb_fsd;
645 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
648 /* Allocate space for the signal handler context. */
649 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
650 SIGISMEMBER(psp->ps_sigonstack, sig)) {
651 sp = td->td_sigstk.ss_sp +
652 td->td_sigstk.ss_size - sizeof(struct sigframe);
653 #if defined(COMPAT_43)
654 td->td_sigstk.ss_flags |= SS_ONSTACK;
657 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
658 /* Align to 16 bytes. */
659 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
661 /* Translate the signal if appropriate. */
662 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
663 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
665 /* Build the argument list for the signal handler. */
667 sf.sf_ucontext = (register_t)&sfp->sf_uc;
668 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
669 /* Signal handler installed with SA_SIGINFO. */
670 sf.sf_siginfo = (register_t)&sfp->sf_si;
671 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
673 /* Fill in POSIX parts */
674 sf.sf_si = ksi->ksi_info;
675 sf.sf_si.si_signo = sig; /* maybe a translated signal */
677 /* Old FreeBSD-style arguments. */
678 sf.sf_siginfo = ksi->ksi_code;
679 sf.sf_addr = (register_t)ksi->ksi_addr;
680 sf.sf_ahu.sf_handler = catcher;
682 mtx_unlock(&psp->ps_mtx);
686 * If we're a vm86 process, we want to save the segment registers.
687 * We also change eflags to be our emulated eflags, not the actual
690 if (regs->tf_eflags & PSL_VM) {
691 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
692 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
694 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
695 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
696 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
697 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
699 if (vm86->vm86_has_vme == 0)
700 sf.sf_uc.uc_mcontext.mc_eflags =
701 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
702 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
705 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
706 * syscalls made by the signal handler. This just avoids
707 * wasting time for our lazy fixup of such faults. PSL_NT
708 * does nothing in vm86 mode, but vm86 programs can set it
709 * almost legitimately in probes for old cpu types.
711 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
715 * Copy the sigframe out to the user's stack.
717 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
719 printf("process %ld has trashed its stack\n", (long)p->p_pid);
725 regs->tf_esp = (int)sfp;
726 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
727 regs->tf_eflags &= ~(PSL_T | PSL_D);
728 regs->tf_cs = _ucodesel;
729 regs->tf_ds = _udatasel;
730 regs->tf_es = _udatasel;
731 regs->tf_fs = _udatasel;
732 regs->tf_ss = _udatasel;
734 mtx_lock(&psp->ps_mtx);
738 * System call to cleanup state after a signal
739 * has been taken. Reset signal mask and
740 * stack state from context left by sendsig (above).
741 * Return to previous pc and psl as specified by
742 * context left by sendsig. Check carefully to
743 * make sure that the user has not modified the
744 * state to gain improper privileges.
752 struct osigreturn_args /* {
753 struct osigcontext *sigcntxp;
756 struct osigcontext sc;
757 struct trapframe *regs;
758 struct osigcontext *scp;
759 struct proc *p = td->td_proc;
764 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
769 if (eflags & PSL_VM) {
770 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
771 struct vm86_kernel *vm86;
774 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
775 * set up the vm86 area, and we can't enter vm86 mode.
777 if (td->td_pcb->pcb_ext == 0)
779 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
780 if (vm86->vm86_inited == 0)
783 /* Go back to user mode if both flags are set. */
784 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
785 ksiginfo_init_trap(&ksi);
786 ksi.ksi_signo = SIGBUS;
787 ksi.ksi_code = BUS_OBJERR;
788 ksi.ksi_addr = (void *)regs->tf_eip;
789 trapsignal(td, &ksi);
792 if (vm86->vm86_has_vme) {
793 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
794 (eflags & VME_USERCHANGE) | PSL_VM;
796 vm86->vm86_eflags = eflags; /* save VIF, VIP */
797 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
798 (eflags & VM_USERCHANGE) | PSL_VM;
800 tf->tf_vm86_ds = scp->sc_ds;
801 tf->tf_vm86_es = scp->sc_es;
802 tf->tf_vm86_fs = scp->sc_fs;
803 tf->tf_vm86_gs = scp->sc_gs;
804 tf->tf_ds = _udatasel;
805 tf->tf_es = _udatasel;
806 tf->tf_fs = _udatasel;
809 * Don't allow users to change privileged or reserved flags.
812 * XXX do allow users to change the privileged flag PSL_RF.
813 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
814 * should sometimes set it there too. tf_eflags is kept in
815 * the signal context during signal handling and there is no
816 * other place to remember it, so the PSL_RF bit may be
817 * corrupted by the signal handler without us knowing.
818 * Corruption of the PSL_RF bit at worst causes one more or
819 * one less debugger trap, so allowing it is fairly harmless.
821 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
826 * Don't allow users to load a valid privileged %cs. Let the
827 * hardware check for invalid selectors, excess privilege in
828 * other selectors, invalid %eip's and invalid %esp's.
830 if (!CS_SECURE(scp->sc_cs)) {
831 ksiginfo_init_trap(&ksi);
832 ksi.ksi_signo = SIGBUS;
833 ksi.ksi_code = BUS_OBJERR;
834 ksi.ksi_trapno = T_PROTFLT;
835 ksi.ksi_addr = (void *)regs->tf_eip;
836 trapsignal(td, &ksi);
839 regs->tf_ds = scp->sc_ds;
840 regs->tf_es = scp->sc_es;
841 regs->tf_fs = scp->sc_fs;
844 /* Restore remaining registers. */
845 regs->tf_eax = scp->sc_eax;
846 regs->tf_ebx = scp->sc_ebx;
847 regs->tf_ecx = scp->sc_ecx;
848 regs->tf_edx = scp->sc_edx;
849 regs->tf_esi = scp->sc_esi;
850 regs->tf_edi = scp->sc_edi;
851 regs->tf_cs = scp->sc_cs;
852 regs->tf_ss = scp->sc_ss;
853 regs->tf_isp = scp->sc_isp;
854 regs->tf_ebp = scp->sc_fp;
855 regs->tf_esp = scp->sc_sp;
856 regs->tf_eip = scp->sc_pc;
857 regs->tf_eflags = eflags;
860 #if defined(COMPAT_43)
861 if (scp->sc_onstack & 1)
862 td->td_sigstk.ss_flags |= SS_ONSTACK;
864 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
866 SIGSETOLD(td->td_sigmask, scp->sc_mask);
867 SIG_CANTMASK(td->td_sigmask);
870 return (EJUSTRETURN);
872 #endif /* COMPAT_43 */
874 #ifdef COMPAT_FREEBSD4
879 freebsd4_sigreturn(td, uap)
881 struct freebsd4_sigreturn_args /* {
882 const ucontext4 *sigcntxp;
886 struct proc *p = td->td_proc;
887 struct trapframe *regs;
888 const struct ucontext4 *ucp;
889 int cs, eflags, error;
892 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
897 eflags = ucp->uc_mcontext.mc_eflags;
898 if (eflags & PSL_VM) {
899 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
900 struct vm86_kernel *vm86;
903 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
904 * set up the vm86 area, and we can't enter vm86 mode.
906 if (td->td_pcb->pcb_ext == 0)
908 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
909 if (vm86->vm86_inited == 0)
912 /* Go back to user mode if both flags are set. */
913 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
914 ksiginfo_init_trap(&ksi);
915 ksi.ksi_signo = SIGBUS;
916 ksi.ksi_code = BUS_OBJERR;
917 ksi.ksi_addr = (void *)regs->tf_eip;
918 trapsignal(td, &ksi);
920 if (vm86->vm86_has_vme) {
921 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
922 (eflags & VME_USERCHANGE) | PSL_VM;
924 vm86->vm86_eflags = eflags; /* save VIF, VIP */
925 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
926 (eflags & VM_USERCHANGE) | PSL_VM;
928 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
929 tf->tf_eflags = eflags;
930 tf->tf_vm86_ds = tf->tf_ds;
931 tf->tf_vm86_es = tf->tf_es;
932 tf->tf_vm86_fs = tf->tf_fs;
933 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
934 tf->tf_ds = _udatasel;
935 tf->tf_es = _udatasel;
936 tf->tf_fs = _udatasel;
939 * Don't allow users to change privileged or reserved flags.
942 * XXX do allow users to change the privileged flag PSL_RF.
943 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
944 * should sometimes set it there too. tf_eflags is kept in
945 * the signal context during signal handling and there is no
946 * other place to remember it, so the PSL_RF bit may be
947 * corrupted by the signal handler without us knowing.
948 * Corruption of the PSL_RF bit at worst causes one more or
949 * one less debugger trap, so allowing it is fairly harmless.
951 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
952 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
957 * Don't allow users to load a valid privileged %cs. Let the
958 * hardware check for invalid selectors, excess privilege in
959 * other selectors, invalid %eip's and invalid %esp's.
961 cs = ucp->uc_mcontext.mc_cs;
962 if (!CS_SECURE(cs)) {
963 printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
964 ksiginfo_init_trap(&ksi);
965 ksi.ksi_signo = SIGBUS;
966 ksi.ksi_code = BUS_OBJERR;
967 ksi.ksi_trapno = T_PROTFLT;
968 ksi.ksi_addr = (void *)regs->tf_eip;
969 trapsignal(td, &ksi);
973 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
977 #if defined(COMPAT_43)
978 if (ucp->uc_mcontext.mc_onstack & 1)
979 td->td_sigstk.ss_flags |= SS_ONSTACK;
981 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
984 td->td_sigmask = ucp->uc_sigmask;
985 SIG_CANTMASK(td->td_sigmask);
988 return (EJUSTRETURN);
990 #endif /* COMPAT_FREEBSD4 */
998 struct sigreturn_args /* {
999 const struct __ucontext *sigcntxp;
1003 struct proc *p = td->td_proc;
1004 struct trapframe *regs;
1005 const ucontext_t *ucp;
1006 int cs, eflags, error, ret;
1009 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1013 regs = td->td_frame;
1014 eflags = ucp->uc_mcontext.mc_eflags;
1015 if (eflags & PSL_VM) {
1016 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1017 struct vm86_kernel *vm86;
1020 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1021 * set up the vm86 area, and we can't enter vm86 mode.
1023 if (td->td_pcb->pcb_ext == 0)
1025 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1026 if (vm86->vm86_inited == 0)
1029 /* Go back to user mode if both flags are set. */
1030 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1031 ksiginfo_init_trap(&ksi);
1032 ksi.ksi_signo = SIGBUS;
1033 ksi.ksi_code = BUS_OBJERR;
1034 ksi.ksi_addr = (void *)regs->tf_eip;
1035 trapsignal(td, &ksi);
1038 if (vm86->vm86_has_vme) {
1039 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1040 (eflags & VME_USERCHANGE) | PSL_VM;
1042 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1043 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1044 (eflags & VM_USERCHANGE) | PSL_VM;
1046 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1047 tf->tf_eflags = eflags;
1048 tf->tf_vm86_ds = tf->tf_ds;
1049 tf->tf_vm86_es = tf->tf_es;
1050 tf->tf_vm86_fs = tf->tf_fs;
1051 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1052 tf->tf_ds = _udatasel;
1053 tf->tf_es = _udatasel;
1054 tf->tf_fs = _udatasel;
1057 * Don't allow users to change privileged or reserved flags.
1060 * XXX do allow users to change the privileged flag PSL_RF.
1061 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1062 * should sometimes set it there too. tf_eflags is kept in
1063 * the signal context during signal handling and there is no
1064 * other place to remember it, so the PSL_RF bit may be
1065 * corrupted by the signal handler without us knowing.
1066 * Corruption of the PSL_RF bit at worst causes one more or
1067 * one less debugger trap, so allowing it is fairly harmless.
1069 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1070 printf("sigreturn: eflags = 0x%x\n", eflags);
1075 * Don't allow users to load a valid privileged %cs. Let the
1076 * hardware check for invalid selectors, excess privilege in
1077 * other selectors, invalid %eip's and invalid %esp's.
1079 cs = ucp->uc_mcontext.mc_cs;
1080 if (!CS_SECURE(cs)) {
1081 printf("sigreturn: cs = 0x%x\n", cs);
1082 ksiginfo_init_trap(&ksi);
1083 ksi.ksi_signo = SIGBUS;
1084 ksi.ksi_code = BUS_OBJERR;
1085 ksi.ksi_trapno = T_PROTFLT;
1086 ksi.ksi_addr = (void *)regs->tf_eip;
1087 trapsignal(td, &ksi);
1091 ret = set_fpcontext(td, &ucp->uc_mcontext);
1094 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1098 #if defined(COMPAT_43)
1099 if (ucp->uc_mcontext.mc_onstack & 1)
1100 td->td_sigstk.ss_flags |= SS_ONSTACK;
1102 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1105 td->td_sigmask = ucp->uc_sigmask;
1106 SIG_CANTMASK(td->td_sigmask);
1109 return (EJUSTRETURN);
1113 * Machine dependent boot() routine
1115 * I haven't seen anything to put here yet
1116 * Possibly some stuff might be grafted back here from boot()
1124 * Flush the D-cache for non-DMA I/O so that the I-cache can
1125 * be made coherent later.
1128 cpu_flush_dcache(void *ptr, size_t len)
1130 /* Not applicable */
1133 /* Get current clock frequency for the given cpu id. */
1135 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1138 uint64_t tsc1, tsc2;
1140 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1143 return (EOPNOTSUPP);
1145 /* If we're booting, trust the rate calibrated moments ago. */
1152 /* Schedule ourselves on the indicated cpu. */
1153 thread_lock(curthread);
1154 sched_bind(curthread, cpu_id);
1155 thread_unlock(curthread);
1158 /* Calibrate by measuring a short delay. */
1159 reg = intr_disable();
1166 thread_lock(curthread);
1167 sched_unbind(curthread);
1168 thread_unlock(curthread);
1172 * Calculate the difference in readings, convert to Mhz, and
1173 * subtract 0.5% of the total. Empirical testing has shown that
1174 * overhead in DELAY() works out to approximately this value.
1177 *rate = tsc2 * 1000 - tsc2 * 5;
1182 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1189 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1192 int scheduler_running;
1195 cpu_idle_hlt(int busy)
1198 scheduler_running = 1;
1205 * Shutdown the CPU as much as possible
1215 cpu_idle_hlt(int busy)
1218 * we must absolutely guarentee that hlt is the next instruction
1219 * after sti or we introduce a timing window.
1222 if (sched_runnable())
1225 __asm __volatile("sti; hlt");
1230 cpu_idle_acpi(int busy)
1233 if (sched_runnable())
1235 else if (cpu_idle_hook)
1238 __asm __volatile("sti; hlt");
1241 static int cpu_ident_amdc1e = 0;
1244 cpu_probe_amdc1e(void)
1250 * Forget it, if we're not using local APIC timer.
1252 if (resource_disabled("apic", 0) ||
1253 (resource_int_value("apic", 0, "clock", &i) == 0 && i == 0))
1257 * Detect the presence of C1E capability mostly on latest
1258 * dual-cores (or future) k8 family.
1260 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1261 (cpu_id & 0x00000f00) == 0x00000f00 &&
1262 (cpu_id & 0x0fff0000) >= 0x00040000) {
1263 cpu_ident_amdc1e = 1;
1271 * C1E renders the local APIC timer dead, so we disable it by
1272 * reading the Interrupt Pending Message register and clearing
1273 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1276 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1277 * #32559 revision 3.00+
1279 #define MSR_AMDK8_IPM 0xc0010055
1280 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1281 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1282 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1285 cpu_idle_amdc1e(int busy)
1289 if (sched_runnable())
1294 msr = rdmsr(MSR_AMDK8_IPM);
1295 if (msr & AMDK8_CMPHALT)
1296 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1301 __asm __volatile("sti; hlt");
1306 cpu_idle_spin(int busy)
1312 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1314 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1320 #if defined(SMP) && !defined(XEN)
1321 if (mp_grab_cpu_hlt())
1328 * mwait cpu power states. Lower 4 bits are sub-states.
1330 #define MWAIT_C0 0xf0
1331 #define MWAIT_C1 0x00
1332 #define MWAIT_C2 0x10
1333 #define MWAIT_C3 0x20
1334 #define MWAIT_C4 0x30
1336 #define MWAIT_DISABLED 0x0
1337 #define MWAIT_WOKEN 0x1
1338 #define MWAIT_WAITING 0x2
1341 cpu_idle_mwait(int busy)
1345 mwait = (int *)PCPU_PTR(monitorbuf);
1346 *mwait = MWAIT_WAITING;
1347 if (sched_runnable())
1349 cpu_monitor(mwait, 0, 0);
1350 if (*mwait == MWAIT_WAITING)
1351 cpu_mwait(0, MWAIT_C1);
1355 cpu_idle_mwait_hlt(int busy)
1359 mwait = (int *)PCPU_PTR(monitorbuf);
1361 *mwait = MWAIT_DISABLED;
1365 *mwait = MWAIT_WAITING;
1366 if (sched_runnable())
1368 cpu_monitor(mwait, 0, 0);
1369 if (*mwait == MWAIT_WAITING)
1370 cpu_mwait(0, MWAIT_C1);
1374 cpu_idle_wakeup(int cpu)
1379 if (cpu_idle_fn == cpu_idle_spin)
1381 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt)
1383 pcpu = pcpu_find(cpu);
1384 mwait = (int *)pcpu->pc_monitorbuf;
1386 * This doesn't need to be atomic since missing the race will
1387 * simply result in unnecessary IPIs.
1389 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED)
1391 *mwait = MWAIT_WOKEN;
1397 * Ordered by speed/power consumption.
1403 { cpu_idle_spin, "spin" },
1404 { cpu_idle_mwait, "mwait" },
1405 { cpu_idle_mwait_hlt, "mwait_hlt" },
1406 { cpu_idle_amdc1e, "amdc1e" },
1407 { cpu_idle_hlt, "hlt" },
1408 { cpu_idle_acpi, "acpi" },
1413 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1419 avail = malloc(256, M_TEMP, M_WAITOK);
1421 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1422 if (strstr(idle_tbl[i].id_name, "mwait") &&
1423 (cpu_feature2 & CPUID2_MON) == 0)
1425 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 &&
1426 cpu_ident_amdc1e == 0)
1428 p += sprintf(p, "%s, ", idle_tbl[i].id_name);
1430 error = sysctl_handle_string(oidp, avail, 0, req);
1431 free(avail, M_TEMP);
1436 idle_sysctl(SYSCTL_HANDLER_ARGS)
1444 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1445 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1446 p = idle_tbl[i].id_name;
1450 strncpy(buf, p, sizeof(buf));
1451 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1452 if (error != 0 || req->newptr == NULL)
1454 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1455 if (strstr(idle_tbl[i].id_name, "mwait") &&
1456 (cpu_feature2 & CPUID2_MON) == 0)
1458 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 &&
1459 cpu_ident_amdc1e == 0)
1461 if (strcmp(idle_tbl[i].id_name, buf))
1463 cpu_idle_fn = idle_tbl[i].id_fn;
1469 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1470 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1472 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1473 idle_sysctl, "A", "currently selected idle function");
1476 * Reset registers to default values on exec.
1479 exec_setregs(td, entry, stack, ps_strings)
1485 struct trapframe *regs = td->td_frame;
1486 struct pcb *pcb = td->td_pcb;
1488 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1489 pcb->pcb_gs = _udatasel;
1492 mtx_lock_spin(&dt_lock);
1493 if (td->td_proc->p_md.md_ldt)
1496 mtx_unlock_spin(&dt_lock);
1498 bzero((char *)regs, sizeof(struct trapframe));
1499 regs->tf_eip = entry;
1500 regs->tf_esp = stack;
1501 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1502 regs->tf_ss = _udatasel;
1503 regs->tf_ds = _udatasel;
1504 regs->tf_es = _udatasel;
1505 regs->tf_fs = _udatasel;
1506 regs->tf_cs = _ucodesel;
1508 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1509 regs->tf_ebx = ps_strings;
1512 * Reset the hardware debug registers if they were in use.
1513 * They won't have any meaning for the newly exec'd process.
1515 if (pcb->pcb_flags & PCB_DBREGS) {
1522 if (pcb == PCPU_GET(curpcb)) {
1524 * Clear the debug registers on the running
1525 * CPU, otherwise they will end up affecting
1526 * the next process we switch to.
1530 pcb->pcb_flags &= ~PCB_DBREGS;
1534 * Initialize the math emulator (if any) for the current process.
1535 * Actually, just clear the bit that says that the emulator has
1536 * been initialized. Initialization is delayed until the process
1537 * traps to the emulator (if it is done at all) mainly because
1538 * emulators don't provide an entry point for initialization.
1540 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1541 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1544 * Drop the FP state if we hold it, so that the process gets a
1545 * clean FP state if it uses the FPU again.
1550 * XXX - Linux emulator
1551 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1554 td->td_retval[1] = 0;
1565 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1567 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1568 * instructions. We must set the CR0_MP bit and use the CR0_TS
1569 * bit to control the trap, because setting the CR0_EM bit does
1570 * not cause WAIT instructions to trap. It's important to trap
1571 * WAIT instructions - otherwise the "wait" variants of no-wait
1572 * control instructions would degenerate to the "no-wait" variants
1573 * after FP context switches but work correctly otherwise. It's
1574 * particularly important to trap WAITs when there is no NPX -
1575 * otherwise the "wait" variants would always degenerate.
1577 * Try setting CR0_NE to get correct error reporting on 486DX's.
1578 * Setting it should fail or do nothing on lesser processors.
1580 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1585 u_long bootdev; /* not a struct cdev *- encoding is different */
1586 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1587 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1590 * Initialize 386 and configure to run kernel
1594 * Initialize segments & interrupt table
1600 union descriptor *gdt;
1601 union descriptor *ldt;
1603 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1604 union descriptor ldt[NLDT]; /* local descriptor table */
1606 static struct gate_descriptor idt0[NIDT];
1607 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1608 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1609 struct mtx dt_lock; /* lock for GDT and LDT */
1611 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1612 extern int has_f00f_bug;
1615 static struct i386tss dblfault_tss;
1616 static char dblfault_stack[PAGE_SIZE];
1618 extern vm_offset_t proc0kstack;
1622 * software prototypes -- in more palatable form.
1624 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1625 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1627 struct soft_segment_descriptor gdt_segs[] = {
1628 /* GNULL_SEL 0 Null Descriptor */
1634 .ssd_xx = 0, .ssd_xx1 = 0,
1637 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1639 .ssd_limit = 0xfffff,
1640 .ssd_type = SDT_MEMRWA,
1643 .ssd_xx = 0, .ssd_xx1 = 0,
1646 /* GUFS_SEL 2 %fs Descriptor for user */
1648 .ssd_limit = 0xfffff,
1649 .ssd_type = SDT_MEMRWA,
1652 .ssd_xx = 0, .ssd_xx1 = 0,
1655 /* GUGS_SEL 3 %gs Descriptor for user */
1657 .ssd_limit = 0xfffff,
1658 .ssd_type = SDT_MEMRWA,
1661 .ssd_xx = 0, .ssd_xx1 = 0,
1664 /* GCODE_SEL 4 Code Descriptor for kernel */
1666 .ssd_limit = 0xfffff,
1667 .ssd_type = SDT_MEMERA,
1670 .ssd_xx = 0, .ssd_xx1 = 0,
1673 /* GDATA_SEL 5 Data Descriptor for kernel */
1675 .ssd_limit = 0xfffff,
1676 .ssd_type = SDT_MEMRWA,
1679 .ssd_xx = 0, .ssd_xx1 = 0,
1682 /* GUCODE_SEL 6 Code Descriptor for user */
1684 .ssd_limit = 0xfffff,
1685 .ssd_type = SDT_MEMERA,
1688 .ssd_xx = 0, .ssd_xx1 = 0,
1691 /* GUDATA_SEL 7 Data Descriptor for user */
1693 .ssd_limit = 0xfffff,
1694 .ssd_type = SDT_MEMRWA,
1697 .ssd_xx = 0, .ssd_xx1 = 0,
1700 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1701 { .ssd_base = 0x400,
1702 .ssd_limit = 0xfffff,
1703 .ssd_type = SDT_MEMRWA,
1706 .ssd_xx = 0, .ssd_xx1 = 0,
1710 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1713 .ssd_limit = sizeof(struct i386tss)-1,
1714 .ssd_type = SDT_SYS386TSS,
1717 .ssd_xx = 0, .ssd_xx1 = 0,
1720 /* GLDT_SEL 10 LDT Descriptor */
1721 { .ssd_base = (int) ldt,
1722 .ssd_limit = sizeof(ldt)-1,
1723 .ssd_type = SDT_SYSLDT,
1726 .ssd_xx = 0, .ssd_xx1 = 0,
1729 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1730 { .ssd_base = (int) ldt,
1731 .ssd_limit = (512 * sizeof(union descriptor)-1),
1732 .ssd_type = SDT_SYSLDT,
1735 .ssd_xx = 0, .ssd_xx1 = 0,
1738 /* GPANIC_SEL 12 Panic Tss Descriptor */
1739 { .ssd_base = (int) &dblfault_tss,
1740 .ssd_limit = sizeof(struct i386tss)-1,
1741 .ssd_type = SDT_SYS386TSS,
1744 .ssd_xx = 0, .ssd_xx1 = 0,
1747 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1749 .ssd_limit = 0xfffff,
1750 .ssd_type = SDT_MEMERA,
1753 .ssd_xx = 0, .ssd_xx1 = 0,
1756 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1758 .ssd_limit = 0xfffff,
1759 .ssd_type = SDT_MEMERA,
1762 .ssd_xx = 0, .ssd_xx1 = 0,
1765 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1767 .ssd_limit = 0xfffff,
1768 .ssd_type = SDT_MEMRWA,
1771 .ssd_xx = 0, .ssd_xx1 = 0,
1774 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1776 .ssd_limit = 0xfffff,
1777 .ssd_type = SDT_MEMRWA,
1780 .ssd_xx = 0, .ssd_xx1 = 0,
1783 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1785 .ssd_limit = 0xfffff,
1786 .ssd_type = SDT_MEMRWA,
1789 .ssd_xx = 0, .ssd_xx1 = 0,
1792 /* GNDIS_SEL 18 NDIS Descriptor */
1798 .ssd_xx = 0, .ssd_xx1 = 0,
1804 static struct soft_segment_descriptor ldt_segs[] = {
1805 /* Null Descriptor - overwritten by call gate */
1811 .ssd_xx = 0, .ssd_xx1 = 0,
1814 /* Null Descriptor - overwritten by call gate */
1820 .ssd_xx = 0, .ssd_xx1 = 0,
1823 /* Null Descriptor - overwritten by call gate */
1829 .ssd_xx = 0, .ssd_xx1 = 0,
1832 /* Code Descriptor for user */
1834 .ssd_limit = 0xfffff,
1835 .ssd_type = SDT_MEMERA,
1838 .ssd_xx = 0, .ssd_xx1 = 0,
1841 /* Null Descriptor - overwritten by call gate */
1847 .ssd_xx = 0, .ssd_xx1 = 0,
1850 /* Data Descriptor for user */
1852 .ssd_limit = 0xfffff,
1853 .ssd_type = SDT_MEMRWA,
1856 .ssd_xx = 0, .ssd_xx1 = 0,
1862 setidt(idx, func, typ, dpl, selec)
1869 struct gate_descriptor *ip;
1872 ip->gd_looffset = (int)func;
1873 ip->gd_selector = selec;
1879 ip->gd_hioffset = ((int)func)>>16 ;
1883 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1884 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1885 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1886 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1887 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1891 * Display the index and function name of any IDT entries that don't use
1892 * the default 'rsvd' entry point.
1894 DB_SHOW_COMMAND(idt, db_show_idt)
1896 struct gate_descriptor *ip;
1901 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1902 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1903 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1904 db_printf("%3d\t", idx);
1905 db_printsym(func, DB_STGY_PROC);
1912 /* Show privileged registers. */
1913 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1915 uint64_t idtr, gdtr;
1918 db_printf("idtr\t0x%08x/%04x\n",
1919 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1921 db_printf("gdtr\t0x%08x/%04x\n",
1922 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1923 db_printf("ldtr\t0x%04x\n", rldt());
1924 db_printf("tr\t0x%04x\n", rtr());
1925 db_printf("cr0\t0x%08x\n", rcr0());
1926 db_printf("cr2\t0x%08x\n", rcr2());
1927 db_printf("cr3\t0x%08x\n", rcr3());
1928 db_printf("cr4\t0x%08x\n", rcr4());
1934 struct segment_descriptor *sd;
1935 struct soft_segment_descriptor *ssd;
1937 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1938 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1939 ssd->ssd_type = sd->sd_type;
1940 ssd->ssd_dpl = sd->sd_dpl;
1941 ssd->ssd_p = sd->sd_p;
1942 ssd->ssd_def32 = sd->sd_def32;
1943 ssd->ssd_gran = sd->sd_gran;
1947 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1951 physmap_idx = *physmap_idxp;
1953 if (boothowto & RB_VERBOSE)
1954 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1955 smap->type, smap->base, smap->length);
1957 if (smap->type != SMAP_TYPE_MEMORY)
1960 if (smap->length == 0)
1964 if (smap->base >= 0xffffffff) {
1965 printf("%uK of memory above 4GB ignored\n",
1966 (u_int)(smap->length / 1024));
1971 for (i = 0; i <= physmap_idx; i += 2) {
1972 if (smap->base < physmap[i + 1]) {
1973 if (boothowto & RB_VERBOSE)
1975 "Overlapping or non-monotonic memory region, ignoring second region\n");
1980 if (smap->base == physmap[physmap_idx + 1]) {
1981 physmap[physmap_idx + 1] += smap->length;
1986 *physmap_idxp = physmap_idx;
1987 if (physmap_idx == PHYSMAP_SIZE) {
1989 "Too many segments in the physical address map, giving up\n");
1992 physmap[physmap_idx] = smap->base;
1993 physmap[physmap_idx + 1] = smap->base + smap->length;
1998 * Populate the (physmap) array with base/bound pairs describing the
1999 * available physical memory in the system, then test this memory and
2000 * build the phys_avail array describing the actually-available memory.
2002 * If we cannot accurately determine the physical memory map, then use
2003 * value from the 0xE801 call, and failing that, the RTC.
2005 * Total memory size may be set by the kernel environment variable
2006 * hw.physmem or the compile-time define MAXMEM.
2008 * XXX first should be vm_paddr_t.
2011 getmemsize(int first)
2013 int i, off, physmap_idx, pa_indx, da_indx;
2014 int hasbrokenint12, has_smap;
2015 u_long physmem_tunable;
2017 struct vm86frame vmf;
2018 struct vm86context vmc;
2019 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
2021 struct bios_smap *smap, *smapbase, *smapend;
2023 quad_t dcons_addr, dcons_size;
2028 if (arch_i386_is_xbox) {
2030 * We queried the memory size before, so chop off 4MB for
2031 * the framebuffer and inform the OS of this.
2034 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2041 Maxmem = xen_start_info->nr_pages - init_first;
2044 physmap[0] = init_first << PAGE_SHIFT;
2045 physmap[1] = ptoa(Maxmem) - round_page(MSGBUF_SIZE);
2050 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2051 bzero(&vmf, sizeof(vmf));
2052 bzero(physmap, sizeof(physmap));
2056 * Some newer BIOSes has broken INT 12H implementation which cause
2057 * kernel panic immediately. In this case, we need to scan SMAP
2058 * with INT 15:E820 first, then determine base memory size.
2060 if (hasbrokenint12) {
2065 * Perform "base memory" related probes & setup
2067 vm86_intcall(0x12, &vmf);
2068 basemem = vmf.vmf_ax;
2069 if (basemem > 640) {
2070 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2076 * XXX if biosbasemem is now < 640, there is a `hole'
2077 * between the end of base memory and the start of
2078 * ISA memory. The hole may be empty or it may
2079 * contain BIOS code or data. Map it read/write so
2080 * that the BIOS can write to it. (Memory from 0 to
2081 * the physical end of the kernel is mapped read-only
2082 * to begin with and then parts of it are remapped.
2083 * The parts that aren't remapped form holes that
2084 * remain read-only and are unused by the kernel.
2085 * The base memory area is below the physical end of
2086 * the kernel and right now forms a read-only hole.
2087 * The part of it from PAGE_SIZE to
2088 * (trunc_page(biosbasemem * 1024) - 1) will be
2089 * remapped and used by the kernel later.)
2091 * This code is similar to the code used in
2092 * pmap_mapdev, but since no memory needs to be
2093 * allocated we simply change the mapping.
2095 for (pa = trunc_page(basemem * 1024);
2096 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2097 pmap_kenter(KERNBASE + pa, pa);
2100 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2101 * the vm86 page table so that vm86 can scribble on them using
2102 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2103 * page 0, at least as initialized here?
2105 pte = (pt_entry_t *)vm86paddr;
2106 for (i = basemem / 4; i < 160; i++)
2107 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2111 * Fetch the memory map with INT 15:E820. First, check to see
2112 * if the loader supplied it and use that if so. Otherwise,
2113 * use vm86 to invoke the BIOS call directly.
2117 kmdp = preload_search_by_type("elf kernel");
2119 kmdp = preload_search_by_type("elf32 kernel");
2121 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2122 MODINFO_METADATA | MODINFOMD_SMAP);
2123 if (smapbase != NULL) {
2124 /* subr_module.c says:
2125 * "Consumer may safely assume that size value precedes data."
2126 * ie: an int32_t immediately precedes smap.
2128 smapsize = *((u_int32_t *)smapbase - 1);
2129 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2132 for (smap = smapbase; smap < smapend; smap++)
2133 if (!add_smap_entry(smap, physmap, &physmap_idx))
2137 * map page 1 R/W into the kernel page table so we can use it
2138 * as a buffer. The kernel will unmap this page later.
2140 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2142 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE +
2144 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2148 vmf.vmf_eax = 0xE820;
2149 vmf.vmf_edx = SMAP_SIG;
2150 vmf.vmf_ecx = sizeof(struct bios_smap);
2151 i = vm86_datacall(0x15, &vmf, &vmc);
2152 if (i || vmf.vmf_eax != SMAP_SIG)
2155 if (!add_smap_entry(smap, physmap, &physmap_idx))
2157 } while (vmf.vmf_ebx != 0);
2161 * Perform "base memory" related probes & setup based on SMAP
2164 for (i = 0; i <= physmap_idx; i += 2) {
2165 if (physmap[i] == 0x00000000) {
2166 basemem = physmap[i + 1] / 1024;
2172 * XXX this function is horribly organized and has to the same
2173 * things that it does above here.
2177 if (basemem > 640) {
2179 "Preposterous BIOS basemem of %uK, truncating to 640K\n",
2185 * Let vm86 scribble on pages between basemem and
2186 * ISA_HOLE_START, as above.
2188 for (pa = trunc_page(basemem * 1024);
2189 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2190 pmap_kenter(KERNBASE + pa, pa);
2191 pte = (pt_entry_t *)vm86paddr;
2192 for (i = basemem / 4; i < 160; i++)
2193 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2196 if (physmap[1] != 0)
2200 * If we failed above, try memory map with INT 15:E801
2202 vmf.vmf_ax = 0xE801;
2203 if (vm86_intcall(0x15, &vmf) == 0) {
2204 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2208 vm86_intcall(0x15, &vmf);
2209 extmem = vmf.vmf_ax;
2212 * Prefer the RTC value for extended memory.
2214 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2219 * Special hack for chipsets that still remap the 384k hole when
2220 * there's 16MB of memory - this really confuses people that
2221 * are trying to use bus mastering ISA controllers with the
2222 * "16MB limit"; they only have 16MB, but the remapping puts
2223 * them beyond the limit.
2225 * If extended memory is between 15-16MB (16-17MB phys address range),
2228 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2232 physmap[1] = basemem * 1024;
2234 physmap[physmap_idx] = 0x100000;
2235 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2239 * Now, physmap contains a map of physical memory.
2243 /* make hole for AP bootstrap code */
2244 physmap[1] = mp_bootaddress(physmap[1]);
2248 * Maxmem isn't the "maximum memory", it's one larger than the
2249 * highest page of the physical address space. It should be
2250 * called something like "Maxphyspage". We may adjust this
2251 * based on ``hw.physmem'' and the results of the memory test.
2253 Maxmem = atop(physmap[physmap_idx + 1]);
2256 Maxmem = MAXMEM / 4;
2259 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2260 Maxmem = atop(physmem_tunable);
2263 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2264 * the amount of memory in the system.
2266 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2267 Maxmem = atop(physmap[physmap_idx + 1]);
2269 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2270 (boothowto & RB_VERBOSE))
2271 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2274 * If Maxmem has been increased beyond what the system has detected,
2275 * extend the last memory segment to the new limit.
2277 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2278 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2280 /* call pmap initialization to make new kernel address space */
2281 pmap_bootstrap(first);
2284 * Size up each available chunk of physical memory.
2286 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2289 phys_avail[pa_indx++] = physmap[0];
2290 phys_avail[pa_indx] = physmap[0];
2291 dump_avail[da_indx] = physmap[0];
2295 * Get dcons buffer address
2297 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2298 getenv_quad("dcons.size", &dcons_size) == 0)
2303 * physmap is in bytes, so when converting to page boundaries,
2304 * round up the start address and round down the end address.
2306 for (i = 0; i <= physmap_idx; i += 2) {
2309 end = ptoa((vm_paddr_t)Maxmem);
2310 if (physmap[i + 1] < end)
2311 end = trunc_page(physmap[i + 1]);
2312 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2313 int tmp, page_bad, full;
2314 int *ptr = (int *)CADDR1;
2318 * block out kernel memory as not available.
2320 if (pa >= KERNLOAD && pa < first)
2324 * block out dcons buffer
2327 && pa >= trunc_page(dcons_addr)
2328 && pa < dcons_addr + dcons_size)
2334 * map page into kernel: valid, read/write,non-cacheable
2336 *pte = pa | PG_V | PG_RW | PG_N;
2341 * Test for alternating 1's and 0's
2343 *(volatile int *)ptr = 0xaaaaaaaa;
2344 if (*(volatile int *)ptr != 0xaaaaaaaa)
2347 * Test for alternating 0's and 1's
2349 *(volatile int *)ptr = 0x55555555;
2350 if (*(volatile int *)ptr != 0x55555555)
2355 *(volatile int *)ptr = 0xffffffff;
2356 if (*(volatile int *)ptr != 0xffffffff)
2361 *(volatile int *)ptr = 0x0;
2362 if (*(volatile int *)ptr != 0x0)
2365 * Restore original value.
2370 * Adjust array of valid/good pages.
2372 if (page_bad == TRUE)
2375 * If this good page is a continuation of the
2376 * previous set of good pages, then just increase
2377 * the end pointer. Otherwise start a new chunk.
2378 * Note that "end" points one higher than end,
2379 * making the range >= start and < end.
2380 * If we're also doing a speculative memory
2381 * test and we at or past the end, bump up Maxmem
2382 * so that we keep going. The first bad page
2383 * will terminate the loop.
2385 if (phys_avail[pa_indx] == pa) {
2386 phys_avail[pa_indx] += PAGE_SIZE;
2389 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2391 "Too many holes in the physical address space, giving up\n");
2396 phys_avail[pa_indx++] = pa; /* start */
2397 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2401 if (dump_avail[da_indx] == pa) {
2402 dump_avail[da_indx] += PAGE_SIZE;
2405 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2409 dump_avail[da_indx++] = pa; /* start */
2410 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2420 phys_avail[0] = physfree;
2421 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2426 * The last chunk must contain at least one page plus the message
2427 * buffer to avoid complicating other code (message buffer address
2428 * calculation, etc.).
2430 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2431 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
2432 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2433 phys_avail[pa_indx--] = 0;
2434 phys_avail[pa_indx--] = 0;
2437 Maxmem = atop(phys_avail[pa_indx]);
2439 /* Trim off space for the message buffer. */
2440 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2442 /* Map the message buffer. */
2443 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2444 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2451 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2457 unsigned long gdtmachpfn;
2458 int error, gsel_tss, metadata_missing, x, pa;
2460 struct callback_register event = {
2461 .type = CALLBACKTYPE_event,
2462 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2464 struct callback_register failsafe = {
2465 .type = CALLBACKTYPE_failsafe,
2466 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2469 thread0.td_kstack = proc0kstack;
2470 thread0.td_pcb = (struct pcb *)
2471 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2474 * This may be done better later if it gets more high level
2475 * components in it. If so just link td->td_proc here.
2477 proc_linkup0(&proc0, &thread0);
2479 metadata_missing = 0;
2480 if (xen_start_info->mod_start) {
2481 preload_metadata = (caddr_t)xen_start_info->mod_start;
2482 preload_bootstrap_relocate(KERNBASE);
2484 metadata_missing = 1;
2487 kern_envp = static_env;
2488 else if ((caddr_t)xen_start_info->cmd_line)
2489 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2491 boothowto |= xen_boothowto(kern_envp);
2493 /* Init basic tunables, hz etc */
2497 * XEN occupies a portion of the upper virtual address space
2498 * At its base it manages an array mapping machine page frames
2499 * to physical page frames - hence we need to be able to
2500 * access 4GB - (64MB - 4MB + 64k)
2502 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2503 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2504 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2505 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2506 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2507 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2508 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2509 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2512 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2513 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2515 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2516 bzero(gdt, PAGE_SIZE);
2517 for (x = 0; x < NGDT; x++)
2518 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2520 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2522 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2523 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2524 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2528 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2529 panic("set_trap_table failed - error %d\n", error);
2532 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2534 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2535 #if CONFIG_XEN_COMPAT <= 0x030002
2536 if (error == -ENOXENSYS)
2537 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2538 (unsigned long)Xhypervisor_callback,
2539 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2541 pcpu_init(pc, 0, sizeof(struct pcpu));
2542 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2543 pmap_kenter(pa + KERNBASE, pa);
2544 dpcpu_init((void *)(first + KERNBASE), 0);
2545 first += DPCPU_SIZE;
2547 PCPU_SET(prvspace, pc);
2548 PCPU_SET(curthread, &thread0);
2549 PCPU_SET(curpcb, thread0.td_pcb);
2552 * Initialize mutexes.
2554 * icu_lock: in order to allow an interrupt to occur in a critical
2555 * section, to set pcpu->ipending (etc...) properly, we
2556 * must be able to get the icu lock, so it can't be
2560 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2562 /* make ldt memory segments */
2563 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2564 bzero(ldt, PAGE_SIZE);
2565 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2566 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2567 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2568 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2570 default_proc_ldt.ldt_base = (caddr_t)ldt;
2571 default_proc_ldt.ldt_len = 6;
2572 _default_ldt = (int)&default_proc_ldt;
2573 PCPU_SET(currentldt, _default_ldt)
2574 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2575 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2577 #if defined(XEN_PRIVILEGED)
2579 * Initialize the i8254 before the console so that console
2580 * initialization can use DELAY().
2586 * Initialize the console before we print anything out.
2590 if (metadata_missing)
2591 printf("WARNING: loader(8) metadata is missing!\n");
2599 ksym_start = bootinfo.bi_symtab;
2600 ksym_end = bootinfo.bi_esymtab;
2606 if (boothowto & RB_KDB)
2607 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2610 finishidentcpu(); /* Final stage of CPU initialization */
2611 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2612 GSEL(GCODE_SEL, SEL_KPL));
2613 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2614 GSEL(GCODE_SEL, SEL_KPL));
2615 initializecpu(); /* Initialize CPU registers */
2617 /* make an initial tss so cpu can get interrupt stack on syscall! */
2618 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2619 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2620 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2621 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2622 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2623 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2624 PCPU_GET(common_tss.tss_esp0));
2626 /* pointer to selector slot for %fs/%gs */
2627 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2629 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2630 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2631 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2632 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2634 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2636 dblfault_tss.tss_cr3 = (int)IdlePTD;
2638 dblfault_tss.tss_eip = (int)dblfault_handler;
2639 dblfault_tss.tss_eflags = PSL_KERNEL;
2640 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2641 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2642 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2643 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2644 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2648 init_param2(physmem);
2650 /* now running on new page tables, configured,and u/iom is accessible */
2652 msgbufinit(msgbufp, MSGBUF_SIZE);
2653 /* transfer to user mode */
2655 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2656 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2658 /* setup proc 0's pcb */
2659 thread0.td_pcb->pcb_flags = 0;
2661 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2663 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2665 thread0.td_pcb->pcb_ext = 0;
2666 thread0.td_frame = &proc0_tf;
2667 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2668 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2670 if (cpu_probe_amdc1e())
2671 cpu_idle_fn = cpu_idle_amdc1e;
2679 struct gate_descriptor *gdp;
2680 int gsel_tss, metadata_missing, x, pa;
2683 thread0.td_kstack = proc0kstack;
2684 thread0.td_pcb = (struct pcb *)
2685 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2688 * This may be done better later if it gets more high level
2689 * components in it. If so just link td->td_proc here.
2691 proc_linkup0(&proc0, &thread0);
2693 metadata_missing = 0;
2694 if (bootinfo.bi_modulep) {
2695 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2696 preload_bootstrap_relocate(KERNBASE);
2698 metadata_missing = 1;
2701 kern_envp = static_env;
2702 else if (bootinfo.bi_envp)
2703 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2705 /* Init basic tunables, hz etc */
2709 * Make gdt memory segments. All segments cover the full 4GB
2710 * of address space and permissions are enforced at page level.
2712 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2713 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2714 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2715 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2716 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2717 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2720 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2721 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2722 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2724 for (x = 0; x < NGDT; x++)
2725 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2727 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2728 r_gdt.rd_base = (int) gdt;
2729 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2732 pcpu_init(pc, 0, sizeof(struct pcpu));
2733 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2734 pmap_kenter(pa + KERNBASE, pa);
2735 dpcpu_init((void *)(first + KERNBASE), 0);
2736 first += DPCPU_SIZE;
2737 PCPU_SET(prvspace, pc);
2738 PCPU_SET(curthread, &thread0);
2739 PCPU_SET(curpcb, thread0.td_pcb);
2742 * Initialize mutexes.
2744 * icu_lock: in order to allow an interrupt to occur in a critical
2745 * section, to set pcpu->ipending (etc...) properly, we
2746 * must be able to get the icu lock, so it can't be
2750 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2752 /* make ldt memory segments */
2753 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2754 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2755 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2756 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2758 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2760 PCPU_SET(currentldt, _default_ldt);
2763 for (x = 0; x < NIDT; x++)
2764 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2765 GSEL(GCODE_SEL, SEL_KPL));
2766 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2767 GSEL(GCODE_SEL, SEL_KPL));
2768 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2769 GSEL(GCODE_SEL, SEL_KPL));
2770 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2771 GSEL(GCODE_SEL, SEL_KPL));
2772 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2773 GSEL(GCODE_SEL, SEL_KPL));
2774 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2775 GSEL(GCODE_SEL, SEL_KPL));
2776 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2777 GSEL(GCODE_SEL, SEL_KPL));
2778 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2779 GSEL(GCODE_SEL, SEL_KPL));
2780 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2781 , GSEL(GCODE_SEL, SEL_KPL));
2782 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2783 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2784 GSEL(GCODE_SEL, SEL_KPL));
2785 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2786 GSEL(GCODE_SEL, SEL_KPL));
2787 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2788 GSEL(GCODE_SEL, SEL_KPL));
2789 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2790 GSEL(GCODE_SEL, SEL_KPL));
2791 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2792 GSEL(GCODE_SEL, SEL_KPL));
2793 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2794 GSEL(GCODE_SEL, SEL_KPL));
2795 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2796 GSEL(GCODE_SEL, SEL_KPL));
2797 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2798 GSEL(GCODE_SEL, SEL_KPL));
2799 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2800 GSEL(GCODE_SEL, SEL_KPL));
2801 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2802 GSEL(GCODE_SEL, SEL_KPL));
2803 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2804 GSEL(GCODE_SEL, SEL_KPL));
2806 r_idt.rd_limit = sizeof(idt0) - 1;
2807 r_idt.rd_base = (int) idt;
2812 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2813 * This should be 0x10de / 0x02a5.
2815 * This is exactly what Linux does.
2817 outl(0xcf8, 0x80000000);
2818 if (inl(0xcfc) == 0x02a510de) {
2819 arch_i386_is_xbox = 1;
2820 pic16l_setled(XBOX_LED_GREEN);
2823 * We are an XBOX, but we may have either 64MB or 128MB of
2824 * memory. The PCI host bridge should be programmed for this,
2825 * so we just query it.
2827 outl(0xcf8, 0x80000084);
2828 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2833 * Initialize the i8254 before the console so that console
2834 * initialization can use DELAY().
2839 * Initialize the console before we print anything out.
2843 if (metadata_missing)
2844 printf("WARNING: loader(8) metadata is missing!\n");
2852 ksym_start = bootinfo.bi_symtab;
2853 ksym_end = bootinfo.bi_esymtab;
2859 if (boothowto & RB_KDB)
2860 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2863 finishidentcpu(); /* Final stage of CPU initialization */
2864 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2865 GSEL(GCODE_SEL, SEL_KPL));
2866 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2867 GSEL(GCODE_SEL, SEL_KPL));
2868 initializecpu(); /* Initialize CPU registers */
2870 /* make an initial tss so cpu can get interrupt stack on syscall! */
2871 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2872 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2873 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2874 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2875 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2876 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2877 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2878 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2881 /* pointer to selector slot for %fs/%gs */
2882 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2884 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2885 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2886 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2887 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2889 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2891 dblfault_tss.tss_cr3 = (int)IdlePTD;
2893 dblfault_tss.tss_eip = (int)dblfault_handler;
2894 dblfault_tss.tss_eflags = PSL_KERNEL;
2895 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2896 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2897 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2898 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2899 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2903 init_param2(physmem);
2905 /* now running on new page tables, configured,and u/iom is accessible */
2907 msgbufinit(msgbufp, MSGBUF_SIZE);
2909 /* make a call gate to reenter kernel with */
2910 gdp = &ldt[LSYS5CALLS_SEL].gd;
2912 x = (int) &IDTVEC(lcall_syscall);
2913 gdp->gd_looffset = x;
2914 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2916 gdp->gd_type = SDT_SYS386CGT;
2917 gdp->gd_dpl = SEL_UPL;
2919 gdp->gd_hioffset = x >> 16;
2921 /* XXX does this work? */
2923 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2924 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2926 /* transfer to user mode */
2928 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2929 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2931 /* setup proc 0's pcb */
2932 thread0.td_pcb->pcb_flags = 0;
2934 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2936 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2938 thread0.td_pcb->pcb_ext = 0;
2939 thread0.td_frame = &proc0_tf;
2941 if (cpu_probe_amdc1e())
2942 cpu_idle_fn = cpu_idle_amdc1e;
2947 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2950 pcpu->pc_acpi_id = 0xffffffff;
2954 spinlock_enter(void)
2959 if (td->td_md.md_spinlock_count == 0)
2960 td->td_md.md_saved_flags = intr_disable();
2961 td->td_md.md_spinlock_count++;
2972 td->td_md.md_spinlock_count--;
2973 if (td->td_md.md_spinlock_count == 0)
2974 intr_restore(td->td_md.md_saved_flags);
2977 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2978 static void f00f_hack(void *unused);
2979 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2982 f00f_hack(void *unused)
2984 struct gate_descriptor *new_idt;
2992 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2994 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2996 panic("kmem_alloc returned 0");
2998 /* Put the problematic entry (#6) at the end of the lower page. */
2999 new_idt = (struct gate_descriptor*)
3000 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3001 bcopy(idt, new_idt, sizeof(idt0));
3002 r_idt.rd_base = (u_int)new_idt;
3005 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3006 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3007 panic("vm_map_protect failed");
3009 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3012 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3013 * we want to start a backtrace from the function that caused us to enter
3014 * the debugger. We have the context in the trapframe, but base the trace
3015 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3016 * enough for a backtrace.
3019 makectx(struct trapframe *tf, struct pcb *pcb)
3022 pcb->pcb_edi = tf->tf_edi;
3023 pcb->pcb_esi = tf->tf_esi;
3024 pcb->pcb_ebp = tf->tf_ebp;
3025 pcb->pcb_ebx = tf->tf_ebx;
3026 pcb->pcb_eip = tf->tf_eip;
3027 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3031 ptrace_set_pc(struct thread *td, u_long addr)
3034 td->td_frame->tf_eip = addr;
3039 ptrace_single_step(struct thread *td)
3041 td->td_frame->tf_eflags |= PSL_T;
3046 ptrace_clear_single_step(struct thread *td)
3048 td->td_frame->tf_eflags &= ~PSL_T;
3053 fill_regs(struct thread *td, struct reg *regs)
3056 struct trapframe *tp;
3060 regs->r_fs = tp->tf_fs;
3061 regs->r_es = tp->tf_es;
3062 regs->r_ds = tp->tf_ds;
3063 regs->r_edi = tp->tf_edi;
3064 regs->r_esi = tp->tf_esi;
3065 regs->r_ebp = tp->tf_ebp;
3066 regs->r_ebx = tp->tf_ebx;
3067 regs->r_edx = tp->tf_edx;
3068 regs->r_ecx = tp->tf_ecx;
3069 regs->r_eax = tp->tf_eax;
3070 regs->r_eip = tp->tf_eip;
3071 regs->r_cs = tp->tf_cs;
3072 regs->r_eflags = tp->tf_eflags;
3073 regs->r_esp = tp->tf_esp;
3074 regs->r_ss = tp->tf_ss;
3075 regs->r_gs = pcb->pcb_gs;
3080 set_regs(struct thread *td, struct reg *regs)
3083 struct trapframe *tp;
3086 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3087 !CS_SECURE(regs->r_cs))
3090 tp->tf_fs = regs->r_fs;
3091 tp->tf_es = regs->r_es;
3092 tp->tf_ds = regs->r_ds;
3093 tp->tf_edi = regs->r_edi;
3094 tp->tf_esi = regs->r_esi;
3095 tp->tf_ebp = regs->r_ebp;
3096 tp->tf_ebx = regs->r_ebx;
3097 tp->tf_edx = regs->r_edx;
3098 tp->tf_ecx = regs->r_ecx;
3099 tp->tf_eax = regs->r_eax;
3100 tp->tf_eip = regs->r_eip;
3101 tp->tf_cs = regs->r_cs;
3102 tp->tf_eflags = regs->r_eflags;
3103 tp->tf_esp = regs->r_esp;
3104 tp->tf_ss = regs->r_ss;
3105 pcb->pcb_gs = regs->r_gs;
3109 #ifdef CPU_ENABLE_SSE
3111 fill_fpregs_xmm(sv_xmm, sv_87)
3112 struct savexmm *sv_xmm;
3113 struct save87 *sv_87;
3115 register struct env87 *penv_87 = &sv_87->sv_env;
3116 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3119 bzero(sv_87, sizeof(*sv_87));
3121 /* FPU control/status */
3122 penv_87->en_cw = penv_xmm->en_cw;
3123 penv_87->en_sw = penv_xmm->en_sw;
3124 penv_87->en_tw = penv_xmm->en_tw;
3125 penv_87->en_fip = penv_xmm->en_fip;
3126 penv_87->en_fcs = penv_xmm->en_fcs;
3127 penv_87->en_opcode = penv_xmm->en_opcode;
3128 penv_87->en_foo = penv_xmm->en_foo;
3129 penv_87->en_fos = penv_xmm->en_fos;
3132 for (i = 0; i < 8; ++i)
3133 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3137 set_fpregs_xmm(sv_87, sv_xmm)
3138 struct save87 *sv_87;
3139 struct savexmm *sv_xmm;
3141 register struct env87 *penv_87 = &sv_87->sv_env;
3142 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3145 /* FPU control/status */
3146 penv_xmm->en_cw = penv_87->en_cw;
3147 penv_xmm->en_sw = penv_87->en_sw;
3148 penv_xmm->en_tw = penv_87->en_tw;
3149 penv_xmm->en_fip = penv_87->en_fip;
3150 penv_xmm->en_fcs = penv_87->en_fcs;
3151 penv_xmm->en_opcode = penv_87->en_opcode;
3152 penv_xmm->en_foo = penv_87->en_foo;
3153 penv_xmm->en_fos = penv_87->en_fos;
3156 for (i = 0; i < 8; ++i)
3157 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3159 #endif /* CPU_ENABLE_SSE */
3162 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3164 #ifdef CPU_ENABLE_SSE
3166 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
3167 (struct save87 *)fpregs);
3170 #endif /* CPU_ENABLE_SSE */
3171 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
3176 set_fpregs(struct thread *td, struct fpreg *fpregs)
3178 #ifdef CPU_ENABLE_SSE
3180 set_fpregs_xmm((struct save87 *)fpregs,
3181 &td->td_pcb->pcb_save.sv_xmm);
3184 #endif /* CPU_ENABLE_SSE */
3185 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
3190 * Get machine context.
3193 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3195 struct trapframe *tp;
3196 struct segment_descriptor *sdp;
3200 PROC_LOCK(curthread->td_proc);
3201 mcp->mc_onstack = sigonstack(tp->tf_esp);
3202 PROC_UNLOCK(curthread->td_proc);
3203 mcp->mc_gs = td->td_pcb->pcb_gs;
3204 mcp->mc_fs = tp->tf_fs;
3205 mcp->mc_es = tp->tf_es;
3206 mcp->mc_ds = tp->tf_ds;
3207 mcp->mc_edi = tp->tf_edi;
3208 mcp->mc_esi = tp->tf_esi;
3209 mcp->mc_ebp = tp->tf_ebp;
3210 mcp->mc_isp = tp->tf_isp;
3211 mcp->mc_eflags = tp->tf_eflags;
3212 if (flags & GET_MC_CLEAR_RET) {
3215 mcp->mc_eflags &= ~PSL_C;
3217 mcp->mc_eax = tp->tf_eax;
3218 mcp->mc_edx = tp->tf_edx;
3220 mcp->mc_ebx = tp->tf_ebx;
3221 mcp->mc_ecx = tp->tf_ecx;
3222 mcp->mc_eip = tp->tf_eip;
3223 mcp->mc_cs = tp->tf_cs;
3224 mcp->mc_esp = tp->tf_esp;
3225 mcp->mc_ss = tp->tf_ss;
3226 mcp->mc_len = sizeof(*mcp);
3227 get_fpcontext(td, mcp);
3228 sdp = &td->td_pcb->pcb_gsd;
3229 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3230 sdp = &td->td_pcb->pcb_fsd;
3231 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3237 * Set machine context.
3239 * However, we don't set any but the user modifiable flags, and we won't
3240 * touch the cs selector.
3243 set_mcontext(struct thread *td, const mcontext_t *mcp)
3245 struct trapframe *tp;
3249 if (mcp->mc_len != sizeof(*mcp))
3251 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3252 (tp->tf_eflags & ~PSL_USERCHANGE);
3253 if ((ret = set_fpcontext(td, mcp)) == 0) {
3254 tp->tf_fs = mcp->mc_fs;
3255 tp->tf_es = mcp->mc_es;
3256 tp->tf_ds = mcp->mc_ds;
3257 tp->tf_edi = mcp->mc_edi;
3258 tp->tf_esi = mcp->mc_esi;
3259 tp->tf_ebp = mcp->mc_ebp;
3260 tp->tf_ebx = mcp->mc_ebx;
3261 tp->tf_edx = mcp->mc_edx;
3262 tp->tf_ecx = mcp->mc_ecx;
3263 tp->tf_eax = mcp->mc_eax;
3264 tp->tf_eip = mcp->mc_eip;
3265 tp->tf_eflags = eflags;
3266 tp->tf_esp = mcp->mc_esp;
3267 tp->tf_ss = mcp->mc_ss;
3268 td->td_pcb->pcb_gs = mcp->mc_gs;
3275 get_fpcontext(struct thread *td, mcontext_t *mcp)
3278 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3279 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3281 union savefpu *addr;
3284 * XXX mc_fpstate might be misaligned, since its declaration is not
3285 * unportabilized using __attribute__((aligned(16))) like the
3286 * declaration of struct savemm, and anyway, alignment doesn't work
3287 * for auto variables since we don't use gcc's pessimal stack
3288 * alignment. Work around this by abusing the spare fields after
3291 * XXX unpessimize most cases by only aligning when fxsave might be
3292 * called, although this requires knowing too much about
3293 * npxgetregs()'s internals.
3295 addr = (union savefpu *)&mcp->mc_fpstate;
3296 if (td == PCPU_GET(fpcurthread) &&
3297 #ifdef CPU_ENABLE_SSE
3300 ((uintptr_t)(void *)addr & 0xF)) {
3302 addr = (void *)((char *)addr + 4);
3303 while ((uintptr_t)(void *)addr & 0xF);
3305 mcp->mc_ownedfp = npxgetregs(td, addr);
3306 if (addr != (union savefpu *)&mcp->mc_fpstate) {
3307 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3308 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
3310 mcp->mc_fpformat = npxformat();
3315 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3317 union savefpu *addr;
3319 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3321 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3322 mcp->mc_fpformat != _MC_FPFMT_XMM)
3324 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3325 /* We don't care what state is left in the FPU or PCB. */
3327 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3328 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3329 /* XXX align as above. */
3330 addr = (union savefpu *)&mcp->mc_fpstate;
3331 if (td == PCPU_GET(fpcurthread) &&
3332 #ifdef CPU_ENABLE_SSE
3335 ((uintptr_t)(void *)addr & 0xF)) {
3337 addr = (void *)((char *)addr + 4);
3338 while ((uintptr_t)(void *)addr & 0xF);
3339 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
3342 #ifdef CPU_ENABLE_SSE
3344 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
3347 * XXX we violate the dubious requirement that npxsetregs()
3348 * be called with interrupts disabled.
3350 npxsetregs(td, addr);
3353 * Don't bother putting things back where they were in the
3354 * misaligned case, since we know that the caller won't use
3363 fpstate_drop(struct thread *td)
3369 if (PCPU_GET(fpcurthread) == td)
3373 * XXX force a full drop of the npx. The above only drops it if we
3374 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3376 * XXX I don't much like npxgetregs()'s semantics of doing a full
3377 * drop. Dropping only to the pcb matches fnsave's behaviour.
3378 * We only need to drop to !PCB_INITDONE in sendsig(). But
3379 * sendsig() is the only caller of npxgetregs()... perhaps we just
3380 * have too many layers.
3382 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
3387 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3392 dbregs->dr[0] = rdr0();
3393 dbregs->dr[1] = rdr1();
3394 dbregs->dr[2] = rdr2();
3395 dbregs->dr[3] = rdr3();
3396 dbregs->dr[4] = rdr4();
3397 dbregs->dr[5] = rdr5();
3398 dbregs->dr[6] = rdr6();
3399 dbregs->dr[7] = rdr7();
3402 dbregs->dr[0] = pcb->pcb_dr0;
3403 dbregs->dr[1] = pcb->pcb_dr1;
3404 dbregs->dr[2] = pcb->pcb_dr2;
3405 dbregs->dr[3] = pcb->pcb_dr3;
3408 dbregs->dr[6] = pcb->pcb_dr6;
3409 dbregs->dr[7] = pcb->pcb_dr7;
3415 set_dbregs(struct thread *td, struct dbreg *dbregs)
3421 load_dr0(dbregs->dr[0]);
3422 load_dr1(dbregs->dr[1]);
3423 load_dr2(dbregs->dr[2]);
3424 load_dr3(dbregs->dr[3]);
3425 load_dr4(dbregs->dr[4]);
3426 load_dr5(dbregs->dr[5]);
3427 load_dr6(dbregs->dr[6]);
3428 load_dr7(dbregs->dr[7]);
3431 * Don't let an illegal value for dr7 get set. Specifically,
3432 * check for undefined settings. Setting these bit patterns
3433 * result in undefined behaviour and can lead to an unexpected
3436 for (i = 0; i < 4; i++) {
3437 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3439 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3446 * Don't let a process set a breakpoint that is not within the
3447 * process's address space. If a process could do this, it
3448 * could halt the system by setting a breakpoint in the kernel
3449 * (if ddb was enabled). Thus, we need to check to make sure
3450 * that no breakpoints are being enabled for addresses outside
3451 * process's address space.
3453 * XXX - what about when the watched area of the user's
3454 * address space is written into from within the kernel
3455 * ... wouldn't that still cause a breakpoint to be generated
3456 * from within kernel mode?
3459 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3460 /* dr0 is enabled */
3461 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3465 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3466 /* dr1 is enabled */
3467 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3471 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3472 /* dr2 is enabled */
3473 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3477 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3478 /* dr3 is enabled */
3479 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3483 pcb->pcb_dr0 = dbregs->dr[0];
3484 pcb->pcb_dr1 = dbregs->dr[1];
3485 pcb->pcb_dr2 = dbregs->dr[2];
3486 pcb->pcb_dr3 = dbregs->dr[3];
3487 pcb->pcb_dr6 = dbregs->dr[6];
3488 pcb->pcb_dr7 = dbregs->dr[7];
3490 pcb->pcb_flags |= PCB_DBREGS;
3497 * Return > 0 if a hardware breakpoint has been hit, and the
3498 * breakpoint was in user space. Return 0, otherwise.
3501 user_dbreg_trap(void)
3503 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3504 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3505 int nbp; /* number of breakpoints that triggered */
3506 caddr_t addr[4]; /* breakpoint addresses */
3510 if ((dr7 & 0x000000ff) == 0) {
3512 * all GE and LE bits in the dr7 register are zero,
3513 * thus the trap couldn't have been caused by the
3514 * hardware debug registers
3521 bp = dr6 & 0x0000000f;
3525 * None of the breakpoint bits are set meaning this
3526 * trap was not caused by any of the debug registers
3532 * at least one of the breakpoints were hit, check to see
3533 * which ones and if any of them are user space addresses
3537 addr[nbp++] = (caddr_t)rdr0();
3540 addr[nbp++] = (caddr_t)rdr1();
3543 addr[nbp++] = (caddr_t)rdr2();
3546 addr[nbp++] = (caddr_t)rdr3();
3549 for (i = 0; i < nbp; i++) {
3550 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3552 * addr[i] is in user space
3559 * None of the breakpoints are in user space.
3565 #include <machine/apicvar.h>
3568 * Provide stub functions so that the MADT APIC enumerator in the acpi
3569 * kernel module will link against a kernel without 'device apic'.
3571 * XXX - This is a gross hack.
3574 apic_register_enumerator(struct apic_enumerator *enumerator)
3579 ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase)
3585 ioapic_disable_pin(void *cookie, u_int pin)
3591 ioapic_get_vector(void *cookie, u_int pin)
3597 ioapic_register(void *cookie)
3602 ioapic_remap_vector(void *cookie, u_int pin, int vector)
3608 ioapic_set_extint(void *cookie, u_int pin)
3614 ioapic_set_nmi(void *cookie, u_int pin)
3620 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
3626 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
3632 lapic_create(u_int apic_id, int boot_cpu)
3637 lapic_init(vm_paddr_t addr)
3642 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3648 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3654 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3663 * Provide inb() and outb() as functions. They are normally only available as
3664 * inline functions, thus cannot be called from the debugger.
3667 /* silence compiler warnings */
3668 u_char inb_(u_short);
3669 void outb_(u_short, u_char);
3678 outb_(u_short port, u_char data)