2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_kdtrace.h"
59 #include <sys/param.h>
61 #include <sys/systm.h>
65 #include <sys/callout.h>
68 #include <sys/eventhandler.h>
70 #include <sys/imgact.h>
72 #include <sys/kernel.h>
74 #include <sys/linker.h>
76 #include <sys/malloc.h>
77 #include <sys/memrange.h>
78 #include <sys/msgbuf.h>
79 #include <sys/mutex.h>
81 #include <sys/ptrace.h>
82 #include <sys/reboot.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
85 #include <sys/syscallsubr.h>
86 #include <sys/sysctl.h>
87 #include <sys/sysent.h>
88 #include <sys/sysproto.h>
89 #include <sys/ucontext.h>
90 #include <sys/vmmeter.h>
93 #include <vm/vm_extern.h>
94 #include <vm/vm_kern.h>
95 #include <vm/vm_page.h>
96 #include <vm/vm_map.h>
97 #include <vm/vm_object.h>
98 #include <vm/vm_pager.h>
99 #include <vm/vm_param.h>
103 #error KDB must be enabled in order for DDB to work!
106 #include <ddb/db_sym.h>
111 #include <net/netisr.h>
113 #include <machine/bootinfo.h>
114 #include <machine/clock.h>
115 #include <machine/cpu.h>
116 #include <machine/cputypes.h>
117 #include <machine/intr_machdep.h>
118 #include <machine/mca.h>
119 #include <machine/md_var.h>
120 #include <machine/metadata.h>
121 #include <machine/pc/bios.h>
122 #include <machine/pcb.h>
123 #include <machine/pcb_ext.h>
124 #include <machine/proc.h>
125 #include <machine/reg.h>
126 #include <machine/sigframe.h>
127 #include <machine/specialreg.h>
128 #include <machine/vm86.h>
130 #include <machine/perfmon.h>
133 #include <machine/smp.h>
137 #include <x86/isa/icu.h>
141 #include <machine/xbox.h>
143 int arch_i386_is_xbox = 0;
144 uint32_t arch_i386_xbox_memsize = 0;
149 #include <machine/xen/xen-os.h>
150 #include <xen/hypervisor.h>
151 #include <machine/xen/xen-os.h>
152 #include <machine/xen/xenvar.h>
153 #include <machine/xen/xenfunc.h>
154 #include <xen/xen_intr.h>
156 void Xhypervisor_callback(void);
157 void failsafe_callback(void);
159 extern trap_info_t trap_table[];
160 struct proc_ldt default_proc_ldt;
161 extern int init_first;
163 extern unsigned long physfree;
166 /* Sanity check for __curthread() */
167 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
169 extern void init386(int first);
170 extern void dblfault_handler(void);
172 extern void printcpuinfo(void); /* XXX header file */
173 extern void finishidentcpu(void);
174 extern void panicifcpuunsupported(void);
175 extern void initializecpu(void);
177 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
178 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
180 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
181 #define CPU_ENABLE_SSE
184 static void cpu_startup(void *);
185 static void fpstate_drop(struct thread *td);
186 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
187 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
188 #ifdef CPU_ENABLE_SSE
189 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
190 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
191 #endif /* CPU_ENABLE_SSE */
192 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
195 extern vm_offset_t ksym_start, ksym_end;
198 /* Intel ICH registers */
199 #define ICH_PMBASE 0x400
200 #define ICH_SMI_EN ICH_PMBASE + 0x30
202 int _udatasel, _ucodesel;
208 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
210 #ifdef COMPAT_FREEBSD4
211 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
218 FEATURE(pae, "Physical Address Extensions");
222 * The number of PHYSMAP entries must be one less than the number of
223 * PHYSSEG entries because the PHYSMAP entry that spans the largest
224 * physical address that is accessible by ISA DMA is split into two
227 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
229 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
230 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
232 /* must be 2 less so 0 0 can signal end of chunks */
233 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
234 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
236 struct kva_md_info kmi;
238 static struct trapframe proc0_tf;
239 struct pcpu __pcpu[MAXCPU];
243 struct mem_range_softc mem_range_softc;
253 * On MacBooks, we need to disallow the legacy USB circuit to
254 * generate an SMI# because this can cause several problems,
255 * namely: incorrect CPU frequency detection and failure to
257 * We do this by disabling a bit in the SMI_EN (SMI Control and
258 * Enable register) of the Intel ICH LPC Interface Bridge.
260 sysenv = getenv("smbios.system.product");
261 if (sysenv != NULL) {
262 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
263 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
264 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
265 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
266 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
267 strncmp(sysenv, "Macmini1,1", 10) == 0) {
269 printf("Disabling LEGACY_USB_EN bit on "
271 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
277 * Good {morning,afternoon,evening,night}.
281 panicifcpuunsupported();
288 * Display physical memory if SMBIOS reports reasonable amount.
291 sysenv = getenv("smbios.memory.enabled");
292 if (sysenv != NULL) {
293 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
296 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
297 memsize = ptoa((uintmax_t)Maxmem);
298 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
301 * Display any holes after the first chunk of extended memory.
306 printf("Physical memory chunk(s):\n");
307 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
310 size = phys_avail[indx + 1] - phys_avail[indx];
312 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
313 (uintmax_t)phys_avail[indx],
314 (uintmax_t)phys_avail[indx + 1] - 1,
315 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
319 vm_ksubmap_init(&kmi);
321 printf("avail memory = %ju (%ju MB)\n",
322 ptoa((uintmax_t)cnt.v_free_count),
323 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
326 * Set up buffers, so they can be used to read disk labels.
329 vm_pager_bufferinit();
336 * Send an interrupt to process.
338 * Stack is set up to allow sigcode stored
339 * at top to call routine, followed by kcall
340 * to sigreturn routine below. After sigreturn
341 * resets the signal mask, the stack, and the
342 * frame pointer, it returns to the user
347 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
349 struct osigframe sf, *fp;
353 struct trapframe *regs;
359 PROC_LOCK_ASSERT(p, MA_OWNED);
360 sig = ksi->ksi_signo;
362 mtx_assert(&psp->ps_mtx, MA_OWNED);
364 oonstack = sigonstack(regs->tf_esp);
366 /* Allocate space for the signal handler context. */
367 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
368 SIGISMEMBER(psp->ps_sigonstack, sig)) {
369 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
370 td->td_sigstk.ss_size - sizeof(struct osigframe));
371 #if defined(COMPAT_43)
372 td->td_sigstk.ss_flags |= SS_ONSTACK;
375 fp = (struct osigframe *)regs->tf_esp - 1;
377 /* Translate the signal if appropriate. */
378 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
379 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
381 /* Build the argument list for the signal handler. */
383 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
384 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
385 /* Signal handler installed with SA_SIGINFO. */
386 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
387 sf.sf_siginfo.si_signo = sig;
388 sf.sf_siginfo.si_code = ksi->ksi_code;
389 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
391 /* Old FreeBSD-style arguments. */
392 sf.sf_arg2 = ksi->ksi_code;
393 sf.sf_addr = (register_t)ksi->ksi_addr;
394 sf.sf_ahu.sf_handler = catcher;
396 mtx_unlock(&psp->ps_mtx);
399 /* Save most if not all of trap frame. */
400 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
401 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
402 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
403 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
404 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
405 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
406 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
407 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
408 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
409 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
410 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
411 sf.sf_siginfo.si_sc.sc_gs = rgs();
412 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
414 /* Build the signal context to be used by osigreturn(). */
415 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
416 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
417 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
418 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
419 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
420 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
421 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
422 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
425 * If we're a vm86 process, we want to save the segment registers.
426 * We also change eflags to be our emulated eflags, not the actual
429 if (regs->tf_eflags & PSL_VM) {
430 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
431 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
432 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
434 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
435 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
436 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
437 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
439 if (vm86->vm86_has_vme == 0)
440 sf.sf_siginfo.si_sc.sc_ps =
441 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
442 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
444 /* See sendsig() for comments. */
445 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
449 * Copy the sigframe out to the user's stack.
451 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
453 printf("process %ld has trashed its stack\n", (long)p->p_pid);
459 regs->tf_esp = (int)fp;
460 regs->tf_eip = PS_STRINGS - szosigcode;
461 regs->tf_eflags &= ~(PSL_T | PSL_D);
462 regs->tf_cs = _ucodesel;
463 regs->tf_ds = _udatasel;
464 regs->tf_es = _udatasel;
465 regs->tf_fs = _udatasel;
467 regs->tf_ss = _udatasel;
469 mtx_lock(&psp->ps_mtx);
471 #endif /* COMPAT_43 */
473 #ifdef COMPAT_FREEBSD4
475 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
477 struct sigframe4 sf, *sfp;
481 struct trapframe *regs;
487 PROC_LOCK_ASSERT(p, MA_OWNED);
488 sig = ksi->ksi_signo;
490 mtx_assert(&psp->ps_mtx, MA_OWNED);
492 oonstack = sigonstack(regs->tf_esp);
494 /* Save user context. */
495 bzero(&sf, sizeof(sf));
496 sf.sf_uc.uc_sigmask = *mask;
497 sf.sf_uc.uc_stack = td->td_sigstk;
498 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
499 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
500 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
501 sf.sf_uc.uc_mcontext.mc_gs = rgs();
502 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
504 /* Allocate space for the signal handler context. */
505 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
506 SIGISMEMBER(psp->ps_sigonstack, sig)) {
507 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
508 td->td_sigstk.ss_size - sizeof(struct sigframe4));
509 #if defined(COMPAT_43)
510 td->td_sigstk.ss_flags |= SS_ONSTACK;
513 sfp = (struct sigframe4 *)regs->tf_esp - 1;
515 /* Translate the signal if appropriate. */
516 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
517 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
519 /* Build the argument list for the signal handler. */
521 sf.sf_ucontext = (register_t)&sfp->sf_uc;
522 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
523 /* Signal handler installed with SA_SIGINFO. */
524 sf.sf_siginfo = (register_t)&sfp->sf_si;
525 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
527 /* Fill in POSIX parts */
528 sf.sf_si.si_signo = sig;
529 sf.sf_si.si_code = ksi->ksi_code;
530 sf.sf_si.si_addr = ksi->ksi_addr;
532 /* Old FreeBSD-style arguments. */
533 sf.sf_siginfo = ksi->ksi_code;
534 sf.sf_addr = (register_t)ksi->ksi_addr;
535 sf.sf_ahu.sf_handler = catcher;
537 mtx_unlock(&psp->ps_mtx);
541 * If we're a vm86 process, we want to save the segment registers.
542 * We also change eflags to be our emulated eflags, not the actual
545 if (regs->tf_eflags & PSL_VM) {
546 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
547 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
549 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
550 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
551 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
552 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
554 if (vm86->vm86_has_vme == 0)
555 sf.sf_uc.uc_mcontext.mc_eflags =
556 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
557 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
560 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
561 * syscalls made by the signal handler. This just avoids
562 * wasting time for our lazy fixup of such faults. PSL_NT
563 * does nothing in vm86 mode, but vm86 programs can set it
564 * almost legitimately in probes for old cpu types.
566 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
570 * Copy the sigframe out to the user's stack.
572 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
574 printf("process %ld has trashed its stack\n", (long)p->p_pid);
580 regs->tf_esp = (int)sfp;
581 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
582 regs->tf_eflags &= ~(PSL_T | PSL_D);
583 regs->tf_cs = _ucodesel;
584 regs->tf_ds = _udatasel;
585 regs->tf_es = _udatasel;
586 regs->tf_fs = _udatasel;
587 regs->tf_ss = _udatasel;
589 mtx_lock(&psp->ps_mtx);
591 #endif /* COMPAT_FREEBSD4 */
594 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
596 struct sigframe sf, *sfp;
601 struct trapframe *regs;
602 struct segment_descriptor *sdp;
608 PROC_LOCK_ASSERT(p, MA_OWNED);
609 sig = ksi->ksi_signo;
611 mtx_assert(&psp->ps_mtx, MA_OWNED);
612 #ifdef COMPAT_FREEBSD4
613 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
614 freebsd4_sendsig(catcher, ksi, mask);
619 if (SIGISMEMBER(psp->ps_osigset, sig)) {
620 osendsig(catcher, ksi, mask);
625 oonstack = sigonstack(regs->tf_esp);
627 /* Save user context. */
628 bzero(&sf, sizeof(sf));
629 sf.sf_uc.uc_sigmask = *mask;
630 sf.sf_uc.uc_stack = td->td_sigstk;
631 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
632 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
633 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
634 sf.sf_uc.uc_mcontext.mc_gs = rgs();
635 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
636 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
639 * The get_fpcontext() call must be placed before assignments
640 * to mc_fsbase and mc_gsbase due to the alignment-override
641 * code in get_fpcontext() that possibly clobbers 12 bytes of
642 * mcontext after mc_fpstate.
644 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
647 * Unconditionally fill the fsbase and gsbase into the mcontext.
649 sdp = &td->td_pcb->pcb_fsd;
650 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
652 sdp = &td->td_pcb->pcb_gsd;
653 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
656 /* Allocate space for the signal handler context. */
657 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
658 SIGISMEMBER(psp->ps_sigonstack, sig)) {
659 sp = td->td_sigstk.ss_sp +
660 td->td_sigstk.ss_size - sizeof(struct sigframe);
661 #if defined(COMPAT_43)
662 td->td_sigstk.ss_flags |= SS_ONSTACK;
665 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
666 /* Align to 16 bytes. */
667 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
669 /* Translate the signal if appropriate. */
670 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
671 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
673 /* Build the argument list for the signal handler. */
675 sf.sf_ucontext = (register_t)&sfp->sf_uc;
676 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
677 /* Signal handler installed with SA_SIGINFO. */
678 sf.sf_siginfo = (register_t)&sfp->sf_si;
679 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
681 /* Fill in POSIX parts */
682 sf.sf_si = ksi->ksi_info;
683 sf.sf_si.si_signo = sig; /* maybe a translated signal */
685 /* Old FreeBSD-style arguments. */
686 sf.sf_siginfo = ksi->ksi_code;
687 sf.sf_addr = (register_t)ksi->ksi_addr;
688 sf.sf_ahu.sf_handler = catcher;
690 mtx_unlock(&psp->ps_mtx);
694 * If we're a vm86 process, we want to save the segment registers.
695 * We also change eflags to be our emulated eflags, not the actual
698 if (regs->tf_eflags & PSL_VM) {
699 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
700 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
702 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
703 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
704 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
705 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
707 if (vm86->vm86_has_vme == 0)
708 sf.sf_uc.uc_mcontext.mc_eflags =
709 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
710 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
713 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
714 * syscalls made by the signal handler. This just avoids
715 * wasting time for our lazy fixup of such faults. PSL_NT
716 * does nothing in vm86 mode, but vm86 programs can set it
717 * almost legitimately in probes for old cpu types.
719 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
723 * Copy the sigframe out to the user's stack.
725 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
727 printf("process %ld has trashed its stack\n", (long)p->p_pid);
733 regs->tf_esp = (int)sfp;
734 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
735 regs->tf_eflags &= ~(PSL_T | PSL_D);
736 regs->tf_cs = _ucodesel;
737 regs->tf_ds = _udatasel;
738 regs->tf_es = _udatasel;
739 regs->tf_fs = _udatasel;
740 regs->tf_ss = _udatasel;
742 mtx_lock(&psp->ps_mtx);
746 * System call to cleanup state after a signal
747 * has been taken. Reset signal mask and
748 * stack state from context left by sendsig (above).
749 * Return to previous pc and psl as specified by
750 * context left by sendsig. Check carefully to
751 * make sure that the user has not modified the
752 * state to gain improper privileges.
760 struct osigreturn_args /* {
761 struct osigcontext *sigcntxp;
764 struct osigcontext sc;
765 struct trapframe *regs;
766 struct osigcontext *scp;
771 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
776 if (eflags & PSL_VM) {
777 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
778 struct vm86_kernel *vm86;
781 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
782 * set up the vm86 area, and we can't enter vm86 mode.
784 if (td->td_pcb->pcb_ext == 0)
786 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
787 if (vm86->vm86_inited == 0)
790 /* Go back to user mode if both flags are set. */
791 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
792 ksiginfo_init_trap(&ksi);
793 ksi.ksi_signo = SIGBUS;
794 ksi.ksi_code = BUS_OBJERR;
795 ksi.ksi_addr = (void *)regs->tf_eip;
796 trapsignal(td, &ksi);
799 if (vm86->vm86_has_vme) {
800 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
801 (eflags & VME_USERCHANGE) | PSL_VM;
803 vm86->vm86_eflags = eflags; /* save VIF, VIP */
804 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
805 (eflags & VM_USERCHANGE) | PSL_VM;
807 tf->tf_vm86_ds = scp->sc_ds;
808 tf->tf_vm86_es = scp->sc_es;
809 tf->tf_vm86_fs = scp->sc_fs;
810 tf->tf_vm86_gs = scp->sc_gs;
811 tf->tf_ds = _udatasel;
812 tf->tf_es = _udatasel;
813 tf->tf_fs = _udatasel;
816 * Don't allow users to change privileged or reserved flags.
819 * XXX do allow users to change the privileged flag PSL_RF.
820 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
821 * should sometimes set it there too. tf_eflags is kept in
822 * the signal context during signal handling and there is no
823 * other place to remember it, so the PSL_RF bit may be
824 * corrupted by the signal handler without us knowing.
825 * Corruption of the PSL_RF bit at worst causes one more or
826 * one less debugger trap, so allowing it is fairly harmless.
828 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
833 * Don't allow users to load a valid privileged %cs. Let the
834 * hardware check for invalid selectors, excess privilege in
835 * other selectors, invalid %eip's and invalid %esp's.
837 if (!CS_SECURE(scp->sc_cs)) {
838 ksiginfo_init_trap(&ksi);
839 ksi.ksi_signo = SIGBUS;
840 ksi.ksi_code = BUS_OBJERR;
841 ksi.ksi_trapno = T_PROTFLT;
842 ksi.ksi_addr = (void *)regs->tf_eip;
843 trapsignal(td, &ksi);
846 regs->tf_ds = scp->sc_ds;
847 regs->tf_es = scp->sc_es;
848 regs->tf_fs = scp->sc_fs;
851 /* Restore remaining registers. */
852 regs->tf_eax = scp->sc_eax;
853 regs->tf_ebx = scp->sc_ebx;
854 regs->tf_ecx = scp->sc_ecx;
855 regs->tf_edx = scp->sc_edx;
856 regs->tf_esi = scp->sc_esi;
857 regs->tf_edi = scp->sc_edi;
858 regs->tf_cs = scp->sc_cs;
859 regs->tf_ss = scp->sc_ss;
860 regs->tf_isp = scp->sc_isp;
861 regs->tf_ebp = scp->sc_fp;
862 regs->tf_esp = scp->sc_sp;
863 regs->tf_eip = scp->sc_pc;
864 regs->tf_eflags = eflags;
866 #if defined(COMPAT_43)
867 if (scp->sc_onstack & 1)
868 td->td_sigstk.ss_flags |= SS_ONSTACK;
870 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
872 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
874 return (EJUSTRETURN);
876 #endif /* COMPAT_43 */
878 #ifdef COMPAT_FREEBSD4
883 freebsd4_sigreturn(td, uap)
885 struct freebsd4_sigreturn_args /* {
886 const ucontext4 *sigcntxp;
890 struct trapframe *regs;
891 struct ucontext4 *ucp;
892 int cs, eflags, error;
895 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
900 eflags = ucp->uc_mcontext.mc_eflags;
901 if (eflags & PSL_VM) {
902 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
903 struct vm86_kernel *vm86;
906 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
907 * set up the vm86 area, and we can't enter vm86 mode.
909 if (td->td_pcb->pcb_ext == 0)
911 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
912 if (vm86->vm86_inited == 0)
915 /* Go back to user mode if both flags are set. */
916 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
917 ksiginfo_init_trap(&ksi);
918 ksi.ksi_signo = SIGBUS;
919 ksi.ksi_code = BUS_OBJERR;
920 ksi.ksi_addr = (void *)regs->tf_eip;
921 trapsignal(td, &ksi);
923 if (vm86->vm86_has_vme) {
924 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
925 (eflags & VME_USERCHANGE) | PSL_VM;
927 vm86->vm86_eflags = eflags; /* save VIF, VIP */
928 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
929 (eflags & VM_USERCHANGE) | PSL_VM;
931 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
932 tf->tf_eflags = eflags;
933 tf->tf_vm86_ds = tf->tf_ds;
934 tf->tf_vm86_es = tf->tf_es;
935 tf->tf_vm86_fs = tf->tf_fs;
936 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
937 tf->tf_ds = _udatasel;
938 tf->tf_es = _udatasel;
939 tf->tf_fs = _udatasel;
942 * Don't allow users to change privileged or reserved flags.
945 * XXX do allow users to change the privileged flag PSL_RF.
946 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
947 * should sometimes set it there too. tf_eflags is kept in
948 * the signal context during signal handling and there is no
949 * other place to remember it, so the PSL_RF bit may be
950 * corrupted by the signal handler without us knowing.
951 * Corruption of the PSL_RF bit at worst causes one more or
952 * one less debugger trap, so allowing it is fairly harmless.
954 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
955 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
956 td->td_proc->p_pid, td->td_name, eflags);
961 * Don't allow users to load a valid privileged %cs. Let the
962 * hardware check for invalid selectors, excess privilege in
963 * other selectors, invalid %eip's and invalid %esp's.
965 cs = ucp->uc_mcontext.mc_cs;
966 if (!CS_SECURE(cs)) {
967 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
968 td->td_proc->p_pid, td->td_name, cs);
969 ksiginfo_init_trap(&ksi);
970 ksi.ksi_signo = SIGBUS;
971 ksi.ksi_code = BUS_OBJERR;
972 ksi.ksi_trapno = T_PROTFLT;
973 ksi.ksi_addr = (void *)regs->tf_eip;
974 trapsignal(td, &ksi);
978 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
981 #if defined(COMPAT_43)
982 if (ucp->uc_mcontext.mc_onstack & 1)
983 td->td_sigstk.ss_flags |= SS_ONSTACK;
985 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
987 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
988 return (EJUSTRETURN);
990 #endif /* COMPAT_FREEBSD4 */
998 struct sigreturn_args /* {
999 const struct __ucontext *sigcntxp;
1003 struct trapframe *regs;
1005 int cs, eflags, error, ret;
1008 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1012 regs = td->td_frame;
1013 eflags = ucp->uc_mcontext.mc_eflags;
1014 if (eflags & PSL_VM) {
1015 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1016 struct vm86_kernel *vm86;
1019 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1020 * set up the vm86 area, and we can't enter vm86 mode.
1022 if (td->td_pcb->pcb_ext == 0)
1024 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1025 if (vm86->vm86_inited == 0)
1028 /* Go back to user mode if both flags are set. */
1029 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1030 ksiginfo_init_trap(&ksi);
1031 ksi.ksi_signo = SIGBUS;
1032 ksi.ksi_code = BUS_OBJERR;
1033 ksi.ksi_addr = (void *)regs->tf_eip;
1034 trapsignal(td, &ksi);
1037 if (vm86->vm86_has_vme) {
1038 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1039 (eflags & VME_USERCHANGE) | PSL_VM;
1041 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1042 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1043 (eflags & VM_USERCHANGE) | PSL_VM;
1045 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1046 tf->tf_eflags = eflags;
1047 tf->tf_vm86_ds = tf->tf_ds;
1048 tf->tf_vm86_es = tf->tf_es;
1049 tf->tf_vm86_fs = tf->tf_fs;
1050 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1051 tf->tf_ds = _udatasel;
1052 tf->tf_es = _udatasel;
1053 tf->tf_fs = _udatasel;
1056 * Don't allow users to change privileged or reserved flags.
1059 * XXX do allow users to change the privileged flag PSL_RF.
1060 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1061 * should sometimes set it there too. tf_eflags is kept in
1062 * the signal context during signal handling and there is no
1063 * other place to remember it, so the PSL_RF bit may be
1064 * corrupted by the signal handler without us knowing.
1065 * Corruption of the PSL_RF bit at worst causes one more or
1066 * one less debugger trap, so allowing it is fairly harmless.
1068 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1069 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1070 td->td_proc->p_pid, td->td_name, eflags);
1075 * Don't allow users to load a valid privileged %cs. Let the
1076 * hardware check for invalid selectors, excess privilege in
1077 * other selectors, invalid %eip's and invalid %esp's.
1079 cs = ucp->uc_mcontext.mc_cs;
1080 if (!CS_SECURE(cs)) {
1081 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1082 td->td_proc->p_pid, td->td_name, cs);
1083 ksiginfo_init_trap(&ksi);
1084 ksi.ksi_signo = SIGBUS;
1085 ksi.ksi_code = BUS_OBJERR;
1086 ksi.ksi_trapno = T_PROTFLT;
1087 ksi.ksi_addr = (void *)regs->tf_eip;
1088 trapsignal(td, &ksi);
1092 ret = set_fpcontext(td, &ucp->uc_mcontext);
1095 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1098 #if defined(COMPAT_43)
1099 if (ucp->uc_mcontext.mc_onstack & 1)
1100 td->td_sigstk.ss_flags |= SS_ONSTACK;
1102 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1105 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1106 return (EJUSTRETURN);
1110 * Machine dependent boot() routine
1112 * I haven't seen anything to put here yet
1113 * Possibly some stuff might be grafted back here from boot()
1121 * Flush the D-cache for non-DMA I/O so that the I-cache can
1122 * be made coherent later.
1125 cpu_flush_dcache(void *ptr, size_t len)
1127 /* Not applicable */
1130 /* Get current clock frequency for the given cpu id. */
1132 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1135 uint64_t tsc1, tsc2;
1137 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1140 return (EOPNOTSUPP);
1142 /* If we're booting, trust the rate calibrated moments ago. */
1149 /* Schedule ourselves on the indicated cpu. */
1150 thread_lock(curthread);
1151 sched_bind(curthread, cpu_id);
1152 thread_unlock(curthread);
1155 /* Calibrate by measuring a short delay. */
1156 reg = intr_disable();
1163 thread_lock(curthread);
1164 sched_unbind(curthread);
1165 thread_unlock(curthread);
1169 * Calculate the difference in readings, convert to Mhz, and
1170 * subtract 0.5% of the total. Empirical testing has shown that
1171 * overhead in DELAY() works out to approximately this value.
1174 *rate = tsc2 * 1000 - tsc2 * 5;
1183 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1186 int scheduler_running;
1189 cpu_idle_hlt(int busy)
1192 scheduler_running = 1;
1199 * Shutdown the CPU as much as possible
1210 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1211 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
1212 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1213 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1214 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1215 0, "Use MONITOR/MWAIT for short idle");
1217 #define STATE_RUNNING 0x0
1218 #define STATE_MWAIT 0x1
1219 #define STATE_SLEEPING 0x2
1222 cpu_idle_acpi(int busy)
1226 state = (int *)PCPU_PTR(monitorbuf);
1227 *state = STATE_SLEEPING;
1229 if (sched_runnable())
1231 else if (cpu_idle_hook)
1234 __asm __volatile("sti; hlt");
1235 *state = STATE_RUNNING;
1240 cpu_idle_hlt(int busy)
1244 state = (int *)PCPU_PTR(monitorbuf);
1245 *state = STATE_SLEEPING;
1247 * We must absolutely guarentee that hlt is the next instruction
1248 * after sti or we introduce a timing window.
1251 if (sched_runnable())
1254 __asm __volatile("sti; hlt");
1255 *state = STATE_RUNNING;
1260 * MWAIT cpu power states. Lower 4 bits are sub-states.
1262 #define MWAIT_C0 0xf0
1263 #define MWAIT_C1 0x00
1264 #define MWAIT_C2 0x10
1265 #define MWAIT_C3 0x20
1266 #define MWAIT_C4 0x30
1269 cpu_idle_mwait(int busy)
1273 state = (int *)PCPU_PTR(monitorbuf);
1274 *state = STATE_MWAIT;
1275 if (!sched_runnable()) {
1276 cpu_monitor(state, 0, 0);
1277 if (*state == STATE_MWAIT)
1278 cpu_mwait(0, MWAIT_C1);
1280 *state = STATE_RUNNING;
1284 cpu_idle_spin(int busy)
1289 state = (int *)PCPU_PTR(monitorbuf);
1290 *state = STATE_RUNNING;
1291 for (i = 0; i < 1000; i++) {
1292 if (sched_runnable())
1299 * C1E renders the local APIC timer dead, so we disable it by
1300 * reading the Interrupt Pending Message register and clearing
1301 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1304 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1305 * #32559 revision 3.00+
1307 #define MSR_AMDK8_IPM 0xc0010055
1308 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1309 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1310 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1313 cpu_probe_amdc1e(void)
1317 * Detect the presence of C1E capability mostly on latest
1318 * dual-cores (or future) k8 family.
1320 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1321 (cpu_id & 0x00000f00) == 0x00000f00 &&
1322 (cpu_id & 0x0fff0000) >= 0x00040000) {
1323 cpu_ident_amdc1e = 1;
1328 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1330 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1338 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1340 #if defined(SMP) && !defined(XEN)
1341 if (mp_grab_cpu_hlt())
1344 /* If we are busy - try to use fast methods. */
1346 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1347 cpu_idle_mwait(busy);
1353 /* If we have time - switch timers into idle mode. */
1360 /* Apply AMD APIC timer C1E workaround. */
1361 if (cpu_ident_amdc1e
1363 && cpu_disable_deep_sleep
1366 msr = rdmsr(MSR_AMDK8_IPM);
1367 if (msr & AMDK8_CMPHALT)
1368 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1371 /* Call main idle method. */
1375 /* Switch timers mack into active mode. */
1382 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1387 cpu_idle_wakeup(int cpu)
1392 pcpu = pcpu_find(cpu);
1393 state = (int *)pcpu->pc_monitorbuf;
1395 * This doesn't need to be atomic since missing the race will
1396 * simply result in unnecessary IPIs.
1398 if (*state == STATE_SLEEPING)
1400 if (*state == STATE_MWAIT)
1401 *state = STATE_RUNNING;
1406 * Ordered by speed/power consumption.
1412 { cpu_idle_spin, "spin" },
1413 { cpu_idle_mwait, "mwait" },
1414 { cpu_idle_hlt, "hlt" },
1415 { cpu_idle_acpi, "acpi" },
1420 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1426 avail = malloc(256, M_TEMP, M_WAITOK);
1428 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1429 if (strstr(idle_tbl[i].id_name, "mwait") &&
1430 (cpu_feature2 & CPUID2_MON) == 0)
1432 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1433 cpu_idle_hook == NULL)
1435 p += sprintf(p, "%s, ", idle_tbl[i].id_name);
1437 error = sysctl_handle_string(oidp, avail, 0, req);
1438 free(avail, M_TEMP);
1442 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1443 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1446 idle_sysctl(SYSCTL_HANDLER_ARGS)
1454 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1455 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1456 p = idle_tbl[i].id_name;
1460 strncpy(buf, p, sizeof(buf));
1461 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1462 if (error != 0 || req->newptr == NULL)
1464 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1465 if (strstr(idle_tbl[i].id_name, "mwait") &&
1466 (cpu_feature2 & CPUID2_MON) == 0)
1468 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1469 cpu_idle_hook == NULL)
1471 if (strcmp(idle_tbl[i].id_name, buf))
1473 cpu_idle_fn = idle_tbl[i].id_fn;
1479 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1480 idle_sysctl, "A", "currently selected idle function");
1483 * Reset registers to default values on exec.
1486 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1488 struct trapframe *regs = td->td_frame;
1489 struct pcb *pcb = td->td_pcb;
1491 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1492 pcb->pcb_gs = _udatasel;
1495 mtx_lock_spin(&dt_lock);
1496 if (td->td_proc->p_md.md_ldt)
1499 mtx_unlock_spin(&dt_lock);
1501 bzero((char *)regs, sizeof(struct trapframe));
1502 regs->tf_eip = imgp->entry_addr;
1503 regs->tf_esp = stack;
1504 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1505 regs->tf_ss = _udatasel;
1506 regs->tf_ds = _udatasel;
1507 regs->tf_es = _udatasel;
1508 regs->tf_fs = _udatasel;
1509 regs->tf_cs = _ucodesel;
1511 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1512 regs->tf_ebx = imgp->ps_strings;
1515 * Reset the hardware debug registers if they were in use.
1516 * They won't have any meaning for the newly exec'd process.
1518 if (pcb->pcb_flags & PCB_DBREGS) {
1525 if (pcb == PCPU_GET(curpcb)) {
1527 * Clear the debug registers on the running
1528 * CPU, otherwise they will end up affecting
1529 * the next process we switch to.
1533 pcb->pcb_flags &= ~PCB_DBREGS;
1537 * Initialize the math emulator (if any) for the current process.
1538 * Actually, just clear the bit that says that the emulator has
1539 * been initialized. Initialization is delayed until the process
1540 * traps to the emulator (if it is done at all) mainly because
1541 * emulators don't provide an entry point for initialization.
1543 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1544 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1547 * Drop the FP state if we hold it, so that the process gets a
1548 * clean FP state if it uses the FPU again.
1553 * XXX - Linux emulator
1554 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1557 td->td_retval[1] = 0;
1568 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1570 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1571 * instructions. We must set the CR0_MP bit and use the CR0_TS
1572 * bit to control the trap, because setting the CR0_EM bit does
1573 * not cause WAIT instructions to trap. It's important to trap
1574 * WAIT instructions - otherwise the "wait" variants of no-wait
1575 * control instructions would degenerate to the "no-wait" variants
1576 * after FP context switches but work correctly otherwise. It's
1577 * particularly important to trap WAITs when there is no NPX -
1578 * otherwise the "wait" variants would always degenerate.
1580 * Try setting CR0_NE to get correct error reporting on 486DX's.
1581 * Setting it should fail or do nothing on lesser processors.
1583 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1588 u_long bootdev; /* not a struct cdev *- encoding is different */
1589 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1590 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1593 * Initialize 386 and configure to run kernel
1597 * Initialize segments & interrupt table
1603 union descriptor *gdt;
1604 union descriptor *ldt;
1606 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1607 union descriptor ldt[NLDT]; /* local descriptor table */
1609 static struct gate_descriptor idt0[NIDT];
1610 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1611 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1612 struct mtx dt_lock; /* lock for GDT and LDT */
1614 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1615 extern int has_f00f_bug;
1618 static struct i386tss dblfault_tss;
1619 static char dblfault_stack[PAGE_SIZE];
1621 extern vm_offset_t proc0kstack;
1625 * software prototypes -- in more palatable form.
1627 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1628 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1630 struct soft_segment_descriptor gdt_segs[] = {
1631 /* GNULL_SEL 0 Null Descriptor */
1637 .ssd_xx = 0, .ssd_xx1 = 0,
1640 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1642 .ssd_limit = 0xfffff,
1643 .ssd_type = SDT_MEMRWA,
1646 .ssd_xx = 0, .ssd_xx1 = 0,
1649 /* GUFS_SEL 2 %fs Descriptor for user */
1651 .ssd_limit = 0xfffff,
1652 .ssd_type = SDT_MEMRWA,
1655 .ssd_xx = 0, .ssd_xx1 = 0,
1658 /* GUGS_SEL 3 %gs Descriptor for user */
1660 .ssd_limit = 0xfffff,
1661 .ssd_type = SDT_MEMRWA,
1664 .ssd_xx = 0, .ssd_xx1 = 0,
1667 /* GCODE_SEL 4 Code Descriptor for kernel */
1669 .ssd_limit = 0xfffff,
1670 .ssd_type = SDT_MEMERA,
1673 .ssd_xx = 0, .ssd_xx1 = 0,
1676 /* GDATA_SEL 5 Data Descriptor for kernel */
1678 .ssd_limit = 0xfffff,
1679 .ssd_type = SDT_MEMRWA,
1682 .ssd_xx = 0, .ssd_xx1 = 0,
1685 /* GUCODE_SEL 6 Code Descriptor for user */
1687 .ssd_limit = 0xfffff,
1688 .ssd_type = SDT_MEMERA,
1691 .ssd_xx = 0, .ssd_xx1 = 0,
1694 /* GUDATA_SEL 7 Data Descriptor for user */
1696 .ssd_limit = 0xfffff,
1697 .ssd_type = SDT_MEMRWA,
1700 .ssd_xx = 0, .ssd_xx1 = 0,
1703 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1704 { .ssd_base = 0x400,
1705 .ssd_limit = 0xfffff,
1706 .ssd_type = SDT_MEMRWA,
1709 .ssd_xx = 0, .ssd_xx1 = 0,
1713 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1716 .ssd_limit = sizeof(struct i386tss)-1,
1717 .ssd_type = SDT_SYS386TSS,
1720 .ssd_xx = 0, .ssd_xx1 = 0,
1723 /* GLDT_SEL 10 LDT Descriptor */
1724 { .ssd_base = (int) ldt,
1725 .ssd_limit = sizeof(ldt)-1,
1726 .ssd_type = SDT_SYSLDT,
1729 .ssd_xx = 0, .ssd_xx1 = 0,
1732 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1733 { .ssd_base = (int) ldt,
1734 .ssd_limit = (512 * sizeof(union descriptor)-1),
1735 .ssd_type = SDT_SYSLDT,
1738 .ssd_xx = 0, .ssd_xx1 = 0,
1741 /* GPANIC_SEL 12 Panic Tss Descriptor */
1742 { .ssd_base = (int) &dblfault_tss,
1743 .ssd_limit = sizeof(struct i386tss)-1,
1744 .ssd_type = SDT_SYS386TSS,
1747 .ssd_xx = 0, .ssd_xx1 = 0,
1750 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1752 .ssd_limit = 0xfffff,
1753 .ssd_type = SDT_MEMERA,
1756 .ssd_xx = 0, .ssd_xx1 = 0,
1759 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1761 .ssd_limit = 0xfffff,
1762 .ssd_type = SDT_MEMERA,
1765 .ssd_xx = 0, .ssd_xx1 = 0,
1768 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1770 .ssd_limit = 0xfffff,
1771 .ssd_type = SDT_MEMRWA,
1774 .ssd_xx = 0, .ssd_xx1 = 0,
1777 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1779 .ssd_limit = 0xfffff,
1780 .ssd_type = SDT_MEMRWA,
1783 .ssd_xx = 0, .ssd_xx1 = 0,
1786 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1788 .ssd_limit = 0xfffff,
1789 .ssd_type = SDT_MEMRWA,
1792 .ssd_xx = 0, .ssd_xx1 = 0,
1795 /* GNDIS_SEL 18 NDIS Descriptor */
1801 .ssd_xx = 0, .ssd_xx1 = 0,
1807 static struct soft_segment_descriptor ldt_segs[] = {
1808 /* Null Descriptor - overwritten by call gate */
1814 .ssd_xx = 0, .ssd_xx1 = 0,
1817 /* Null Descriptor - overwritten by call gate */
1823 .ssd_xx = 0, .ssd_xx1 = 0,
1826 /* Null Descriptor - overwritten by call gate */
1832 .ssd_xx = 0, .ssd_xx1 = 0,
1835 /* Code Descriptor for user */
1837 .ssd_limit = 0xfffff,
1838 .ssd_type = SDT_MEMERA,
1841 .ssd_xx = 0, .ssd_xx1 = 0,
1844 /* Null Descriptor - overwritten by call gate */
1850 .ssd_xx = 0, .ssd_xx1 = 0,
1853 /* Data Descriptor for user */
1855 .ssd_limit = 0xfffff,
1856 .ssd_type = SDT_MEMRWA,
1859 .ssd_xx = 0, .ssd_xx1 = 0,
1865 setidt(idx, func, typ, dpl, selec)
1872 struct gate_descriptor *ip;
1875 ip->gd_looffset = (int)func;
1876 ip->gd_selector = selec;
1882 ip->gd_hioffset = ((int)func)>>16 ;
1886 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1887 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1888 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1889 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1891 #ifdef KDTRACE_HOOKS
1894 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1898 * Display the index and function name of any IDT entries that don't use
1899 * the default 'rsvd' entry point.
1901 DB_SHOW_COMMAND(idt, db_show_idt)
1903 struct gate_descriptor *ip;
1908 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1909 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1910 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1911 db_printf("%3d\t", idx);
1912 db_printsym(func, DB_STGY_PROC);
1919 /* Show privileged registers. */
1920 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1922 uint64_t idtr, gdtr;
1925 db_printf("idtr\t0x%08x/%04x\n",
1926 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1928 db_printf("gdtr\t0x%08x/%04x\n",
1929 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1930 db_printf("ldtr\t0x%04x\n", rldt());
1931 db_printf("tr\t0x%04x\n", rtr());
1932 db_printf("cr0\t0x%08x\n", rcr0());
1933 db_printf("cr2\t0x%08x\n", rcr2());
1934 db_printf("cr3\t0x%08x\n", rcr3());
1935 db_printf("cr4\t0x%08x\n", rcr4());
1941 struct segment_descriptor *sd;
1942 struct soft_segment_descriptor *ssd;
1944 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1945 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1946 ssd->ssd_type = sd->sd_type;
1947 ssd->ssd_dpl = sd->sd_dpl;
1948 ssd->ssd_p = sd->sd_p;
1949 ssd->ssd_def32 = sd->sd_def32;
1950 ssd->ssd_gran = sd->sd_gran;
1955 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1957 int i, insert_idx, physmap_idx;
1959 physmap_idx = *physmap_idxp;
1961 if (boothowto & RB_VERBOSE)
1962 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1963 smap->type, smap->base, smap->length);
1965 if (smap->type != SMAP_TYPE_MEMORY)
1968 if (smap->length == 0)
1972 if (smap->base >= 0xffffffff) {
1973 printf("%uK of memory above 4GB ignored\n",
1974 (u_int)(smap->length / 1024));
1980 * Find insertion point while checking for overlap. Start off by
1981 * assuming the new entry will be added to the end.
1983 insert_idx = physmap_idx + 2;
1984 for (i = 0; i <= physmap_idx; i += 2) {
1985 if (smap->base < physmap[i + 1]) {
1986 if (smap->base + smap->length <= physmap[i]) {
1990 if (boothowto & RB_VERBOSE)
1992 "Overlapping memory regions, ignoring second region\n");
1997 /* See if we can prepend to the next entry. */
1998 if (insert_idx <= physmap_idx &&
1999 smap->base + smap->length == physmap[insert_idx]) {
2000 physmap[insert_idx] = smap->base;
2004 /* See if we can append to the previous entry. */
2005 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
2006 physmap[insert_idx - 1] += smap->length;
2011 *physmap_idxp = physmap_idx;
2012 if (physmap_idx == PHYSMAP_SIZE) {
2014 "Too many segments in the physical address map, giving up\n");
2019 * Move the last 'N' entries down to make room for the new
2022 for (i = physmap_idx; i > insert_idx; i -= 2) {
2023 physmap[i] = physmap[i - 2];
2024 physmap[i + 1] = physmap[i - 1];
2027 /* Insert the new entry. */
2028 physmap[insert_idx] = smap->base;
2029 physmap[insert_idx + 1] = smap->base + smap->length;
2040 if (basemem > 640) {
2041 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2047 * XXX if biosbasemem is now < 640, there is a `hole'
2048 * between the end of base memory and the start of
2049 * ISA memory. The hole may be empty or it may
2050 * contain BIOS code or data. Map it read/write so
2051 * that the BIOS can write to it. (Memory from 0 to
2052 * the physical end of the kernel is mapped read-only
2053 * to begin with and then parts of it are remapped.
2054 * The parts that aren't remapped form holes that
2055 * remain read-only and are unused by the kernel.
2056 * The base memory area is below the physical end of
2057 * the kernel and right now forms a read-only hole.
2058 * The part of it from PAGE_SIZE to
2059 * (trunc_page(biosbasemem * 1024) - 1) will be
2060 * remapped and used by the kernel later.)
2062 * This code is similar to the code used in
2063 * pmap_mapdev, but since no memory needs to be
2064 * allocated we simply change the mapping.
2066 for (pa = trunc_page(basemem * 1024);
2067 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2068 pmap_kenter(KERNBASE + pa, pa);
2071 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2072 * the vm86 page table so that vm86 can scribble on them using
2073 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2074 * page 0, at least as initialized here?
2076 pte = (pt_entry_t *)vm86paddr;
2077 for (i = basemem / 4; i < 160; i++)
2078 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2083 * Populate the (physmap) array with base/bound pairs describing the
2084 * available physical memory in the system, then test this memory and
2085 * build the phys_avail array describing the actually-available memory.
2087 * If we cannot accurately determine the physical memory map, then use
2088 * value from the 0xE801 call, and failing that, the RTC.
2090 * Total memory size may be set by the kernel environment variable
2091 * hw.physmem or the compile-time define MAXMEM.
2093 * XXX first should be vm_paddr_t.
2096 getmemsize(int first)
2098 int has_smap, off, physmap_idx, pa_indx, da_indx;
2099 u_long physmem_tunable;
2100 vm_paddr_t physmap[PHYSMAP_SIZE];
2102 quad_t dcons_addr, dcons_size;
2104 int hasbrokenint12, i;
2106 struct vm86frame vmf;
2107 struct vm86context vmc;
2109 struct bios_smap *smap, *smapbase, *smapend;
2116 Maxmem = xen_start_info->nr_pages - init_first;
2119 physmap[0] = init_first << PAGE_SHIFT;
2120 physmap[1] = ptoa(Maxmem) - round_page(MSGBUF_SIZE);
2124 if (arch_i386_is_xbox) {
2126 * We queried the memory size before, so chop off 4MB for
2127 * the framebuffer and inform the OS of this.
2130 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2135 bzero(&vmf, sizeof(vmf));
2136 bzero(physmap, sizeof(physmap));
2140 * Check if the loader supplied an SMAP memory map. If so,
2141 * use that and do not make any VM86 calls.
2145 kmdp = preload_search_by_type("elf kernel");
2147 kmdp = preload_search_by_type("elf32 kernel");
2149 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2150 MODINFO_METADATA | MODINFOMD_SMAP);
2151 if (smapbase != NULL) {
2153 * subr_module.c says:
2154 * "Consumer may safely assume that size value precedes data."
2155 * ie: an int32_t immediately precedes SMAP.
2157 smapsize = *((u_int32_t *)smapbase - 1);
2158 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2161 for (smap = smapbase; smap < smapend; smap++)
2162 if (!add_smap_entry(smap, physmap, &physmap_idx))
2168 * Some newer BIOSes have a broken INT 12H implementation
2169 * which causes a kernel panic immediately. In this case, we
2170 * need use the SMAP to determine the base memory size.
2173 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2174 if (hasbrokenint12 == 0) {
2175 /* Use INT12 to determine base memory size. */
2176 vm86_intcall(0x12, &vmf);
2177 basemem = vmf.vmf_ax;
2182 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2183 * the kernel page table so we can use it as a buffer. The
2184 * kernel will unmap this page later.
2186 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2188 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2189 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2193 vmf.vmf_eax = 0xE820;
2194 vmf.vmf_edx = SMAP_SIG;
2195 vmf.vmf_ecx = sizeof(struct bios_smap);
2196 i = vm86_datacall(0x15, &vmf, &vmc);
2197 if (i || vmf.vmf_eax != SMAP_SIG)
2200 if (!add_smap_entry(smap, physmap, &physmap_idx))
2202 } while (vmf.vmf_ebx != 0);
2206 * If we didn't fetch the "base memory" size from INT12,
2207 * figure it out from the SMAP (or just guess).
2210 for (i = 0; i <= physmap_idx; i += 2) {
2211 if (physmap[i] == 0x00000000) {
2212 basemem = physmap[i + 1] / 1024;
2217 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2223 if (physmap[1] != 0)
2227 * If we failed to find an SMAP, figure out the extended
2228 * memory size. We will then build a simple memory map with
2229 * two segments, one for "base memory" and the second for
2230 * "extended memory". Note that "extended memory" starts at a
2231 * physical address of 1MB and that both basemem and extmem
2232 * are in units of 1KB.
2234 * First, try to fetch the extended memory size via INT 15:E801.
2236 vmf.vmf_ax = 0xE801;
2237 if (vm86_intcall(0x15, &vmf) == 0) {
2238 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2241 * If INT15:E801 fails, this is our last ditch effort
2242 * to determine the extended memory size. Currently
2243 * we prefer the RTC value over INT15:88.
2247 vm86_intcall(0x15, &vmf);
2248 extmem = vmf.vmf_ax;
2250 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2255 * Special hack for chipsets that still remap the 384k hole when
2256 * there's 16MB of memory - this really confuses people that
2257 * are trying to use bus mastering ISA controllers with the
2258 * "16MB limit"; they only have 16MB, but the remapping puts
2259 * them beyond the limit.
2261 * If extended memory is between 15-16MB (16-17MB phys address range),
2264 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2268 physmap[1] = basemem * 1024;
2270 physmap[physmap_idx] = 0x100000;
2271 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2276 * Now, physmap contains a map of physical memory.
2280 /* make hole for AP bootstrap code */
2281 physmap[1] = mp_bootaddress(physmap[1]);
2285 * Maxmem isn't the "maximum memory", it's one larger than the
2286 * highest page of the physical address space. It should be
2287 * called something like "Maxphyspage". We may adjust this
2288 * based on ``hw.physmem'' and the results of the memory test.
2290 Maxmem = atop(physmap[physmap_idx + 1]);
2293 Maxmem = MAXMEM / 4;
2296 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2297 Maxmem = atop(physmem_tunable);
2300 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2301 * the amount of memory in the system.
2303 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2304 Maxmem = atop(physmap[physmap_idx + 1]);
2306 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2307 (boothowto & RB_VERBOSE))
2308 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2311 * If Maxmem has been increased beyond what the system has detected,
2312 * extend the last memory segment to the new limit.
2314 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2315 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2317 /* call pmap initialization to make new kernel address space */
2318 pmap_bootstrap(first);
2321 * Size up each available chunk of physical memory.
2323 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2326 phys_avail[pa_indx++] = physmap[0];
2327 phys_avail[pa_indx] = physmap[0];
2328 dump_avail[da_indx] = physmap[0];
2332 * Get dcons buffer address
2334 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2335 getenv_quad("dcons.size", &dcons_size) == 0)
2340 * physmap is in bytes, so when converting to page boundaries,
2341 * round up the start address and round down the end address.
2343 for (i = 0; i <= physmap_idx; i += 2) {
2346 end = ptoa((vm_paddr_t)Maxmem);
2347 if (physmap[i + 1] < end)
2348 end = trunc_page(physmap[i + 1]);
2349 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2350 int tmp, page_bad, full;
2351 int *ptr = (int *)CADDR1;
2355 * block out kernel memory as not available.
2357 if (pa >= KERNLOAD && pa < first)
2361 * block out dcons buffer
2364 && pa >= trunc_page(dcons_addr)
2365 && pa < dcons_addr + dcons_size)
2371 * map page into kernel: valid, read/write,non-cacheable
2373 *pte = pa | PG_V | PG_RW | PG_N;
2378 * Test for alternating 1's and 0's
2380 *(volatile int *)ptr = 0xaaaaaaaa;
2381 if (*(volatile int *)ptr != 0xaaaaaaaa)
2384 * Test for alternating 0's and 1's
2386 *(volatile int *)ptr = 0x55555555;
2387 if (*(volatile int *)ptr != 0x55555555)
2392 *(volatile int *)ptr = 0xffffffff;
2393 if (*(volatile int *)ptr != 0xffffffff)
2398 *(volatile int *)ptr = 0x0;
2399 if (*(volatile int *)ptr != 0x0)
2402 * Restore original value.
2407 * Adjust array of valid/good pages.
2409 if (page_bad == TRUE)
2412 * If this good page is a continuation of the
2413 * previous set of good pages, then just increase
2414 * the end pointer. Otherwise start a new chunk.
2415 * Note that "end" points one higher than end,
2416 * making the range >= start and < end.
2417 * If we're also doing a speculative memory
2418 * test and we at or past the end, bump up Maxmem
2419 * so that we keep going. The first bad page
2420 * will terminate the loop.
2422 if (phys_avail[pa_indx] == pa) {
2423 phys_avail[pa_indx] += PAGE_SIZE;
2426 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2428 "Too many holes in the physical address space, giving up\n");
2433 phys_avail[pa_indx++] = pa; /* start */
2434 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2438 if (dump_avail[da_indx] == pa) {
2439 dump_avail[da_indx] += PAGE_SIZE;
2442 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2446 dump_avail[da_indx++] = pa; /* start */
2447 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2457 phys_avail[0] = physfree;
2458 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2460 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2466 * The last chunk must contain at least one page plus the message
2467 * buffer to avoid complicating other code (message buffer address
2468 * calculation, etc.).
2470 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2471 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
2472 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2473 phys_avail[pa_indx--] = 0;
2474 phys_avail[pa_indx--] = 0;
2477 Maxmem = atop(phys_avail[pa_indx]);
2479 /* Trim off space for the message buffer. */
2480 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2482 /* Map the message buffer. */
2483 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2484 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2491 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2497 unsigned long gdtmachpfn;
2498 int error, gsel_tss, metadata_missing, x, pa;
2500 struct callback_register event = {
2501 .type = CALLBACKTYPE_event,
2502 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2504 struct callback_register failsafe = {
2505 .type = CALLBACKTYPE_failsafe,
2506 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2509 thread0.td_kstack = proc0kstack;
2510 thread0.td_pcb = (struct pcb *)
2511 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2514 * This may be done better later if it gets more high level
2515 * components in it. If so just link td->td_proc here.
2517 proc_linkup0(&proc0, &thread0);
2519 metadata_missing = 0;
2520 if (xen_start_info->mod_start) {
2521 preload_metadata = (caddr_t)xen_start_info->mod_start;
2522 preload_bootstrap_relocate(KERNBASE);
2524 metadata_missing = 1;
2527 kern_envp = static_env;
2528 else if ((caddr_t)xen_start_info->cmd_line)
2529 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2531 boothowto |= xen_boothowto(kern_envp);
2533 /* Init basic tunables, hz etc */
2537 * XEN occupies a portion of the upper virtual address space
2538 * At its base it manages an array mapping machine page frames
2539 * to physical page frames - hence we need to be able to
2540 * access 4GB - (64MB - 4MB + 64k)
2542 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2543 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2544 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2545 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2546 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2547 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2548 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2549 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2552 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2553 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2555 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2556 bzero(gdt, PAGE_SIZE);
2557 for (x = 0; x < NGDT; x++)
2558 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2560 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2562 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2563 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2564 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2568 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2569 panic("set_trap_table failed - error %d\n", error);
2572 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2574 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2575 #if CONFIG_XEN_COMPAT <= 0x030002
2576 if (error == -ENOXENSYS)
2577 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2578 (unsigned long)Xhypervisor_callback,
2579 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2581 pcpu_init(pc, 0, sizeof(struct pcpu));
2582 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2583 pmap_kenter(pa + KERNBASE, pa);
2584 dpcpu_init((void *)(first + KERNBASE), 0);
2585 first += DPCPU_SIZE;
2587 PCPU_SET(prvspace, pc);
2588 PCPU_SET(curthread, &thread0);
2589 PCPU_SET(curpcb, thread0.td_pcb);
2592 * Initialize mutexes.
2594 * icu_lock: in order to allow an interrupt to occur in a critical
2595 * section, to set pcpu->ipending (etc...) properly, we
2596 * must be able to get the icu lock, so it can't be
2600 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2602 /* make ldt memory segments */
2603 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2604 bzero(ldt, PAGE_SIZE);
2605 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2606 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2607 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2608 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2610 default_proc_ldt.ldt_base = (caddr_t)ldt;
2611 default_proc_ldt.ldt_len = 6;
2612 _default_ldt = (int)&default_proc_ldt;
2613 PCPU_SET(currentldt, _default_ldt);
2614 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2615 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2617 #if defined(XEN_PRIVILEGED)
2619 * Initialize the i8254 before the console so that console
2620 * initialization can use DELAY().
2626 * Initialize the console before we print anything out.
2630 if (metadata_missing)
2631 printf("WARNING: loader(8) metadata is missing!\n");
2639 ksym_start = bootinfo.bi_symtab;
2640 ksym_end = bootinfo.bi_esymtab;
2646 if (boothowto & RB_KDB)
2647 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2650 finishidentcpu(); /* Final stage of CPU initialization */
2651 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2652 GSEL(GCODE_SEL, SEL_KPL));
2653 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2654 GSEL(GCODE_SEL, SEL_KPL));
2655 initializecpu(); /* Initialize CPU registers */
2657 /* make an initial tss so cpu can get interrupt stack on syscall! */
2658 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2659 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2660 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2661 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2662 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2663 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2664 PCPU_GET(common_tss.tss_esp0));
2666 /* pointer to selector slot for %fs/%gs */
2667 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2669 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2670 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2671 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2672 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2674 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2676 dblfault_tss.tss_cr3 = (int)IdlePTD;
2678 dblfault_tss.tss_eip = (int)dblfault_handler;
2679 dblfault_tss.tss_eflags = PSL_KERNEL;
2680 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2681 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2682 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2683 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2684 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2688 init_param2(physmem);
2690 /* now running on new page tables, configured,and u/iom is accessible */
2692 msgbufinit(msgbufp, MSGBUF_SIZE);
2693 /* transfer to user mode */
2695 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2696 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2698 /* setup proc 0's pcb */
2699 thread0.td_pcb->pcb_flags = 0;
2701 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2703 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2705 thread0.td_pcb->pcb_ext = 0;
2706 thread0.td_frame = &proc0_tf;
2707 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2708 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2718 struct gate_descriptor *gdp;
2719 int gsel_tss, metadata_missing, x, pa;
2722 thread0.td_kstack = proc0kstack;
2723 thread0.td_pcb = (struct pcb *)
2724 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2727 * This may be done better later if it gets more high level
2728 * components in it. If so just link td->td_proc here.
2730 proc_linkup0(&proc0, &thread0);
2732 metadata_missing = 0;
2733 if (bootinfo.bi_modulep) {
2734 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2735 preload_bootstrap_relocate(KERNBASE);
2737 metadata_missing = 1;
2740 kern_envp = static_env;
2741 else if (bootinfo.bi_envp)
2742 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2744 /* Init basic tunables, hz etc */
2748 * Make gdt memory segments. All segments cover the full 4GB
2749 * of address space and permissions are enforced at page level.
2751 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2752 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2753 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2754 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2755 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2756 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2759 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2760 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2761 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2763 for (x = 0; x < NGDT; x++)
2764 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2766 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2767 r_gdt.rd_base = (int) gdt;
2768 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2771 pcpu_init(pc, 0, sizeof(struct pcpu));
2772 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2773 pmap_kenter(pa + KERNBASE, pa);
2774 dpcpu_init((void *)(first + KERNBASE), 0);
2775 first += DPCPU_SIZE;
2776 PCPU_SET(prvspace, pc);
2777 PCPU_SET(curthread, &thread0);
2778 PCPU_SET(curpcb, thread0.td_pcb);
2781 * Initialize mutexes.
2783 * icu_lock: in order to allow an interrupt to occur in a critical
2784 * section, to set pcpu->ipending (etc...) properly, we
2785 * must be able to get the icu lock, so it can't be
2789 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2791 /* make ldt memory segments */
2792 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2793 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2794 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2795 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2797 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2799 PCPU_SET(currentldt, _default_ldt);
2802 for (x = 0; x < NIDT; x++)
2803 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2804 GSEL(GCODE_SEL, SEL_KPL));
2805 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2806 GSEL(GCODE_SEL, SEL_KPL));
2807 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2808 GSEL(GCODE_SEL, SEL_KPL));
2809 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2810 GSEL(GCODE_SEL, SEL_KPL));
2811 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2812 GSEL(GCODE_SEL, SEL_KPL));
2813 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2814 GSEL(GCODE_SEL, SEL_KPL));
2815 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2816 GSEL(GCODE_SEL, SEL_KPL));
2817 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2818 GSEL(GCODE_SEL, SEL_KPL));
2819 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2820 , GSEL(GCODE_SEL, SEL_KPL));
2821 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2822 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2823 GSEL(GCODE_SEL, SEL_KPL));
2824 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2825 GSEL(GCODE_SEL, SEL_KPL));
2826 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2827 GSEL(GCODE_SEL, SEL_KPL));
2828 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2829 GSEL(GCODE_SEL, SEL_KPL));
2830 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2831 GSEL(GCODE_SEL, SEL_KPL));
2832 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2833 GSEL(GCODE_SEL, SEL_KPL));
2834 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2835 GSEL(GCODE_SEL, SEL_KPL));
2836 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2837 GSEL(GCODE_SEL, SEL_KPL));
2838 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2839 GSEL(GCODE_SEL, SEL_KPL));
2840 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2841 GSEL(GCODE_SEL, SEL_KPL));
2842 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2843 GSEL(GCODE_SEL, SEL_KPL));
2844 #ifdef KDTRACE_HOOKS
2845 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2846 GSEL(GCODE_SEL, SEL_KPL));
2849 r_idt.rd_limit = sizeof(idt0) - 1;
2850 r_idt.rd_base = (int) idt;
2855 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2856 * This should be 0x10de / 0x02a5.
2858 * This is exactly what Linux does.
2860 outl(0xcf8, 0x80000000);
2861 if (inl(0xcfc) == 0x02a510de) {
2862 arch_i386_is_xbox = 1;
2863 pic16l_setled(XBOX_LED_GREEN);
2866 * We are an XBOX, but we may have either 64MB or 128MB of
2867 * memory. The PCI host bridge should be programmed for this,
2868 * so we just query it.
2870 outl(0xcf8, 0x80000084);
2871 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2876 * Initialize the i8254 before the console so that console
2877 * initialization can use DELAY().
2882 * Initialize the console before we print anything out.
2886 if (metadata_missing)
2887 printf("WARNING: loader(8) metadata is missing!\n");
2895 ksym_start = bootinfo.bi_symtab;
2896 ksym_end = bootinfo.bi_esymtab;
2902 if (boothowto & RB_KDB)
2903 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2906 finishidentcpu(); /* Final stage of CPU initialization */
2907 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2908 GSEL(GCODE_SEL, SEL_KPL));
2909 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2910 GSEL(GCODE_SEL, SEL_KPL));
2911 initializecpu(); /* Initialize CPU registers */
2913 /* make an initial tss so cpu can get interrupt stack on syscall! */
2914 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2915 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2916 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2917 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2918 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2919 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2920 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2921 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2924 /* pointer to selector slot for %fs/%gs */
2925 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2927 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2928 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2929 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2930 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2932 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2934 dblfault_tss.tss_cr3 = (int)IdlePTD;
2936 dblfault_tss.tss_eip = (int)dblfault_handler;
2937 dblfault_tss.tss_eflags = PSL_KERNEL;
2938 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2939 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2940 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2941 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2942 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2946 init_param2(physmem);
2948 /* now running on new page tables, configured,and u/iom is accessible */
2950 msgbufinit(msgbufp, MSGBUF_SIZE);
2952 /* make a call gate to reenter kernel with */
2953 gdp = &ldt[LSYS5CALLS_SEL].gd;
2955 x = (int) &IDTVEC(lcall_syscall);
2956 gdp->gd_looffset = x;
2957 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2959 gdp->gd_type = SDT_SYS386CGT;
2960 gdp->gd_dpl = SEL_UPL;
2962 gdp->gd_hioffset = x >> 16;
2964 /* XXX does this work? */
2966 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2967 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2969 /* transfer to user mode */
2971 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2972 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2974 /* setup proc 0's pcb */
2975 thread0.td_pcb->pcb_flags = 0;
2977 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2979 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2981 thread0.td_pcb->pcb_ext = 0;
2982 thread0.td_frame = &proc0_tf;
2989 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2992 pcpu->pc_acpi_id = 0xffffffff;
2996 spinlock_enter(void)
3001 if (td->td_md.md_spinlock_count == 0)
3002 td->td_md.md_saved_flags = intr_disable();
3003 td->td_md.md_spinlock_count++;
3014 td->td_md.md_spinlock_count--;
3015 if (td->td_md.md_spinlock_count == 0)
3016 intr_restore(td->td_md.md_saved_flags);
3019 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3020 static void f00f_hack(void *unused);
3021 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3024 f00f_hack(void *unused)
3026 struct gate_descriptor *new_idt;
3034 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3036 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
3038 panic("kmem_alloc returned 0");
3040 /* Put the problematic entry (#6) at the end of the lower page. */
3041 new_idt = (struct gate_descriptor*)
3042 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3043 bcopy(idt, new_idt, sizeof(idt0));
3044 r_idt.rd_base = (u_int)new_idt;
3047 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3048 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3049 panic("vm_map_protect failed");
3051 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3054 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3055 * we want to start a backtrace from the function that caused us to enter
3056 * the debugger. We have the context in the trapframe, but base the trace
3057 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3058 * enough for a backtrace.
3061 makectx(struct trapframe *tf, struct pcb *pcb)
3064 pcb->pcb_edi = tf->tf_edi;
3065 pcb->pcb_esi = tf->tf_esi;
3066 pcb->pcb_ebp = tf->tf_ebp;
3067 pcb->pcb_ebx = tf->tf_ebx;
3068 pcb->pcb_eip = tf->tf_eip;
3069 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3073 ptrace_set_pc(struct thread *td, u_long addr)
3076 td->td_frame->tf_eip = addr;
3081 ptrace_single_step(struct thread *td)
3083 td->td_frame->tf_eflags |= PSL_T;
3088 ptrace_clear_single_step(struct thread *td)
3090 td->td_frame->tf_eflags &= ~PSL_T;
3095 fill_regs(struct thread *td, struct reg *regs)
3098 struct trapframe *tp;
3102 regs->r_fs = tp->tf_fs;
3103 regs->r_es = tp->tf_es;
3104 regs->r_ds = tp->tf_ds;
3105 regs->r_edi = tp->tf_edi;
3106 regs->r_esi = tp->tf_esi;
3107 regs->r_ebp = tp->tf_ebp;
3108 regs->r_ebx = tp->tf_ebx;
3109 regs->r_edx = tp->tf_edx;
3110 regs->r_ecx = tp->tf_ecx;
3111 regs->r_eax = tp->tf_eax;
3112 regs->r_eip = tp->tf_eip;
3113 regs->r_cs = tp->tf_cs;
3114 regs->r_eflags = tp->tf_eflags;
3115 regs->r_esp = tp->tf_esp;
3116 regs->r_ss = tp->tf_ss;
3117 regs->r_gs = pcb->pcb_gs;
3122 set_regs(struct thread *td, struct reg *regs)
3125 struct trapframe *tp;
3128 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3129 !CS_SECURE(regs->r_cs))
3132 tp->tf_fs = regs->r_fs;
3133 tp->tf_es = regs->r_es;
3134 tp->tf_ds = regs->r_ds;
3135 tp->tf_edi = regs->r_edi;
3136 tp->tf_esi = regs->r_esi;
3137 tp->tf_ebp = regs->r_ebp;
3138 tp->tf_ebx = regs->r_ebx;
3139 tp->tf_edx = regs->r_edx;
3140 tp->tf_ecx = regs->r_ecx;
3141 tp->tf_eax = regs->r_eax;
3142 tp->tf_eip = regs->r_eip;
3143 tp->tf_cs = regs->r_cs;
3144 tp->tf_eflags = regs->r_eflags;
3145 tp->tf_esp = regs->r_esp;
3146 tp->tf_ss = regs->r_ss;
3147 pcb->pcb_gs = regs->r_gs;
3151 #ifdef CPU_ENABLE_SSE
3153 fill_fpregs_xmm(sv_xmm, sv_87)
3154 struct savexmm *sv_xmm;
3155 struct save87 *sv_87;
3157 register struct env87 *penv_87 = &sv_87->sv_env;
3158 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3161 bzero(sv_87, sizeof(*sv_87));
3163 /* FPU control/status */
3164 penv_87->en_cw = penv_xmm->en_cw;
3165 penv_87->en_sw = penv_xmm->en_sw;
3166 penv_87->en_tw = penv_xmm->en_tw;
3167 penv_87->en_fip = penv_xmm->en_fip;
3168 penv_87->en_fcs = penv_xmm->en_fcs;
3169 penv_87->en_opcode = penv_xmm->en_opcode;
3170 penv_87->en_foo = penv_xmm->en_foo;
3171 penv_87->en_fos = penv_xmm->en_fos;
3174 for (i = 0; i < 8; ++i)
3175 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3179 set_fpregs_xmm(sv_87, sv_xmm)
3180 struct save87 *sv_87;
3181 struct savexmm *sv_xmm;
3183 register struct env87 *penv_87 = &sv_87->sv_env;
3184 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3187 /* FPU control/status */
3188 penv_xmm->en_cw = penv_87->en_cw;
3189 penv_xmm->en_sw = penv_87->en_sw;
3190 penv_xmm->en_tw = penv_87->en_tw;
3191 penv_xmm->en_fip = penv_87->en_fip;
3192 penv_xmm->en_fcs = penv_87->en_fcs;
3193 penv_xmm->en_opcode = penv_87->en_opcode;
3194 penv_xmm->en_foo = penv_87->en_foo;
3195 penv_xmm->en_fos = penv_87->en_fos;
3198 for (i = 0; i < 8; ++i)
3199 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3201 #endif /* CPU_ENABLE_SSE */
3204 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3206 #ifdef CPU_ENABLE_SSE
3208 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3209 (struct save87 *)fpregs);
3212 #endif /* CPU_ENABLE_SSE */
3213 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs, sizeof *fpregs);
3218 set_fpregs(struct thread *td, struct fpreg *fpregs)
3220 #ifdef CPU_ENABLE_SSE
3222 set_fpregs_xmm((struct save87 *)fpregs,
3223 &td->td_pcb->pcb_user_save.sv_xmm);
3226 #endif /* CPU_ENABLE_SSE */
3227 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87, sizeof *fpregs);
3232 * Get machine context.
3235 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3237 struct trapframe *tp;
3238 struct segment_descriptor *sdp;
3242 PROC_LOCK(curthread->td_proc);
3243 mcp->mc_onstack = sigonstack(tp->tf_esp);
3244 PROC_UNLOCK(curthread->td_proc);
3245 mcp->mc_gs = td->td_pcb->pcb_gs;
3246 mcp->mc_fs = tp->tf_fs;
3247 mcp->mc_es = tp->tf_es;
3248 mcp->mc_ds = tp->tf_ds;
3249 mcp->mc_edi = tp->tf_edi;
3250 mcp->mc_esi = tp->tf_esi;
3251 mcp->mc_ebp = tp->tf_ebp;
3252 mcp->mc_isp = tp->tf_isp;
3253 mcp->mc_eflags = tp->tf_eflags;
3254 if (flags & GET_MC_CLEAR_RET) {
3257 mcp->mc_eflags &= ~PSL_C;
3259 mcp->mc_eax = tp->tf_eax;
3260 mcp->mc_edx = tp->tf_edx;
3262 mcp->mc_ebx = tp->tf_ebx;
3263 mcp->mc_ecx = tp->tf_ecx;
3264 mcp->mc_eip = tp->tf_eip;
3265 mcp->mc_cs = tp->tf_cs;
3266 mcp->mc_esp = tp->tf_esp;
3267 mcp->mc_ss = tp->tf_ss;
3268 mcp->mc_len = sizeof(*mcp);
3271 * The get_fpcontext() call must be placed before assignments
3272 * to mc_fsbase and mc_gsbase due to the alignment-override
3273 * code in get_fpcontext() that possibly clobbers 12 bytes of
3274 * mcontext after mc_fpstate.
3276 get_fpcontext(td, mcp);
3277 sdp = &td->td_pcb->pcb_fsd;
3278 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3279 sdp = &td->td_pcb->pcb_gsd;
3280 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3286 * Set machine context.
3288 * However, we don't set any but the user modifiable flags, and we won't
3289 * touch the cs selector.
3292 set_mcontext(struct thread *td, const mcontext_t *mcp)
3294 struct trapframe *tp;
3298 if (mcp->mc_len != sizeof(*mcp))
3300 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3301 (tp->tf_eflags & ~PSL_USERCHANGE);
3302 if ((ret = set_fpcontext(td, mcp)) == 0) {
3303 tp->tf_fs = mcp->mc_fs;
3304 tp->tf_es = mcp->mc_es;
3305 tp->tf_ds = mcp->mc_ds;
3306 tp->tf_edi = mcp->mc_edi;
3307 tp->tf_esi = mcp->mc_esi;
3308 tp->tf_ebp = mcp->mc_ebp;
3309 tp->tf_ebx = mcp->mc_ebx;
3310 tp->tf_edx = mcp->mc_edx;
3311 tp->tf_ecx = mcp->mc_ecx;
3312 tp->tf_eax = mcp->mc_eax;
3313 tp->tf_eip = mcp->mc_eip;
3314 tp->tf_eflags = eflags;
3315 tp->tf_esp = mcp->mc_esp;
3316 tp->tf_ss = mcp->mc_ss;
3317 td->td_pcb->pcb_gs = mcp->mc_gs;
3324 get_fpcontext(struct thread *td, mcontext_t *mcp)
3327 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3328 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3330 union savefpu *addr;
3333 * XXX mc_fpstate might be misaligned, since its declaration is not
3334 * unportabilized using __attribute__((aligned(16))) like the
3335 * declaration of struct savemm, and anyway, alignment doesn't work
3336 * for auto variables since we don't use gcc's pessimal stack
3337 * alignment. Work around this by abusing the spare fields after
3340 * XXX unpessimize most cases by only aligning when fxsave might be
3341 * called, although this requires knowing too much about
3342 * npxgetuserregs()'s internals.
3344 addr = (union savefpu *)&mcp->mc_fpstate;
3345 if (td == PCPU_GET(fpcurthread) &&
3346 #ifdef CPU_ENABLE_SSE
3349 ((uintptr_t)(void *)addr & 0xF)) {
3351 addr = (void *)((char *)addr + 4);
3352 while ((uintptr_t)(void *)addr & 0xF);
3354 mcp->mc_ownedfp = npxgetuserregs(td, addr);
3355 if (addr != (union savefpu *)&mcp->mc_fpstate) {
3356 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3357 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
3359 mcp->mc_fpformat = npxformat();
3364 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3366 union savefpu *addr;
3368 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3370 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3371 mcp->mc_fpformat != _MC_FPFMT_XMM)
3373 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3374 /* We don't care what state is left in the FPU or PCB. */
3376 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3377 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3378 /* XXX align as above. */
3379 addr = (union savefpu *)&mcp->mc_fpstate;
3380 if (td == PCPU_GET(fpcurthread) &&
3381 #ifdef CPU_ENABLE_SSE
3384 ((uintptr_t)(void *)addr & 0xF)) {
3386 addr = (void *)((char *)addr + 4);
3387 while ((uintptr_t)(void *)addr & 0xF);
3388 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
3391 #ifdef CPU_ENABLE_SSE
3393 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
3395 npxsetuserregs(td, addr);
3398 * Don't bother putting things back where they were in the
3399 * misaligned case, since we know that the caller won't use
3408 fpstate_drop(struct thread *td)
3411 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3414 if (PCPU_GET(fpcurthread) == td)
3418 * XXX force a full drop of the npx. The above only drops it if we
3419 * owned it. npxgetuserregs() has the same bug in the !cpu_fxsr case.
3421 * XXX I don't much like npxgetuserregs()'s semantics of doing a full
3422 * drop. Dropping only to the pcb matches fnsave's behaviour.
3423 * We only need to drop to !PCB_INITDONE in sendsig(). But
3424 * sendsig() is the only caller of npxgetuserregs()... perhaps we just
3425 * have too many layers.
3427 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3428 PCB_NPXUSERINITDONE);
3433 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3438 dbregs->dr[0] = rdr0();
3439 dbregs->dr[1] = rdr1();
3440 dbregs->dr[2] = rdr2();
3441 dbregs->dr[3] = rdr3();
3442 dbregs->dr[4] = rdr4();
3443 dbregs->dr[5] = rdr5();
3444 dbregs->dr[6] = rdr6();
3445 dbregs->dr[7] = rdr7();
3448 dbregs->dr[0] = pcb->pcb_dr0;
3449 dbregs->dr[1] = pcb->pcb_dr1;
3450 dbregs->dr[2] = pcb->pcb_dr2;
3451 dbregs->dr[3] = pcb->pcb_dr3;
3454 dbregs->dr[6] = pcb->pcb_dr6;
3455 dbregs->dr[7] = pcb->pcb_dr7;
3461 set_dbregs(struct thread *td, struct dbreg *dbregs)
3467 load_dr0(dbregs->dr[0]);
3468 load_dr1(dbregs->dr[1]);
3469 load_dr2(dbregs->dr[2]);
3470 load_dr3(dbregs->dr[3]);
3471 load_dr4(dbregs->dr[4]);
3472 load_dr5(dbregs->dr[5]);
3473 load_dr6(dbregs->dr[6]);
3474 load_dr7(dbregs->dr[7]);
3477 * Don't let an illegal value for dr7 get set. Specifically,
3478 * check for undefined settings. Setting these bit patterns
3479 * result in undefined behaviour and can lead to an unexpected
3482 for (i = 0; i < 4; i++) {
3483 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3485 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3492 * Don't let a process set a breakpoint that is not within the
3493 * process's address space. If a process could do this, it
3494 * could halt the system by setting a breakpoint in the kernel
3495 * (if ddb was enabled). Thus, we need to check to make sure
3496 * that no breakpoints are being enabled for addresses outside
3497 * process's address space.
3499 * XXX - what about when the watched area of the user's
3500 * address space is written into from within the kernel
3501 * ... wouldn't that still cause a breakpoint to be generated
3502 * from within kernel mode?
3505 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3506 /* dr0 is enabled */
3507 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3511 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3512 /* dr1 is enabled */
3513 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3517 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3518 /* dr2 is enabled */
3519 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3523 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3524 /* dr3 is enabled */
3525 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3529 pcb->pcb_dr0 = dbregs->dr[0];
3530 pcb->pcb_dr1 = dbregs->dr[1];
3531 pcb->pcb_dr2 = dbregs->dr[2];
3532 pcb->pcb_dr3 = dbregs->dr[3];
3533 pcb->pcb_dr6 = dbregs->dr[6];
3534 pcb->pcb_dr7 = dbregs->dr[7];
3536 pcb->pcb_flags |= PCB_DBREGS;
3543 * Return > 0 if a hardware breakpoint has been hit, and the
3544 * breakpoint was in user space. Return 0, otherwise.
3547 user_dbreg_trap(void)
3549 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3550 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3551 int nbp; /* number of breakpoints that triggered */
3552 caddr_t addr[4]; /* breakpoint addresses */
3556 if ((dr7 & 0x000000ff) == 0) {
3558 * all GE and LE bits in the dr7 register are zero,
3559 * thus the trap couldn't have been caused by the
3560 * hardware debug registers
3567 bp = dr6 & 0x0000000f;
3571 * None of the breakpoint bits are set meaning this
3572 * trap was not caused by any of the debug registers
3578 * at least one of the breakpoints were hit, check to see
3579 * which ones and if any of them are user space addresses
3583 addr[nbp++] = (caddr_t)rdr0();
3586 addr[nbp++] = (caddr_t)rdr1();
3589 addr[nbp++] = (caddr_t)rdr2();
3592 addr[nbp++] = (caddr_t)rdr3();
3595 for (i = 0; i < nbp; i++) {
3596 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3598 * addr[i] is in user space
3605 * None of the breakpoints are in user space.
3611 #include <machine/apicvar.h>
3614 * Provide stub functions so that the MADT APIC enumerator in the acpi
3615 * kernel module will link against a kernel without 'device apic'.
3617 * XXX - This is a gross hack.
3620 apic_register_enumerator(struct apic_enumerator *enumerator)
3625 ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase)
3631 ioapic_disable_pin(void *cookie, u_int pin)
3637 ioapic_get_vector(void *cookie, u_int pin)
3643 ioapic_register(void *cookie)
3648 ioapic_remap_vector(void *cookie, u_int pin, int vector)
3654 ioapic_set_extint(void *cookie, u_int pin)
3660 ioapic_set_nmi(void *cookie, u_int pin)
3666 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
3672 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
3678 lapic_create(u_int apic_id, int boot_cpu)
3683 lapic_init(vm_paddr_t addr)
3688 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3694 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3700 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3709 * Provide inb() and outb() as functions. They are normally only available as
3710 * inline functions, thus cannot be called from the debugger.
3713 /* silence compiler warnings */
3714 u_char inb_(u_short);
3715 void outb_(u_short, u_char);
3724 outb_(u_short port, u_char data)