2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
53 #include "opt_perfmon.h"
55 #include "opt_kdtrace.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
66 #include <sys/eventhandler.h>
68 #include <sys/imgact.h>
70 #include <sys/kernel.h>
72 #include <sys/linker.h>
74 #include <sys/malloc.h>
75 #include <sys/msgbuf.h>
76 #include <sys/mutex.h>
78 #include <sys/ptrace.h>
79 #include <sys/reboot.h>
80 #include <sys/sched.h>
81 #include <sys/signalvar.h>
82 #include <sys/syscallsubr.h>
83 #include <sys/sysctl.h>
84 #include <sys/sysent.h>
85 #include <sys/sysproto.h>
86 #include <sys/ucontext.h>
87 #include <sys/vmmeter.h>
90 #include <vm/vm_extern.h>
91 #include <vm/vm_kern.h>
92 #include <vm/vm_page.h>
93 #include <vm/vm_map.h>
94 #include <vm/vm_object.h>
95 #include <vm/vm_pager.h>
96 #include <vm/vm_param.h>
100 #error KDB must be enabled in order for DDB to work!
103 #include <ddb/db_sym.h>
108 #include <net/netisr.h>
110 #include <machine/bootinfo.h>
111 #include <machine/clock.h>
112 #include <machine/cpu.h>
113 #include <machine/cputypes.h>
114 #include <machine/intr_machdep.h>
116 #include <machine/md_var.h>
117 #include <machine/metadata.h>
118 #include <machine/pc/bios.h>
119 #include <machine/pcb.h>
120 #include <machine/pcb_ext.h>
121 #include <machine/proc.h>
122 #include <machine/reg.h>
123 #include <machine/sigframe.h>
124 #include <machine/specialreg.h>
125 #include <machine/vm86.h>
127 #include <machine/perfmon.h>
130 #include <machine/smp.h>
134 #include <x86/isa/icu.h>
138 #include <machine/xbox.h>
140 int arch_i386_is_xbox = 0;
141 uint32_t arch_i386_xbox_memsize = 0;
146 #include <machine/xen/xen-os.h>
147 #include <xen/hypervisor.h>
148 #include <machine/xen/xen-os.h>
149 #include <machine/xen/xenvar.h>
150 #include <machine/xen/xenfunc.h>
151 #include <xen/xen_intr.h>
153 void Xhypervisor_callback(void);
154 void failsafe_callback(void);
156 extern trap_info_t trap_table[];
157 struct proc_ldt default_proc_ldt;
158 extern int init_first;
160 extern unsigned long physfree;
163 /* Sanity check for __curthread() */
164 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
166 extern void init386(int first);
167 extern void dblfault_handler(void);
169 extern void printcpuinfo(void); /* XXX header file */
170 extern void finishidentcpu(void);
171 extern void panicifcpuunsupported(void);
172 extern void initializecpu(void);
174 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
175 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
177 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
178 #define CPU_ENABLE_SSE
181 static void cpu_startup(void *);
182 static void fpstate_drop(struct thread *td);
183 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
184 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
185 #ifdef CPU_ENABLE_SSE
186 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
187 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
188 #endif /* CPU_ENABLE_SSE */
189 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
192 extern vm_offset_t ksym_start, ksym_end;
195 /* Intel ICH registers */
196 #define ICH_PMBASE 0x400
197 #define ICH_SMI_EN ICH_PMBASE + 0x30
199 int _udatasel, _ucodesel;
205 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
207 #ifdef COMPAT_FREEBSD4
208 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
215 FEATURE(pae, "Physical Address Extensions");
219 * The number of PHYSMAP entries must be one less than the number of
220 * PHYSSEG entries because the PHYSMAP entry that spans the largest
221 * physical address that is accessible by ISA DMA is split into two
224 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
226 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
227 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
229 /* must be 2 less so 0 0 can signal end of chunks */
230 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
231 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
233 struct kva_md_info kmi;
235 static struct trapframe proc0_tf;
236 struct pcpu __pcpu[MAXCPU];
248 * On MacBooks, we need to disallow the legacy USB circuit to
249 * generate an SMI# because this can cause several problems,
250 * namely: incorrect CPU frequency detection and failure to
252 * We do this by disabling a bit in the SMI_EN (SMI Control and
253 * Enable register) of the Intel ICH LPC Interface Bridge.
255 sysenv = getenv("smbios.system.product");
256 if (sysenv != NULL) {
257 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
258 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
259 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
260 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
261 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
262 strncmp(sysenv, "Macmini1,1", 10) == 0) {
264 printf("Disabling LEGACY_USB_EN bit on "
266 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
272 * Good {morning,afternoon,evening,night}.
276 panicifcpuunsupported();
283 * Display physical memory if SMBIOS reports reasonable amount.
286 sysenv = getenv("smbios.memory.enabled");
287 if (sysenv != NULL) {
288 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
291 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
292 memsize = ptoa((uintmax_t)Maxmem);
293 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
296 * Display any holes after the first chunk of extended memory.
301 printf("Physical memory chunk(s):\n");
302 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
305 size = phys_avail[indx + 1] - phys_avail[indx];
307 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
308 (uintmax_t)phys_avail[indx],
309 (uintmax_t)phys_avail[indx + 1] - 1,
310 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
314 vm_ksubmap_init(&kmi);
316 printf("avail memory = %ju (%ju MB)\n",
317 ptoa((uintmax_t)cnt.v_free_count),
318 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
321 * Set up buffers, so they can be used to read disk labels.
324 vm_pager_bufferinit();
331 * Send an interrupt to process.
333 * Stack is set up to allow sigcode stored
334 * at top to call routine, followed by kcall
335 * to sigreturn routine below. After sigreturn
336 * resets the signal mask, the stack, and the
337 * frame pointer, it returns to the user
342 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
344 struct osigframe sf, *fp;
348 struct trapframe *regs;
354 PROC_LOCK_ASSERT(p, MA_OWNED);
355 sig = ksi->ksi_signo;
357 mtx_assert(&psp->ps_mtx, MA_OWNED);
359 oonstack = sigonstack(regs->tf_esp);
361 /* Allocate space for the signal handler context. */
362 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
363 SIGISMEMBER(psp->ps_sigonstack, sig)) {
364 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
365 td->td_sigstk.ss_size - sizeof(struct osigframe));
366 #if defined(COMPAT_43)
367 td->td_sigstk.ss_flags |= SS_ONSTACK;
370 fp = (struct osigframe *)regs->tf_esp - 1;
372 /* Translate the signal if appropriate. */
373 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
374 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
376 /* Build the argument list for the signal handler. */
378 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
379 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
380 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
381 /* Signal handler installed with SA_SIGINFO. */
382 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
383 sf.sf_siginfo.si_signo = sig;
384 sf.sf_siginfo.si_code = ksi->ksi_code;
385 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
388 /* Old FreeBSD-style arguments. */
389 sf.sf_arg2 = ksi->ksi_code;
390 sf.sf_addr = (register_t)ksi->ksi_addr;
391 sf.sf_ahu.sf_handler = catcher;
393 mtx_unlock(&psp->ps_mtx);
396 /* Save most if not all of trap frame. */
397 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
398 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
399 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
400 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
401 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
402 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
403 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
404 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
405 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
406 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
407 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
408 sf.sf_siginfo.si_sc.sc_gs = rgs();
409 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
411 /* Build the signal context to be used by osigreturn(). */
412 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
413 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
414 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
415 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
416 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
417 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
418 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
419 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
422 * If we're a vm86 process, we want to save the segment registers.
423 * We also change eflags to be our emulated eflags, not the actual
426 if (regs->tf_eflags & PSL_VM) {
427 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
428 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
429 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
431 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
432 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
433 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
434 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
436 if (vm86->vm86_has_vme == 0)
437 sf.sf_siginfo.si_sc.sc_ps =
438 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
439 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
441 /* See sendsig() for comments. */
442 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
446 * Copy the sigframe out to the user's stack.
448 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
450 printf("process %ld has trashed its stack\n", (long)p->p_pid);
456 regs->tf_esp = (int)fp;
457 regs->tf_eip = PS_STRINGS - szosigcode;
458 regs->tf_eflags &= ~(PSL_T | PSL_D);
459 regs->tf_cs = _ucodesel;
460 regs->tf_ds = _udatasel;
461 regs->tf_es = _udatasel;
462 regs->tf_fs = _udatasel;
464 regs->tf_ss = _udatasel;
466 mtx_lock(&psp->ps_mtx);
468 #endif /* COMPAT_43 */
470 #ifdef COMPAT_FREEBSD4
472 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
474 struct sigframe4 sf, *sfp;
478 struct trapframe *regs;
484 PROC_LOCK_ASSERT(p, MA_OWNED);
485 sig = ksi->ksi_signo;
487 mtx_assert(&psp->ps_mtx, MA_OWNED);
489 oonstack = sigonstack(regs->tf_esp);
491 /* Save user context. */
492 bzero(&sf, sizeof(sf));
493 sf.sf_uc.uc_sigmask = *mask;
494 sf.sf_uc.uc_stack = td->td_sigstk;
495 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
496 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
497 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
498 sf.sf_uc.uc_mcontext.mc_gs = rgs();
499 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
500 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
501 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
502 bzero(sf.sf_uc.uc_mcontext.__spare__,
503 sizeof(sf.sf_uc.uc_mcontext.__spare__));
504 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
506 /* Allocate space for the signal handler context. */
507 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
508 SIGISMEMBER(psp->ps_sigonstack, sig)) {
509 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
510 td->td_sigstk.ss_size - sizeof(struct sigframe4));
511 #if defined(COMPAT_43)
512 td->td_sigstk.ss_flags |= SS_ONSTACK;
515 sfp = (struct sigframe4 *)regs->tf_esp - 1;
517 /* Translate the signal if appropriate. */
518 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
519 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
521 /* Build the argument list for the signal handler. */
523 sf.sf_ucontext = (register_t)&sfp->sf_uc;
524 bzero(&sf.sf_si, sizeof(sf.sf_si));
525 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
526 /* Signal handler installed with SA_SIGINFO. */
527 sf.sf_siginfo = (register_t)&sfp->sf_si;
528 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
530 /* Fill in POSIX parts */
531 sf.sf_si.si_signo = sig;
532 sf.sf_si.si_code = ksi->ksi_code;
533 sf.sf_si.si_addr = ksi->ksi_addr;
535 /* Old FreeBSD-style arguments. */
536 sf.sf_siginfo = ksi->ksi_code;
537 sf.sf_addr = (register_t)ksi->ksi_addr;
538 sf.sf_ahu.sf_handler = catcher;
540 mtx_unlock(&psp->ps_mtx);
544 * If we're a vm86 process, we want to save the segment registers.
545 * We also change eflags to be our emulated eflags, not the actual
548 if (regs->tf_eflags & PSL_VM) {
549 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
550 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
552 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
553 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
554 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
555 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
557 if (vm86->vm86_has_vme == 0)
558 sf.sf_uc.uc_mcontext.mc_eflags =
559 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
560 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
563 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
564 * syscalls made by the signal handler. This just avoids
565 * wasting time for our lazy fixup of such faults. PSL_NT
566 * does nothing in vm86 mode, but vm86 programs can set it
567 * almost legitimately in probes for old cpu types.
569 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
573 * Copy the sigframe out to the user's stack.
575 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
577 printf("process %ld has trashed its stack\n", (long)p->p_pid);
583 regs->tf_esp = (int)sfp;
584 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
585 regs->tf_eflags &= ~(PSL_T | PSL_D);
586 regs->tf_cs = _ucodesel;
587 regs->tf_ds = _udatasel;
588 regs->tf_es = _udatasel;
589 regs->tf_fs = _udatasel;
590 regs->tf_ss = _udatasel;
592 mtx_lock(&psp->ps_mtx);
594 #endif /* COMPAT_FREEBSD4 */
597 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
599 struct sigframe sf, *sfp;
604 struct trapframe *regs;
605 struct segment_descriptor *sdp;
611 PROC_LOCK_ASSERT(p, MA_OWNED);
612 sig = ksi->ksi_signo;
614 mtx_assert(&psp->ps_mtx, MA_OWNED);
615 #ifdef COMPAT_FREEBSD4
616 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
617 freebsd4_sendsig(catcher, ksi, mask);
622 if (SIGISMEMBER(psp->ps_osigset, sig)) {
623 osendsig(catcher, ksi, mask);
628 oonstack = sigonstack(regs->tf_esp);
630 /* Save user context. */
631 bzero(&sf, sizeof(sf));
632 sf.sf_uc.uc_sigmask = *mask;
633 sf.sf_uc.uc_stack = td->td_sigstk;
634 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
635 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
636 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
637 sf.sf_uc.uc_mcontext.mc_gs = rgs();
638 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
639 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
640 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
643 * Unconditionally fill the fsbase and gsbase into the mcontext.
645 sdp = &td->td_pcb->pcb_fsd;
646 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
648 sdp = &td->td_pcb->pcb_gsd;
649 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
651 bzero(sf.sf_uc.uc_mcontext.mc_spare1,
652 sizeof(sf.sf_uc.uc_mcontext.mc_spare1));
653 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
654 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
655 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
657 /* Allocate space for the signal handler context. */
658 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
659 SIGISMEMBER(psp->ps_sigonstack, sig)) {
660 sp = td->td_sigstk.ss_sp +
661 td->td_sigstk.ss_size - sizeof(struct sigframe);
662 #if defined(COMPAT_43)
663 td->td_sigstk.ss_flags |= SS_ONSTACK;
666 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
667 /* Align to 16 bytes. */
668 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
670 /* Translate the signal if appropriate. */
671 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
672 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
674 /* Build the argument list for the signal handler. */
676 sf.sf_ucontext = (register_t)&sfp->sf_uc;
677 bzero(&sf.sf_si, sizeof(sf.sf_si));
678 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
679 /* Signal handler installed with SA_SIGINFO. */
680 sf.sf_siginfo = (register_t)&sfp->sf_si;
681 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
683 /* Fill in POSIX parts */
684 sf.sf_si = ksi->ksi_info;
685 sf.sf_si.si_signo = sig; /* maybe a translated signal */
687 /* Old FreeBSD-style arguments. */
688 sf.sf_siginfo = ksi->ksi_code;
689 sf.sf_addr = (register_t)ksi->ksi_addr;
690 sf.sf_ahu.sf_handler = catcher;
692 mtx_unlock(&psp->ps_mtx);
696 * If we're a vm86 process, we want to save the segment registers.
697 * We also change eflags to be our emulated eflags, not the actual
700 if (regs->tf_eflags & PSL_VM) {
701 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
702 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
704 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
705 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
706 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
707 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
709 if (vm86->vm86_has_vme == 0)
710 sf.sf_uc.uc_mcontext.mc_eflags =
711 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
712 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
715 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
716 * syscalls made by the signal handler. This just avoids
717 * wasting time for our lazy fixup of such faults. PSL_NT
718 * does nothing in vm86 mode, but vm86 programs can set it
719 * almost legitimately in probes for old cpu types.
721 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
725 * Copy the sigframe out to the user's stack.
727 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
729 printf("process %ld has trashed its stack\n", (long)p->p_pid);
735 regs->tf_esp = (int)sfp;
736 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
737 regs->tf_eflags &= ~(PSL_T | PSL_D);
738 regs->tf_cs = _ucodesel;
739 regs->tf_ds = _udatasel;
740 regs->tf_es = _udatasel;
741 regs->tf_fs = _udatasel;
742 regs->tf_ss = _udatasel;
744 mtx_lock(&psp->ps_mtx);
748 * System call to cleanup state after a signal
749 * has been taken. Reset signal mask and
750 * stack state from context left by sendsig (above).
751 * Return to previous pc and psl as specified by
752 * context left by sendsig. Check carefully to
753 * make sure that the user has not modified the
754 * state to gain improper privileges.
762 struct osigreturn_args /* {
763 struct osigcontext *sigcntxp;
766 struct osigcontext sc;
767 struct trapframe *regs;
768 struct osigcontext *scp;
773 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
778 if (eflags & PSL_VM) {
779 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
780 struct vm86_kernel *vm86;
783 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
784 * set up the vm86 area, and we can't enter vm86 mode.
786 if (td->td_pcb->pcb_ext == 0)
788 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
789 if (vm86->vm86_inited == 0)
792 /* Go back to user mode if both flags are set. */
793 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
794 ksiginfo_init_trap(&ksi);
795 ksi.ksi_signo = SIGBUS;
796 ksi.ksi_code = BUS_OBJERR;
797 ksi.ksi_addr = (void *)regs->tf_eip;
798 trapsignal(td, &ksi);
801 if (vm86->vm86_has_vme) {
802 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
803 (eflags & VME_USERCHANGE) | PSL_VM;
805 vm86->vm86_eflags = eflags; /* save VIF, VIP */
806 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
807 (eflags & VM_USERCHANGE) | PSL_VM;
809 tf->tf_vm86_ds = scp->sc_ds;
810 tf->tf_vm86_es = scp->sc_es;
811 tf->tf_vm86_fs = scp->sc_fs;
812 tf->tf_vm86_gs = scp->sc_gs;
813 tf->tf_ds = _udatasel;
814 tf->tf_es = _udatasel;
815 tf->tf_fs = _udatasel;
818 * Don't allow users to change privileged or reserved flags.
821 * XXX do allow users to change the privileged flag PSL_RF.
822 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
823 * should sometimes set it there too. tf_eflags is kept in
824 * the signal context during signal handling and there is no
825 * other place to remember it, so the PSL_RF bit may be
826 * corrupted by the signal handler without us knowing.
827 * Corruption of the PSL_RF bit at worst causes one more or
828 * one less debugger trap, so allowing it is fairly harmless.
830 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
835 * Don't allow users to load a valid privileged %cs. Let the
836 * hardware check for invalid selectors, excess privilege in
837 * other selectors, invalid %eip's and invalid %esp's.
839 if (!CS_SECURE(scp->sc_cs)) {
840 ksiginfo_init_trap(&ksi);
841 ksi.ksi_signo = SIGBUS;
842 ksi.ksi_code = BUS_OBJERR;
843 ksi.ksi_trapno = T_PROTFLT;
844 ksi.ksi_addr = (void *)regs->tf_eip;
845 trapsignal(td, &ksi);
848 regs->tf_ds = scp->sc_ds;
849 regs->tf_es = scp->sc_es;
850 regs->tf_fs = scp->sc_fs;
853 /* Restore remaining registers. */
854 regs->tf_eax = scp->sc_eax;
855 regs->tf_ebx = scp->sc_ebx;
856 regs->tf_ecx = scp->sc_ecx;
857 regs->tf_edx = scp->sc_edx;
858 regs->tf_esi = scp->sc_esi;
859 regs->tf_edi = scp->sc_edi;
860 regs->tf_cs = scp->sc_cs;
861 regs->tf_ss = scp->sc_ss;
862 regs->tf_isp = scp->sc_isp;
863 regs->tf_ebp = scp->sc_fp;
864 regs->tf_esp = scp->sc_sp;
865 regs->tf_eip = scp->sc_pc;
866 regs->tf_eflags = eflags;
868 #if defined(COMPAT_43)
869 if (scp->sc_onstack & 1)
870 td->td_sigstk.ss_flags |= SS_ONSTACK;
872 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
874 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
876 return (EJUSTRETURN);
878 #endif /* COMPAT_43 */
880 #ifdef COMPAT_FREEBSD4
885 freebsd4_sigreturn(td, uap)
887 struct freebsd4_sigreturn_args /* {
888 const ucontext4 *sigcntxp;
892 struct trapframe *regs;
893 struct ucontext4 *ucp;
894 int cs, eflags, error;
897 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
902 eflags = ucp->uc_mcontext.mc_eflags;
903 if (eflags & PSL_VM) {
904 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
905 struct vm86_kernel *vm86;
908 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
909 * set up the vm86 area, and we can't enter vm86 mode.
911 if (td->td_pcb->pcb_ext == 0)
913 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
914 if (vm86->vm86_inited == 0)
917 /* Go back to user mode if both flags are set. */
918 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
919 ksiginfo_init_trap(&ksi);
920 ksi.ksi_signo = SIGBUS;
921 ksi.ksi_code = BUS_OBJERR;
922 ksi.ksi_addr = (void *)regs->tf_eip;
923 trapsignal(td, &ksi);
925 if (vm86->vm86_has_vme) {
926 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
927 (eflags & VME_USERCHANGE) | PSL_VM;
929 vm86->vm86_eflags = eflags; /* save VIF, VIP */
930 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
931 (eflags & VM_USERCHANGE) | PSL_VM;
933 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
934 tf->tf_eflags = eflags;
935 tf->tf_vm86_ds = tf->tf_ds;
936 tf->tf_vm86_es = tf->tf_es;
937 tf->tf_vm86_fs = tf->tf_fs;
938 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
939 tf->tf_ds = _udatasel;
940 tf->tf_es = _udatasel;
941 tf->tf_fs = _udatasel;
944 * Don't allow users to change privileged or reserved flags.
947 * XXX do allow users to change the privileged flag PSL_RF.
948 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
949 * should sometimes set it there too. tf_eflags is kept in
950 * the signal context during signal handling and there is no
951 * other place to remember it, so the PSL_RF bit may be
952 * corrupted by the signal handler without us knowing.
953 * Corruption of the PSL_RF bit at worst causes one more or
954 * one less debugger trap, so allowing it is fairly harmless.
956 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
957 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
958 td->td_proc->p_pid, td->td_name, eflags);
963 * Don't allow users to load a valid privileged %cs. Let the
964 * hardware check for invalid selectors, excess privilege in
965 * other selectors, invalid %eip's and invalid %esp's.
967 cs = ucp->uc_mcontext.mc_cs;
968 if (!CS_SECURE(cs)) {
969 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
970 td->td_proc->p_pid, td->td_name, cs);
971 ksiginfo_init_trap(&ksi);
972 ksi.ksi_signo = SIGBUS;
973 ksi.ksi_code = BUS_OBJERR;
974 ksi.ksi_trapno = T_PROTFLT;
975 ksi.ksi_addr = (void *)regs->tf_eip;
976 trapsignal(td, &ksi);
980 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
983 #if defined(COMPAT_43)
984 if (ucp->uc_mcontext.mc_onstack & 1)
985 td->td_sigstk.ss_flags |= SS_ONSTACK;
987 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
989 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
990 return (EJUSTRETURN);
992 #endif /* COMPAT_FREEBSD4 */
1000 struct sigreturn_args /* {
1001 const struct __ucontext *sigcntxp;
1005 struct trapframe *regs;
1007 int cs, eflags, error, ret;
1010 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1014 regs = td->td_frame;
1015 eflags = ucp->uc_mcontext.mc_eflags;
1016 if (eflags & PSL_VM) {
1017 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1018 struct vm86_kernel *vm86;
1021 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1022 * set up the vm86 area, and we can't enter vm86 mode.
1024 if (td->td_pcb->pcb_ext == 0)
1026 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1027 if (vm86->vm86_inited == 0)
1030 /* Go back to user mode if both flags are set. */
1031 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1032 ksiginfo_init_trap(&ksi);
1033 ksi.ksi_signo = SIGBUS;
1034 ksi.ksi_code = BUS_OBJERR;
1035 ksi.ksi_addr = (void *)regs->tf_eip;
1036 trapsignal(td, &ksi);
1039 if (vm86->vm86_has_vme) {
1040 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1041 (eflags & VME_USERCHANGE) | PSL_VM;
1043 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1044 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1045 (eflags & VM_USERCHANGE) | PSL_VM;
1047 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1048 tf->tf_eflags = eflags;
1049 tf->tf_vm86_ds = tf->tf_ds;
1050 tf->tf_vm86_es = tf->tf_es;
1051 tf->tf_vm86_fs = tf->tf_fs;
1052 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1053 tf->tf_ds = _udatasel;
1054 tf->tf_es = _udatasel;
1055 tf->tf_fs = _udatasel;
1058 * Don't allow users to change privileged or reserved flags.
1061 * XXX do allow users to change the privileged flag PSL_RF.
1062 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1063 * should sometimes set it there too. tf_eflags is kept in
1064 * the signal context during signal handling and there is no
1065 * other place to remember it, so the PSL_RF bit may be
1066 * corrupted by the signal handler without us knowing.
1067 * Corruption of the PSL_RF bit at worst causes one more or
1068 * one less debugger trap, so allowing it is fairly harmless.
1070 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1071 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1072 td->td_proc->p_pid, td->td_name, eflags);
1077 * Don't allow users to load a valid privileged %cs. Let the
1078 * hardware check for invalid selectors, excess privilege in
1079 * other selectors, invalid %eip's and invalid %esp's.
1081 cs = ucp->uc_mcontext.mc_cs;
1082 if (!CS_SECURE(cs)) {
1083 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1084 td->td_proc->p_pid, td->td_name, cs);
1085 ksiginfo_init_trap(&ksi);
1086 ksi.ksi_signo = SIGBUS;
1087 ksi.ksi_code = BUS_OBJERR;
1088 ksi.ksi_trapno = T_PROTFLT;
1089 ksi.ksi_addr = (void *)regs->tf_eip;
1090 trapsignal(td, &ksi);
1094 ret = set_fpcontext(td, &ucp->uc_mcontext);
1097 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1100 #if defined(COMPAT_43)
1101 if (ucp->uc_mcontext.mc_onstack & 1)
1102 td->td_sigstk.ss_flags |= SS_ONSTACK;
1104 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1107 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1108 return (EJUSTRETURN);
1112 * Machine dependent boot() routine
1114 * I haven't seen anything to put here yet
1115 * Possibly some stuff might be grafted back here from boot()
1123 * Flush the D-cache for non-DMA I/O so that the I-cache can
1124 * be made coherent later.
1127 cpu_flush_dcache(void *ptr, size_t len)
1129 /* Not applicable */
1132 /* Get current clock frequency for the given cpu id. */
1134 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1137 uint64_t tsc1, tsc2;
1139 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1142 return (EOPNOTSUPP);
1144 /* If TSC is P-state invariant, DELAY(9) based logic fails. */
1145 if (tsc_is_invariant)
1146 return (EOPNOTSUPP);
1148 /* If we're booting, trust the rate calibrated moments ago. */
1155 /* Schedule ourselves on the indicated cpu. */
1156 thread_lock(curthread);
1157 sched_bind(curthread, cpu_id);
1158 thread_unlock(curthread);
1161 /* Calibrate by measuring a short delay. */
1162 reg = intr_disable();
1169 thread_lock(curthread);
1170 sched_unbind(curthread);
1171 thread_unlock(curthread);
1175 if (tsc_freq != 0 && !tsc_is_broken) {
1176 *rate = tsc2 * 1000;
1181 * Subtract 0.5% of the total. Empirical testing has shown that
1182 * overhead in DELAY() works out to approximately this value.
1184 *rate = tsc2 * 1000 - tsc2 * 5;
1193 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1196 int scheduler_running;
1199 cpu_idle_hlt(int busy)
1202 scheduler_running = 1;
1209 * Shutdown the CPU as much as possible
1220 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1221 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
1222 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1223 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1224 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1225 0, "Use MONITOR/MWAIT for short idle");
1227 #define STATE_RUNNING 0x0
1228 #define STATE_MWAIT 0x1
1229 #define STATE_SLEEPING 0x2
1232 cpu_idle_acpi(int busy)
1236 state = (int *)PCPU_PTR(monitorbuf);
1237 *state = STATE_SLEEPING;
1239 if (sched_runnable())
1241 else if (cpu_idle_hook)
1244 __asm __volatile("sti; hlt");
1245 *state = STATE_RUNNING;
1250 cpu_idle_hlt(int busy)
1254 state = (int *)PCPU_PTR(monitorbuf);
1255 *state = STATE_SLEEPING;
1257 * We must absolutely guarentee that hlt is the next instruction
1258 * after sti or we introduce a timing window.
1261 if (sched_runnable())
1264 __asm __volatile("sti; hlt");
1265 *state = STATE_RUNNING;
1270 * MWAIT cpu power states. Lower 4 bits are sub-states.
1272 #define MWAIT_C0 0xf0
1273 #define MWAIT_C1 0x00
1274 #define MWAIT_C2 0x10
1275 #define MWAIT_C3 0x20
1276 #define MWAIT_C4 0x30
1279 cpu_idle_mwait(int busy)
1283 state = (int *)PCPU_PTR(monitorbuf);
1284 *state = STATE_MWAIT;
1285 if (!sched_runnable()) {
1286 cpu_monitor(state, 0, 0);
1287 if (*state == STATE_MWAIT)
1288 cpu_mwait(0, MWAIT_C1);
1290 *state = STATE_RUNNING;
1294 cpu_idle_spin(int busy)
1299 state = (int *)PCPU_PTR(monitorbuf);
1300 *state = STATE_RUNNING;
1301 for (i = 0; i < 1000; i++) {
1302 if (sched_runnable())
1309 * C1E renders the local APIC timer dead, so we disable it by
1310 * reading the Interrupt Pending Message register and clearing
1311 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1314 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1315 * #32559 revision 3.00+
1317 #define MSR_AMDK8_IPM 0xc0010055
1318 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1319 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1320 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1323 cpu_probe_amdc1e(void)
1327 * Detect the presence of C1E capability mostly on latest
1328 * dual-cores (or future) k8 family.
1330 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1331 (cpu_id & 0x00000f00) == 0x00000f00 &&
1332 (cpu_id & 0x0fff0000) >= 0x00040000) {
1333 cpu_ident_amdc1e = 1;
1338 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1340 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1348 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1350 #if defined(SMP) && !defined(XEN)
1351 if (mp_grab_cpu_hlt())
1354 /* If we are busy - try to use fast methods. */
1356 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1357 cpu_idle_mwait(busy);
1363 /* If we have time - switch timers into idle mode. */
1370 /* Apply AMD APIC timer C1E workaround. */
1371 if (cpu_ident_amdc1e
1373 && cpu_disable_deep_sleep
1376 msr = rdmsr(MSR_AMDK8_IPM);
1377 if (msr & AMDK8_CMPHALT)
1378 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1381 /* Call main idle method. */
1385 /* Switch timers mack into active mode. */
1392 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1397 cpu_idle_wakeup(int cpu)
1402 pcpu = pcpu_find(cpu);
1403 state = (int *)pcpu->pc_monitorbuf;
1405 * This doesn't need to be atomic since missing the race will
1406 * simply result in unnecessary IPIs.
1408 if (*state == STATE_SLEEPING)
1410 if (*state == STATE_MWAIT)
1411 *state = STATE_RUNNING;
1416 * Ordered by speed/power consumption.
1422 { cpu_idle_spin, "spin" },
1423 { cpu_idle_mwait, "mwait" },
1424 { cpu_idle_hlt, "hlt" },
1425 { cpu_idle_acpi, "acpi" },
1430 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1436 avail = malloc(256, M_TEMP, M_WAITOK);
1438 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1439 if (strstr(idle_tbl[i].id_name, "mwait") &&
1440 (cpu_feature2 & CPUID2_MON) == 0)
1442 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1443 cpu_idle_hook == NULL)
1445 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1446 idle_tbl[i].id_name);
1448 error = sysctl_handle_string(oidp, avail, 0, req);
1449 free(avail, M_TEMP);
1453 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1454 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1457 idle_sysctl(SYSCTL_HANDLER_ARGS)
1465 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1466 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1467 p = idle_tbl[i].id_name;
1471 strncpy(buf, p, sizeof(buf));
1472 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1473 if (error != 0 || req->newptr == NULL)
1475 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1476 if (strstr(idle_tbl[i].id_name, "mwait") &&
1477 (cpu_feature2 & CPUID2_MON) == 0)
1479 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1480 cpu_idle_hook == NULL)
1482 if (strcmp(idle_tbl[i].id_name, buf))
1484 cpu_idle_fn = idle_tbl[i].id_fn;
1490 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1491 idle_sysctl, "A", "currently selected idle function");
1494 * Reset registers to default values on exec.
1497 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1499 struct trapframe *regs = td->td_frame;
1500 struct pcb *pcb = td->td_pcb;
1502 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1503 pcb->pcb_gs = _udatasel;
1506 mtx_lock_spin(&dt_lock);
1507 if (td->td_proc->p_md.md_ldt)
1510 mtx_unlock_spin(&dt_lock);
1512 bzero((char *)regs, sizeof(struct trapframe));
1513 regs->tf_eip = imgp->entry_addr;
1514 regs->tf_esp = stack;
1515 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1516 regs->tf_ss = _udatasel;
1517 regs->tf_ds = _udatasel;
1518 regs->tf_es = _udatasel;
1519 regs->tf_fs = _udatasel;
1520 regs->tf_cs = _ucodesel;
1522 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1523 regs->tf_ebx = imgp->ps_strings;
1526 * Reset the hardware debug registers if they were in use.
1527 * They won't have any meaning for the newly exec'd process.
1529 if (pcb->pcb_flags & PCB_DBREGS) {
1536 if (pcb == PCPU_GET(curpcb)) {
1538 * Clear the debug registers on the running
1539 * CPU, otherwise they will end up affecting
1540 * the next process we switch to.
1544 pcb->pcb_flags &= ~PCB_DBREGS;
1548 * Initialize the math emulator (if any) for the current process.
1549 * Actually, just clear the bit that says that the emulator has
1550 * been initialized. Initialization is delayed until the process
1551 * traps to the emulator (if it is done at all) mainly because
1552 * emulators don't provide an entry point for initialization.
1554 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1555 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1558 * Drop the FP state if we hold it, so that the process gets a
1559 * clean FP state if it uses the FPU again.
1564 * XXX - Linux emulator
1565 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1568 td->td_retval[1] = 0;
1579 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1581 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1582 * instructions. We must set the CR0_MP bit and use the CR0_TS
1583 * bit to control the trap, because setting the CR0_EM bit does
1584 * not cause WAIT instructions to trap. It's important to trap
1585 * WAIT instructions - otherwise the "wait" variants of no-wait
1586 * control instructions would degenerate to the "no-wait" variants
1587 * after FP context switches but work correctly otherwise. It's
1588 * particularly important to trap WAITs when there is no NPX -
1589 * otherwise the "wait" variants would always degenerate.
1591 * Try setting CR0_NE to get correct error reporting on 486DX's.
1592 * Setting it should fail or do nothing on lesser processors.
1594 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1599 u_long bootdev; /* not a struct cdev *- encoding is different */
1600 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1601 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1604 * Initialize 386 and configure to run kernel
1608 * Initialize segments & interrupt table
1614 union descriptor *gdt;
1615 union descriptor *ldt;
1617 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1618 union descriptor ldt[NLDT]; /* local descriptor table */
1620 static struct gate_descriptor idt0[NIDT];
1621 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1622 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1623 struct mtx dt_lock; /* lock for GDT and LDT */
1625 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1626 extern int has_f00f_bug;
1629 static struct i386tss dblfault_tss;
1630 static char dblfault_stack[PAGE_SIZE];
1632 extern vm_offset_t proc0kstack;
1636 * software prototypes -- in more palatable form.
1638 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1639 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1641 struct soft_segment_descriptor gdt_segs[] = {
1642 /* GNULL_SEL 0 Null Descriptor */
1648 .ssd_xx = 0, .ssd_xx1 = 0,
1651 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1653 .ssd_limit = 0xfffff,
1654 .ssd_type = SDT_MEMRWA,
1657 .ssd_xx = 0, .ssd_xx1 = 0,
1660 /* GUFS_SEL 2 %fs Descriptor for user */
1662 .ssd_limit = 0xfffff,
1663 .ssd_type = SDT_MEMRWA,
1666 .ssd_xx = 0, .ssd_xx1 = 0,
1669 /* GUGS_SEL 3 %gs Descriptor for user */
1671 .ssd_limit = 0xfffff,
1672 .ssd_type = SDT_MEMRWA,
1675 .ssd_xx = 0, .ssd_xx1 = 0,
1678 /* GCODE_SEL 4 Code Descriptor for kernel */
1680 .ssd_limit = 0xfffff,
1681 .ssd_type = SDT_MEMERA,
1684 .ssd_xx = 0, .ssd_xx1 = 0,
1687 /* GDATA_SEL 5 Data Descriptor for kernel */
1689 .ssd_limit = 0xfffff,
1690 .ssd_type = SDT_MEMRWA,
1693 .ssd_xx = 0, .ssd_xx1 = 0,
1696 /* GUCODE_SEL 6 Code Descriptor for user */
1698 .ssd_limit = 0xfffff,
1699 .ssd_type = SDT_MEMERA,
1702 .ssd_xx = 0, .ssd_xx1 = 0,
1705 /* GUDATA_SEL 7 Data Descriptor for user */
1707 .ssd_limit = 0xfffff,
1708 .ssd_type = SDT_MEMRWA,
1711 .ssd_xx = 0, .ssd_xx1 = 0,
1714 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1715 { .ssd_base = 0x400,
1716 .ssd_limit = 0xfffff,
1717 .ssd_type = SDT_MEMRWA,
1720 .ssd_xx = 0, .ssd_xx1 = 0,
1724 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1727 .ssd_limit = sizeof(struct i386tss)-1,
1728 .ssd_type = SDT_SYS386TSS,
1731 .ssd_xx = 0, .ssd_xx1 = 0,
1734 /* GLDT_SEL 10 LDT Descriptor */
1735 { .ssd_base = (int) ldt,
1736 .ssd_limit = sizeof(ldt)-1,
1737 .ssd_type = SDT_SYSLDT,
1740 .ssd_xx = 0, .ssd_xx1 = 0,
1743 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1744 { .ssd_base = (int) ldt,
1745 .ssd_limit = (512 * sizeof(union descriptor)-1),
1746 .ssd_type = SDT_SYSLDT,
1749 .ssd_xx = 0, .ssd_xx1 = 0,
1752 /* GPANIC_SEL 12 Panic Tss Descriptor */
1753 { .ssd_base = (int) &dblfault_tss,
1754 .ssd_limit = sizeof(struct i386tss)-1,
1755 .ssd_type = SDT_SYS386TSS,
1758 .ssd_xx = 0, .ssd_xx1 = 0,
1761 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1763 .ssd_limit = 0xfffff,
1764 .ssd_type = SDT_MEMERA,
1767 .ssd_xx = 0, .ssd_xx1 = 0,
1770 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1772 .ssd_limit = 0xfffff,
1773 .ssd_type = SDT_MEMERA,
1776 .ssd_xx = 0, .ssd_xx1 = 0,
1779 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1781 .ssd_limit = 0xfffff,
1782 .ssd_type = SDT_MEMRWA,
1785 .ssd_xx = 0, .ssd_xx1 = 0,
1788 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1790 .ssd_limit = 0xfffff,
1791 .ssd_type = SDT_MEMRWA,
1794 .ssd_xx = 0, .ssd_xx1 = 0,
1797 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1799 .ssd_limit = 0xfffff,
1800 .ssd_type = SDT_MEMRWA,
1803 .ssd_xx = 0, .ssd_xx1 = 0,
1806 /* GNDIS_SEL 18 NDIS Descriptor */
1812 .ssd_xx = 0, .ssd_xx1 = 0,
1818 static struct soft_segment_descriptor ldt_segs[] = {
1819 /* Null Descriptor - overwritten by call gate */
1825 .ssd_xx = 0, .ssd_xx1 = 0,
1828 /* Null Descriptor - overwritten by call gate */
1834 .ssd_xx = 0, .ssd_xx1 = 0,
1837 /* Null Descriptor - overwritten by call gate */
1843 .ssd_xx = 0, .ssd_xx1 = 0,
1846 /* Code Descriptor for user */
1848 .ssd_limit = 0xfffff,
1849 .ssd_type = SDT_MEMERA,
1852 .ssd_xx = 0, .ssd_xx1 = 0,
1855 /* Null Descriptor - overwritten by call gate */
1861 .ssd_xx = 0, .ssd_xx1 = 0,
1864 /* Data Descriptor for user */
1866 .ssd_limit = 0xfffff,
1867 .ssd_type = SDT_MEMRWA,
1870 .ssd_xx = 0, .ssd_xx1 = 0,
1876 setidt(idx, func, typ, dpl, selec)
1883 struct gate_descriptor *ip;
1886 ip->gd_looffset = (int)func;
1887 ip->gd_selector = selec;
1893 ip->gd_hioffset = ((int)func)>>16 ;
1897 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1898 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1899 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1900 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1902 #ifdef KDTRACE_HOOKS
1905 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1909 * Display the index and function name of any IDT entries that don't use
1910 * the default 'rsvd' entry point.
1912 DB_SHOW_COMMAND(idt, db_show_idt)
1914 struct gate_descriptor *ip;
1919 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1920 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1921 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1922 db_printf("%3d\t", idx);
1923 db_printsym(func, DB_STGY_PROC);
1930 /* Show privileged registers. */
1931 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1933 uint64_t idtr, gdtr;
1936 db_printf("idtr\t0x%08x/%04x\n",
1937 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1939 db_printf("gdtr\t0x%08x/%04x\n",
1940 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1941 db_printf("ldtr\t0x%04x\n", rldt());
1942 db_printf("tr\t0x%04x\n", rtr());
1943 db_printf("cr0\t0x%08x\n", rcr0());
1944 db_printf("cr2\t0x%08x\n", rcr2());
1945 db_printf("cr3\t0x%08x\n", rcr3());
1946 db_printf("cr4\t0x%08x\n", rcr4());
1952 struct segment_descriptor *sd;
1953 struct soft_segment_descriptor *ssd;
1955 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1956 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1957 ssd->ssd_type = sd->sd_type;
1958 ssd->ssd_dpl = sd->sd_dpl;
1959 ssd->ssd_p = sd->sd_p;
1960 ssd->ssd_def32 = sd->sd_def32;
1961 ssd->ssd_gran = sd->sd_gran;
1966 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1968 int i, insert_idx, physmap_idx;
1970 physmap_idx = *physmap_idxp;
1972 if (boothowto & RB_VERBOSE)
1973 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1974 smap->type, smap->base, smap->length);
1976 if (smap->type != SMAP_TYPE_MEMORY)
1979 if (smap->length == 0)
1983 if (smap->base > 0xffffffff) {
1984 printf("%uK of memory above 4GB ignored\n",
1985 (u_int)(smap->length / 1024));
1991 * Find insertion point while checking for overlap. Start off by
1992 * assuming the new entry will be added to the end.
1994 insert_idx = physmap_idx + 2;
1995 for (i = 0; i <= physmap_idx; i += 2) {
1996 if (smap->base < physmap[i + 1]) {
1997 if (smap->base + smap->length <= physmap[i]) {
2001 if (boothowto & RB_VERBOSE)
2003 "Overlapping memory regions, ignoring second region\n");
2008 /* See if we can prepend to the next entry. */
2009 if (insert_idx <= physmap_idx &&
2010 smap->base + smap->length == physmap[insert_idx]) {
2011 physmap[insert_idx] = smap->base;
2015 /* See if we can append to the previous entry. */
2016 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
2017 physmap[insert_idx - 1] += smap->length;
2022 *physmap_idxp = physmap_idx;
2023 if (physmap_idx == PHYSMAP_SIZE) {
2025 "Too many segments in the physical address map, giving up\n");
2030 * Move the last 'N' entries down to make room for the new
2033 for (i = physmap_idx; i > insert_idx; i -= 2) {
2034 physmap[i] = physmap[i - 2];
2035 physmap[i + 1] = physmap[i - 1];
2038 /* Insert the new entry. */
2039 physmap[insert_idx] = smap->base;
2040 physmap[insert_idx + 1] = smap->base + smap->length;
2051 if (basemem > 640) {
2052 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2058 * XXX if biosbasemem is now < 640, there is a `hole'
2059 * between the end of base memory and the start of
2060 * ISA memory. The hole may be empty or it may
2061 * contain BIOS code or data. Map it read/write so
2062 * that the BIOS can write to it. (Memory from 0 to
2063 * the physical end of the kernel is mapped read-only
2064 * to begin with and then parts of it are remapped.
2065 * The parts that aren't remapped form holes that
2066 * remain read-only and are unused by the kernel.
2067 * The base memory area is below the physical end of
2068 * the kernel and right now forms a read-only hole.
2069 * The part of it from PAGE_SIZE to
2070 * (trunc_page(biosbasemem * 1024) - 1) will be
2071 * remapped and used by the kernel later.)
2073 * This code is similar to the code used in
2074 * pmap_mapdev, but since no memory needs to be
2075 * allocated we simply change the mapping.
2077 for (pa = trunc_page(basemem * 1024);
2078 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2079 pmap_kenter(KERNBASE + pa, pa);
2082 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2083 * the vm86 page table so that vm86 can scribble on them using
2084 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2085 * page 0, at least as initialized here?
2087 pte = (pt_entry_t *)vm86paddr;
2088 for (i = basemem / 4; i < 160; i++)
2089 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2094 * Populate the (physmap) array with base/bound pairs describing the
2095 * available physical memory in the system, then test this memory and
2096 * build the phys_avail array describing the actually-available memory.
2098 * If we cannot accurately determine the physical memory map, then use
2099 * value from the 0xE801 call, and failing that, the RTC.
2101 * Total memory size may be set by the kernel environment variable
2102 * hw.physmem or the compile-time define MAXMEM.
2104 * XXX first should be vm_paddr_t.
2107 getmemsize(int first)
2109 int has_smap, off, physmap_idx, pa_indx, da_indx;
2110 u_long physmem_tunable;
2111 vm_paddr_t physmap[PHYSMAP_SIZE];
2113 quad_t dcons_addr, dcons_size;
2115 int hasbrokenint12, i;
2117 struct vm86frame vmf;
2118 struct vm86context vmc;
2120 struct bios_smap *smap, *smapbase, *smapend;
2127 Maxmem = xen_start_info->nr_pages - init_first;
2130 physmap[0] = init_first << PAGE_SHIFT;
2131 physmap[1] = ptoa(Maxmem) - round_page(msgbufsize);
2135 if (arch_i386_is_xbox) {
2137 * We queried the memory size before, so chop off 4MB for
2138 * the framebuffer and inform the OS of this.
2141 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2146 bzero(&vmf, sizeof(vmf));
2147 bzero(physmap, sizeof(physmap));
2151 * Check if the loader supplied an SMAP memory map. If so,
2152 * use that and do not make any VM86 calls.
2156 kmdp = preload_search_by_type("elf kernel");
2158 kmdp = preload_search_by_type("elf32 kernel");
2160 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2161 MODINFO_METADATA | MODINFOMD_SMAP);
2162 if (smapbase != NULL) {
2164 * subr_module.c says:
2165 * "Consumer may safely assume that size value precedes data."
2166 * ie: an int32_t immediately precedes SMAP.
2168 smapsize = *((u_int32_t *)smapbase - 1);
2169 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2172 for (smap = smapbase; smap < smapend; smap++)
2173 if (!add_smap_entry(smap, physmap, &physmap_idx))
2179 * Some newer BIOSes have a broken INT 12H implementation
2180 * which causes a kernel panic immediately. In this case, we
2181 * need use the SMAP to determine the base memory size.
2184 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2185 if (hasbrokenint12 == 0) {
2186 /* Use INT12 to determine base memory size. */
2187 vm86_intcall(0x12, &vmf);
2188 basemem = vmf.vmf_ax;
2193 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2194 * the kernel page table so we can use it as a buffer. The
2195 * kernel will unmap this page later.
2197 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2199 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2200 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2204 vmf.vmf_eax = 0xE820;
2205 vmf.vmf_edx = SMAP_SIG;
2206 vmf.vmf_ecx = sizeof(struct bios_smap);
2207 i = vm86_datacall(0x15, &vmf, &vmc);
2208 if (i || vmf.vmf_eax != SMAP_SIG)
2211 if (!add_smap_entry(smap, physmap, &physmap_idx))
2213 } while (vmf.vmf_ebx != 0);
2217 * If we didn't fetch the "base memory" size from INT12,
2218 * figure it out from the SMAP (or just guess).
2221 for (i = 0; i <= physmap_idx; i += 2) {
2222 if (physmap[i] == 0x00000000) {
2223 basemem = physmap[i + 1] / 1024;
2228 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2234 if (physmap[1] != 0)
2238 * If we failed to find an SMAP, figure out the extended
2239 * memory size. We will then build a simple memory map with
2240 * two segments, one for "base memory" and the second for
2241 * "extended memory". Note that "extended memory" starts at a
2242 * physical address of 1MB and that both basemem and extmem
2243 * are in units of 1KB.
2245 * First, try to fetch the extended memory size via INT 15:E801.
2247 vmf.vmf_ax = 0xE801;
2248 if (vm86_intcall(0x15, &vmf) == 0) {
2249 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2252 * If INT15:E801 fails, this is our last ditch effort
2253 * to determine the extended memory size. Currently
2254 * we prefer the RTC value over INT15:88.
2258 vm86_intcall(0x15, &vmf);
2259 extmem = vmf.vmf_ax;
2261 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2266 * Special hack for chipsets that still remap the 384k hole when
2267 * there's 16MB of memory - this really confuses people that
2268 * are trying to use bus mastering ISA controllers with the
2269 * "16MB limit"; they only have 16MB, but the remapping puts
2270 * them beyond the limit.
2272 * If extended memory is between 15-16MB (16-17MB phys address range),
2275 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2279 physmap[1] = basemem * 1024;
2281 physmap[physmap_idx] = 0x100000;
2282 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2287 * Now, physmap contains a map of physical memory.
2291 /* make hole for AP bootstrap code */
2292 physmap[1] = mp_bootaddress(physmap[1]);
2296 * Maxmem isn't the "maximum memory", it's one larger than the
2297 * highest page of the physical address space. It should be
2298 * called something like "Maxphyspage". We may adjust this
2299 * based on ``hw.physmem'' and the results of the memory test.
2301 Maxmem = atop(physmap[physmap_idx + 1]);
2304 Maxmem = MAXMEM / 4;
2307 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2308 Maxmem = atop(physmem_tunable);
2311 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2312 * the amount of memory in the system.
2314 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2315 Maxmem = atop(physmap[physmap_idx + 1]);
2317 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2318 (boothowto & RB_VERBOSE))
2319 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2322 * If Maxmem has been increased beyond what the system has detected,
2323 * extend the last memory segment to the new limit.
2325 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2326 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2328 /* call pmap initialization to make new kernel address space */
2329 pmap_bootstrap(first);
2332 * Size up each available chunk of physical memory.
2334 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2337 phys_avail[pa_indx++] = physmap[0];
2338 phys_avail[pa_indx] = physmap[0];
2339 dump_avail[da_indx] = physmap[0];
2343 * Get dcons buffer address
2345 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2346 getenv_quad("dcons.size", &dcons_size) == 0)
2351 * physmap is in bytes, so when converting to page boundaries,
2352 * round up the start address and round down the end address.
2354 for (i = 0; i <= physmap_idx; i += 2) {
2357 end = ptoa((vm_paddr_t)Maxmem);
2358 if (physmap[i + 1] < end)
2359 end = trunc_page(physmap[i + 1]);
2360 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2361 int tmp, page_bad, full;
2362 int *ptr = (int *)CADDR1;
2366 * block out kernel memory as not available.
2368 if (pa >= KERNLOAD && pa < first)
2372 * block out dcons buffer
2375 && pa >= trunc_page(dcons_addr)
2376 && pa < dcons_addr + dcons_size)
2382 * map page into kernel: valid, read/write,non-cacheable
2384 *pte = pa | PG_V | PG_RW | PG_N;
2389 * Test for alternating 1's and 0's
2391 *(volatile int *)ptr = 0xaaaaaaaa;
2392 if (*(volatile int *)ptr != 0xaaaaaaaa)
2395 * Test for alternating 0's and 1's
2397 *(volatile int *)ptr = 0x55555555;
2398 if (*(volatile int *)ptr != 0x55555555)
2403 *(volatile int *)ptr = 0xffffffff;
2404 if (*(volatile int *)ptr != 0xffffffff)
2409 *(volatile int *)ptr = 0x0;
2410 if (*(volatile int *)ptr != 0x0)
2413 * Restore original value.
2418 * Adjust array of valid/good pages.
2420 if (page_bad == TRUE)
2423 * If this good page is a continuation of the
2424 * previous set of good pages, then just increase
2425 * the end pointer. Otherwise start a new chunk.
2426 * Note that "end" points one higher than end,
2427 * making the range >= start and < end.
2428 * If we're also doing a speculative memory
2429 * test and we at or past the end, bump up Maxmem
2430 * so that we keep going. The first bad page
2431 * will terminate the loop.
2433 if (phys_avail[pa_indx] == pa) {
2434 phys_avail[pa_indx] += PAGE_SIZE;
2437 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2439 "Too many holes in the physical address space, giving up\n");
2444 phys_avail[pa_indx++] = pa; /* start */
2445 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2449 if (dump_avail[da_indx] == pa) {
2450 dump_avail[da_indx] += PAGE_SIZE;
2453 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2457 dump_avail[da_indx++] = pa; /* start */
2458 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2468 phys_avail[0] = physfree;
2469 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2471 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2477 * The last chunk must contain at least one page plus the message
2478 * buffer to avoid complicating other code (message buffer address
2479 * calculation, etc.).
2481 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2482 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2483 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2484 phys_avail[pa_indx--] = 0;
2485 phys_avail[pa_indx--] = 0;
2488 Maxmem = atop(phys_avail[pa_indx]);
2490 /* Trim off space for the message buffer. */
2491 phys_avail[pa_indx] -= round_page(msgbufsize);
2493 /* Map the message buffer. */
2494 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2495 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2502 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2508 unsigned long gdtmachpfn;
2509 int error, gsel_tss, metadata_missing, x, pa;
2512 struct callback_register event = {
2513 .type = CALLBACKTYPE_event,
2514 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2516 struct callback_register failsafe = {
2517 .type = CALLBACKTYPE_failsafe,
2518 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2521 thread0.td_kstack = proc0kstack;
2522 thread0.td_kstack_pages = KSTACK_PAGES;
2523 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2524 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2527 * This may be done better later if it gets more high level
2528 * components in it. If so just link td->td_proc here.
2530 proc_linkup0(&proc0, &thread0);
2532 metadata_missing = 0;
2533 if (xen_start_info->mod_start) {
2534 preload_metadata = (caddr_t)xen_start_info->mod_start;
2535 preload_bootstrap_relocate(KERNBASE);
2537 metadata_missing = 1;
2540 kern_envp = static_env;
2541 else if ((caddr_t)xen_start_info->cmd_line)
2542 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2544 boothowto |= xen_boothowto(kern_envp);
2546 /* Init basic tunables, hz etc */
2550 * XEN occupies a portion of the upper virtual address space
2551 * At its base it manages an array mapping machine page frames
2552 * to physical page frames - hence we need to be able to
2553 * access 4GB - (64MB - 4MB + 64k)
2555 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2556 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2557 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2558 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2559 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2560 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2561 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2562 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2565 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2566 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2568 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2569 bzero(gdt, PAGE_SIZE);
2570 for (x = 0; x < NGDT; x++)
2571 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2573 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2575 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2576 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2577 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2581 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2582 panic("set_trap_table failed - error %d\n", error);
2585 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2587 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2588 #if CONFIG_XEN_COMPAT <= 0x030002
2589 if (error == -ENOXENSYS)
2590 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2591 (unsigned long)Xhypervisor_callback,
2592 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2594 pcpu_init(pc, 0, sizeof(struct pcpu));
2595 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2596 pmap_kenter(pa + KERNBASE, pa);
2597 dpcpu_init((void *)(first + KERNBASE), 0);
2598 first += DPCPU_SIZE;
2599 physfree += DPCPU_SIZE;
2600 init_first += DPCPU_SIZE / PAGE_SIZE;
2602 PCPU_SET(prvspace, pc);
2603 PCPU_SET(curthread, &thread0);
2604 PCPU_SET(curpcb, thread0.td_pcb);
2607 * Initialize mutexes.
2609 * icu_lock: in order to allow an interrupt to occur in a critical
2610 * section, to set pcpu->ipending (etc...) properly, we
2611 * must be able to get the icu lock, so it can't be
2615 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2617 /* make ldt memory segments */
2618 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2619 bzero(ldt, PAGE_SIZE);
2620 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2621 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2622 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2623 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2625 default_proc_ldt.ldt_base = (caddr_t)ldt;
2626 default_proc_ldt.ldt_len = 6;
2627 _default_ldt = (int)&default_proc_ldt;
2628 PCPU_SET(currentldt, _default_ldt);
2629 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2630 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2632 #if defined(XEN_PRIVILEGED)
2634 * Initialize the i8254 before the console so that console
2635 * initialization can use DELAY().
2641 * Initialize the console before we print anything out.
2645 if (metadata_missing)
2646 printf("WARNING: loader(8) metadata is missing!\n");
2654 ksym_start = bootinfo.bi_symtab;
2655 ksym_end = bootinfo.bi_esymtab;
2661 if (boothowto & RB_KDB)
2662 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2665 finishidentcpu(); /* Final stage of CPU initialization */
2666 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2667 GSEL(GCODE_SEL, SEL_KPL));
2668 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2669 GSEL(GCODE_SEL, SEL_KPL));
2670 initializecpu(); /* Initialize CPU registers */
2672 /* make an initial tss so cpu can get interrupt stack on syscall! */
2673 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2674 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2675 kstack0_sz - sizeof(struct pcb) - 16);
2676 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2677 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2678 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2679 PCPU_GET(common_tss.tss_esp0));
2681 /* pointer to selector slot for %fs/%gs */
2682 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2684 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2685 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2686 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2687 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2689 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2691 dblfault_tss.tss_cr3 = (int)IdlePTD;
2693 dblfault_tss.tss_eip = (int)dblfault_handler;
2694 dblfault_tss.tss_eflags = PSL_KERNEL;
2695 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2696 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2697 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2698 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2699 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2703 init_param2(physmem);
2705 /* now running on new page tables, configured,and u/iom is accessible */
2707 msgbufinit(msgbufp, msgbufsize);
2708 /* transfer to user mode */
2710 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2711 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2713 /* setup proc 0's pcb */
2714 thread0.td_pcb->pcb_flags = 0;
2716 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2718 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2720 thread0.td_pcb->pcb_ext = 0;
2721 thread0.td_frame = &proc0_tf;
2722 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2723 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2733 struct gate_descriptor *gdp;
2734 int gsel_tss, metadata_missing, x, pa;
2738 thread0.td_kstack = proc0kstack;
2739 thread0.td_kstack_pages = KSTACK_PAGES;
2740 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2741 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2744 * This may be done better later if it gets more high level
2745 * components in it. If so just link td->td_proc here.
2747 proc_linkup0(&proc0, &thread0);
2749 metadata_missing = 0;
2750 if (bootinfo.bi_modulep) {
2751 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2752 preload_bootstrap_relocate(KERNBASE);
2754 metadata_missing = 1;
2757 kern_envp = static_env;
2758 else if (bootinfo.bi_envp)
2759 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2761 /* Init basic tunables, hz etc */
2765 * Make gdt memory segments. All segments cover the full 4GB
2766 * of address space and permissions are enforced at page level.
2768 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2769 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2770 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2771 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2772 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2773 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2776 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2777 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2778 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2780 for (x = 0; x < NGDT; x++)
2781 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2783 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2784 r_gdt.rd_base = (int) gdt;
2785 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2788 pcpu_init(pc, 0, sizeof(struct pcpu));
2789 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2790 pmap_kenter(pa + KERNBASE, pa);
2791 dpcpu_init((void *)(first + KERNBASE), 0);
2792 first += DPCPU_SIZE;
2793 PCPU_SET(prvspace, pc);
2794 PCPU_SET(curthread, &thread0);
2795 PCPU_SET(curpcb, thread0.td_pcb);
2798 * Initialize mutexes.
2800 * icu_lock: in order to allow an interrupt to occur in a critical
2801 * section, to set pcpu->ipending (etc...) properly, we
2802 * must be able to get the icu lock, so it can't be
2806 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2808 /* make ldt memory segments */
2809 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2810 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2811 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2812 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2814 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2816 PCPU_SET(currentldt, _default_ldt);
2819 for (x = 0; x < NIDT; x++)
2820 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2821 GSEL(GCODE_SEL, SEL_KPL));
2822 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2823 GSEL(GCODE_SEL, SEL_KPL));
2824 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2825 GSEL(GCODE_SEL, SEL_KPL));
2826 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2827 GSEL(GCODE_SEL, SEL_KPL));
2828 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2829 GSEL(GCODE_SEL, SEL_KPL));
2830 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2831 GSEL(GCODE_SEL, SEL_KPL));
2832 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2833 GSEL(GCODE_SEL, SEL_KPL));
2834 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2835 GSEL(GCODE_SEL, SEL_KPL));
2836 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2837 , GSEL(GCODE_SEL, SEL_KPL));
2838 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2839 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2840 GSEL(GCODE_SEL, SEL_KPL));
2841 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2842 GSEL(GCODE_SEL, SEL_KPL));
2843 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2844 GSEL(GCODE_SEL, SEL_KPL));
2845 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2846 GSEL(GCODE_SEL, SEL_KPL));
2847 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2848 GSEL(GCODE_SEL, SEL_KPL));
2849 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2850 GSEL(GCODE_SEL, SEL_KPL));
2851 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2852 GSEL(GCODE_SEL, SEL_KPL));
2853 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2854 GSEL(GCODE_SEL, SEL_KPL));
2855 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2856 GSEL(GCODE_SEL, SEL_KPL));
2857 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2858 GSEL(GCODE_SEL, SEL_KPL));
2859 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2860 GSEL(GCODE_SEL, SEL_KPL));
2861 #ifdef KDTRACE_HOOKS
2862 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2863 GSEL(GCODE_SEL, SEL_KPL));
2866 r_idt.rd_limit = sizeof(idt0) - 1;
2867 r_idt.rd_base = (int) idt;
2872 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2873 * This should be 0x10de / 0x02a5.
2875 * This is exactly what Linux does.
2877 outl(0xcf8, 0x80000000);
2878 if (inl(0xcfc) == 0x02a510de) {
2879 arch_i386_is_xbox = 1;
2880 pic16l_setled(XBOX_LED_GREEN);
2883 * We are an XBOX, but we may have either 64MB or 128MB of
2884 * memory. The PCI host bridge should be programmed for this,
2885 * so we just query it.
2887 outl(0xcf8, 0x80000084);
2888 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2893 * Initialize the i8254 before the console so that console
2894 * initialization can use DELAY().
2899 * Initialize the console before we print anything out.
2903 if (metadata_missing)
2904 printf("WARNING: loader(8) metadata is missing!\n");
2912 ksym_start = bootinfo.bi_symtab;
2913 ksym_end = bootinfo.bi_esymtab;
2919 if (boothowto & RB_KDB)
2920 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2923 finishidentcpu(); /* Final stage of CPU initialization */
2924 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2925 GSEL(GCODE_SEL, SEL_KPL));
2926 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2927 GSEL(GCODE_SEL, SEL_KPL));
2928 initializecpu(); /* Initialize CPU registers */
2930 /* make an initial tss so cpu can get interrupt stack on syscall! */
2931 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2932 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2933 kstack0_sz - sizeof(struct pcb) - 16);
2934 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2935 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2936 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2937 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2938 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2941 /* pointer to selector slot for %fs/%gs */
2942 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2944 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2945 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2946 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2947 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2949 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2951 dblfault_tss.tss_cr3 = (int)IdlePTD;
2953 dblfault_tss.tss_eip = (int)dblfault_handler;
2954 dblfault_tss.tss_eflags = PSL_KERNEL;
2955 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2956 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2957 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2958 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2959 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2963 init_param2(physmem);
2965 /* now running on new page tables, configured,and u/iom is accessible */
2967 msgbufinit(msgbufp, msgbufsize);
2969 /* make a call gate to reenter kernel with */
2970 gdp = &ldt[LSYS5CALLS_SEL].gd;
2972 x = (int) &IDTVEC(lcall_syscall);
2973 gdp->gd_looffset = x;
2974 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2976 gdp->gd_type = SDT_SYS386CGT;
2977 gdp->gd_dpl = SEL_UPL;
2979 gdp->gd_hioffset = x >> 16;
2981 /* XXX does this work? */
2983 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2984 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2986 /* transfer to user mode */
2988 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2989 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2991 /* setup proc 0's pcb */
2992 thread0.td_pcb->pcb_flags = 0;
2994 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2996 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2998 thread0.td_pcb->pcb_ext = 0;
2999 thread0.td_frame = &proc0_tf;
3006 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
3009 pcpu->pc_acpi_id = 0xffffffff;
3013 spinlock_enter(void)
3019 if (td->td_md.md_spinlock_count == 0) {
3020 flags = intr_disable();
3021 td->td_md.md_spinlock_count = 1;
3022 td->td_md.md_saved_flags = flags;
3024 td->td_md.md_spinlock_count++;
3036 flags = td->td_md.md_saved_flags;
3037 td->td_md.md_spinlock_count--;
3038 if (td->td_md.md_spinlock_count == 0)
3039 intr_restore(flags);
3042 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3043 static void f00f_hack(void *unused);
3044 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3047 f00f_hack(void *unused)
3049 struct gate_descriptor *new_idt;
3057 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3059 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
3061 panic("kmem_alloc returned 0");
3063 /* Put the problematic entry (#6) at the end of the lower page. */
3064 new_idt = (struct gate_descriptor*)
3065 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3066 bcopy(idt, new_idt, sizeof(idt0));
3067 r_idt.rd_base = (u_int)new_idt;
3070 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3071 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3072 panic("vm_map_protect failed");
3074 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3077 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3078 * we want to start a backtrace from the function that caused us to enter
3079 * the debugger. We have the context in the trapframe, but base the trace
3080 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3081 * enough for a backtrace.
3084 makectx(struct trapframe *tf, struct pcb *pcb)
3087 pcb->pcb_edi = tf->tf_edi;
3088 pcb->pcb_esi = tf->tf_esi;
3089 pcb->pcb_ebp = tf->tf_ebp;
3090 pcb->pcb_ebx = tf->tf_ebx;
3091 pcb->pcb_eip = tf->tf_eip;
3092 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3096 ptrace_set_pc(struct thread *td, u_long addr)
3099 td->td_frame->tf_eip = addr;
3104 ptrace_single_step(struct thread *td)
3106 td->td_frame->tf_eflags |= PSL_T;
3111 ptrace_clear_single_step(struct thread *td)
3113 td->td_frame->tf_eflags &= ~PSL_T;
3118 fill_regs(struct thread *td, struct reg *regs)
3121 struct trapframe *tp;
3125 regs->r_fs = tp->tf_fs;
3126 regs->r_es = tp->tf_es;
3127 regs->r_ds = tp->tf_ds;
3128 regs->r_edi = tp->tf_edi;
3129 regs->r_esi = tp->tf_esi;
3130 regs->r_ebp = tp->tf_ebp;
3131 regs->r_ebx = tp->tf_ebx;
3132 regs->r_edx = tp->tf_edx;
3133 regs->r_ecx = tp->tf_ecx;
3134 regs->r_eax = tp->tf_eax;
3135 regs->r_eip = tp->tf_eip;
3136 regs->r_cs = tp->tf_cs;
3137 regs->r_eflags = tp->tf_eflags;
3138 regs->r_esp = tp->tf_esp;
3139 regs->r_ss = tp->tf_ss;
3140 regs->r_gs = pcb->pcb_gs;
3145 set_regs(struct thread *td, struct reg *regs)
3148 struct trapframe *tp;
3151 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3152 !CS_SECURE(regs->r_cs))
3155 tp->tf_fs = regs->r_fs;
3156 tp->tf_es = regs->r_es;
3157 tp->tf_ds = regs->r_ds;
3158 tp->tf_edi = regs->r_edi;
3159 tp->tf_esi = regs->r_esi;
3160 tp->tf_ebp = regs->r_ebp;
3161 tp->tf_ebx = regs->r_ebx;
3162 tp->tf_edx = regs->r_edx;
3163 tp->tf_ecx = regs->r_ecx;
3164 tp->tf_eax = regs->r_eax;
3165 tp->tf_eip = regs->r_eip;
3166 tp->tf_cs = regs->r_cs;
3167 tp->tf_eflags = regs->r_eflags;
3168 tp->tf_esp = regs->r_esp;
3169 tp->tf_ss = regs->r_ss;
3170 pcb->pcb_gs = regs->r_gs;
3174 #ifdef CPU_ENABLE_SSE
3176 fill_fpregs_xmm(sv_xmm, sv_87)
3177 struct savexmm *sv_xmm;
3178 struct save87 *sv_87;
3180 register struct env87 *penv_87 = &sv_87->sv_env;
3181 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3184 bzero(sv_87, sizeof(*sv_87));
3186 /* FPU control/status */
3187 penv_87->en_cw = penv_xmm->en_cw;
3188 penv_87->en_sw = penv_xmm->en_sw;
3189 penv_87->en_tw = penv_xmm->en_tw;
3190 penv_87->en_fip = penv_xmm->en_fip;
3191 penv_87->en_fcs = penv_xmm->en_fcs;
3192 penv_87->en_opcode = penv_xmm->en_opcode;
3193 penv_87->en_foo = penv_xmm->en_foo;
3194 penv_87->en_fos = penv_xmm->en_fos;
3197 for (i = 0; i < 8; ++i)
3198 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3202 set_fpregs_xmm(sv_87, sv_xmm)
3203 struct save87 *sv_87;
3204 struct savexmm *sv_xmm;
3206 register struct env87 *penv_87 = &sv_87->sv_env;
3207 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3210 /* FPU control/status */
3211 penv_xmm->en_cw = penv_87->en_cw;
3212 penv_xmm->en_sw = penv_87->en_sw;
3213 penv_xmm->en_tw = penv_87->en_tw;
3214 penv_xmm->en_fip = penv_87->en_fip;
3215 penv_xmm->en_fcs = penv_87->en_fcs;
3216 penv_xmm->en_opcode = penv_87->en_opcode;
3217 penv_xmm->en_foo = penv_87->en_foo;
3218 penv_xmm->en_fos = penv_87->en_fos;
3221 for (i = 0; i < 8; ++i)
3222 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3224 #endif /* CPU_ENABLE_SSE */
3227 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3230 KASSERT(td == curthread || TD_IS_SUSPENDED(td),
3231 ("not suspended thread %p", td));
3235 bzero(fpregs, sizeof(*fpregs));
3237 #ifdef CPU_ENABLE_SSE
3239 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3240 (struct save87 *)fpregs);
3242 #endif /* CPU_ENABLE_SSE */
3243 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
3249 set_fpregs(struct thread *td, struct fpreg *fpregs)
3252 #ifdef CPU_ENABLE_SSE
3254 set_fpregs_xmm((struct save87 *)fpregs,
3255 &td->td_pcb->pcb_user_save.sv_xmm);
3257 #endif /* CPU_ENABLE_SSE */
3258 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
3267 * Get machine context.
3270 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3272 struct trapframe *tp;
3273 struct segment_descriptor *sdp;
3277 PROC_LOCK(curthread->td_proc);
3278 mcp->mc_onstack = sigonstack(tp->tf_esp);
3279 PROC_UNLOCK(curthread->td_proc);
3280 mcp->mc_gs = td->td_pcb->pcb_gs;
3281 mcp->mc_fs = tp->tf_fs;
3282 mcp->mc_es = tp->tf_es;
3283 mcp->mc_ds = tp->tf_ds;
3284 mcp->mc_edi = tp->tf_edi;
3285 mcp->mc_esi = tp->tf_esi;
3286 mcp->mc_ebp = tp->tf_ebp;
3287 mcp->mc_isp = tp->tf_isp;
3288 mcp->mc_eflags = tp->tf_eflags;
3289 if (flags & GET_MC_CLEAR_RET) {
3292 mcp->mc_eflags &= ~PSL_C;
3294 mcp->mc_eax = tp->tf_eax;
3295 mcp->mc_edx = tp->tf_edx;
3297 mcp->mc_ebx = tp->tf_ebx;
3298 mcp->mc_ecx = tp->tf_ecx;
3299 mcp->mc_eip = tp->tf_eip;
3300 mcp->mc_cs = tp->tf_cs;
3301 mcp->mc_esp = tp->tf_esp;
3302 mcp->mc_ss = tp->tf_ss;
3303 mcp->mc_len = sizeof(*mcp);
3304 get_fpcontext(td, mcp);
3305 sdp = &td->td_pcb->pcb_fsd;
3306 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3307 sdp = &td->td_pcb->pcb_gsd;
3308 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3309 bzero(mcp->mc_spare1, sizeof(mcp->mc_spare1));
3310 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3315 * Set machine context.
3317 * However, we don't set any but the user modifiable flags, and we won't
3318 * touch the cs selector.
3321 set_mcontext(struct thread *td, const mcontext_t *mcp)
3323 struct trapframe *tp;
3327 if (mcp->mc_len != sizeof(*mcp))
3329 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3330 (tp->tf_eflags & ~PSL_USERCHANGE);
3331 if ((ret = set_fpcontext(td, mcp)) == 0) {
3332 tp->tf_fs = mcp->mc_fs;
3333 tp->tf_es = mcp->mc_es;
3334 tp->tf_ds = mcp->mc_ds;
3335 tp->tf_edi = mcp->mc_edi;
3336 tp->tf_esi = mcp->mc_esi;
3337 tp->tf_ebp = mcp->mc_ebp;
3338 tp->tf_ebx = mcp->mc_ebx;
3339 tp->tf_edx = mcp->mc_edx;
3340 tp->tf_ecx = mcp->mc_ecx;
3341 tp->tf_eax = mcp->mc_eax;
3342 tp->tf_eip = mcp->mc_eip;
3343 tp->tf_eflags = eflags;
3344 tp->tf_esp = mcp->mc_esp;
3345 tp->tf_ss = mcp->mc_ss;
3346 td->td_pcb->pcb_gs = mcp->mc_gs;
3353 get_fpcontext(struct thread *td, mcontext_t *mcp)
3357 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3358 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3359 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3361 mcp->mc_ownedfp = npxgetregs(td);
3362 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
3363 sizeof(mcp->mc_fpstate));
3364 mcp->mc_fpformat = npxformat();
3369 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3372 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3374 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3375 mcp->mc_fpformat != _MC_FPFMT_XMM)
3377 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3378 /* We don't care what state is left in the FPU or PCB. */
3380 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3381 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3383 #ifdef CPU_ENABLE_SSE
3385 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
3386 en_mxcsr &= cpu_mxcsr_mask;
3388 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
3396 fpstate_drop(struct thread *td)
3399 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3402 if (PCPU_GET(fpcurthread) == td)
3406 * XXX force a full drop of the npx. The above only drops it if we
3407 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3409 * XXX I don't much like npxgetregs()'s semantics of doing a full
3410 * drop. Dropping only to the pcb matches fnsave's behaviour.
3411 * We only need to drop to !PCB_INITDONE in sendsig(). But
3412 * sendsig() is the only caller of npxgetregs()... perhaps we just
3413 * have too many layers.
3415 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3416 PCB_NPXUSERINITDONE);
3421 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3426 dbregs->dr[0] = rdr0();
3427 dbregs->dr[1] = rdr1();
3428 dbregs->dr[2] = rdr2();
3429 dbregs->dr[3] = rdr3();
3430 dbregs->dr[4] = rdr4();
3431 dbregs->dr[5] = rdr5();
3432 dbregs->dr[6] = rdr6();
3433 dbregs->dr[7] = rdr7();
3436 dbregs->dr[0] = pcb->pcb_dr0;
3437 dbregs->dr[1] = pcb->pcb_dr1;
3438 dbregs->dr[2] = pcb->pcb_dr2;
3439 dbregs->dr[3] = pcb->pcb_dr3;
3442 dbregs->dr[6] = pcb->pcb_dr6;
3443 dbregs->dr[7] = pcb->pcb_dr7;
3449 set_dbregs(struct thread *td, struct dbreg *dbregs)
3455 load_dr0(dbregs->dr[0]);
3456 load_dr1(dbregs->dr[1]);
3457 load_dr2(dbregs->dr[2]);
3458 load_dr3(dbregs->dr[3]);
3459 load_dr4(dbregs->dr[4]);
3460 load_dr5(dbregs->dr[5]);
3461 load_dr6(dbregs->dr[6]);
3462 load_dr7(dbregs->dr[7]);
3465 * Don't let an illegal value for dr7 get set. Specifically,
3466 * check for undefined settings. Setting these bit patterns
3467 * result in undefined behaviour and can lead to an unexpected
3470 for (i = 0; i < 4; i++) {
3471 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3473 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3480 * Don't let a process set a breakpoint that is not within the
3481 * process's address space. If a process could do this, it
3482 * could halt the system by setting a breakpoint in the kernel
3483 * (if ddb was enabled). Thus, we need to check to make sure
3484 * that no breakpoints are being enabled for addresses outside
3485 * process's address space.
3487 * XXX - what about when the watched area of the user's
3488 * address space is written into from within the kernel
3489 * ... wouldn't that still cause a breakpoint to be generated
3490 * from within kernel mode?
3493 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3494 /* dr0 is enabled */
3495 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3499 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3500 /* dr1 is enabled */
3501 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3505 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3506 /* dr2 is enabled */
3507 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3511 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3512 /* dr3 is enabled */
3513 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3517 pcb->pcb_dr0 = dbregs->dr[0];
3518 pcb->pcb_dr1 = dbregs->dr[1];
3519 pcb->pcb_dr2 = dbregs->dr[2];
3520 pcb->pcb_dr3 = dbregs->dr[3];
3521 pcb->pcb_dr6 = dbregs->dr[6];
3522 pcb->pcb_dr7 = dbregs->dr[7];
3524 pcb->pcb_flags |= PCB_DBREGS;
3531 * Return > 0 if a hardware breakpoint has been hit, and the
3532 * breakpoint was in user space. Return 0, otherwise.
3535 user_dbreg_trap(void)
3537 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3538 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3539 int nbp; /* number of breakpoints that triggered */
3540 caddr_t addr[4]; /* breakpoint addresses */
3544 if ((dr7 & 0x000000ff) == 0) {
3546 * all GE and LE bits in the dr7 register are zero,
3547 * thus the trap couldn't have been caused by the
3548 * hardware debug registers
3555 bp = dr6 & 0x0000000f;
3559 * None of the breakpoint bits are set meaning this
3560 * trap was not caused by any of the debug registers
3566 * at least one of the breakpoints were hit, check to see
3567 * which ones and if any of them are user space addresses
3571 addr[nbp++] = (caddr_t)rdr0();
3574 addr[nbp++] = (caddr_t)rdr1();
3577 addr[nbp++] = (caddr_t)rdr2();
3580 addr[nbp++] = (caddr_t)rdr3();
3583 for (i = 0; i < nbp; i++) {
3584 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3586 * addr[i] is in user space
3593 * None of the breakpoints are in user space.
3601 * Provide inb() and outb() as functions. They are normally only available as
3602 * inline functions, thus cannot be called from the debugger.
3605 /* silence compiler warnings */
3606 u_char inb_(u_short);
3607 void outb_(u_short, u_char);
3616 outb_(u_short port, u_char data)