2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1996, by Steve Passe
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
33 #include "opt_kstack_pages.h"
35 #include "opt_sched.h"
40 #error How did you get here?
44 #error The apic device is required for SMP, add "device apic" to your config file.
48 #include <sys/param.h>
49 #include <sys/systm.h>
51 #include <sys/cons.h> /* cngetc() */
52 #include <sys/cpuset.h>
56 #include <sys/kernel.h>
59 #include <sys/malloc.h>
60 #include <sys/memrange.h>
61 #include <sys/mutex.h>
64 #include <sys/sched.h>
66 #include <sys/sysctl.h>
69 #include <vm/vm_param.h>
71 #include <vm/vm_kern.h>
72 #include <vm/vm_extern.h>
74 #include <x86/apicreg.h>
75 #include <machine/clock.h>
76 #include <machine/cputypes.h>
78 #include <machine/md_var.h>
79 #include <machine/pcb.h>
80 #include <machine/psl.h>
81 #include <machine/smp.h>
82 #include <machine/specialreg.h>
83 #include <machine/cpu.h>
85 #define WARMBOOT_TARGET 0
86 #define WARMBOOT_OFF (KERNBASE + 0x0467)
87 #define WARMBOOT_SEG (KERNBASE + 0x0469)
89 #define CMOS_REG (0x70)
90 #define CMOS_DATA (0x71)
91 #define BIOS_RESET (0x0f)
92 #define BIOS_WARM (0x0a)
95 * this code MUST be enabled here and in mpboot.s.
96 * it follows the very early stages of AP boot by placing values in CMOS ram.
97 * it NORMALLY will never be needed and thus the primitive method for enabling.
102 #if defined(CHECK_POINTS)
103 #define CHECK_READ(A) (outb(CMOS_REG, (A)), inb(CMOS_DATA))
104 #define CHECK_WRITE(A,D) (outb(CMOS_REG, (A)), outb(CMOS_DATA, (D)))
106 #define CHECK_INIT(D); \
107 CHECK_WRITE(0x34, (D)); \
108 CHECK_WRITE(0x35, (D)); \
109 CHECK_WRITE(0x36, (D)); \
110 CHECK_WRITE(0x37, (D)); \
111 CHECK_WRITE(0x38, (D)); \
112 CHECK_WRITE(0x39, (D));
114 #define CHECK_PRINT(S); \
115 printf("%s: %d, %d, %d, %d, %d, %d\n", \
124 #else /* CHECK_POINTS */
126 #define CHECK_INIT(D)
127 #define CHECK_PRINT(S)
128 #define CHECK_WRITE(A, D)
130 #endif /* CHECK_POINTS */
132 extern struct pcpu __pcpu[];
135 * Local data and functions.
138 static void install_ap_tramp(void);
139 static int start_all_aps(void);
140 static int start_ap(int apic_id);
142 static u_int boot_address;
145 * Calculate usable address in base memory for AP trampoline code.
148 mp_bootaddress(u_int basemem)
151 boot_address = trunc_page(basemem); /* round down to 4k boundary */
152 if ((basemem - boot_address) < bootMP_size)
153 boot_address -= PAGE_SIZE; /* not enough, lower by 4k */
159 * Initialize the IPI handlers and start up the AP's.
166 /* Initialize the logical ID to APIC ID table. */
167 for (i = 0; i < MAXCPU; i++) {
168 cpu_apic_ids[i] = -1;
169 cpu_ipi_pending[i] = 0;
172 /* Install an inter-CPU IPI for TLB invalidation */
173 setidt(IPI_INVLTLB, IDTVEC(invltlb),
174 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
175 setidt(IPI_INVLPG, IDTVEC(invlpg),
176 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
177 setidt(IPI_INVLRNG, IDTVEC(invlrng),
178 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
180 /* Install an inter-CPU IPI for cache invalidation. */
181 setidt(IPI_INVLCACHE, IDTVEC(invlcache),
182 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
184 /* Install an inter-CPU IPI for all-CPU rendezvous */
185 setidt(IPI_RENDEZVOUS, IDTVEC(rendezvous),
186 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
188 /* Install generic inter-CPU IPI handler */
189 setidt(IPI_BITMAP_VECTOR, IDTVEC(ipi_intr_bitmap_handler),
190 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
192 /* Install an inter-CPU IPI for CPU stop/restart */
193 setidt(IPI_STOP, IDTVEC(cpustop),
194 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
196 /* Install an inter-CPU IPI for CPU suspend/resume */
197 setidt(IPI_SUSPEND, IDTVEC(cpususpend),
198 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
200 /* Set boot_cpu_id if needed. */
201 if (boot_cpu_id == -1) {
202 boot_cpu_id = PCPU_GET(apic_id);
203 cpu_info[boot_cpu_id].cpu_bsp = 1;
205 KASSERT(boot_cpu_id == PCPU_GET(apic_id),
206 ("BSP's APIC ID doesn't match boot_cpu_id"));
208 /* Probe logical/physical core configuration. */
213 /* Start each Application Processor */
216 set_interrupt_apic_ids();
220 * AP CPU's call this to initialize themselves.
231 /* bootAP is set in start_ap() to our ID. */
234 /* Get per-cpu data */
237 /* prime data page for it to use */
238 pcpu_init(pc, myid, sizeof(struct pcpu));
239 dpcpu_init(dpcpu, myid);
240 pc->pc_apic_id = cpu_apic_ids[myid];
241 pc->pc_prvspace = pc;
242 pc->pc_curthread = 0;
246 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
247 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
249 for (x = 0; x < NGDT; x++) {
250 ssdtosd(&gdt_segs[x], &gdt[myid * NGDT + x].sd);
253 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
254 r_gdt.rd_base = (int) &gdt[myid * NGDT];
255 lgdt(&r_gdt); /* does magic intra-segment return */
260 PCPU_SET(currentldt, _default_ldt);
262 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
263 gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
264 PCPU_SET(common_tss.tss_esp0, 0); /* not used until after switch */
265 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
266 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
267 PCPU_SET(tss_gdt, &gdt[myid * NGDT + GPROC0_SEL].sd);
268 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
271 PCPU_SET(fsgs_gdt, &gdt[myid * NGDT + GUFS_SEL].sd);
274 * Set to a known state:
275 * Set by mpboot.s: CR0_PG, CR0_PE
276 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
279 cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
281 CHECK_WRITE(0x38, 5);
283 /* signal our startup to the BSP. */
285 CHECK_WRITE(0x39, 6);
287 /* Spin until the BSP releases the AP's. */
288 while (atomic_load_acq_int(&aps_ready) == 0)
291 /* BSP may have changed PTD while we were waiting */
293 for (addr = 0; addr < NKPT * NBPDR - 1; addr += PAGE_SIZE)
296 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
300 init_secondary_tail();
304 * start each AP in our list
306 /* Lowest 1MB is already mapped: don't touch*/
307 #define TMPMAP_START 1
312 u_int32_t mpbioswarmvec;
315 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
317 /* install the AP 1st level boot code */
320 /* save the current value of the warm-start vector */
321 mpbioswarmvec = *((u_int32_t *) WARMBOOT_OFF);
322 outb(CMOS_REG, BIOS_RESET);
323 mpbiosreason = inb(CMOS_DATA);
325 /* set up temporary P==V mapping for AP boot */
326 /* XXX this is a hack, we should boot the AP on its own stack/PTD */
327 for (i = TMPMAP_START; i < NKPT; i++)
328 PTD[i] = PTD[KPTDI + i];
332 for (cpu = 1; cpu < mp_ncpus; cpu++) {
333 apic_id = cpu_apic_ids[cpu];
335 /* allocate and set up a boot stack data page */
337 (char *)kmem_malloc(kernel_arena, kstack_pages * PAGE_SIZE,
339 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
341 /* setup a vector to our boot code */
342 *((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
343 *((volatile u_short *) WARMBOOT_SEG) = (boot_address >> 4);
344 outb(CMOS_REG, BIOS_RESET);
345 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
347 bootSTK = (char *)bootstacks[cpu] + kstack_pages *
351 /* attempt to start the Application Processor */
352 CHECK_INIT(99); /* setup checkpoints */
353 if (!start_ap(apic_id)) {
354 printf("AP #%d (PHY# %d) failed!\n", cpu, apic_id);
355 CHECK_PRINT("trace"); /* show checkpoints */
356 /* better panic as the AP may be running loose */
357 printf("panic y/n? [y] ");
361 CHECK_PRINT("trace"); /* show checkpoints */
363 CPU_SET(cpu, &all_cpus); /* record AP in CPU map */
366 /* restore the warmstart vector */
367 *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
369 outb(CMOS_REG, BIOS_RESET);
370 outb(CMOS_DATA, mpbiosreason);
372 /* Undo V==P hack from above */
373 for (i = TMPMAP_START; i < NKPT; i++)
375 pmap_invalidate_range(kernel_pmap, 0, NKPT * NBPDR - 1);
377 /* number of APs actually started */
382 * load the 1st level AP boot code into base memory.
385 /* targets for relocation */
386 extern void bigJump(void);
387 extern void bootCodeSeg(void);
388 extern void bootDataSeg(void);
389 extern void MPentry(void);
391 extern u_int mp_gdtbase;
394 install_ap_tramp(void)
397 int size = *(int *) ((u_long) & bootMP_size);
398 vm_offset_t va = boot_address + KERNBASE;
399 u_char *src = (u_char *) ((u_long) bootMP);
400 u_char *dst = (u_char *) va;
401 u_int boot_base = (u_int) bootMP;
406 KASSERT (size <= PAGE_SIZE,
407 ("'size' do not fit into PAGE_SIZE, as expected."));
408 pmap_kenter(va, boot_address);
409 pmap_invalidate_page (kernel_pmap, va);
410 for (x = 0; x < size; ++x)
414 * modify addresses in code we just moved to basemem. unfortunately we
415 * need fairly detailed info about mpboot.s for this to work. changes
416 * to mpboot.s might require changes here.
419 /* boot code is located in KERNEL space */
422 /* modify the lgdt arg */
423 dst32 = (u_int32_t *) (dst + ((u_int) & mp_gdtbase - boot_base));
424 *dst32 = boot_address + ((u_int) & MP_GDT - boot_base);
426 /* modify the ljmp target for MPentry() */
427 dst32 = (u_int32_t *) (dst + ((u_int) bigJump - boot_base) + 1);
428 *dst32 = ((u_int) MPentry - KERNBASE);
430 /* modify the target for boot code segment */
431 dst16 = (u_int16_t *) (dst + ((u_int) bootCodeSeg - boot_base));
432 dst8 = (u_int8_t *) (dst16 + 1);
433 *dst16 = (u_int) boot_address & 0xffff;
434 *dst8 = ((u_int) boot_address >> 16) & 0xff;
436 /* modify the target for boot data segment */
437 dst16 = (u_int16_t *) (dst + ((u_int) bootDataSeg - boot_base));
438 dst8 = (u_int8_t *) (dst16 + 1);
439 *dst16 = (u_int) boot_address & 0xffff;
440 *dst8 = ((u_int) boot_address >> 16) & 0xff;
444 * This function starts the AP (application processor) identified
445 * by the APIC ID 'physicalCpu'. It does quite a "song and dance"
446 * to accomplish this. This is necessary because of the nuances
447 * of the different hardware we might encounter. It isn't pretty,
448 * but it seems to work.
451 start_ap(int apic_id)
456 /* calculate the vector */
457 vector = (boot_address >> 12) & 0xff;
459 /* used as a watchpoint to signal AP startup */
462 ipi_startup(apic_id, vector);
464 /* Wait up to 5 seconds for it to start. */
465 for (ms = 0; ms < 5000; ms++) {
467 return 1; /* return SUCCESS */
470 return 0; /* return FAILURE */