2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1996, by Steve Passe
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
33 #include "opt_kstack_pages.h"
35 #include "opt_sched.h"
40 #error How did you get here?
44 #error The apic device is required for SMP, add "device apic" to your config file.
48 #include <sys/param.h>
49 #include <sys/systm.h>
51 #include <sys/cons.h> /* cngetc() */
52 #include <sys/cpuset.h>
56 #include <sys/kernel.h>
59 #include <sys/malloc.h>
60 #include <sys/memrange.h>
61 #include <sys/mutex.h>
64 #include <sys/sched.h>
66 #include <sys/sysctl.h>
69 #include <vm/vm_param.h>
71 #include <vm/vm_kern.h>
72 #include <vm/vm_extern.h>
74 #include <x86/apicreg.h>
75 #include <machine/clock.h>
76 #include <machine/cpu.h>
77 #include <machine/cputypes.h>
79 #include <machine/md_var.h>
80 #include <machine/pcb.h>
81 #include <machine/psl.h>
82 #include <machine/smp.h>
83 #include <machine/specialreg.h>
84 #include <x86/ucode.h>
86 #define WARMBOOT_TARGET 0
87 #define WARMBOOT_OFF (PMAP_MAP_LOW + 0x0467)
88 #define WARMBOOT_SEG (PMAP_MAP_LOW + 0x0469)
90 #define CMOS_REG (0x70)
91 #define CMOS_DATA (0x71)
92 #define BIOS_RESET (0x0f)
93 #define BIOS_WARM (0x0a)
96 * this code MUST be enabled here and in mpboot.s.
97 * it follows the very early stages of AP boot by placing values in CMOS ram.
98 * it NORMALLY will never be needed and thus the primitive method for enabling.
103 #if defined(CHECK_POINTS)
104 #define CHECK_READ(A) (outb(CMOS_REG, (A)), inb(CMOS_DATA))
105 #define CHECK_WRITE(A,D) (outb(CMOS_REG, (A)), outb(CMOS_DATA, (D)))
107 #define CHECK_INIT(D); \
108 CHECK_WRITE(0x34, (D)); \
109 CHECK_WRITE(0x35, (D)); \
110 CHECK_WRITE(0x36, (D)); \
111 CHECK_WRITE(0x37, (D)); \
112 CHECK_WRITE(0x38, (D)); \
113 CHECK_WRITE(0x39, (D));
115 #define CHECK_PRINT(S); \
116 printf("%s: %d, %d, %d, %d, %d, %d\n", \
125 #else /* CHECK_POINTS */
127 #define CHECK_INIT(D)
128 #define CHECK_PRINT(S)
129 #define CHECK_WRITE(A, D)
131 #endif /* CHECK_POINTS */
133 extern struct pcpu __pcpu[];
136 * Local data and functions.
139 static void install_ap_tramp(void);
140 static int start_all_aps(void);
141 static int start_ap(int apic_id);
143 static char *ap_copyout_buf;
144 static char *ap_tramp_stack_base;
146 * Initialize the IPI handlers and start up the AP's.
153 /* Initialize the logical ID to APIC ID table. */
154 for (i = 0; i < MAXCPU; i++) {
155 cpu_apic_ids[i] = -1;
156 cpu_ipi_pending[i] = 0;
159 /* Install an inter-CPU IPI for TLB invalidation */
160 setidt(IPI_INVLTLB, IDTVEC(invltlb),
161 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
162 setidt(IPI_INVLPG, IDTVEC(invlpg),
163 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
164 setidt(IPI_INVLRNG, IDTVEC(invlrng),
165 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
167 /* Install an inter-CPU IPI for cache invalidation. */
168 setidt(IPI_INVLCACHE, IDTVEC(invlcache),
169 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
171 /* Install an inter-CPU IPI for all-CPU rendezvous */
172 setidt(IPI_RENDEZVOUS, IDTVEC(rendezvous),
173 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
175 /* Install generic inter-CPU IPI handler */
176 setidt(IPI_BITMAP_VECTOR, IDTVEC(ipi_intr_bitmap_handler),
177 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
179 /* Install an inter-CPU IPI for CPU stop/restart */
180 setidt(IPI_STOP, IDTVEC(cpustop),
181 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
183 /* Install an inter-CPU IPI for CPU suspend/resume */
184 setidt(IPI_SUSPEND, IDTVEC(cpususpend),
185 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
187 /* Set boot_cpu_id if needed. */
188 if (boot_cpu_id == -1) {
189 boot_cpu_id = PCPU_GET(apic_id);
190 cpu_info[boot_cpu_id].cpu_bsp = 1;
192 KASSERT(boot_cpu_id == PCPU_GET(apic_id),
193 ("BSP's APIC ID doesn't match boot_cpu_id"));
195 /* Probe logical/physical core configuration. */
200 /* Start each Application Processor */
203 set_interrupt_apic_ids();
207 * AP CPU's call this to initialize themselves.
213 struct i386tss *common_tssp;
214 struct region_descriptor r_gdt, r_idt;
215 int gsel_tss, myid, x;
218 /* bootAP is set in start_ap() to our ID. */
221 /* Update microcode before doing anything else. */
224 /* Get per-cpu data */
227 /* prime data page for it to use */
228 pcpu_init(pc, myid, sizeof(struct pcpu));
229 dpcpu_init(dpcpu, myid);
230 pc->pc_apic_id = cpu_apic_ids[myid];
231 pc->pc_prvspace = pc;
232 pc->pc_curthread = 0;
233 pc->pc_common_tssp = common_tssp = &(__pcpu[0].pc_common_tssp)[myid];
237 gdt_segs[GPRIV_SEL].ssd_base = (int)pc;
238 gdt_segs[GPROC0_SEL].ssd_base = (int)common_tssp;
239 gdt_segs[GLDT_SEL].ssd_base = (int)ldt;
241 for (x = 0; x < NGDT; x++) {
242 ssdtosd(&gdt_segs[x], &gdt[myid * NGDT + x].sd);
245 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
246 r_gdt.rd_base = (int) &gdt[myid * NGDT];
247 lgdt(&r_gdt); /* does magic intra-segment return */
249 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1;
250 r_idt.rd_base = (int)idt;
254 PCPU_SET(currentldt, _default_ldt);
256 PCPU_SET(trampstk, (uintptr_t)ap_tramp_stack_base + TRAMP_STACK_SZ -
259 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
260 gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
261 common_tssp->tss_esp0 = PCPU_GET(trampstk);
262 common_tssp->tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
263 common_tssp->tss_ioopt = sizeof(struct i386tss) << 16;
264 PCPU_SET(tss_gdt, &gdt[myid * NGDT + GPROC0_SEL].sd);
265 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
268 PCPU_SET(fsgs_gdt, &gdt[myid * NGDT + GUFS_SEL].sd);
269 PCPU_SET(copyout_buf, ap_copyout_buf);
272 * Set to a known state:
273 * Set by mpboot.s: CR0_PG, CR0_PE
274 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
277 cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
279 CHECK_WRITE(0x38, 5);
281 /* signal our startup to the BSP. */
283 CHECK_WRITE(0x39, 6);
285 /* Spin until the BSP releases the AP's. */
286 while (atomic_load_acq_int(&aps_ready) == 0)
289 /* BSP may have changed PTD while we were waiting */
292 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
296 init_secondary_tail();
300 * start each AP in our list
302 #define TMPMAP_START 1
307 u_int32_t mpbioswarmvec;
310 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
312 /* Remap lowest 1MB */
313 IdlePTD[0] = IdlePTD[1];
314 load_cr3(rcr3()); /* invalidate TLB */
316 /* install the AP 1st level boot code */
319 /* save the current value of the warm-start vector */
320 mpbioswarmvec = *((u_int32_t *) WARMBOOT_OFF);
321 outb(CMOS_REG, BIOS_RESET);
322 mpbiosreason = inb(CMOS_DATA);
324 /* take advantage of the P==V mapping for PTD[0] for AP boot */
327 for (cpu = 1; cpu < mp_ncpus; cpu++) {
328 apic_id = cpu_apic_ids[cpu];
330 /* allocate and set up a boot stack data page */
331 bootstacks[cpu] = (char *)kmem_malloc(kstack_pages * PAGE_SIZE,
333 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
334 /* setup a vector to our boot code */
335 *((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
336 *((volatile u_short *) WARMBOOT_SEG) = (boot_address >> 4);
337 outb(CMOS_REG, BIOS_RESET);
338 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
340 bootSTK = (char *)bootstacks[cpu] + kstack_pages *
344 ap_tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT);
345 ap_copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT);
347 /* attempt to start the Application Processor */
348 CHECK_INIT(99); /* setup checkpoints */
349 if (!start_ap(apic_id)) {
350 printf("AP #%d (PHY# %d) failed!\n", cpu, apic_id);
351 CHECK_PRINT("trace"); /* show checkpoints */
352 /* better panic as the AP may be running loose */
353 printf("panic y/n? [y] ");
357 CHECK_PRINT("trace"); /* show checkpoints */
359 CPU_SET(cpu, &all_cpus); /* record AP in CPU map */
362 /* Unmap lowest 1MB again */
366 /* restore the warmstart vector */
367 *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
369 outb(CMOS_REG, BIOS_RESET);
370 outb(CMOS_DATA, mpbiosreason);
372 /* number of APs actually started */
377 * load the 1st level AP boot code into base memory.
380 /* targets for relocation */
381 extern void bigJump(void);
382 extern void bootCodeSeg(void);
383 extern void bootDataSeg(void);
384 extern void MPentry(void);
386 extern u_int mp_gdtbase;
389 install_ap_tramp(void)
392 int size = *(int *) ((u_long) & bootMP_size);
393 vm_offset_t va = boot_address;
394 u_char *src = (u_char *) ((u_long) bootMP);
395 u_char *dst = (u_char *) va;
396 u_int boot_base = (u_int) bootMP;
401 KASSERT (size <= PAGE_SIZE,
402 ("'size' do not fit into PAGE_SIZE, as expected."));
403 pmap_kenter(va, boot_address);
404 pmap_invalidate_page (kernel_pmap, va);
405 for (x = 0; x < size; ++x)
409 * modify addresses in code we just moved to basemem. unfortunately we
410 * need fairly detailed info about mpboot.s for this to work. changes
411 * to mpboot.s might require changes here.
414 /* boot code is located in KERNEL space */
417 /* modify the lgdt arg */
418 dst32 = (u_int32_t *) (dst + ((u_int) & mp_gdtbase - boot_base));
419 *dst32 = boot_address + ((u_int) & MP_GDT - boot_base);
421 /* modify the ljmp target for MPentry() */
422 dst32 = (u_int32_t *) (dst + ((u_int) bigJump - boot_base) + 1);
423 *dst32 = (u_int)MPentry;
425 /* modify the target for boot code segment */
426 dst16 = (u_int16_t *) (dst + ((u_int) bootCodeSeg - boot_base));
427 dst8 = (u_int8_t *) (dst16 + 1);
428 *dst16 = (u_int) boot_address & 0xffff;
429 *dst8 = ((u_int) boot_address >> 16) & 0xff;
431 /* modify the target for boot data segment */
432 dst16 = (u_int16_t *) (dst + ((u_int) bootDataSeg - boot_base));
433 dst8 = (u_int8_t *) (dst16 + 1);
434 *dst16 = (u_int) boot_address & 0xffff;
435 *dst8 = ((u_int) boot_address >> 16) & 0xff;
439 * This function starts the AP (application processor) identified
440 * by the APIC ID 'physicalCpu'. It does quite a "song and dance"
441 * to accomplish this. This is necessary because of the nuances
442 * of the different hardware we might encounter. It isn't pretty,
443 * but it seems to work.
446 start_ap(int apic_id)
451 /* calculate the vector */
452 vector = (boot_address >> 12) & 0xff;
454 /* used as a watchpoint to signal AP startup */
457 ipi_startup(apic_id, vector);
459 /* Wait up to 5 seconds for it to start. */
460 for (ms = 0; ms < 5000; ms++) {
462 return 1; /* return SUCCESS */
465 return 0; /* return FAILURE */