2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1996, by Steve Passe
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
34 #include "opt_kstack_pages.h"
36 #include "opt_sched.h"
41 #error How did you get here?
45 #error The apic device is required for SMP, add "device apic" to your config file.
49 #include <sys/param.h>
50 #include <sys/systm.h>
52 #include <sys/cons.h> /* cngetc() */
53 #include <sys/cpuset.h>
57 #include <sys/kernel.h>
60 #include <sys/malloc.h>
61 #include <sys/memrange.h>
62 #include <sys/mutex.h>
65 #include <sys/sched.h>
67 #include <sys/sysctl.h>
70 #include <vm/vm_param.h>
72 #include <vm/vm_kern.h>
73 #include <vm/vm_extern.h>
75 #include <x86/apicreg.h>
76 #include <machine/clock.h>
77 #include <machine/cpu.h>
78 #include <machine/cputypes.h>
80 #include <machine/md_var.h>
81 #include <machine/pcb.h>
82 #include <machine/psl.h>
83 #include <machine/smp.h>
84 #include <machine/specialreg.h>
85 #include <x86/ucode.h>
88 #include <contrib/dev/acpica/include/acpi.h>
89 #include <dev/acpica/acpivar.h>
92 #define WARMBOOT_TARGET 0
93 #define WARMBOOT_OFF (PMAP_MAP_LOW + 0x0467)
94 #define WARMBOOT_SEG (PMAP_MAP_LOW + 0x0469)
96 #define CMOS_REG (0x70)
97 #define CMOS_DATA (0x71)
98 #define BIOS_RESET (0x0f)
99 #define BIOS_WARM (0x0a)
102 * this code MUST be enabled here and in mpboot.s.
103 * it follows the very early stages of AP boot by placing values in CMOS ram.
104 * it NORMALLY will never be needed and thus the primitive method for enabling.
109 #if defined(CHECK_POINTS)
110 #define CHECK_READ(A) (outb(CMOS_REG, (A)), inb(CMOS_DATA))
111 #define CHECK_WRITE(A,D) (outb(CMOS_REG, (A)), outb(CMOS_DATA, (D)))
113 #define CHECK_INIT(D); \
114 CHECK_WRITE(0x34, (D)); \
115 CHECK_WRITE(0x35, (D)); \
116 CHECK_WRITE(0x36, (D)); \
117 CHECK_WRITE(0x37, (D)); \
118 CHECK_WRITE(0x38, (D)); \
119 CHECK_WRITE(0x39, (D));
121 #define CHECK_PRINT(S); \
122 printf("%s: %d, %d, %d, %d, %d, %d\n", \
131 #else /* CHECK_POINTS */
133 #define CHECK_INIT(D)
134 #define CHECK_PRINT(S)
135 #define CHECK_WRITE(A, D)
137 #endif /* CHECK_POINTS */
140 * Local data and functions.
143 static void install_ap_tramp(void);
144 static int start_all_aps(void);
145 static int start_ap(int apic_id);
147 static char *ap_copyout_buf;
148 static char *ap_tramp_stack_base;
150 * Initialize the IPI handlers and start up the AP's.
157 /* Initialize the logical ID to APIC ID table. */
158 for (i = 0; i < MAXCPU; i++) {
159 cpu_apic_ids[i] = -1;
162 /* Install an inter-CPU IPI for TLB invalidation */
163 setidt(IPI_INVLTLB, IDTVEC(invltlb),
164 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
165 setidt(IPI_INVLPG, IDTVEC(invlpg),
166 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
167 setidt(IPI_INVLRNG, IDTVEC(invlrng),
168 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
170 /* Install an inter-CPU IPI for cache invalidation. */
171 setidt(IPI_INVLCACHE, IDTVEC(invlcache),
172 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
174 /* Install an inter-CPU IPI for all-CPU rendezvous */
175 setidt(IPI_RENDEZVOUS, IDTVEC(rendezvous),
176 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
178 /* Install generic inter-CPU IPI handler */
179 setidt(IPI_BITMAP_VECTOR, IDTVEC(ipi_intr_bitmap_handler),
180 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
182 /* Install an inter-CPU IPI for CPU stop/restart */
183 setidt(IPI_STOP, IDTVEC(cpustop),
184 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
186 /* Install an inter-CPU IPI for CPU suspend/resume */
187 setidt(IPI_SUSPEND, IDTVEC(cpususpend),
188 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
190 /* Set boot_cpu_id if needed. */
191 if (boot_cpu_id == -1) {
192 boot_cpu_id = PCPU_GET(apic_id);
193 cpu_info[boot_cpu_id].cpu_bsp = 1;
195 KASSERT(boot_cpu_id == PCPU_GET(apic_id),
196 ("BSP's APIC ID doesn't match boot_cpu_id"));
198 /* Probe logical/physical core configuration. */
203 /* Start each Application Processor */
206 set_interrupt_apic_ids();
208 #if defined(DEV_ACPI) && MAXMEMDOM > 1
209 acpi_pxm_set_cpu_locality();
214 * AP CPU's call this to initialize themselves.
220 struct i386tss *common_tssp;
221 struct region_descriptor r_gdt, r_idt;
222 int gsel_tss, myid, x;
225 /* bootAP is set in start_ap() to our ID. */
228 /* Update microcode before doing anything else. */
231 /* Get per-cpu data */
234 /* prime data page for it to use */
235 pcpu_init(pc, myid, sizeof(struct pcpu));
236 dpcpu_init(dpcpu, myid);
237 pc->pc_apic_id = cpu_apic_ids[myid];
238 pc->pc_prvspace = pc;
239 pc->pc_curthread = 0;
240 pc->pc_common_tssp = common_tssp = &(__pcpu[0].pc_common_tssp)[myid];
244 gdt_segs[GPRIV_SEL].ssd_base = (int)pc;
245 gdt_segs[GPROC0_SEL].ssd_base = (int)common_tssp;
246 gdt_segs[GLDT_SEL].ssd_base = (int)ldt;
248 for (x = 0; x < NGDT; x++) {
249 ssdtosd(&gdt_segs[x], &gdt[myid * NGDT + x].sd);
252 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
253 r_gdt.rd_base = (int) &gdt[myid * NGDT];
254 lgdt(&r_gdt); /* does magic intra-segment return */
256 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1;
257 r_idt.rd_base = (int)idt;
261 PCPU_SET(currentldt, _default_ldt);
263 PCPU_SET(trampstk, (uintptr_t)ap_tramp_stack_base + TRAMP_STACK_SZ -
266 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
267 gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
268 common_tssp->tss_esp0 = PCPU_GET(trampstk);
269 common_tssp->tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
270 common_tssp->tss_ioopt = sizeof(struct i386tss) << 16;
271 PCPU_SET(tss_gdt, &gdt[myid * NGDT + GPROC0_SEL].sd);
272 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
275 PCPU_SET(fsgs_gdt, &gdt[myid * NGDT + GUFS_SEL].sd);
276 PCPU_SET(copyout_buf, ap_copyout_buf);
279 * Set to a known state:
280 * Set by mpboot.s: CR0_PG, CR0_PE
281 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
284 cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
286 CHECK_WRITE(0x38, 5);
288 /* signal our startup to the BSP. */
290 CHECK_WRITE(0x39, 6);
292 /* Spin until the BSP releases the AP's. */
293 while (atomic_load_acq_int(&aps_ready) == 0)
296 /* BSP may have changed PTD while we were waiting */
299 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
303 init_secondary_tail();
307 * start each AP in our list
309 #define TMPMAP_START 1
314 u_int32_t mpbioswarmvec;
317 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
319 pmap_remap_lower(true);
321 /* install the AP 1st level boot code */
324 /* save the current value of the warm-start vector */
325 mpbioswarmvec = *((u_int32_t *) WARMBOOT_OFF);
326 outb(CMOS_REG, BIOS_RESET);
327 mpbiosreason = inb(CMOS_DATA);
329 /* take advantage of the P==V mapping for PTD[0] for AP boot */
332 for (cpu = 1; cpu < mp_ncpus; cpu++) {
333 apic_id = cpu_apic_ids[cpu];
335 /* allocate and set up a boot stack data page */
336 bootstacks[cpu] = (char *)kmem_malloc(kstack_pages * PAGE_SIZE,
338 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
339 /* setup a vector to our boot code */
340 *((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
341 *((volatile u_short *) WARMBOOT_SEG) = (boot_address >> 4);
342 outb(CMOS_REG, BIOS_RESET);
343 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
345 bootSTK = (char *)bootstacks[cpu] + kstack_pages *
349 ap_tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT);
350 ap_copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT);
352 /* attempt to start the Application Processor */
353 CHECK_INIT(99); /* setup checkpoints */
354 if (!start_ap(apic_id)) {
355 printf("AP #%d (PHY# %d) failed!\n", cpu, apic_id);
356 CHECK_PRINT("trace"); /* show checkpoints */
357 /* better panic as the AP may be running loose */
358 printf("panic y/n? [y] ");
362 CHECK_PRINT("trace"); /* show checkpoints */
364 CPU_SET(cpu, &all_cpus); /* record AP in CPU map */
367 pmap_remap_lower(false);
369 /* restore the warmstart vector */
370 *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
372 outb(CMOS_REG, BIOS_RESET);
373 outb(CMOS_DATA, mpbiosreason);
375 /* number of APs actually started */
380 * load the 1st level AP boot code into base memory.
383 /* targets for relocation */
384 extern void bigJump(void);
385 extern void bootCodeSeg(void);
386 extern void bootDataSeg(void);
387 extern void MPentry(void);
389 extern u_int mp_gdtbase;
392 install_ap_tramp(void)
395 int size = *(int *) ((u_long) & bootMP_size);
396 vm_offset_t va = boot_address;
397 u_char *src = (u_char *) ((u_long) bootMP);
398 u_char *dst = (u_char *) va;
399 u_int boot_base = (u_int) bootMP;
404 KASSERT (size <= PAGE_SIZE,
405 ("'size' do not fit into PAGE_SIZE, as expected."));
406 pmap_kenter(va, boot_address);
407 pmap_invalidate_page (kernel_pmap, va);
408 for (x = 0; x < size; ++x)
412 * modify addresses in code we just moved to basemem. unfortunately we
413 * need fairly detailed info about mpboot.s for this to work. changes
414 * to mpboot.s might require changes here.
417 /* boot code is located in KERNEL space */
420 /* modify the lgdt arg */
421 dst32 = (u_int32_t *) (dst + ((u_int) & mp_gdtbase - boot_base));
422 *dst32 = boot_address + ((u_int) & MP_GDT - boot_base);
424 /* modify the ljmp target for MPentry() */
425 dst32 = (u_int32_t *) (dst + ((u_int) bigJump - boot_base) + 1);
426 *dst32 = (u_int)MPentry;
428 /* modify the target for boot code segment */
429 dst16 = (u_int16_t *) (dst + ((u_int) bootCodeSeg - boot_base));
430 dst8 = (u_int8_t *) (dst16 + 1);
431 *dst16 = (u_int) boot_address & 0xffff;
432 *dst8 = ((u_int) boot_address >> 16) & 0xff;
434 /* modify the target for boot data segment */
435 dst16 = (u_int16_t *) (dst + ((u_int) bootDataSeg - boot_base));
436 dst8 = (u_int8_t *) (dst16 + 1);
437 *dst16 = (u_int) boot_address & 0xffff;
438 *dst8 = ((u_int) boot_address >> 16) & 0xff;
442 * This function starts the AP (application processor) identified
443 * by the APIC ID 'physicalCpu'. It does quite a "song and dance"
444 * to accomplish this. This is necessary because of the nuances
445 * of the different hardware we might encounter. It isn't pretty,
446 * but it seems to work.
449 start_ap(int apic_id)
454 /* calculate the vector */
455 vector = (boot_address >> 12) & 0xff;
457 /* used as a watchpoint to signal AP startup */
460 ipi_startup(apic_id, vector);
462 /* Wait up to 5 seconds for it to start. */
463 for (ms = 0; ms < 5000; ms++) {
465 return 1; /* return SUCCESS */
468 return 0; /* return FAILURE */