2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_mptable_force_htt.h"
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
38 #include <vm/vm_param.h>
41 #include <machine/apicreg.h>
42 #include <machine/frame.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/apicvar.h>
45 #include <machine/md_var.h>
46 #include <machine/mptable.h>
47 #include <machine/specialreg.h>
49 #include <dev/pci/pcivar.h>
51 /* string defined by the Intel MP Spec as identifying the MP table */
52 #define MP_SIG 0x5f504d5f /* _MP_ */
54 #define NAPICID 32 /* Max number of APIC's */
57 #define BIOS_BASE (0xe8000)
58 #define BIOS_SIZE (0x18000)
60 #define BIOS_BASE (0xf0000)
61 #define BIOS_SIZE (0x10000)
63 #define BIOS_COUNT (BIOS_SIZE/4)
65 typedef void mptable_entry_handler(u_char *entry, void *arg);
67 static basetable_entry basetable_entry_types[] =
76 typedef struct BUSDATA {
78 enum busTypes bus_type;
81 typedef struct INTDATA {
91 typedef struct BUSTYPENAME {
96 /* From MP spec v1.4, table 4-8. */
97 static bus_type_name bus_type_table[] =
99 {UNKNOWN_BUSTYPE, "CBUS "},
100 {UNKNOWN_BUSTYPE, "CBUSII"},
102 {UNKNOWN_BUSTYPE, "FUTURE"},
103 {UNKNOWN_BUSTYPE, "INTERN"},
105 {UNKNOWN_BUSTYPE, "MBI "},
106 {UNKNOWN_BUSTYPE, "MBII "},
108 {UNKNOWN_BUSTYPE, "MPI "},
109 {UNKNOWN_BUSTYPE, "MPSA "},
110 {UNKNOWN_BUSTYPE, "NUBUS "},
112 {UNKNOWN_BUSTYPE, "PCMCIA"},
113 {UNKNOWN_BUSTYPE, "TC "},
114 {UNKNOWN_BUSTYPE, "VL "},
115 {UNKNOWN_BUSTYPE, "VME "},
116 {UNKNOWN_BUSTYPE, "XPRESS"}
119 /* From MP spec v1.4, table 5-1. */
120 static int default_data[7][5] =
122 /* nbus, id0, type0, id1, type1 */
123 {1, 0, ISA, 255, NOBUS},
124 {1, 0, EISA, 255, NOBUS},
125 {1, 0, EISA, 255, NOBUS},
126 {1, 0, MCA, 255, NOBUS},
128 {2, 0, EISA, 1, PCI},
132 struct pci_probe_table_args {
137 struct pci_route_interrupt_args {
138 u_char bus; /* Source bus. */
139 u_char irq; /* Source slot:pin. */
140 int vector; /* Return value. */
143 static mpfps_t mpfps;
145 static void *ioapics[NAPICID];
146 static bus_datum *busses;
147 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
148 static int pci0 = -1;
150 static MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items");
152 static enum intr_polarity conforming_polarity(u_char src_bus,
154 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
155 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
156 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
157 static int lookup_bus_type(char *name);
158 static void mptable_count_items(void);
159 static void mptable_count_items_handler(u_char *entry, void *arg);
160 #ifdef MPTABLE_FORCE_HTT
161 static void mptable_hyperthread_fixup(u_int id_mask);
163 static void mptable_parse_apics_and_busses(void);
164 static void mptable_parse_apics_and_busses_handler(u_char *entry,
166 static void mptable_parse_default_config_ints(void);
167 static void mptable_parse_ints(void);
168 static void mptable_parse_ints_handler(u_char *entry, void *arg);
169 static void mptable_parse_io_int(int_entry_ptr intr);
170 static void mptable_parse_local_int(int_entry_ptr intr);
171 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
172 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
173 static void mptable_pci_setup(void);
174 static int mptable_probe(void);
175 static int mptable_probe_cpus(void);
176 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
177 static void mptable_register(void *dummy);
178 static int mptable_setup_local(void);
179 static int mptable_setup_io(void);
180 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
181 static int search_for_sig(u_int32_t target, int count);
183 static struct apic_enumerator mptable_enumerator = {
192 * look for the MP spec signature
196 search_for_sig(u_int32_t target, int count)
199 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
201 for (x = 0; x < count; x += 4)
202 if (addr[x] == MP_SIG)
203 /* make array index a byte index */
204 return (target + (x * sizeof(u_int32_t)));
209 lookup_bus_type(char *name)
213 for (x = 0; x < MAX_BUSTYPE; ++x)
214 if (strncmp(bus_type_table[x].name, name, 6) == 0)
215 return (bus_type_table[x].type);
217 return (UNKNOWN_BUSTYPE);
221 * Look for an Intel MP spec table (ie, SMP capable hardware).
230 /* see if EBDA exists */
231 if ((segment = (u_long) * (u_short *) (KERNBASE + 0x40e)) != 0) {
232 /* search first 1K of EBDA */
233 target = (u_int32_t) (segment << 4);
234 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
237 /* last 1K of base memory, effective 'top of base' passed in */
238 target = (u_int32_t) ((basemem * 1024) - 0x400);
239 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
243 /* search the BIOS */
244 target = (u_int32_t) BIOS_BASE;
245 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
252 mpfps = (mpfps_t)(KERNBASE + x);
254 /* Map in the configuration table if it exists. */
255 if (mpfps->config_type != 0) {
258 "MP Table version 1.%d found using Default Configuration %d\n",
259 mpfps->spec_rev, mpfps->config_type);
260 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
262 "MP Table Default Configuration %d is unsupported\n",
268 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
269 printf("%s: Unable to map MP Configuration Table\n",
273 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
274 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
276 printf("%s: Unable to map end of MP Config Table\n",
280 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
281 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
282 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
283 __func__, mpct->signature[0], mpct->signature[1],
284 mpct->signature[2], mpct->signature[3]);
289 "MP Configuration Table version 1.%d found at %p\n",
290 mpct->spec_rev, mpct);
297 * Run through the MP table enumerating CPUs.
300 mptable_probe_cpus(void)
304 /* Is this a pre-defined config? */
305 if (mpfps->config_type != 0) {
310 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
311 #ifdef MPTABLE_FORCE_HTT
312 mptable_hyperthread_fixup(cpu_mask);
319 * Initialize the local APIC on the BSP.
322 mptable_setup_local(void)
325 /* Is this a pre-defined config? */
326 printf("MPTable: <");
327 if (mpfps->config_type != 0) {
328 lapic_init(DEFAULT_APIC_BASE);
329 printf("Default Configuration %d", mpfps->config_type);
331 lapic_init((uintptr_t)mpct->apic_address);
332 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
333 (int)sizeof(mpct->product_id), mpct->product_id);
340 * Run through the MP table enumerating I/O APICs.
343 mptable_setup_io(void)
348 /* First, we count individual items and allocate arrays. */
349 mptable_count_items();
350 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
352 for (i = 0; i <= mptable_maxbusid; i++)
353 busses[i].bus_type = NOBUS;
355 /* Second, we run through adding I/O APIC's and busses. */
356 mptable_parse_apics_and_busses();
358 /* Third, we run through the table tweaking interrupt sources. */
359 mptable_parse_ints();
361 /* Fourth, we register all the I/O APIC's. */
362 for (i = 0; i < NAPICID; i++)
363 if (ioapics[i] != NULL)
364 ioapic_register(ioapics[i]);
366 /* Fifth, we setup data structures to handle PCI interrupt routing. */
369 /* Finally, we throw the switch to enable the I/O APIC's. */
370 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
371 outb(0x22, 0x70); /* select IMCR */
372 byte = inb(0x23); /* current contents */
373 byte |= 0x01; /* mask external INTR */
374 outb(0x23, byte); /* disconnect 8259s/NMI */
381 mptable_register(void *dummy __unused)
384 apic_register_enumerator(&mptable_enumerator);
386 SYSINIT(mptable_register, SI_SUB_CPU - 1, SI_ORDER_FIRST, mptable_register,
390 * Call the handler routine for each entry in the MP config table.
393 mptable_walk_table(mptable_entry_handler *handler, void *arg)
398 entry = (u_char *)(mpct + 1);
399 for (i = 0; i < mpct->entry_count; i++) {
401 case MPCT_ENTRY_PROCESSOR:
402 case MPCT_ENTRY_IOAPIC:
405 case MPCT_ENTRY_LOCAL_INT:
408 panic("%s: Unknown MP Config Entry %d\n", __func__,
412 entry += basetable_entry_types[*entry].length;
417 mptable_probe_cpus_handler(u_char *entry, void *arg)
423 case MPCT_ENTRY_PROCESSOR:
424 proc = (proc_entry_ptr)entry;
425 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
426 lapic_create(proc->apic_id, proc->cpu_flags &
428 cpu_mask = (u_int *)arg;
429 *cpu_mask |= (1 << proc->apic_id);
436 mptable_count_items_handler(u_char *entry, void *arg __unused)
438 io_apic_entry_ptr apic;
443 bus = (bus_entry_ptr)entry;
445 if (bus->bus_id > mptable_maxbusid)
446 mptable_maxbusid = bus->bus_id;
448 case MPCT_ENTRY_IOAPIC:
449 apic = (io_apic_entry_ptr)entry;
450 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
457 * Count items in the table.
460 mptable_count_items(void)
463 /* Is this a pre-defined config? */
464 if (mpfps->config_type != 0) {
465 mptable_nioapics = 1;
466 switch (mpfps->config_type) {
479 panic("Unknown pre-defined MP Table config type %d",
482 mptable_maxbusid = mptable_nbusses - 1;
484 mptable_walk_table(mptable_count_items_handler, NULL);
488 * Add a bus or I/O APIC from an entry in the table.
491 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
493 io_apic_entry_ptr apic;
495 enum busTypes bus_type;
501 bus = (bus_entry_ptr)entry;
502 bus_type = lookup_bus_type(bus->bus_type);
503 if (bus_type == UNKNOWN_BUSTYPE) {
504 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
505 for (i = 0; i < 6; i++)
506 printf("%c", bus->bus_type[i]);
509 busses[bus->bus_id].bus_id = bus->bus_id;
510 busses[bus->bus_id].bus_type = bus_type;
512 case MPCT_ENTRY_IOAPIC:
513 apic = (io_apic_entry_ptr)entry;
514 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
516 if (apic->apic_id >= NAPICID)
517 panic("%s: I/O APIC ID %d too high", __func__,
519 if (ioapics[apic->apic_id] != NULL)
520 panic("%s: Double APIC ID %d", __func__,
522 ioapics[apic->apic_id] = ioapic_create(
523 (uintptr_t)apic->apic_address, apic->apic_id, -1);
531 * Enumerate I/O APIC's and busses.
534 mptable_parse_apics_and_busses(void)
537 /* Is this a pre-defined config? */
538 if (mpfps->config_type != 0) {
539 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
540 busses[0].bus_id = 0;
541 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
542 if (mptable_nbusses > 1) {
543 busses[1].bus_id = 1;
545 default_data[mpfps->config_type - 1][4];
548 mptable_walk_table(mptable_parse_apics_and_busses_handler,
553 * Determine conforming polarity for a given bus type.
555 static enum intr_polarity
556 conforming_polarity(u_char src_bus, u_char src_bus_irq)
559 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
560 switch (busses[src_bus].bus_type) {
563 return (INTR_POLARITY_HIGH);
565 return (INTR_POLARITY_LOW);
567 panic("%s: unknown bus type %d", __func__,
568 busses[src_bus].bus_type);
573 * Determine conforming trigger for a given bus type.
575 static enum intr_trigger
576 conforming_trigger(u_char src_bus, u_char src_bus_irq)
579 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
580 switch (busses[src_bus].bus_type) {
584 return (elcr_read_trigger(src_bus_irq));
587 return (INTR_TRIGGER_EDGE);
589 return (INTR_TRIGGER_LEVEL);
592 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
593 KASSERT(elcr_found, ("Missing ELCR"));
594 return (elcr_read_trigger(src_bus_irq));
597 panic("%s: unknown bus type %d", __func__,
598 busses[src_bus].bus_type);
602 static enum intr_polarity
603 intentry_polarity(int_entry_ptr intr)
606 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
607 case INTENTRY_FLAGS_POLARITY_CONFORM:
608 return (conforming_polarity(intr->src_bus_id,
610 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
611 return (INTR_POLARITY_HIGH);
612 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
613 return (INTR_POLARITY_LOW);
615 panic("Bogus interrupt flags");
619 static enum intr_trigger
620 intentry_trigger(int_entry_ptr intr)
623 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
624 case INTENTRY_FLAGS_TRIGGER_CONFORM:
625 return (conforming_trigger(intr->src_bus_id,
627 case INTENTRY_FLAGS_TRIGGER_EDGE:
628 return (INTR_TRIGGER_EDGE);
629 case INTENTRY_FLAGS_TRIGGER_LEVEL:
630 return (INTR_TRIGGER_LEVEL);
632 panic("Bogus interrupt flags");
637 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
640 mptable_parse_io_int(int_entry_ptr intr)
645 apic_id = intr->dst_apic_id;
646 if (intr->dst_apic_id == 0xff) {
648 * An APIC ID of 0xff means that the interrupt is connected
649 * to the specified pin on all I/O APICs in the system. If
650 * there is only one I/O APIC, then use that APIC to route
651 * the interrupts. If there is more than one I/O APIC, then
654 if (mptable_nioapics == 1) {
656 while (ioapics[apic_id] == NULL)
660 "MPTable: Ignoring global interrupt entry for pin %d\n",
665 if (apic_id >= NAPICID) {
666 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
670 ioapic = ioapics[apic_id];
671 if (ioapic == NULL) {
673 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
677 pin = intr->dst_apic_int;
678 switch (intr->int_type) {
679 case INTENTRY_TYPE_INT:
680 switch (busses[intr->src_bus_id].bus_type) {
682 panic("interrupt from missing bus");
685 if (busses[intr->src_bus_id].bus_type == ISA)
686 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
688 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
689 if (intr->src_bus_irq == pin)
691 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
692 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
694 ioapic_disable_pin(ioapic, intr->src_bus_irq);
697 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
700 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
704 case INTENTRY_TYPE_NMI:
705 ioapic_set_nmi(ioapic, pin);
707 case INTENTRY_TYPE_SMI:
708 ioapic_set_smi(ioapic, pin);
710 case INTENTRY_TYPE_EXTINT:
711 ioapic_set_extint(ioapic, pin);
714 panic("%s: invalid interrupt entry type %d\n", __func__,
717 if (intr->int_type == INTENTRY_TYPE_INT ||
718 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
719 INTENTRY_FLAGS_TRIGGER_CONFORM)
720 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
721 if (intr->int_type == INTENTRY_TYPE_INT ||
722 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
723 INTENTRY_FLAGS_POLARITY_CONFORM)
724 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
728 * Parse an interrupt entry for a local APIC LVT pin.
731 mptable_parse_local_int(int_entry_ptr intr)
735 if (intr->dst_apic_id == 0xff)
736 apic_id = APIC_ID_ALL;
738 apic_id = intr->dst_apic_id;
739 if (intr->dst_apic_int == 0)
743 switch (intr->int_type) {
744 case INTENTRY_TYPE_INT:
747 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
748 intr->dst_apic_int, intr->src_bus_irq);
751 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
754 case INTENTRY_TYPE_NMI:
755 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
757 case INTENTRY_TYPE_SMI:
758 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
760 case INTENTRY_TYPE_EXTINT:
761 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
764 panic("%s: invalid interrupt entry type %d\n", __func__,
767 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
768 INTENTRY_FLAGS_TRIGGER_CONFORM)
769 lapic_set_lvt_triggermode(apic_id, pin,
770 intentry_trigger(intr));
771 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
772 INTENTRY_FLAGS_POLARITY_CONFORM)
773 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
777 * Parse interrupt entries.
780 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
784 intr = (int_entry_ptr)entry;
787 mptable_parse_io_int(intr);
789 case MPCT_ENTRY_LOCAL_INT:
790 mptable_parse_local_int(intr);
796 * Configure interrupt pins for a default configuration. For details see
797 * Table 5-2 in Section 5 of the MP Table specification.
800 mptable_parse_default_config_ints(void)
802 struct INTENTRY entry;
806 * All default configs route IRQs from bus 0 to the first 16 pins
807 * of the first I/O APIC with an APIC ID of 2.
809 entry.type = MPCT_ENTRY_INT;
810 entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
811 INTENTRY_FLAGS_TRIGGER_CONFORM;
812 entry.src_bus_id = 0;
813 entry.dst_apic_id = 2;
815 /* Run through all 16 pins. */
816 for (pin = 0; pin < 16; pin++) {
817 entry.dst_apic_int = pin;
820 /* Pin 0 is an ExtINT pin. */
821 entry.int_type = INTENTRY_TYPE_EXTINT;
824 /* IRQ 0 is routed to pin 2. */
825 entry.int_type = INTENTRY_TYPE_INT;
826 entry.src_bus_irq = 0;
829 /* All other pins are identity mapped. */
830 entry.int_type = INTENTRY_TYPE_INT;
831 entry.src_bus_irq = pin;
834 mptable_parse_io_int(&entry);
837 /* Certain configs disable certain pins. */
838 if (mpfps->config_type == 7)
839 ioapic_disable_pin(ioapics[2], 0);
840 if (mpfps->config_type == 2) {
841 ioapic_disable_pin(ioapics[2], 2);
842 ioapic_disable_pin(ioapics[2], 13);
847 * Configure the interrupt pins
850 mptable_parse_ints(void)
853 /* Is this a pre-defined config? */
854 if (mpfps->config_type != 0) {
855 /* Configure LINT pins. */
856 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
857 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
859 /* Configure I/O APIC pins. */
860 mptable_parse_default_config_ints();
862 mptable_walk_table(mptable_parse_ints_handler, NULL);
865 #ifdef MPTABLE_FORCE_HTT
867 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
868 * that aren't already listed in the table.
870 * XXX: We assume that all of the physical CPUs in the
871 * system have the same number of logical CPUs.
873 * XXX: We assume that APIC ID's are allocated such that
874 * the APIC ID's for a physical processor are aligned
875 * with the number of logical CPU's in the processor.
878 mptable_hyperthread_fixup(u_int id_mask)
880 u_int i, id, logical_cpus;
882 /* Nothing to do if there is no HTT support. */
883 if ((cpu_feature & CPUID_HTT) == 0)
885 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
886 if (logical_cpus <= 1)
890 * For each APIC ID of a CPU that is set in the mask,
891 * scan the other candidate APIC ID's for this
892 * physical processor. If any of those ID's are
893 * already in the table, then kill the fixup.
895 for (id = 0; id < NAPICID; id++) {
896 if ((id_mask & 1 << id) == 0)
898 /* First, make sure we are on a logical_cpus boundary. */
899 if (id % logical_cpus != 0)
901 for (i = id + 1; i < id + logical_cpus; i++)
902 if ((id_mask & 1 << i) != 0)
907 * Ok, the ID's checked out, so perform the fixup by
908 * adding the logical CPUs.
910 while ((id = ffs(id_mask)) != 0) {
912 for (i = id + 1; i < id + logical_cpus; i++) {
915 "MPTable: Adding logical CPU %d from main CPU %d\n",
919 id_mask &= ~(1 << id);
922 #endif /* MPTABLE_FORCE_HTT */
925 * Support code for routing PCI interrupts using the MP Table.
928 mptable_pci_setup(void)
933 * Find the first pci bus and call it 0. Panic if pci0 is not
934 * bus zero and there are multiple PCI busses.
936 for (i = 0; i <= mptable_maxbusid; i++)
937 if (busses[i].bus_type == PCI) {
942 "MPTable contains multiple PCI busses but no PCI bus 0");
947 mptable_pci_probe_table_handler(u_char *entry, void *arg)
949 struct pci_probe_table_args *args;
952 if (*entry != MPCT_ENTRY_INT)
954 intr = (int_entry_ptr)entry;
955 args = (struct pci_probe_table_args *)arg;
956 KASSERT(args->bus <= mptable_maxbusid,
957 ("bus %d is too big", args->bus));
958 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
959 if (intr->src_bus_id == args->bus)
964 mptable_pci_probe_table(int bus)
966 struct pci_probe_table_args args;
970 if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
972 if (busses[pci0 + bus].bus_type != PCI)
974 args.bus = pci0 + bus;
976 mptable_walk_table(mptable_pci_probe_table_handler, &args);
983 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
985 struct pci_route_interrupt_args *args;
989 if (*entry != MPCT_ENTRY_INT)
991 intr = (int_entry_ptr)entry;
992 args = (struct pci_route_interrupt_args *)arg;
993 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
996 /* Make sure the APIC maps to a known APIC. */
997 KASSERT(ioapics[intr->dst_apic_id] != NULL,
998 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
1001 * Look up the vector for this APIC / pin combination. If we
1002 * have previously matched an entry for this PCI IRQ but it
1003 * has the same vector as this entry, just return. Otherwise,
1004 * we use the vector for this APIC / pin combination.
1006 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
1007 intr->dst_apic_int);
1008 if (args->vector == vector)
1010 KASSERT(args->vector == -1,
1011 ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
1012 args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
1014 args->vector = vector;
1018 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
1020 struct pci_route_interrupt_args args;
1023 /* Like ACPI, pin numbers are 0-3, not 1-4. */
1025 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
1026 args.bus = pci_get_bus(dev) + pci0;
1027 slot = pci_get_slot(dev);
1030 * PCI interrupt entries in the MP Table encode both the slot and
1031 * pin into the IRQ with the pin being the two least significant
1032 * bits, the slot being the next five bits, and the most significant
1033 * bit being reserved.
1035 args.irq = slot << 2 | pin;
1037 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
1038 if (args.vector < 0) {
1039 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
1041 return (PCI_INVALID_IRQ);
1044 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
1045 'A' + pin, args.vector);
1046 return (args.vector);