2 * Copyright 1996 Massachusetts Institute of Technology
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
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9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
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13 * purpose. It is provided "as is" without express or implied
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/fcntl.h>
37 #include <sys/kernel.h>
40 #include <machine/cputypes.h>
42 #include <machine/clock.h>
43 #include <machine/perfmon.h>
44 #include <machine/specialreg.h>
46 static int perfmon_inuse;
47 static int perfmon_cpuok;
49 static int msr_ctl[NPMC];
51 static int msr_pmc[NPMC];
52 static unsigned int ctl_shadow[NPMC];
53 static quad_t pmc_shadow[NPMC]; /* used when ctr is stopped on P5 */
54 static int (*writectl)(int);
56 static int writectl5(int);
57 static int writectl6(int);
60 static d_close_t perfmon_close;
61 static d_open_t perfmon_open;
62 static d_ioctl_t perfmon_ioctl;
65 * XXX perfmon_init_dev(void *) is a split from the perfmon_init() funtion.
66 * This solves a problem for DEVFS users. It loads the "perfmon" driver after
67 * the DEVFS subsystem has been kicked into action. The SI_ORDER_ANY is to
68 * assure that it is the most lowest priority task which, guarantees the
71 static void perfmon_init_dev(void *);
72 SYSINIT(cpu, SI_SUB_DRIVERS, SI_ORDER_ANY, perfmon_init_dev, NULL);
74 static struct cdevsw perfmon_cdevsw = {
75 .d_version = D_VERSION,
76 .d_flags = D_NEEDGIANT,
77 .d_open = perfmon_open,
78 .d_close = perfmon_close,
79 .d_ioctl = perfmon_ioctl,
84 * Must be called after cpu_class is set up.
93 msr_ctl[0] = MSR_P5_CESR;
94 msr_ctl[1] = MSR_P5_CESR;
95 msr_pmc[0] = MSR_P5_CTR0;
96 msr_pmc[1] = MSR_P5_CTR1;
101 msr_ctl[0] = MSR_EVNTSEL0;
102 msr_ctl[1] = MSR_EVNTSEL1;
103 msr_pmc[0] = MSR_PERFCTR0;
104 msr_pmc[1] = MSR_PERFCTR1;
105 writectl = writectl6;
116 perfmon_init_dev(dummy)
119 make_dev(&perfmon_cdevsw, 32, UID_ROOT, GID_KMEM, 0640, "perfmon");
125 return perfmon_cpuok;
129 perfmon_setup(int pmc, unsigned int control)
133 if (pmc < 0 || pmc >= NPMC)
136 perfmon_inuse |= (1 << pmc);
137 control &= ~(PMCF_SYS_FLAGS << 16);
138 savecrit = intr_disable();
139 ctl_shadow[pmc] = control;
141 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
142 intr_restore(savecrit);
147 perfmon_get(int pmc, unsigned int *control)
149 if (pmc < 0 || pmc >= NPMC)
152 if (perfmon_inuse & (1 << pmc)) {
153 *control = ctl_shadow[pmc];
156 return EBUSY; /* XXX reversed sense */
160 perfmon_fini(int pmc)
162 if (pmc < 0 || pmc >= NPMC)
165 if (perfmon_inuse & (1 << pmc)) {
168 perfmon_inuse &= ~(1 << pmc);
171 return EBUSY; /* XXX reversed sense */
175 perfmon_start(int pmc)
179 if (pmc < 0 || pmc >= NPMC)
182 if (perfmon_inuse & (1 << pmc)) {
183 savecrit = intr_disable();
184 ctl_shadow[pmc] |= (PMCF_EN << 16);
185 wrmsr(msr_pmc[pmc], pmc_shadow[pmc]);
187 intr_restore(savecrit);
194 perfmon_stop(int pmc)
198 if (pmc < 0 || pmc >= NPMC)
201 if (perfmon_inuse & (1 << pmc)) {
202 savecrit = intr_disable();
203 pmc_shadow[pmc] = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
204 ctl_shadow[pmc] &= ~(PMCF_EN << 16);
206 intr_restore(savecrit);
213 perfmon_read(int pmc, quad_t *val)
215 if (pmc < 0 || pmc >= NPMC)
218 if (perfmon_inuse & (1 << pmc)) {
219 if (ctl_shadow[pmc] & (PMCF_EN << 16))
220 *val = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
222 *val = pmc_shadow[pmc];
230 perfmon_reset(int pmc)
232 if (pmc < 0 || pmc >= NPMC)
235 if (perfmon_inuse & (1 << pmc)) {
236 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
244 * Unfortunately, the performance-monitoring registers are laid out
245 * differently in the P5 and P6. We keep everything in P6 format
246 * internally (except for the event code), and convert to P5
247 * format as needed on those CPUs. The writectl function pointer
248 * is set up to point to one of these functions by perfmon_init().
253 if (pmc > 0 && !(ctl_shadow[pmc] & (PMCF_EN << 16))) {
254 wrmsr(msr_ctl[pmc], 0);
256 wrmsr(msr_ctl[pmc], ctl_shadow[pmc]);
261 #define P5FLAG_P 0x200
262 #define P5FLAG_E 0x100
263 #define P5FLAG_USR 0x80
264 #define P5FLAG_OS 0x40
271 if (ctl_shadow[1] & (PMCF_EN << 16)) {
272 if (ctl_shadow[1] & (PMCF_USR << 16))
273 newval |= P5FLAG_USR << 16;
274 if (ctl_shadow[1] & (PMCF_OS << 16))
275 newval |= P5FLAG_OS << 16;
276 if (!(ctl_shadow[1] & (PMCF_E << 16)))
277 newval |= P5FLAG_E << 16;
278 newval |= (ctl_shadow[1] & 0x3f) << 16;
280 if (ctl_shadow[0] & (PMCF_EN << 16)) {
281 if (ctl_shadow[0] & (PMCF_USR << 16))
282 newval |= P5FLAG_USR;
283 if (ctl_shadow[0] & (PMCF_OS << 16))
285 if (!(ctl_shadow[0] & (PMCF_E << 16)))
287 newval |= ctl_shadow[0] & 0x3f;
290 wrmsr(msr_ctl[0], newval);
291 return 0; /* XXX should check for unimplemented bits */
296 * Now the user-mode interface, called from a subdevice of mem.c.
299 static int writerpmc;
302 perfmon_open(struct cdev *dev, int flags, int fmt, struct thread *td)
307 if (flags & FWRITE) {
319 perfmon_close(struct cdev *dev, int flags, int fmt, struct thread *td)
321 if (flags & FWRITE) {
324 for (i = 0; i < NPMC; i++) {
325 if (writerpmc & (1 << i))
334 perfmon_ioctl(struct cdev *dev, u_long cmd, caddr_t param, int flags, struct thread *td)
337 struct pmc_data *pmcd;
338 struct pmc_tstamp *pmct;
344 if (!(flags & FWRITE))
346 pmc = (struct pmc *)param;
348 rv = perfmon_setup(pmc->pmc_num, pmc->pmc_val);
350 writerpmc |= (1 << pmc->pmc_num);
355 pmc = (struct pmc *)param;
356 rv = perfmon_get(pmc->pmc_num, &pmc->pmc_val);
360 if (!(flags & FWRITE))
364 rv = perfmon_start(*ip);
368 if (!(flags & FWRITE))
372 rv = perfmon_stop(*ip);
376 if (!(flags & FWRITE))
380 rv = perfmon_reset(*ip);
384 pmcd = (struct pmc_data *)param;
385 rv = perfmon_read(pmcd->pmcd_num, &pmcd->pmcd_value);
393 pmct = (struct pmc_tstamp *)param;
394 /* XXX interface loses precision. */
395 pmct->pmct_rate = tsc_freq / 1000000;
396 pmct->pmct_value = rdtsc();