2 * Copyright 1996 Massachusetts Institute of Technology
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/fcntl.h>
38 #include <machine/cputypes.h>
40 #include <machine/clock.h>
41 #include <machine/perfmon.h>
43 static int perfmon_inuse;
44 static int perfmon_cpuok;
46 static int msr_ctl[NPMC];
48 static int msr_pmc[NPMC];
49 static unsigned int ctl_shadow[NPMC];
50 static quad_t pmc_shadow[NPMC]; /* used when ctr is stopped on P5 */
51 static int (*writectl)(int);
53 static int writectl5(int);
54 static int writectl6(int);
57 static d_close_t perfmon_close;
58 static d_open_t perfmon_open;
59 static d_ioctl_t perfmon_ioctl;
61 #define CDEV_MAJOR 2 /* We're really a minor of mem.c */
62 static struct cdevsw perfmon_cdevsw = {
63 /* open */ perfmon_open,
64 /* close */ perfmon_close,
67 /* ioctl */ perfmon_ioctl,
70 /* strategy */ nostrategy,
80 * Must be called after cpu_class is set up.
101 writectl = writectl6;
109 make_dev(&perfmon_cdevsw, 32, UID_ROOT, GID_KMEM, 0640, "perfmon");
115 return perfmon_cpuok;
119 perfmon_setup(int pmc, unsigned int control)
123 if (pmc < 0 || pmc >= NPMC)
126 perfmon_inuse |= (1 << pmc);
127 control &= ~(PMCF_SYS_FLAGS << 16);
128 intrstate = save_intr();
130 ctl_shadow[pmc] = control;
132 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
133 restore_intr(intrstate);
138 perfmon_get(int pmc, unsigned int *control)
140 if (pmc < 0 || pmc >= NPMC)
143 if (perfmon_inuse & (1 << pmc)) {
144 *control = ctl_shadow[pmc];
147 return EBUSY; /* XXX reversed sense */
151 perfmon_fini(int pmc)
153 if (pmc < 0 || pmc >= NPMC)
156 if (perfmon_inuse & (1 << pmc)) {
159 perfmon_inuse &= ~(1 << pmc);
162 return EBUSY; /* XXX reversed sense */
166 perfmon_start(int pmc)
170 if (pmc < 0 || pmc >= NPMC)
173 if (perfmon_inuse & (1 << pmc)) {
174 intrstate = save_intr();
176 ctl_shadow[pmc] |= (PMCF_EN << 16);
177 wrmsr(msr_pmc[pmc], pmc_shadow[pmc]);
179 restore_intr(intrstate);
186 perfmon_stop(int pmc)
190 if (pmc < 0 || pmc >= NPMC)
193 if (perfmon_inuse & (1 << pmc)) {
194 intrstate = save_intr();
196 pmc_shadow[pmc] = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
197 ctl_shadow[pmc] &= ~(PMCF_EN << 16);
199 restore_intr(intrstate);
206 perfmon_read(int pmc, quad_t *val)
208 if (pmc < 0 || pmc >= NPMC)
211 if (perfmon_inuse & (1 << pmc)) {
212 if (ctl_shadow[pmc] & (PMCF_EN << 16))
213 *val = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
215 *val = pmc_shadow[pmc];
223 perfmon_reset(int pmc)
225 if (pmc < 0 || pmc >= NPMC)
228 if (perfmon_inuse & (1 << pmc)) {
229 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
237 * Unfortunately, the performance-monitoring registers are laid out
238 * differently in the P5 and P6. We keep everything in P6 format
239 * internally (except for the event code), and convert to P5
240 * format as needed on those CPUs. The writectl function pointer
241 * is set up to point to one of these functions by perfmon_init().
246 if (pmc > 0 && !(ctl_shadow[pmc] & (PMCF_EN << 16))) {
247 wrmsr(msr_ctl[pmc], 0);
249 wrmsr(msr_ctl[pmc], ctl_shadow[pmc]);
254 #define P5FLAG_P 0x200
255 #define P5FLAG_E 0x100
256 #define P5FLAG_USR 0x80
257 #define P5FLAG_OS 0x40
264 if (ctl_shadow[1] & (PMCF_EN << 16)) {
265 if (ctl_shadow[1] & (PMCF_USR << 16))
266 newval |= P5FLAG_USR << 16;
267 if (ctl_shadow[1] & (PMCF_OS << 16))
268 newval |= P5FLAG_OS << 16;
269 if (!(ctl_shadow[1] & (PMCF_E << 16)))
270 newval |= P5FLAG_E << 16;
271 newval |= (ctl_shadow[1] & 0x3f) << 16;
273 if (ctl_shadow[0] & (PMCF_EN << 16)) {
274 if (ctl_shadow[0] & (PMCF_USR << 16))
275 newval |= P5FLAG_USR;
276 if (ctl_shadow[0] & (PMCF_OS << 16))
278 if (!(ctl_shadow[0] & (PMCF_E << 16)))
280 newval |= ctl_shadow[0] & 0x3f;
283 wrmsr(msr_ctl[0], newval);
284 return 0; /* XXX should check for unimplemented bits */
289 * Now the user-mode interface, called from a subdevice of mem.c.
292 static int writerpmc;
295 perfmon_open(dev_t dev, int flags, int fmt, struct proc *p)
300 if (flags & FWRITE) {
312 perfmon_close(dev_t dev, int flags, int fmt, struct proc *p)
314 if (flags & FWRITE) {
317 for (i = 0; i < NPMC; i++) {
318 if (writerpmc & (1 << i))
327 perfmon_ioctl(dev_t dev, u_long cmd, caddr_t param, int flags, struct proc *p)
330 struct pmc_data *pmcd;
331 struct pmc_tstamp *pmct;
337 if (!(flags & FWRITE))
339 pmc = (struct pmc *)param;
341 rv = perfmon_setup(pmc->pmc_num, pmc->pmc_val);
343 writerpmc |= (1 << pmc->pmc_num);
348 pmc = (struct pmc *)param;
349 rv = perfmon_get(pmc->pmc_num, &pmc->pmc_val);
353 if (!(flags & FWRITE))
357 rv = perfmon_start(*ip);
361 if (!(flags & FWRITE))
365 rv = perfmon_stop(*ip);
369 if (!(flags & FWRITE))
373 rv = perfmon_reset(*ip);
377 pmcd = (struct pmc_data *)param;
378 rv = perfmon_read(pmcd->pmcd_num, &pmcd->pmcd_value);
386 pmct = (struct pmc_tstamp *)param;
387 /* XXX interface loses precision. */
388 pmct->pmct_rate = tsc_freq / 1000000;
389 pmct->pmct_value = rdtsc();