2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
108 #include "opt_msgbuf.h"
110 #include "opt_xbox.h"
112 #include <sys/param.h>
113 #include <sys/systm.h>
114 #include <sys/kernel.h>
116 #include <sys/lock.h>
117 #include <sys/malloc.h>
118 #include <sys/mman.h>
119 #include <sys/msgbuf.h>
120 #include <sys/mutex.h>
121 #include <sys/proc.h>
122 #include <sys/sf_buf.h>
124 #include <sys/vmmeter.h>
125 #include <sys/sched.h>
126 #include <sys/sysctl.h>
132 #include <vm/vm_param.h>
133 #include <vm/vm_kern.h>
134 #include <vm/vm_page.h>
135 #include <vm/vm_map.h>
136 #include <vm/vm_object.h>
137 #include <vm/vm_extern.h>
138 #include <vm/vm_pageout.h>
139 #include <vm/vm_pager.h>
140 #include <vm/vm_reserv.h>
143 #include <machine/cpu.h>
144 #include <machine/cputypes.h>
145 #include <machine/md_var.h>
146 #include <machine/pcb.h>
147 #include <machine/specialreg.h>
149 #include <machine/smp.h>
153 #include <machine/xbox.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
164 #if !defined(DIAGNOSTIC)
165 #define PMAP_INLINE __gnu89_inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pa_index(pa) ((pa) >> PDRSHIFT)
178 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
181 * Get PDEs and PTEs for user/kernel address space
183 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
184 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
186 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
187 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
188 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
189 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
190 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
192 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
193 atomic_clear_int((u_int *)(pte), PG_W))
194 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
196 struct pmap kernel_pmap_store;
197 LIST_HEAD(pmaplist, pmap);
198 static struct pmaplist allpmaps;
199 static struct mtx allpmaps_lock;
201 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
202 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
203 int pgeflag = 0; /* PG_G or-in */
204 int pseflag = 0; /* PG_PS or-in */
207 vm_offset_t kernel_vm_end;
208 extern u_int32_t KERNend;
212 static uma_zone_t pdptzone;
215 static int pat_works = 0; /* Is page attribute table sane? */
217 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
219 static int pg_ps_enabled;
220 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0,
221 "Are large page mappings enabled?");
224 * Data for the pv entry allocation mechanism
226 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
227 static struct md_page *pv_table;
228 static int shpgperproc = PMAP_SHPGPERPROC;
230 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
231 int pv_maxchunks; /* How many chunks we have KVA for */
232 vm_offset_t pv_vafree; /* freelist stored in the PTE */
235 * All those kernel PT submaps that BSD is so fond of
244 static struct sysmaps sysmaps_pcpu[MAXCPU];
245 pt_entry_t *CMAP1 = 0;
246 static pt_entry_t *CMAP3;
247 caddr_t CADDR1 = 0, ptvmmap = 0;
248 static caddr_t CADDR3;
249 struct msgbuf *msgbufp = 0;
254 static caddr_t crashdumpmap;
256 static pt_entry_t *PMAP1 = 0, *PMAP2;
257 static pt_entry_t *PADDR1 = 0, *PADDR2;
260 static int PMAP1changedcpu;
261 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
263 "Number of times pmap_pte_quick changed CPU with same PMAP1");
265 static int PMAP1changed;
266 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
268 "Number of times pmap_pte_quick changed PMAP1");
269 static int PMAP1unchanged;
270 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
272 "Number of times pmap_pte_quick didn't change PMAP1");
273 static struct mtx PMAP2mutex;
275 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
276 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
277 static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
278 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
279 static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
280 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
281 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
283 static int pmap_pvh_wired_mappings(struct md_page *pvh, int count);
285 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
286 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
288 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
289 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
290 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
291 static void pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte);
292 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
293 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
294 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
295 static void pmap_pde_attr(pd_entry_t *pde, int cache_bits);
296 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
297 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
299 static void pmap_pte_attr(pt_entry_t *pte, int cache_bits);
300 static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
302 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
304 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
305 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
307 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
309 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
310 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
313 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
315 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
316 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
317 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
318 static void pmap_pte_release(pt_entry_t *pte);
319 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
320 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
322 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
325 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
326 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
329 * If you get an error here, then you set KVA_PAGES wrong! See the
330 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
331 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
333 CTASSERT(KERNBASE % (1 << 24) == 0);
336 * Move the kernel virtual free pointer to the next
337 * 4MB. This is used to help improve performance
338 * by using a large (4MB) page for much of the kernel
339 * (.text, .data, .bss)
342 pmap_kmem_choose(vm_offset_t addr)
344 vm_offset_t newaddr = addr;
347 if (cpu_feature & CPUID_PSE)
348 newaddr = (addr + PDRMASK) & ~PDRMASK;
354 * Bootstrap the system enough to run with virtual memory.
356 * On the i386 this is called after mapping has already been enabled
357 * and just syncs the pmap module with what has already been done.
358 * [We can't call it easily with mapping off since the kernel is not
359 * mapped with PA == VA, hence we would have to relocate every address
360 * from the linked base (virtual) address "KERNBASE" to the actual
361 * (physical) address starting relative to 0]
364 pmap_bootstrap(vm_paddr_t firstaddr)
367 pt_entry_t *pte, *unused;
368 struct sysmaps *sysmaps;
372 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
373 * large. It should instead be correctly calculated in locore.s and
374 * not based on 'first' (which is a physical address, not a virtual
375 * address, for the start of unused physical memory). The kernel
376 * page tables are NOT double mapped and thus should not be included
377 * in this calculation.
379 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
380 virtual_avail = pmap_kmem_choose(virtual_avail);
382 virtual_end = VM_MAX_KERNEL_ADDRESS;
385 * Initialize the kernel pmap (which is statically allocated).
387 PMAP_LOCK_INIT(kernel_pmap);
388 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
390 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
392 kernel_pmap->pm_root = NULL;
393 kernel_pmap->pm_active = -1; /* don't allow deactivation */
394 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
395 LIST_INIT(&allpmaps);
396 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
397 mtx_lock_spin(&allpmaps_lock);
398 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
399 mtx_unlock_spin(&allpmaps_lock);
403 * Reserve some special page table entries/VA space for temporary
406 #define SYSMAP(c, p, v, n) \
407 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
413 * CMAP1/CMAP2 are used for zeroing and copying pages.
414 * CMAP3 is used for the idle process page zeroing.
416 for (i = 0; i < MAXCPU; i++) {
417 sysmaps = &sysmaps_pcpu[i];
418 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
419 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
420 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
422 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
423 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
429 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
432 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
434 SYSMAP(caddr_t, unused, ptvmmap, 1)
437 * msgbufp is used to map the system message buffer.
439 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
442 * ptemap is used for pmap_pte_quick
444 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1);
445 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1);
447 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
454 * Leave in place an identity mapping (virt == phys) for the low 1 MB
455 * physical memory region that is used by the ACPI wakeup code. This
456 * mapping must not have PG_G set.
459 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
460 * an early stadium, we cannot yet neatly map video memory ... :-(
461 * Better fixes are very welcome! */
462 if (!arch_i386_is_xbox)
464 for (i = 1; i < NKPT; i++)
467 /* Initialize the PAT MSR if present. */
470 /* Turn on PG_G on kernel page(s) */
482 static int pat_tested = 0;
484 /* Bail if this CPU doesn't implement PAT. */
485 if (!(cpu_feature & CPUID_PAT))
489 * Due to some Intel errata, we can only safely use the lower 4
492 * Intel Pentium III Processor Specification Update
493 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
496 * Intel Pentium IV Processor Specification Update
497 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
499 * Some Apple Macs based on nVidia chipsets cannot enter ACPI mode
500 * via SMI# when we use upper 4 PAT entries for unknown reason.
503 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
504 (I386_CPU_FAMILY(cpu_id) == 6 &&
505 I386_CPU_MODEL(cpu_id) >= 0xe)) {
507 sysenv = getenv("smbios.system.product");
508 if (sysenv != NULL) {
509 if (strncmp(sysenv, "MacBook5,1", 10) == 0 ||
510 strncmp(sysenv, "MacBookPro5,5", 13) == 0 ||
511 strncmp(sysenv, "Macmini3,1", 10) == 0)
519 /* Initialize default PAT entries. */
520 pat_msr = PAT_VALUE(0, PAT_WRITE_BACK) |
521 PAT_VALUE(1, PAT_WRITE_THROUGH) |
522 PAT_VALUE(2, PAT_UNCACHED) |
523 PAT_VALUE(3, PAT_UNCACHEABLE) |
524 PAT_VALUE(4, PAT_WRITE_BACK) |
525 PAT_VALUE(5, PAT_WRITE_THROUGH) |
526 PAT_VALUE(6, PAT_UNCACHED) |
527 PAT_VALUE(7, PAT_UNCACHEABLE);
531 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
532 * Program 4 and 5 as WP and WC.
533 * Leave 6 and 7 as UC and UC-.
535 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
536 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
537 PAT_VALUE(5, PAT_WRITE_COMBINING);
540 * Just replace PAT Index 2 with WC instead of UC-.
542 pat_msr &= ~PAT_MASK(2);
543 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
545 wrmsr(MSR_PAT, pat_msr);
549 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
556 vm_offset_t va, endva;
563 endva = KERNBASE + KERNend;
566 va = KERNBASE + KERNLOAD;
568 pdir = kernel_pmap->pm_pdir[KPTDI+i];
570 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir;
571 invltlb(); /* Play it safe, invltlb() every time */
576 va = (vm_offset_t)btext;
581 invltlb(); /* Play it safe, invltlb() every time */
588 * Initialize a vm_page's machine-dependent fields.
591 pmap_page_init(vm_page_t m)
594 TAILQ_INIT(&m->md.pv_list);
595 m->md.pat_mode = PAT_WRITE_BACK;
600 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
603 /* Inform UMA that this allocator uses kernel_map/object. */
604 *flags = UMA_SLAB_KERNEL;
605 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
606 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
611 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
613 * - Must deal with pages in order to ensure that none of the PG_* bits
614 * are ever set, PG_V in particular.
615 * - Assumes we can write to ptes without pte_store() atomic ops, even
616 * on PAE systems. This should be ok.
617 * - Assumes nothing will ever test these addresses for 0 to indicate
618 * no mapping instead of correctly checking PG_V.
619 * - Assumes a vm_offset_t will fit in a pte (true for i386).
620 * Because PG_V is never set, there can be no mappings to invalidate.
623 pmap_ptelist_alloc(vm_offset_t *head)
630 return (va); /* Out of memory */
634 panic("pmap_ptelist_alloc: va with PG_V set!");
640 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
645 panic("pmap_ptelist_free: freeing va with PG_V set!");
647 *pte = *head; /* virtual! PG_V is 0 though */
652 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
658 for (i = npages - 1; i >= 0; i--) {
659 va = (vm_offset_t)base + i * PAGE_SIZE;
660 pmap_ptelist_free(head, va);
666 * Initialize the pmap module.
667 * Called by vm_init, to initialize any structures that the pmap
668 * system needs to map virtual memory.
678 * Initialize the vm page array entries for the kernel pmap's
681 for (i = 0; i < nkpt; i++) {
682 mpte = PHYS_TO_VM_PAGE(PTD[i + KPTDI] & PG_FRAME);
683 KASSERT(mpte >= vm_page_array &&
684 mpte < &vm_page_array[vm_page_array_size],
685 ("pmap_init: page table page is out of range"));
686 mpte->pindex = i + KPTDI;
687 mpte->phys_addr = PTD[i + KPTDI] & PG_FRAME;
691 * Initialize the address space (zone) for the pv entries. Set a
692 * high water mark so that the system can recover from excessive
693 * numbers of pv entries.
695 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
696 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
697 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
698 pv_entry_max = roundup(pv_entry_max, _NPCPV);
699 pv_entry_high_water = 9 * (pv_entry_max / 10);
702 * Are large page mappings enabled?
704 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
707 * Calculate the size of the pv head table for superpages.
709 for (i = 0; phys_avail[i + 1]; i += 2);
710 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
713 * Allocate memory for the pv head table for superpages.
715 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
717 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
718 for (i = 0; i < pv_npg; i++)
719 TAILQ_INIT(&pv_table[i].pv_list);
721 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
722 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
723 PAGE_SIZE * pv_maxchunks);
724 if (pv_chunkbase == NULL)
725 panic("pmap_init: not enough kvm for pv chunks");
726 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
728 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
729 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
730 UMA_ZONE_VM | UMA_ZONE_NOFREE);
731 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
736 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
737 "Max number of PV entries");
738 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
739 "Page share factor per proc");
741 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
742 "2/4MB page mapping counters");
744 static u_long pmap_pde_demotions;
745 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
746 &pmap_pde_demotions, 0, "2/4MB page demotions");
748 static u_long pmap_pde_mappings;
749 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
750 &pmap_pde_mappings, 0, "2/4MB page mappings");
752 static u_long pmap_pde_p_failures;
753 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
754 &pmap_pde_p_failures, 0, "2/4MB page promotion failures");
756 static u_long pmap_pde_promotions;
757 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
758 &pmap_pde_promotions, 0, "2/4MB page promotions");
760 /***************************************************
761 * Low level helper routines.....
762 ***************************************************/
765 * Determine the appropriate bits to set in a PTE or PDE for a specified
769 pmap_cache_bits(int mode, boolean_t is_pde)
771 int pat_flag, pat_index, cache_bits;
773 /* The PAT bit is different for PTE's and PDE's. */
774 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
776 /* If we don't support PAT, map extended modes to older ones. */
777 if (!(cpu_feature & CPUID_PAT)) {
779 case PAT_UNCACHEABLE:
780 case PAT_WRITE_THROUGH:
784 case PAT_WRITE_COMBINING:
785 case PAT_WRITE_PROTECTED:
786 mode = PAT_UNCACHEABLE;
791 /* Map the caching mode to a PAT index. */
794 case PAT_UNCACHEABLE:
797 case PAT_WRITE_THROUGH:
806 case PAT_WRITE_COMBINING:
809 case PAT_WRITE_PROTECTED:
813 panic("Unknown caching mode %d\n", mode);
818 case PAT_UNCACHEABLE:
819 case PAT_WRITE_PROTECTED:
822 case PAT_WRITE_THROUGH:
828 case PAT_WRITE_COMBINING:
832 panic("Unknown caching mode %d\n", mode);
836 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
839 cache_bits |= pat_flag;
841 cache_bits |= PG_NC_PCD;
843 cache_bits |= PG_NC_PWT;
848 * For SMP, these functions have to use the IPI mechanism for coherence.
850 * N.B.: Before calling any of the following TLB invalidation functions,
851 * the calling processor must ensure that all stores updating a non-
852 * kernel page table are globally performed. Otherwise, another
853 * processor could cache an old, pre-update entry without being
854 * invalidated. This can happen one of two ways: (1) The pmap becomes
855 * active on another processor after its pm_active field is checked by
856 * one of the following functions but before a store updating the page
857 * table is globally performed. (2) The pmap becomes active on another
858 * processor before its pm_active field is checked but due to
859 * speculative loads one of the following functions stills reads the
860 * pmap as inactive on the other processor.
862 * The kernel page table is exempt because its pm_active field is
863 * immutable. The kernel page table is always active on every
867 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
873 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
877 cpumask = PCPU_GET(cpumask);
878 other_cpus = PCPU_GET(other_cpus);
879 if (pmap->pm_active & cpumask)
881 if (pmap->pm_active & other_cpus)
882 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
888 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
895 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
896 for (addr = sva; addr < eva; addr += PAGE_SIZE)
898 smp_invlpg_range(sva, eva);
900 cpumask = PCPU_GET(cpumask);
901 other_cpus = PCPU_GET(other_cpus);
902 if (pmap->pm_active & cpumask)
903 for (addr = sva; addr < eva; addr += PAGE_SIZE)
905 if (pmap->pm_active & other_cpus)
906 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
913 pmap_invalidate_all(pmap_t pmap)
919 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
923 cpumask = PCPU_GET(cpumask);
924 other_cpus = PCPU_GET(other_cpus);
925 if (pmap->pm_active & cpumask)
927 if (pmap->pm_active & other_cpus)
928 smp_masked_invltlb(pmap->pm_active & other_cpus);
934 pmap_invalidate_cache(void)
944 * Normal, non-SMP, 486+ invalidation functions.
945 * We inline these within pmap.c for speed.
948 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
951 if (pmap == kernel_pmap || pmap->pm_active)
956 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
960 if (pmap == kernel_pmap || pmap->pm_active)
961 for (addr = sva; addr < eva; addr += PAGE_SIZE)
966 pmap_invalidate_all(pmap_t pmap)
969 if (pmap == kernel_pmap || pmap->pm_active)
974 pmap_invalidate_cache(void)
982 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
985 KASSERT((sva & PAGE_MASK) == 0,
986 ("pmap_invalidate_cache_range: sva not page-aligned"));
987 KASSERT((eva & PAGE_MASK) == 0,
988 ("pmap_invalidate_cache_range: eva not page-aligned"));
990 if (cpu_feature & CPUID_SS)
991 ; /* If "Self Snoop" is supported, do nothing. */
992 else if (cpu_feature & CPUID_CLFSH) {
995 * Otherwise, do per-cache line flush. Use the mfence
996 * instruction to insure that previous stores are
997 * included in the write-back. The processor
998 * propagates flush to other processors in the cache
1002 for (; sva < eva; sva += cpu_clflush_line_size)
1008 * No targeted cache flush methods are supported by CPU,
1009 * globally invalidate cache as a last resort.
1011 pmap_invalidate_cache();
1016 * Are we current address space or kernel? N.B. We return FALSE when
1017 * a pmap's page table is in use because a kernel thread is borrowing
1018 * it. The borrowed page table can change spontaneously, making any
1019 * dependence on its continued use subject to a race condition.
1022 pmap_is_current(pmap_t pmap)
1025 return (pmap == kernel_pmap ||
1026 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
1027 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
1031 * If the given pmap is not the current or kernel pmap, the returned pte must
1032 * be released by passing it to pmap_pte_release().
1035 pmap_pte(pmap_t pmap, vm_offset_t va)
1040 pde = pmap_pde(pmap, va);
1044 /* are we current address space or kernel? */
1045 if (pmap_is_current(pmap))
1046 return (vtopte(va));
1047 mtx_lock(&PMAP2mutex);
1048 newpf = *pde & PG_FRAME;
1049 if ((*PMAP2 & PG_FRAME) != newpf) {
1050 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
1051 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
1053 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1059 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1062 static __inline void
1063 pmap_pte_release(pt_entry_t *pte)
1066 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
1067 mtx_unlock(&PMAP2mutex);
1070 static __inline void
1071 invlcaddr(void *caddr)
1074 invlpg((u_int)caddr);
1078 * Super fast pmap_pte routine best used when scanning
1079 * the pv lists. This eliminates many coarse-grained
1080 * invltlb calls. Note that many of the pv list
1081 * scans are across different pmaps. It is very wasteful
1082 * to do an entire invltlb for checking a single mapping.
1084 * If the given pmap is not the current pmap, vm_page_queue_mtx
1085 * must be held and curthread pinned to a CPU.
1088 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1093 pde = pmap_pde(pmap, va);
1097 /* are we current address space or kernel? */
1098 if (pmap_is_current(pmap))
1099 return (vtopte(va));
1100 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1101 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1102 newpf = *pde & PG_FRAME;
1103 if ((*PMAP1 & PG_FRAME) != newpf) {
1104 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
1106 PMAP1cpu = PCPU_GET(cpuid);
1112 if (PMAP1cpu != PCPU_GET(cpuid)) {
1113 PMAP1cpu = PCPU_GET(cpuid);
1119 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1125 * Routine: pmap_extract
1127 * Extract the physical page address associated
1128 * with the given map/virtual_address pair.
1131 pmap_extract(pmap_t pmap, vm_offset_t va)
1139 pde = pmap->pm_pdir[va >> PDRSHIFT];
1141 if ((pde & PG_PS) != 0)
1142 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
1144 pte = pmap_pte(pmap, va);
1145 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1146 pmap_pte_release(pte);
1154 * Routine: pmap_extract_and_hold
1156 * Atomically extract and hold the physical page
1157 * with the given pmap and virtual address pair
1158 * if that mapping permits the given protection.
1161 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1168 vm_page_lock_queues();
1170 pde = *pmap_pde(pmap, va);
1173 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1174 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1180 pte = *pmap_pte_quick(pmap, va);
1182 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1183 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1189 vm_page_unlock_queues();
1194 /***************************************************
1195 * Low level mapping routines.....
1196 ***************************************************/
1199 * Add a wired page to the kva.
1200 * Note: not SMP coherent.
1203 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1208 pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1211 static __inline void
1212 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1217 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1221 * Remove a page from the kernel pagetables.
1222 * Note: not SMP coherent.
1225 pmap_kremove(vm_offset_t va)
1234 * Used to map a range of physical addresses into kernel
1235 * virtual address space.
1237 * The value passed in '*virt' is a suggested virtual address for
1238 * the mapping. Architectures which can support a direct-mapped
1239 * physical to virtual region can return the appropriate address
1240 * within that region, leaving '*virt' unchanged. Other
1241 * architectures should map the pages starting at '*virt' and
1242 * update '*virt' with the first usable address after the mapped
1246 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1248 vm_offset_t va, sva;
1251 while (start < end) {
1252 pmap_kenter(va, start);
1256 pmap_invalidate_range(kernel_pmap, sva, va);
1263 * Add a list of wired pages to the kva
1264 * this routine is only used for temporary
1265 * kernel mappings that do not need to have
1266 * page modification or references recorded.
1267 * Note that old mappings are simply written
1268 * over. The page *must* be wired.
1269 * Note: SMP coherent. Uses a ranged shootdown IPI.
1272 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1274 pt_entry_t *endpte, oldpte, *pte;
1278 endpte = pte + count;
1279 while (pte < endpte) {
1281 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag |
1282 pmap_cache_bits((*ma)->md.pat_mode, 0) | PG_RW | PG_V);
1286 if ((oldpte & PG_V) != 0)
1287 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1292 * This routine tears out page mappings from the
1293 * kernel -- it is meant only for temporary mappings.
1294 * Note: SMP coherent. Uses a ranged shootdown IPI.
1297 pmap_qremove(vm_offset_t sva, int count)
1302 while (count-- > 0) {
1306 pmap_invalidate_range(kernel_pmap, sva, va);
1309 /***************************************************
1310 * Page table page management routines.....
1311 ***************************************************/
1312 static __inline void
1313 pmap_free_zero_pages(vm_page_t free)
1317 while (free != NULL) {
1320 /* Preserve the page's PG_ZERO setting. */
1321 vm_page_free_toq(m);
1326 * Schedule the specified unused page table page to be freed. Specifically,
1327 * add the page to the specified list of pages that will be released to the
1328 * physical memory manager after the TLB has been updated.
1330 static __inline void
1331 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
1335 m->flags |= PG_ZERO;
1337 m->flags &= ~PG_ZERO;
1343 * Inserts the specified page table page into the specified pmap's collection
1344 * of idle page table pages. Each of a pmap's page table pages is responsible
1345 * for mapping a distinct range of virtual addresses. The pmap's collection is
1346 * ordered by this virtual address range.
1349 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
1353 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1354 root = pmap->pm_root;
1359 root = vm_page_splay(mpte->pindex, root);
1360 if (mpte->pindex < root->pindex) {
1361 mpte->left = root->left;
1364 } else if (mpte->pindex == root->pindex)
1365 panic("pmap_insert_pt_page: pindex already inserted");
1367 mpte->right = root->right;
1372 pmap->pm_root = mpte;
1376 * Looks for a page table page mapping the specified virtual address in the
1377 * specified pmap's collection of idle page table pages. Returns NULL if there
1378 * is no page table page corresponding to the specified virtual address.
1381 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
1384 vm_pindex_t pindex = va >> PDRSHIFT;
1386 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1387 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
1388 mpte = vm_page_splay(pindex, mpte);
1389 if ((pmap->pm_root = mpte)->pindex != pindex)
1396 * Removes the specified page table page from the specified pmap's collection
1397 * of idle page table pages. The specified page table page must be a member of
1398 * the pmap's collection.
1401 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
1405 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1406 if (mpte != pmap->pm_root)
1407 vm_page_splay(mpte->pindex, pmap->pm_root);
1408 if (mpte->left == NULL)
1411 root = vm_page_splay(mpte->pindex, mpte->left);
1412 root->right = mpte->right;
1414 pmap->pm_root = root;
1418 * This routine unholds page table pages, and if the hold count
1419 * drops to zero, then it decrements the wire count.
1422 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1426 if (m->wire_count == 0)
1427 return _pmap_unwire_pte_hold(pmap, m, free);
1433 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1438 * unmap the page table page
1440 pmap->pm_pdir[m->pindex] = 0;
1441 --pmap->pm_stats.resident_count;
1444 * This is a release store so that the ordinary store unmapping
1445 * the page table page is globally performed before TLB shoot-
1448 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1451 * Do an invltlb to make the invalidated mapping
1452 * take effect immediately.
1454 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1455 pmap_invalidate_page(pmap, pteva);
1458 * Put page on a list so that it is released after
1459 * *ALL* TLB shootdown is done
1461 pmap_add_delayed_free_list(m, free, TRUE);
1467 * After removing a page table entry, this routine is used to
1468 * conditionally free the page, and manage the hold/wire counts.
1471 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1476 if (va >= VM_MAXUSER_ADDRESS)
1478 ptepde = *pmap_pde(pmap, va);
1479 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1480 return pmap_unwire_pte_hold(pmap, mpte, free);
1484 pmap_pinit0(pmap_t pmap)
1487 PMAP_LOCK_INIT(pmap);
1488 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1490 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1492 pmap->pm_root = NULL;
1493 pmap->pm_active = 0;
1494 PCPU_SET(curpmap, pmap);
1495 TAILQ_INIT(&pmap->pm_pvchunk);
1496 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1497 mtx_lock_spin(&allpmaps_lock);
1498 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1499 mtx_unlock_spin(&allpmaps_lock);
1503 * Initialize a preallocated and zeroed pmap structure,
1504 * such as one in a vmspace structure.
1507 pmap_pinit(pmap_t pmap)
1509 vm_page_t m, ptdpg[NPGPTD];
1514 PMAP_LOCK_INIT(pmap);
1517 * No need to allocate page table space yet but we do need a valid
1518 * page directory table.
1520 if (pmap->pm_pdir == NULL) {
1521 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1524 if (pmap->pm_pdir == NULL) {
1525 PMAP_LOCK_DESTROY(pmap);
1529 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1530 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1531 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1532 ("pmap_pinit: pdpt misaligned"));
1533 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1534 ("pmap_pinit: pdpt above 4g"));
1536 pmap->pm_root = NULL;
1538 KASSERT(pmap->pm_root == NULL,
1539 ("pmap_pinit: pmap has reserved page table page(s)"));
1542 * allocate the page directory page(s)
1544 for (i = 0; i < NPGPTD;) {
1545 m = vm_page_alloc(NULL, color++,
1546 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1555 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1557 for (i = 0; i < NPGPTD; i++) {
1558 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1559 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE);
1562 mtx_lock_spin(&allpmaps_lock);
1563 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1564 mtx_unlock_spin(&allpmaps_lock);
1565 /* Wire in kernel global address entries. */
1566 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1568 /* install self-referential address mapping entry(s) */
1569 for (i = 0; i < NPGPTD; i++) {
1570 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1571 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1573 pmap->pm_pdpt[i] = pa | PG_V;
1577 pmap->pm_active = 0;
1578 TAILQ_INIT(&pmap->pm_pvchunk);
1579 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1585 * this routine is called if the page table page is not
1589 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1594 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1595 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1596 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1599 * Allocate a page table page.
1601 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1602 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1603 if (flags & M_WAITOK) {
1605 vm_page_unlock_queues();
1607 vm_page_lock_queues();
1612 * Indicate the need to retry. While waiting, the page table
1613 * page may have been allocated.
1617 if ((m->flags & PG_ZERO) == 0)
1621 * Map the pagetable page into the process address space, if
1622 * it isn't already there.
1625 pmap->pm_stats.resident_count++;
1627 ptepa = VM_PAGE_TO_PHYS(m);
1628 pmap->pm_pdir[ptepindex] =
1629 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1635 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1641 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1642 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1643 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1646 * Calculate pagetable page index
1648 ptepindex = va >> PDRSHIFT;
1651 * Get the page directory entry
1653 ptepa = pmap->pm_pdir[ptepindex];
1656 * This supports switching from a 4MB page to a
1659 if (ptepa & PG_PS) {
1660 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va);
1661 ptepa = pmap->pm_pdir[ptepindex];
1665 * If the page table page is mapped, we just increment the
1666 * hold count, and activate it.
1669 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
1673 * Here if the pte page isn't mapped, or if it has
1676 m = _pmap_allocpte(pmap, ptepindex, flags);
1677 if (m == NULL && (flags & M_WAITOK))
1684 /***************************************************
1685 * Pmap allocation/deallocation routines.
1686 ***************************************************/
1690 * Deal with a SMP shootdown of other users of the pmap that we are
1691 * trying to dispose of. This can be a bit hairy.
1693 static cpumask_t *lazymask;
1694 static u_int lazyptd;
1695 static volatile u_int lazywait;
1697 void pmap_lazyfix_action(void);
1700 pmap_lazyfix_action(void)
1702 cpumask_t mymask = PCPU_GET(cpumask);
1705 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1707 if (rcr3() == lazyptd)
1708 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1709 atomic_clear_int(lazymask, mymask);
1710 atomic_store_rel_int(&lazywait, 1);
1714 pmap_lazyfix_self(cpumask_t mymask)
1717 if (rcr3() == lazyptd)
1718 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1719 atomic_clear_int(lazymask, mymask);
1724 pmap_lazyfix(pmap_t pmap)
1726 cpumask_t mymask, mask;
1729 while ((mask = pmap->pm_active) != 0) {
1731 mask = mask & -mask; /* Find least significant set bit */
1732 mtx_lock_spin(&smp_ipi_mtx);
1734 lazyptd = vtophys(pmap->pm_pdpt);
1736 lazyptd = vtophys(pmap->pm_pdir);
1738 mymask = PCPU_GET(cpumask);
1739 if (mask == mymask) {
1740 lazymask = &pmap->pm_active;
1741 pmap_lazyfix_self(mymask);
1743 atomic_store_rel_int((u_int *)&lazymask,
1744 (u_int)&pmap->pm_active);
1745 atomic_store_rel_int(&lazywait, 0);
1746 ipi_selected(mask, IPI_LAZYPMAP);
1747 while (lazywait == 0) {
1753 mtx_unlock_spin(&smp_ipi_mtx);
1755 printf("pmap_lazyfix: spun for 50000000\n");
1762 * Cleaning up on uniprocessor is easy. For various reasons, we're
1763 * unlikely to have to even execute this code, including the fact
1764 * that the cleanup is deferred until the parent does a wait(2), which
1765 * means that another userland process has run.
1768 pmap_lazyfix(pmap_t pmap)
1772 cr3 = vtophys(pmap->pm_pdir);
1773 if (cr3 == rcr3()) {
1774 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1775 pmap->pm_active &= ~(PCPU_GET(cpumask));
1781 * Release any resources held by the given physical map.
1782 * Called when a pmap initialized by pmap_pinit is being released.
1783 * Should only be called if the map contains no valid mappings.
1786 pmap_release(pmap_t pmap)
1788 vm_page_t m, ptdpg[NPGPTD];
1791 KASSERT(pmap->pm_stats.resident_count == 0,
1792 ("pmap_release: pmap resident count %ld != 0",
1793 pmap->pm_stats.resident_count));
1794 KASSERT(pmap->pm_root == NULL,
1795 ("pmap_release: pmap has reserved page table page(s)"));
1798 mtx_lock_spin(&allpmaps_lock);
1799 LIST_REMOVE(pmap, pm_list);
1800 mtx_unlock_spin(&allpmaps_lock);
1802 for (i = 0; i < NPGPTD; i++)
1803 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] &
1806 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1807 sizeof(*pmap->pm_pdir));
1809 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1811 for (i = 0; i < NPGPTD; i++) {
1814 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1815 ("pmap_release: got wrong ptd page"));
1818 atomic_subtract_int(&cnt.v_wire_count, 1);
1819 vm_page_free_zero(m);
1821 PMAP_LOCK_DESTROY(pmap);
1825 kvm_size(SYSCTL_HANDLER_ARGS)
1827 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1829 return sysctl_handle_long(oidp, &ksize, 0, req);
1831 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1832 0, 0, kvm_size, "IU", "Size of KVM");
1835 kvm_free(SYSCTL_HANDLER_ARGS)
1837 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1839 return sysctl_handle_long(oidp, &kfree, 0, req);
1841 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1842 0, 0, kvm_free, "IU", "Amount of KVM free");
1845 * grow the number of kernel page table entries, if needed
1848 pmap_growkernel(vm_offset_t addr)
1851 vm_paddr_t ptppaddr;
1856 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1857 if (kernel_vm_end == 0) {
1858 kernel_vm_end = KERNBASE;
1860 while (pdir_pde(PTD, kernel_vm_end)) {
1861 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1863 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1864 kernel_vm_end = kernel_map->max_offset;
1869 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1870 if (addr - 1 >= kernel_map->max_offset)
1871 addr = kernel_map->max_offset;
1872 while (kernel_vm_end < addr) {
1873 if (pdir_pde(PTD, kernel_vm_end)) {
1874 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1875 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1876 kernel_vm_end = kernel_map->max_offset;
1882 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
1883 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1886 panic("pmap_growkernel: no memory to grow kernel");
1890 if ((nkpg->flags & PG_ZERO) == 0)
1891 pmap_zero_page(nkpg);
1892 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1893 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1894 pdir_pde(PTD, kernel_vm_end) = newpdir;
1896 mtx_lock_spin(&allpmaps_lock);
1897 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1898 pde = pmap_pde(pmap, kernel_vm_end);
1899 pde_store(pde, newpdir);
1901 mtx_unlock_spin(&allpmaps_lock);
1902 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1903 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1904 kernel_vm_end = kernel_map->max_offset;
1911 /***************************************************
1912 * page management routines.
1913 ***************************************************/
1915 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1916 CTASSERT(_NPCM == 11);
1918 static __inline struct pv_chunk *
1919 pv_to_chunk(pv_entry_t pv)
1922 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
1925 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1927 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1928 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1930 static uint32_t pc_freemask[11] = {
1931 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1932 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1933 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1934 PC_FREE0_9, PC_FREE10
1937 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1938 "Current number of pv entries");
1941 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1943 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1944 "Current number of pv entry chunks");
1945 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1946 "Current number of pv entry chunks allocated");
1947 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1948 "Current number of pv entry chunks frees");
1949 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1950 "Number of times tried to get a chunk page but failed.");
1952 static long pv_entry_frees, pv_entry_allocs;
1953 static int pv_entry_spare;
1955 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1956 "Current number of pv entry frees");
1957 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1958 "Current number of pv entry allocs");
1959 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1960 "Current number of spare pv entries");
1962 static int pmap_collect_inactive, pmap_collect_active;
1964 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
1965 "Current number times pmap_collect called on inactive queue");
1966 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
1967 "Current number times pmap_collect called on active queue");
1971 * We are in a serious low memory condition. Resort to
1972 * drastic measures to free some pages so we can allocate
1973 * another pv entry chunk. This is normally called to
1974 * unmap inactive pages, and if necessary, active pages.
1977 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
1979 struct md_page *pvh;
1982 pt_entry_t *pte, tpte;
1983 pv_entry_t next_pv, pv;
1988 TAILQ_FOREACH(m, &vpq->pl, pageq) {
1989 if (m->hold_count || m->busy)
1991 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
1994 /* Avoid deadlock and lock recursion. */
1995 if (pmap > locked_pmap)
1997 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
1999 pmap->pm_stats.resident_count--;
2000 pde = pmap_pde(pmap, va);
2001 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
2002 " a 4mpage in page %p's pv list", m));
2003 pte = pmap_pte_quick(pmap, va);
2004 tpte = pte_load_clear(pte);
2005 KASSERT((tpte & PG_W) == 0,
2006 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
2008 vm_page_flag_set(m, PG_REFERENCED);
2009 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2012 pmap_unuse_pt(pmap, va, &free);
2013 pmap_invalidate_page(pmap, va);
2014 pmap_free_zero_pages(free);
2015 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2016 if (TAILQ_EMPTY(&m->md.pv_list)) {
2017 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2018 if (TAILQ_EMPTY(&pvh->pv_list))
2019 vm_page_flag_clear(m, PG_WRITEABLE);
2021 free_pv_entry(pmap, pv);
2022 if (pmap != locked_pmap)
2031 * free the pv_entry back to the free list
2034 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2037 struct pv_chunk *pc;
2038 int idx, field, bit;
2040 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2041 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2042 PV_STAT(pv_entry_frees++);
2043 PV_STAT(pv_entry_spare++);
2045 pc = pv_to_chunk(pv);
2046 idx = pv - &pc->pc_pventry[0];
2049 pc->pc_map[field] |= 1ul << bit;
2050 /* move to head of list */
2051 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2052 for (idx = 0; idx < _NPCM; idx++)
2053 if (pc->pc_map[idx] != pc_freemask[idx]) {
2054 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2057 PV_STAT(pv_entry_spare -= _NPCPV);
2058 PV_STAT(pc_chunk_count--);
2059 PV_STAT(pc_chunk_frees++);
2060 /* entire chunk is free, return it */
2061 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2062 pmap_qremove((vm_offset_t)pc, 1);
2063 vm_page_unwire(m, 0);
2065 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2069 * get a new pv_entry, allocating a block from the system
2073 get_pv_entry(pmap_t pmap, int try)
2075 static const struct timeval printinterval = { 60, 0 };
2076 static struct timeval lastprint;
2077 static vm_pindex_t colour;
2078 struct vpgqueues *pq;
2081 struct pv_chunk *pc;
2084 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2085 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2086 PV_STAT(pv_entry_allocs++);
2088 if (pv_entry_count > pv_entry_high_water)
2089 if (ratecheck(&lastprint, &printinterval))
2090 printf("Approaching the limit on PV entries, consider "
2091 "increasing either the vm.pmap.shpgperproc or the "
2092 "vm.pmap.pv_entry_max tunable.\n");
2095 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2097 for (field = 0; field < _NPCM; field++) {
2098 if (pc->pc_map[field]) {
2099 bit = bsfl(pc->pc_map[field]);
2103 if (field < _NPCM) {
2104 pv = &pc->pc_pventry[field * 32 + bit];
2105 pc->pc_map[field] &= ~(1ul << bit);
2106 /* If this was the last item, move it to tail */
2107 for (field = 0; field < _NPCM; field++)
2108 if (pc->pc_map[field] != 0) {
2109 PV_STAT(pv_entry_spare--);
2110 return (pv); /* not full, return */
2112 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2113 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2114 PV_STAT(pv_entry_spare--);
2119 * Access to the ptelist "pv_vafree" is synchronized by the page
2120 * queues lock. If "pv_vafree" is currently non-empty, it will
2121 * remain non-empty until pmap_ptelist_alloc() completes.
2123 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2124 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2125 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2128 PV_STAT(pc_chunk_tryfail++);
2132 * Reclaim pv entries: At first, destroy mappings to
2133 * inactive pages. After that, if a pv chunk entry
2134 * is still needed, destroy mappings to active pages.
2137 PV_STAT(pmap_collect_inactive++);
2138 pq = &vm_page_queues[PQ_INACTIVE];
2139 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2140 PV_STAT(pmap_collect_active++);
2141 pq = &vm_page_queues[PQ_ACTIVE];
2143 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2144 pmap_collect(pmap, pq);
2147 PV_STAT(pc_chunk_count++);
2148 PV_STAT(pc_chunk_allocs++);
2150 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2151 pmap_qenter((vm_offset_t)pc, &m, 1);
2153 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2154 for (field = 1; field < _NPCM; field++)
2155 pc->pc_map[field] = pc_freemask[field];
2156 pv = &pc->pc_pventry[0];
2157 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2158 PV_STAT(pv_entry_spare += _NPCPV - 1);
2162 static __inline pv_entry_t
2163 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2167 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2168 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
2169 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2170 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2178 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2180 struct md_page *pvh;
2182 vm_offset_t va_last;
2185 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2186 KASSERT((pa & PDRMASK) == 0,
2187 ("pmap_pv_demote_pde: pa is not 4mpage aligned"));
2190 * Transfer the 4mpage's pv entry for this mapping to the first
2193 pvh = pa_to_pvh(pa);
2194 va = trunc_4mpage(va);
2195 pv = pmap_pvh_remove(pvh, pmap, va);
2196 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
2197 m = PHYS_TO_VM_PAGE(pa);
2198 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2199 /* Instantiate the remaining NPTEPG - 1 pv entries. */
2200 va_last = va + NBPDR - PAGE_SIZE;
2203 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
2204 ("pmap_pv_demote_pde: page %p is not managed", m));
2206 pmap_insert_entry(pmap, va, m);
2207 } while (va < va_last);
2211 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2213 struct md_page *pvh;
2215 vm_offset_t va_last;
2218 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2219 KASSERT((pa & PDRMASK) == 0,
2220 ("pmap_pv_promote_pde: pa is not 4mpage aligned"));
2223 * Transfer the first page's pv entry for this mapping to the
2224 * 4mpage's pv list. Aside from avoiding the cost of a call
2225 * to get_pv_entry(), a transfer avoids the possibility that
2226 * get_pv_entry() calls pmap_collect() and that pmap_collect()
2227 * removes one of the mappings that is being promoted.
2229 m = PHYS_TO_VM_PAGE(pa);
2230 va = trunc_4mpage(va);
2231 pv = pmap_pvh_remove(&m->md, pmap, va);
2232 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
2233 pvh = pa_to_pvh(pa);
2234 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2235 /* Free the remaining NPTEPG - 1 pv entries. */
2236 va_last = va + NBPDR - PAGE_SIZE;
2240 pmap_pvh_free(&m->md, pmap, va);
2241 } while (va < va_last);
2245 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2249 pv = pmap_pvh_remove(pvh, pmap, va);
2250 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2251 free_pv_entry(pmap, pv);
2255 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2257 struct md_page *pvh;
2259 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2260 pmap_pvh_free(&m->md, pmap, va);
2261 if (TAILQ_EMPTY(&m->md.pv_list)) {
2262 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2263 if (TAILQ_EMPTY(&pvh->pv_list))
2264 vm_page_flag_clear(m, PG_WRITEABLE);
2269 * Create a pv entry for page at pa for
2273 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2277 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2278 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2279 pv = get_pv_entry(pmap, FALSE);
2281 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2285 * Conditionally create a pv entry.
2288 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2292 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2293 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2294 if (pv_entry_count < pv_entry_high_water &&
2295 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2297 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2304 * Create the pv entries for each of the pages within a superpage.
2307 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2309 struct md_page *pvh;
2312 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2313 if (pv_entry_count < pv_entry_high_water &&
2314 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2316 pvh = pa_to_pvh(pa);
2317 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2324 * Fills a page table page with mappings to consecutive physical pages.
2327 pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte)
2331 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
2333 newpte += PAGE_SIZE;
2338 * Tries to demote a 2- or 4MB page mapping. If demotion fails, the
2339 * 2- or 4MB page mapping is invalidated.
2342 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2344 pd_entry_t newpde, oldpde;
2345 pmap_t allpmaps_entry;
2346 pt_entry_t *firstpte, newpte;
2348 vm_page_t free, mpte;
2350 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2352 KASSERT((oldpde & (PG_PS | PG_V)) == (PG_PS | PG_V),
2353 ("pmap_demote_pde: oldpde is missing PG_PS and/or PG_V"));
2354 mpte = pmap_lookup_pt_page(pmap, va);
2356 pmap_remove_pt_page(pmap, mpte);
2358 KASSERT((oldpde & PG_W) == 0,
2359 ("pmap_demote_pde: page table page for a wired mapping"
2363 * Invalidate the 2- or 4MB page mapping and return
2364 * "failure" if the mapping was never accessed or the
2365 * allocation of the new page table page fails.
2367 if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc(NULL,
2368 va >> PDRSHIFT, VM_ALLOC_NOOBJ | VM_ALLOC_NORMAL |
2369 VM_ALLOC_WIRED)) == NULL) {
2371 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free);
2372 pmap_invalidate_page(pmap, trunc_4mpage(va));
2373 pmap_free_zero_pages(free);
2374 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x"
2375 " in pmap %p", va, pmap);
2378 if (va < VM_MAXUSER_ADDRESS)
2379 pmap->pm_stats.resident_count++;
2381 mptepa = VM_PAGE_TO_PHYS(mpte);
2384 * Temporarily map the page table page (mpte) into the kernel's
2385 * address space at either PADDR1 or PADDR2.
2387 if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) {
2388 if ((*PMAP1 & PG_FRAME) != mptepa) {
2389 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2391 PMAP1cpu = PCPU_GET(cpuid);
2397 if (PMAP1cpu != PCPU_GET(cpuid)) {
2398 PMAP1cpu = PCPU_GET(cpuid);
2406 mtx_lock(&PMAP2mutex);
2407 if ((*PMAP2 & PG_FRAME) != mptepa) {
2408 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2409 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
2413 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
2414 KASSERT((oldpde & PG_A) != 0,
2415 ("pmap_demote_pde: oldpde is missing PG_A"));
2416 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
2417 ("pmap_demote_pde: oldpde is missing PG_M"));
2418 newpte = oldpde & ~PG_PS;
2419 if ((newpte & PG_PDE_PAT) != 0)
2420 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
2423 * If the page table page is new, initialize it.
2425 if (mpte->wire_count == 1) {
2426 mpte->wire_count = NPTEPG;
2427 pmap_fill_ptp(firstpte, newpte);
2429 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
2430 ("pmap_demote_pde: firstpte and newpte map different physical"
2434 * If the mapping has changed attributes, update the page table
2437 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
2438 pmap_fill_ptp(firstpte, newpte);
2441 * Demote the mapping. This pmap is locked. The old PDE has
2442 * PG_A set. If the old PDE has PG_RW set, it also has PG_M
2443 * set. Thus, there is no danger of a race with another
2444 * processor changing the setting of PG_A and/or PG_M between
2445 * the read above and the store below.
2447 if (pmap == kernel_pmap) {
2449 * A harmless race exists between this loop and the bcopy()
2450 * in pmap_pinit() that initializes the kernel segment of
2451 * the new page table. Specifically, that bcopy() may copy
2452 * the new PDE from the PTD, which is first in allpmaps, to
2453 * the new page table before this loop updates that new
2456 mtx_lock_spin(&allpmaps_lock);
2457 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) {
2458 pde = pmap_pde(allpmaps_entry, va);
2459 KASSERT(*pde == newpde || (*pde & PG_PTE_PROMOTE) ==
2460 (oldpde & PG_PTE_PROMOTE),
2461 ("pmap_demote_pde: pde was %#jx, expected %#jx",
2462 (uintmax_t)*pde, (uintmax_t)oldpde));
2463 pde_store(pde, newpde);
2465 mtx_unlock_spin(&allpmaps_lock);
2467 pde_store(pde, newpde);
2468 if (firstpte == PADDR2)
2469 mtx_unlock(&PMAP2mutex);
2472 * Invalidate the recursive mapping of the page table page.
2474 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
2477 * Demote the pv entry. This depends on the earlier demotion
2478 * of the mapping. Specifically, the (re)creation of a per-
2479 * page pv entry might trigger the execution of pmap_collect(),
2480 * which might reclaim a newly (re)created per-page pv entry
2481 * and destroy the associated mapping. In order to destroy
2482 * the mapping, the PDE must have already changed from mapping
2483 * the 2mpage to referencing the page table page.
2485 if ((oldpde & PG_MANAGED) != 0)
2486 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
2488 pmap_pde_demotions++;
2489 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x"
2490 " in pmap %p", va, pmap);
2495 * pmap_remove_pde: do the things to unmap a superpage in a process
2498 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
2501 struct md_page *pvh;
2503 vm_offset_t eva, va;
2506 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2507 KASSERT((sva & PDRMASK) == 0,
2508 ("pmap_remove_pde: sva is not 4mpage aligned"));
2509 oldpde = pte_load_clear(pdq);
2511 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
2514 * Machines that don't support invlpg, also don't support
2518 pmap_invalidate_page(kernel_pmap, sva);
2519 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2520 if (oldpde & PG_MANAGED) {
2521 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
2522 pmap_pvh_free(pvh, pmap, sva);
2524 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2525 va < eva; va += PAGE_SIZE, m++) {
2526 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2529 vm_page_flag_set(m, PG_REFERENCED);
2530 if (TAILQ_EMPTY(&m->md.pv_list) &&
2531 TAILQ_EMPTY(&pvh->pv_list))
2532 vm_page_flag_clear(m, PG_WRITEABLE);
2535 if (pmap == kernel_pmap) {
2536 if (!pmap_demote_pde(pmap, pdq, sva))
2537 panic("pmap_remove_pde: failed demotion");
2539 mpte = pmap_lookup_pt_page(pmap, sva);
2541 pmap_remove_pt_page(pmap, mpte);
2542 pmap->pm_stats.resident_count--;
2543 KASSERT(mpte->wire_count == NPTEPG,
2544 ("pmap_remove_pde: pte page wire count error"));
2545 mpte->wire_count = 0;
2546 pmap_add_delayed_free_list(mpte, free, FALSE);
2547 atomic_subtract_int(&cnt.v_wire_count, 1);
2553 * pmap_remove_pte: do the things to unmap a page in a process
2556 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2561 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2562 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2563 oldpte = pte_load_clear(ptq);
2565 pmap->pm_stats.wired_count -= 1;
2567 * Machines that don't support invlpg, also don't support
2571 pmap_invalidate_page(kernel_pmap, va);
2572 pmap->pm_stats.resident_count -= 1;
2573 if (oldpte & PG_MANAGED) {
2574 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
2575 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2578 vm_page_flag_set(m, PG_REFERENCED);
2579 pmap_remove_entry(pmap, m, va);
2581 return (pmap_unuse_pt(pmap, va, free));
2585 * Remove a single page from a process address space
2588 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2592 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2593 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2594 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2595 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2597 pmap_remove_pte(pmap, pte, va, free);
2598 pmap_invalidate_page(pmap, va);
2602 * Remove the given range of addresses from the specified map.
2604 * It is assumed that the start and end are properly
2605 * rounded to the page size.
2608 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2613 vm_page_t free = NULL;
2617 * Perform an unsynchronized read. This is, however, safe.
2619 if (pmap->pm_stats.resident_count == 0)
2624 vm_page_lock_queues();
2629 * special handling of removing one page. a very
2630 * common operation and easy to short circuit some
2633 if ((sva + PAGE_SIZE == eva) &&
2634 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2635 pmap_remove_page(pmap, sva, &free);
2639 for (; sva < eva; sva = pdnxt) {
2643 * Calculate index for next page table.
2645 pdnxt = (sva + NBPDR) & ~PDRMASK;
2648 if (pmap->pm_stats.resident_count == 0)
2651 pdirindex = sva >> PDRSHIFT;
2652 ptpaddr = pmap->pm_pdir[pdirindex];
2655 * Weed out invalid mappings. Note: we assume that the page
2656 * directory table is always allocated, and in kernel virtual.
2662 * Check for large page.
2664 if ((ptpaddr & PG_PS) != 0) {
2666 * Are we removing the entire large page? If not,
2667 * demote the mapping and fall through.
2669 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2671 * The TLB entry for a PG_G mapping is
2672 * invalidated by pmap_remove_pde().
2674 if ((ptpaddr & PG_G) == 0)
2676 pmap_remove_pde(pmap,
2677 &pmap->pm_pdir[pdirindex], sva, &free);
2679 } else if (!pmap_demote_pde(pmap,
2680 &pmap->pm_pdir[pdirindex], sva)) {
2681 /* The large page mapping was destroyed. */
2687 * Limit our scan to either the end of the va represented
2688 * by the current page table page, or to the end of the
2689 * range being removed.
2694 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2700 * The TLB entry for a PG_G mapping is invalidated
2701 * by pmap_remove_pte().
2703 if ((*pte & PG_G) == 0)
2705 if (pmap_remove_pte(pmap, pte, sva, &free))
2712 pmap_invalidate_all(pmap);
2713 vm_page_unlock_queues();
2715 pmap_free_zero_pages(free);
2719 * Routine: pmap_remove_all
2721 * Removes this physical page from
2722 * all physical maps in which it resides.
2723 * Reflects back modify bits to the pager.
2726 * Original versions of this routine were very
2727 * inefficient because they iteratively called
2728 * pmap_remove (slow...)
2732 pmap_remove_all(vm_page_t m)
2734 struct md_page *pvh;
2737 pt_entry_t *pte, tpte;
2742 KASSERT((m->flags & PG_FICTITIOUS) == 0,
2743 ("pmap_remove_all: page %p is fictitious", m));
2744 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2746 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2747 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2751 pde = pmap_pde(pmap, va);
2752 (void)pmap_demote_pde(pmap, pde, va);
2755 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2758 pmap->pm_stats.resident_count--;
2759 pde = pmap_pde(pmap, pv->pv_va);
2760 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
2761 " a 4mpage in page %p's pv list", m));
2762 pte = pmap_pte_quick(pmap, pv->pv_va);
2763 tpte = pte_load_clear(pte);
2765 pmap->pm_stats.wired_count--;
2767 vm_page_flag_set(m, PG_REFERENCED);
2770 * Update the vm_page_t clean and reference bits.
2772 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2775 pmap_unuse_pt(pmap, pv->pv_va, &free);
2776 pmap_invalidate_page(pmap, pv->pv_va);
2777 pmap_free_zero_pages(free);
2778 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2779 free_pv_entry(pmap, pv);
2782 vm_page_flag_clear(m, PG_WRITEABLE);
2787 * pmap_protect_pde: do the things to protect a 4mpage in a process
2790 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
2792 pd_entry_t newpde, oldpde;
2793 vm_offset_t eva, va;
2795 boolean_t anychanged;
2797 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2798 KASSERT((sva & PDRMASK) == 0,
2799 ("pmap_protect_pde: sva is not 4mpage aligned"));
2802 oldpde = newpde = *pde;
2803 if (oldpde & PG_MANAGED) {
2805 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2806 va < eva; va += PAGE_SIZE, m++) {
2808 * In contrast to the analogous operation on a 4KB page
2809 * mapping, the mapping's PG_A flag is not cleared and
2810 * the page's PG_REFERENCED flag is not set. The
2811 * reason is that pmap_demote_pde() expects that a 2/4MB
2812 * page mapping with a stored page table page has PG_A
2815 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2819 if ((prot & VM_PROT_WRITE) == 0)
2820 newpde &= ~(PG_RW | PG_M);
2822 if ((prot & VM_PROT_EXECUTE) == 0)
2825 if (newpde != oldpde) {
2826 if (!pde_cmpset(pde, oldpde, newpde))
2829 pmap_invalidate_page(pmap, sva);
2833 return (anychanged);
2837 * Set the physical protection on the
2838 * specified range of this map as requested.
2841 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2848 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2849 pmap_remove(pmap, sva, eva);
2854 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2855 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2858 if (prot & VM_PROT_WRITE)
2864 vm_page_lock_queues();
2867 for (; sva < eva; sva = pdnxt) {
2868 pt_entry_t obits, pbits;
2871 pdnxt = (sva + NBPDR) & ~PDRMASK;
2875 pdirindex = sva >> PDRSHIFT;
2876 ptpaddr = pmap->pm_pdir[pdirindex];
2879 * Weed out invalid mappings. Note: we assume that the page
2880 * directory table is always allocated, and in kernel virtual.
2886 * Check for large page.
2888 if ((ptpaddr & PG_PS) != 0) {
2890 * Are we protecting the entire large page? If not,
2891 * demote the mapping and fall through.
2893 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2895 * The TLB entry for a PG_G mapping is
2896 * invalidated by pmap_protect_pde().
2898 if (pmap_protect_pde(pmap,
2899 &pmap->pm_pdir[pdirindex], sva, prot))
2902 } else if (!pmap_demote_pde(pmap,
2903 &pmap->pm_pdir[pdirindex], sva)) {
2904 /* The large page mapping was destroyed. */
2912 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2918 * Regardless of whether a pte is 32 or 64 bits in
2919 * size, PG_RW, PG_A, and PG_M are among the least
2920 * significant 32 bits.
2922 obits = pbits = *pte;
2923 if ((pbits & PG_V) == 0)
2925 if (pbits & PG_MANAGED) {
2928 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2929 vm_page_flag_set(m, PG_REFERENCED);
2932 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
2934 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2939 if ((prot & VM_PROT_WRITE) == 0)
2940 pbits &= ~(PG_RW | PG_M);
2942 if ((prot & VM_PROT_EXECUTE) == 0)
2946 if (pbits != obits) {
2948 if (!atomic_cmpset_64(pte, obits, pbits))
2951 if (!atomic_cmpset_int((u_int *)pte, obits,
2956 pmap_invalidate_page(pmap, sva);
2964 pmap_invalidate_all(pmap);
2965 vm_page_unlock_queues();
2970 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are
2971 * within a single page table page (PTP) to a single 2- or 4MB page mapping.
2972 * For promotion to occur, two conditions must be met: (1) the 4KB page
2973 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
2974 * mappings must have identical characteristics.
2976 * Managed (PG_MANAGED) mappings within the kernel address space are not
2977 * promoted. The reason is that kernel PDEs are replicated in each pmap but
2978 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel
2982 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2985 pmap_t allpmaps_entry;
2986 pt_entry_t *firstpte, oldpte, pa, *pte;
2987 vm_offset_t oldpteva;
2990 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2993 * Examine the first PTE in the specified PTP. Abort if this PTE is
2994 * either invalid, unused, or does not map the first 4KB physical page
2995 * within a 2- or 4MB page.
2997 firstpte = vtopte(trunc_4mpage(va));
3000 if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
3001 pmap_pde_p_failures++;
3002 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3003 " in pmap %p", va, pmap);
3006 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) {
3007 pmap_pde_p_failures++;
3008 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3009 " in pmap %p", va, pmap);
3012 if ((newpde & (PG_M | PG_RW)) == PG_RW) {
3014 * When PG_M is already clear, PG_RW can be cleared without
3015 * a TLB invalidation.
3017 if (!atomic_cmpset_int((u_int *)firstpte, newpde, newpde &
3024 * Examine each of the other PTEs in the specified PTP. Abort if this
3025 * PTE maps an unexpected 4KB physical page or does not have identical
3026 * characteristics to the first PTE.
3028 pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
3029 for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
3032 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
3033 pmap_pde_p_failures++;
3034 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3035 " in pmap %p", va, pmap);
3038 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
3040 * When PG_M is already clear, PG_RW can be cleared
3041 * without a TLB invalidation.
3043 if (!atomic_cmpset_int((u_int *)pte, oldpte,
3047 oldpteva = (oldpte & PG_FRAME & PDRMASK) |
3049 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x"
3050 " in pmap %p", oldpteva, pmap);
3052 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
3053 pmap_pde_p_failures++;
3054 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3055 " in pmap %p", va, pmap);
3062 * Save the page table page in its current state until the PDE
3063 * mapping the superpage is demoted by pmap_demote_pde() or
3064 * destroyed by pmap_remove_pde().
3066 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
3067 KASSERT(mpte >= vm_page_array &&
3068 mpte < &vm_page_array[vm_page_array_size],
3069 ("pmap_promote_pde: page table page is out of range"));
3070 KASSERT(mpte->pindex == va >> PDRSHIFT,
3071 ("pmap_promote_pde: page table page's pindex is wrong"));
3072 pmap_insert_pt_page(pmap, mpte);
3075 * Promote the pv entries.
3077 if ((newpde & PG_MANAGED) != 0)
3078 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
3081 * Propagate the PAT index to its proper position.
3083 if ((newpde & PG_PTE_PAT) != 0)
3084 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
3087 * Map the superpage.
3089 if (pmap == kernel_pmap) {
3090 mtx_lock_spin(&allpmaps_lock);
3091 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) {
3092 pde = pmap_pde(allpmaps_entry, va);
3093 pde_store(pde, PG_PS | newpde);
3095 mtx_unlock_spin(&allpmaps_lock);
3097 pde_store(pde, PG_PS | newpde);
3099 pmap_pde_promotions++;
3100 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x"
3101 " in pmap %p", va, pmap);
3105 * Insert the given physical page (p) at
3106 * the specified virtual address (v) in the
3107 * target physical map with the protection requested.
3109 * If specified, the page will be wired down, meaning
3110 * that the related pte can not be reclaimed.
3112 * NB: This is the only routine which MAY NOT lazy-evaluate
3113 * or lose information. That is, this routine must actually
3114 * insert this page into the given map NOW.
3117 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
3118 vm_prot_t prot, boolean_t wired)
3124 pt_entry_t origpte, newpte;
3128 va = trunc_page(va);
3129 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
3130 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
3131 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va));
3135 vm_page_lock_queues();
3140 * In the case that a page table page is not
3141 * resident, we are creating it here.
3143 if (va < VM_MAXUSER_ADDRESS) {
3144 mpte = pmap_allocpte(pmap, va, M_WAITOK);
3147 pde = pmap_pde(pmap, va);
3148 if ((*pde & PG_PS) != 0)
3149 panic("pmap_enter: attempted pmap_enter on 4MB page");
3150 pte = pmap_pte_quick(pmap, va);
3153 * Page Directory table entry not valid, we need a new PT page
3156 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
3157 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
3160 pa = VM_PAGE_TO_PHYS(m);
3163 opa = origpte & PG_FRAME;
3166 * Mapping has not changed, must be protection or wiring change.
3168 if (origpte && (opa == pa)) {
3170 * Wiring change, just update stats. We don't worry about
3171 * wiring PT pages as they remain resident as long as there
3172 * are valid mappings in them. Hence, if a user page is wired,
3173 * the PT page will be also.
3175 if (wired && ((origpte & PG_W) == 0))
3176 pmap->pm_stats.wired_count++;
3177 else if (!wired && (origpte & PG_W))
3178 pmap->pm_stats.wired_count--;
3181 * Remove extra pte reference
3187 * We might be turning off write access to the page,
3188 * so we go ahead and sense modify status.
3190 if (origpte & PG_MANAGED) {
3197 * Mapping has changed, invalidate old range and fall through to
3198 * handle validating new mapping.
3202 pmap->pm_stats.wired_count--;
3203 if (origpte & PG_MANAGED) {
3204 om = PHYS_TO_VM_PAGE(opa);
3205 pmap_remove_entry(pmap, om, va);
3209 KASSERT(mpte->wire_count > 0,
3210 ("pmap_enter: missing reference to page table page,"
3214 pmap->pm_stats.resident_count++;
3217 * Enter on the PV list if part of our managed memory.
3219 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3220 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3221 ("pmap_enter: managed mapping within the clean submap"));
3222 pmap_insert_entry(pmap, va, m);
3227 * Increment counters
3230 pmap->pm_stats.wired_count++;
3234 * Now validate mapping with desired protection/wiring.
3236 newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
3237 if ((prot & VM_PROT_WRITE) != 0) {
3239 vm_page_flag_set(m, PG_WRITEABLE);
3242 if ((prot & VM_PROT_EXECUTE) == 0)
3247 if (va < VM_MAXUSER_ADDRESS)
3249 if (pmap == kernel_pmap)
3253 * if the mapping or permission bits are different, we need
3254 * to update the pte.
3256 if ((origpte & ~(PG_M|PG_A)) != newpte) {
3258 if ((access & VM_PROT_WRITE) != 0)
3260 if (origpte & PG_V) {
3262 origpte = pte_load_store(pte, newpte);
3263 if (origpte & PG_A) {
3264 if (origpte & PG_MANAGED)
3265 vm_page_flag_set(om, PG_REFERENCED);
3266 if (opa != VM_PAGE_TO_PHYS(m))
3269 if ((origpte & PG_NX) == 0 &&
3270 (newpte & PG_NX) != 0)
3274 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3275 if ((origpte & PG_MANAGED) != 0)
3277 if ((prot & VM_PROT_WRITE) == 0)
3281 pmap_invalidate_page(pmap, va);
3283 pte_store(pte, newpte);
3287 * If both the page table page and the reservation are fully
3288 * populated, then attempt promotion.
3290 if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
3291 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
3292 pmap_promote_pde(pmap, pde, va);
3295 vm_page_unlock_queues();
3300 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and
3301 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without
3302 * blocking, (2) a mapping already exists at the specified virtual address, or
3303 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3306 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3308 pd_entry_t *pde, newpde;
3310 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3311 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3312 pde = pmap_pde(pmap, va);
3314 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3315 " in pmap %p", va, pmap);
3318 newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
3320 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3321 newpde |= PG_MANAGED;
3324 * Abort this mapping if its PV entry could not be created.
3326 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
3327 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3328 " in pmap %p", va, pmap);
3333 if ((prot & VM_PROT_EXECUTE) == 0)
3336 if (va < VM_MAXUSER_ADDRESS)
3340 * Increment counters.
3342 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3345 * Map the superpage.
3347 pde_store(pde, newpde);
3349 pmap_pde_mappings++;
3350 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
3351 " in pmap %p", va, pmap);
3356 * Maps a sequence of resident pages belonging to the same object.
3357 * The sequence begins with the given page m_start. This page is
3358 * mapped at the given virtual address start. Each subsequent page is
3359 * mapped at a virtual address that is offset from start by the same
3360 * amount as the page is offset from m_start within the object. The
3361 * last page in the sequence is the page with the largest offset from
3362 * m_start that can be mapped at a virtual address less than the given
3363 * virtual address end. Not every virtual page between start and end
3364 * is mapped; only those for which a resident page exists with the
3365 * corresponding offset from m_start are mapped.
3368 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3369 vm_page_t m_start, vm_prot_t prot)
3373 vm_pindex_t diff, psize;
3375 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
3376 psize = atop(end - start);
3380 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3381 va = start + ptoa(diff);
3382 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
3383 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
3384 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3385 pmap_enter_pde(pmap, va, m, prot))
3386 m = &m[NBPDR / PAGE_SIZE - 1];
3388 mpte = pmap_enter_quick_locked(pmap, va, m, prot,
3390 m = TAILQ_NEXT(m, listq);
3396 * this code makes some *MAJOR* assumptions:
3397 * 1. Current pmap & pmap exists.
3400 * 4. No page table pages.
3401 * but is *MUCH* faster than pmap_enter...
3405 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3409 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
3414 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3415 vm_prot_t prot, vm_page_t mpte)
3421 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3422 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
3423 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3424 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3425 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3428 * In the case that a page table page is not
3429 * resident, we are creating it here.
3431 if (va < VM_MAXUSER_ADDRESS) {
3436 * Calculate pagetable page index
3438 ptepindex = va >> PDRSHIFT;
3439 if (mpte && (mpte->pindex == ptepindex)) {
3443 * Get the page directory entry
3445 ptepa = pmap->pm_pdir[ptepindex];
3448 * If the page table page is mapped, we just increment
3449 * the hold count, and activate it.
3454 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
3457 mpte = _pmap_allocpte(pmap, ptepindex,
3468 * This call to vtopte makes the assumption that we are
3469 * entering the page into the current pmap. In order to support
3470 * quick entry into any pmap, one would likely use pmap_pte_quick.
3471 * But that isn't as quick as vtopte.
3483 * Enter on the PV list if part of our managed memory.
3485 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
3486 !pmap_try_insert_pv_entry(pmap, va, m)) {
3489 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3490 pmap_invalidate_page(pmap, va);
3491 pmap_free_zero_pages(free);
3500 * Increment counters
3502 pmap->pm_stats.resident_count++;
3504 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
3506 if ((prot & VM_PROT_EXECUTE) == 0)
3511 * Now validate mapping with RO protection
3513 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3514 pte_store(pte, pa | PG_V | PG_U);
3516 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3521 * Make a temporary mapping for a physical address. This is only intended
3522 * to be used for panic dumps.
3525 pmap_kenter_temporary(vm_paddr_t pa, int i)
3529 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3530 pmap_kenter(va, pa);
3532 return ((void *)crashdumpmap);
3536 * This code maps large physical mmap regions into the
3537 * processor address space. Note that some shortcuts
3538 * are taken, but the code works.
3541 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3542 vm_pindex_t pindex, vm_size_t size)
3545 vm_paddr_t pa, ptepa;
3549 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3550 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3551 ("pmap_object_init_pt: non-device object"));
3553 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3554 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3556 p = vm_page_lookup(object, pindex);
3557 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3558 ("pmap_object_init_pt: invalid page %p", p));
3559 pat_mode = p->md.pat_mode;
3562 * Abort the mapping if the first page is not physically
3563 * aligned to a 2/4MB page boundary.
3565 ptepa = VM_PAGE_TO_PHYS(p);
3566 if (ptepa & (NBPDR - 1))
3570 * Skip the first page. Abort the mapping if the rest of
3571 * the pages are not physically contiguous or have differing
3572 * memory attributes.
3574 p = TAILQ_NEXT(p, listq);
3575 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3577 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3578 ("pmap_object_init_pt: invalid page %p", p));
3579 if (pa != VM_PAGE_TO_PHYS(p) ||
3580 pat_mode != p->md.pat_mode)
3582 p = TAILQ_NEXT(p, listq);
3586 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3587 * "size" is a multiple of 2/4M, adding the PAT setting to
3588 * "pa" will not affect the termination of this loop.
3591 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3592 size; pa += NBPDR) {
3593 pde = pmap_pde(pmap, addr);
3595 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3596 PG_U | PG_RW | PG_V);
3597 pmap->pm_stats.resident_count += NBPDR /
3599 pmap_pde_mappings++;
3601 /* Else continue on if the PDE is already valid. */
3609 * Routine: pmap_change_wiring
3610 * Function: Change the wiring attribute for a map/virtual-address
3612 * In/out conditions:
3613 * The mapping must already exist in the pmap.
3616 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3620 boolean_t are_queues_locked;
3622 are_queues_locked = FALSE;
3625 pde = pmap_pde(pmap, va);
3626 if ((*pde & PG_PS) != 0) {
3627 if (!wired != ((*pde & PG_W) == 0)) {
3628 if (!are_queues_locked) {
3629 are_queues_locked = TRUE;
3630 if (!mtx_trylock(&vm_page_queue_mtx)) {
3632 vm_page_lock_queues();
3636 if (!pmap_demote_pde(pmap, pde, va))
3637 panic("pmap_change_wiring: demotion failed");
3641 pte = pmap_pte(pmap, va);
3643 if (wired && !pmap_pte_w(pte))
3644 pmap->pm_stats.wired_count++;
3645 else if (!wired && pmap_pte_w(pte))
3646 pmap->pm_stats.wired_count--;
3649 * Wiring is not a hardware characteristic so there is no need to
3652 pmap_pte_set_w(pte, wired);
3653 pmap_pte_release(pte);
3655 if (are_queues_locked)
3656 vm_page_unlock_queues();
3663 * Copy the range specified by src_addr/len
3664 * from the source map to the range dst_addr/len
3665 * in the destination map.
3667 * This routine is only advisory and need not do anything.
3671 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3672 vm_offset_t src_addr)
3676 vm_offset_t end_addr = src_addr + len;
3679 if (dst_addr != src_addr)
3682 if (!pmap_is_current(src_pmap))
3685 vm_page_lock_queues();
3686 if (dst_pmap < src_pmap) {
3687 PMAP_LOCK(dst_pmap);
3688 PMAP_LOCK(src_pmap);
3690 PMAP_LOCK(src_pmap);
3691 PMAP_LOCK(dst_pmap);
3694 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3695 pt_entry_t *src_pte, *dst_pte;
3696 vm_page_t dstmpte, srcmpte;
3697 pd_entry_t srcptepaddr;
3700 KASSERT(addr < UPT_MIN_ADDRESS,
3701 ("pmap_copy: invalid to pmap_copy page tables"));
3703 pdnxt = (addr + NBPDR) & ~PDRMASK;
3706 ptepindex = addr >> PDRSHIFT;
3708 srcptepaddr = src_pmap->pm_pdir[ptepindex];
3709 if (srcptepaddr == 0)
3712 if (srcptepaddr & PG_PS) {
3713 if (dst_pmap->pm_pdir[ptepindex] == 0 &&
3714 ((srcptepaddr & PG_MANAGED) == 0 ||
3715 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
3717 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
3719 dst_pmap->pm_stats.resident_count +=
3725 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3726 KASSERT(srcmpte->wire_count > 0,
3727 ("pmap_copy: source page table page is unused"));
3729 if (pdnxt > end_addr)
3732 src_pte = vtopte(addr);
3733 while (addr < pdnxt) {
3737 * we only virtual copy managed pages
3739 if ((ptetemp & PG_MANAGED) != 0) {
3740 dstmpte = pmap_allocpte(dst_pmap, addr,
3742 if (dstmpte == NULL)
3744 dst_pte = pmap_pte_quick(dst_pmap, addr);
3745 if (*dst_pte == 0 &&
3746 pmap_try_insert_pv_entry(dst_pmap, addr,
3747 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
3749 * Clear the wired, modified, and
3750 * accessed (referenced) bits
3753 *dst_pte = ptetemp & ~(PG_W | PG_M |
3755 dst_pmap->pm_stats.resident_count++;
3758 if (pmap_unwire_pte_hold(dst_pmap,
3760 pmap_invalidate_page(dst_pmap,
3762 pmap_free_zero_pages(free);
3766 if (dstmpte->wire_count >= srcmpte->wire_count)
3775 vm_page_unlock_queues();
3776 PMAP_UNLOCK(src_pmap);
3777 PMAP_UNLOCK(dst_pmap);
3780 static __inline void
3781 pagezero(void *page)
3783 #if defined(I686_CPU)
3784 if (cpu_class == CPUCLASS_686) {
3785 #if defined(CPU_ENABLE_SSE)
3786 if (cpu_feature & CPUID_SSE2)
3787 sse2_pagezero(page);
3790 i686_pagezero(page);
3793 bzero(page, PAGE_SIZE);
3797 * pmap_zero_page zeros the specified hardware page by mapping
3798 * the page into KVM and using bzero to clear its contents.
3801 pmap_zero_page(vm_page_t m)
3803 struct sysmaps *sysmaps;
3805 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3806 mtx_lock(&sysmaps->lock);
3807 if (*sysmaps->CMAP2)
3808 panic("pmap_zero_page: CMAP2 busy");
3810 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3811 pmap_cache_bits(m->md.pat_mode, 0);
3812 invlcaddr(sysmaps->CADDR2);
3813 pagezero(sysmaps->CADDR2);
3814 *sysmaps->CMAP2 = 0;
3816 mtx_unlock(&sysmaps->lock);
3820 * pmap_zero_page_area zeros the specified hardware page by mapping
3821 * the page into KVM and using bzero to clear its contents.
3823 * off and size may not cover an area beyond a single hardware page.
3826 pmap_zero_page_area(vm_page_t m, int off, int size)
3828 struct sysmaps *sysmaps;
3830 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3831 mtx_lock(&sysmaps->lock);
3832 if (*sysmaps->CMAP2)
3833 panic("pmap_zero_page_area: CMAP2 busy");
3835 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3836 pmap_cache_bits(m->md.pat_mode, 0);
3837 invlcaddr(sysmaps->CADDR2);
3838 if (off == 0 && size == PAGE_SIZE)
3839 pagezero(sysmaps->CADDR2);
3841 bzero((char *)sysmaps->CADDR2 + off, size);
3842 *sysmaps->CMAP2 = 0;
3844 mtx_unlock(&sysmaps->lock);
3848 * pmap_zero_page_idle zeros the specified hardware page by mapping
3849 * the page into KVM and using bzero to clear its contents. This
3850 * is intended to be called from the vm_pagezero process only and
3854 pmap_zero_page_idle(vm_page_t m)
3858 panic("pmap_zero_page_idle: CMAP3 busy");
3860 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3861 pmap_cache_bits(m->md.pat_mode, 0);
3869 * pmap_copy_page copies the specified (machine independent)
3870 * page by mapping the page into virtual memory and using
3871 * bcopy to copy the page, one machine dependent page at a
3875 pmap_copy_page(vm_page_t src, vm_page_t dst)
3877 struct sysmaps *sysmaps;
3879 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3880 mtx_lock(&sysmaps->lock);
3881 if (*sysmaps->CMAP1)
3882 panic("pmap_copy_page: CMAP1 busy");
3883 if (*sysmaps->CMAP2)
3884 panic("pmap_copy_page: CMAP2 busy");
3886 invlpg((u_int)sysmaps->CADDR1);
3887 invlpg((u_int)sysmaps->CADDR2);
3888 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
3889 pmap_cache_bits(src->md.pat_mode, 0);
3890 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
3891 pmap_cache_bits(dst->md.pat_mode, 0);
3892 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3893 *sysmaps->CMAP1 = 0;
3894 *sysmaps->CMAP2 = 0;
3896 mtx_unlock(&sysmaps->lock);
3900 * Returns true if the pmap's pv is one of the first
3901 * 16 pvs linked to from this page. This count may
3902 * be changed upwards or downwards in the future; it
3903 * is only necessary that true be returned for a small
3904 * subset of pmaps for proper page aging.
3907 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3909 struct md_page *pvh;
3913 if (m->flags & PG_FICTITIOUS)
3916 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3917 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3918 if (PV_PMAP(pv) == pmap) {
3926 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3927 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
3928 if (PV_PMAP(pv) == pmap)
3939 * pmap_page_wired_mappings:
3941 * Return the number of managed mappings to the given physical page
3945 pmap_page_wired_mappings(vm_page_t m)
3950 if ((m->flags & PG_FICTITIOUS) != 0)
3952 count = pmap_pvh_wired_mappings(&m->md, count);
3953 return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count));
3957 * pmap_pvh_wired_mappings:
3959 * Return the updated number "count" of managed mappings that are wired.
3962 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
3968 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3970 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
3973 pte = pmap_pte_quick(pmap, pv->pv_va);
3974 if ((*pte & PG_W) != 0)
3983 * Returns TRUE if the given page is mapped individually or as part of
3984 * a 4mpage. Otherwise, returns FALSE.
3987 pmap_page_is_mapped(vm_page_t m)
3989 struct md_page *pvh;
3991 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
3993 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3994 if (TAILQ_EMPTY(&m->md.pv_list)) {
3995 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3996 return (!TAILQ_EMPTY(&pvh->pv_list));
4002 * Remove all pages from specified address space
4003 * this aids process exit speeds. Also, this code
4004 * is special cased for current process only, but
4005 * can have the more generic (and slightly slower)
4006 * mode enabled. This is much faster than pmap_remove
4007 * in the case of running down an entire address space.
4010 pmap_remove_pages(pmap_t pmap)
4012 pt_entry_t *pte, tpte;
4013 vm_page_t free = NULL;
4014 vm_page_t m, mpte, mt;
4016 struct md_page *pvh;
4017 struct pv_chunk *pc, *npc;
4020 uint32_t inuse, bitmask;
4023 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
4024 printf("warning: pmap_remove_pages called with non-current pmap\n");
4027 vm_page_lock_queues();
4030 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
4032 for (field = 0; field < _NPCM; field++) {
4033 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
4034 while (inuse != 0) {
4036 bitmask = 1UL << bit;
4037 idx = field * 32 + bit;
4038 pv = &pc->pc_pventry[idx];
4041 pte = pmap_pde(pmap, pv->pv_va);
4043 if ((tpte & PG_PS) == 0) {
4044 pte = vtopte(pv->pv_va);
4045 tpte = *pte & ~PG_PTE_PAT;
4050 "TPTE at %p IS ZERO @ VA %08x\n",
4056 * We cannot remove wired pages from a process' mapping at this time
4063 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
4064 KASSERT(m->phys_addr == (tpte & PG_FRAME),
4065 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
4066 m, (uintmax_t)m->phys_addr,
4069 KASSERT(m < &vm_page_array[vm_page_array_size],
4070 ("pmap_remove_pages: bad tpte %#jx",
4076 * Update the vm_page_t clean/reference bits.
4078 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4079 if ((tpte & PG_PS) != 0) {
4080 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4087 PV_STAT(pv_entry_frees++);
4088 PV_STAT(pv_entry_spare++);
4090 pc->pc_map[field] |= bitmask;
4091 if ((tpte & PG_PS) != 0) {
4092 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
4093 pvh = pa_to_pvh(tpte & PG_PS_FRAME);
4094 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
4095 if (TAILQ_EMPTY(&pvh->pv_list)) {
4096 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4097 if (TAILQ_EMPTY(&mt->md.pv_list))
4098 vm_page_flag_clear(mt, PG_WRITEABLE);
4100 mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
4102 pmap_remove_pt_page(pmap, mpte);
4103 pmap->pm_stats.resident_count--;
4104 KASSERT(mpte->wire_count == NPTEPG,
4105 ("pmap_remove_pages: pte page wire count error"));
4106 mpte->wire_count = 0;
4107 pmap_add_delayed_free_list(mpte, &free, FALSE);
4108 atomic_subtract_int(&cnt.v_wire_count, 1);
4111 pmap->pm_stats.resident_count--;
4112 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4113 if (TAILQ_EMPTY(&m->md.pv_list)) {
4114 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4115 if (TAILQ_EMPTY(&pvh->pv_list))
4116 vm_page_flag_clear(m, PG_WRITEABLE);
4118 pmap_unuse_pt(pmap, pv->pv_va, &free);
4123 PV_STAT(pv_entry_spare -= _NPCPV);
4124 PV_STAT(pc_chunk_count--);
4125 PV_STAT(pc_chunk_frees++);
4126 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4127 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4128 pmap_qremove((vm_offset_t)pc, 1);
4129 vm_page_unwire(m, 0);
4131 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4135 pmap_invalidate_all(pmap);
4136 vm_page_unlock_queues();
4138 pmap_free_zero_pages(free);
4144 * Return whether or not the specified physical page was modified
4145 * in any physical maps.
4148 pmap_is_modified(vm_page_t m)
4151 if (m->flags & PG_FICTITIOUS)
4153 if (pmap_is_modified_pvh(&m->md))
4155 return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4159 * Returns TRUE if any of the given mappings were used to modify
4160 * physical memory. Otherwise, returns FALSE. Both page and 2mpage
4161 * mappings are supported.
4164 pmap_is_modified_pvh(struct md_page *pvh)
4171 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4174 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4177 pte = pmap_pte_quick(pmap, pv->pv_va);
4178 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
4188 * pmap_is_prefaultable:
4190 * Return whether or not the specified virtual address is elgible
4194 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
4202 pde = pmap_pde(pmap, addr);
4203 if (*pde != 0 && (*pde & PG_PS) == 0) {
4212 * Clear the write and modified bits in each of the given page's mappings.
4215 pmap_remove_write(vm_page_t m)
4217 struct md_page *pvh;
4218 pv_entry_t next_pv, pv;
4221 pt_entry_t oldpte, *pte;
4224 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4225 if ((m->flags & PG_FICTITIOUS) != 0 ||
4226 (m->flags & PG_WRITEABLE) == 0)
4229 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4230 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4234 pde = pmap_pde(pmap, va);
4235 if ((*pde & PG_RW) != 0)
4236 (void)pmap_demote_pde(pmap, pde, va);
4239 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4242 pde = pmap_pde(pmap, pv->pv_va);
4243 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
4244 " a 4mpage in page %p's pv list", m));
4245 pte = pmap_pte_quick(pmap, pv->pv_va);
4248 if ((oldpte & PG_RW) != 0) {
4250 * Regardless of whether a pte is 32 or 64 bits
4251 * in size, PG_RW and PG_M are among the least
4252 * significant 32 bits.
4254 if (!atomic_cmpset_int((u_int *)pte, oldpte,
4255 oldpte & ~(PG_RW | PG_M)))
4257 if ((oldpte & PG_M) != 0)
4259 pmap_invalidate_page(pmap, pv->pv_va);
4263 vm_page_flag_clear(m, PG_WRITEABLE);
4268 * pmap_ts_referenced:
4270 * Return a count of reference bits for a page, clearing those bits.
4271 * It is not necessary for every reference bit to be cleared, but it
4272 * is necessary that 0 only be returned when there are truly no
4273 * reference bits set.
4275 * XXX: The exact number of bits to check and clear is a matter that
4276 * should be tested and standardized at some point in the future for
4277 * optimal aging of shared pages.
4280 pmap_ts_referenced(vm_page_t m)
4282 struct md_page *pvh;
4283 pv_entry_t pv, pvf, pvn;
4285 pd_entry_t oldpde, *pde;
4290 if (m->flags & PG_FICTITIOUS)
4293 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4294 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4295 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
4299 pde = pmap_pde(pmap, va);
4301 if ((oldpde & PG_A) != 0) {
4302 if (pmap_demote_pde(pmap, pde, va)) {
4303 if ((oldpde & PG_W) == 0) {
4305 * Remove the mapping to a single page
4306 * so that a subsequent access may
4307 * repromote. Since the underlying
4308 * page table page is fully populated,
4309 * this removal never frees a page
4312 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4314 pmap_remove_page(pmap, va, NULL);
4325 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
4328 pvn = TAILQ_NEXT(pv, pv_list);
4329 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4330 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
4333 pde = pmap_pde(pmap, pv->pv_va);
4334 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
4335 " found a 4mpage in page %p's pv list", m));
4336 pte = pmap_pte_quick(pmap, pv->pv_va);
4337 if ((*pte & PG_A) != 0) {
4338 atomic_clear_int((u_int *)pte, PG_A);
4339 pmap_invalidate_page(pmap, pv->pv_va);
4345 } while ((pv = pvn) != NULL && pv != pvf);
4352 * Clear the modify bits on the specified physical page.
4355 pmap_clear_modify(vm_page_t m)
4357 struct md_page *pvh;
4358 pv_entry_t next_pv, pv;
4360 pd_entry_t oldpde, *pde;
4361 pt_entry_t oldpte, *pte;
4364 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4365 if ((m->flags & PG_FICTITIOUS) != 0)
4368 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4369 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4373 pde = pmap_pde(pmap, va);
4375 if ((oldpde & PG_RW) != 0) {
4376 if (pmap_demote_pde(pmap, pde, va)) {
4377 if ((oldpde & PG_W) == 0) {
4379 * Write protect the mapping to a
4380 * single page so that a subsequent
4381 * write access may repromote.
4383 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4385 pte = pmap_pte_quick(pmap, va);
4387 if ((oldpte & PG_V) != 0) {
4389 * Regardless of whether a pte is 32 or 64 bits
4390 * in size, PG_RW and PG_M are among the least
4391 * significant 32 bits.
4393 while (!atomic_cmpset_int((u_int *)pte,
4395 oldpte & ~(PG_M | PG_RW)))
4398 pmap_invalidate_page(pmap, va);
4405 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4408 pde = pmap_pde(pmap, pv->pv_va);
4409 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
4410 " a 4mpage in page %p's pv list", m));
4411 pte = pmap_pte_quick(pmap, pv->pv_va);
4412 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4414 * Regardless of whether a pte is 32 or 64 bits
4415 * in size, PG_M is among the least significant
4418 atomic_clear_int((u_int *)pte, PG_M);
4419 pmap_invalidate_page(pmap, pv->pv_va);
4427 * pmap_clear_reference:
4429 * Clear the reference bit on the specified physical page.
4432 pmap_clear_reference(vm_page_t m)
4434 struct md_page *pvh;
4435 pv_entry_t next_pv, pv;
4437 pd_entry_t oldpde, *pde;
4441 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4442 if ((m->flags & PG_FICTITIOUS) != 0)
4445 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4446 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4450 pde = pmap_pde(pmap, va);
4452 if ((oldpde & PG_A) != 0) {
4453 if (pmap_demote_pde(pmap, pde, va)) {
4455 * Remove the mapping to a single page so
4456 * that a subsequent access may repromote.
4457 * Since the underlying page table page is
4458 * fully populated, this removal never frees
4459 * a page table page.
4461 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4463 pmap_remove_page(pmap, va, NULL);
4468 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4471 pde = pmap_pde(pmap, pv->pv_va);
4472 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
4473 " a 4mpage in page %p's pv list", m));
4474 pte = pmap_pte_quick(pmap, pv->pv_va);
4475 if ((*pte & PG_A) != 0) {
4477 * Regardless of whether a pte is 32 or 64 bits
4478 * in size, PG_A is among the least significant
4481 atomic_clear_int((u_int *)pte, PG_A);
4482 pmap_invalidate_page(pmap, pv->pv_va);
4490 * Miscellaneous support routines follow
4493 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
4494 static __inline void
4495 pmap_pte_attr(pt_entry_t *pte, int cache_bits)
4500 * The cache mode bits are all in the low 32-bits of the
4501 * PTE, so we can just spin on updating the low 32-bits.
4504 opte = *(u_int *)pte;
4505 npte = opte & ~PG_PTE_CACHE;
4507 } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
4510 /* Adjust the cache mode for a 2/4MB page mapped via a PDE. */
4511 static __inline void
4512 pmap_pde_attr(pd_entry_t *pde, int cache_bits)
4517 * The cache mode bits are all in the low 32-bits of the
4518 * PDE, so we can just spin on updating the low 32-bits.
4521 opde = *(u_int *)pde;
4522 npde = opde & ~PG_PDE_CACHE;
4524 } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
4528 * Map a set of physical memory pages into the kernel virtual
4529 * address space. Return a pointer to where it is mapped. This
4530 * routine is intended to be used for mapping device memory,
4534 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4536 vm_offset_t va, offset;
4539 offset = pa & PAGE_MASK;
4540 size = roundup(offset + size, PAGE_SIZE);
4543 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4546 va = kmem_alloc_nofault(kernel_map, size);
4548 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4550 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4551 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4552 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4553 pmap_invalidate_cache_range(va, va + size);
4554 return ((void *)(va + offset));
4558 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4561 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4565 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4568 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4572 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4574 vm_offset_t base, offset, tmpva;
4576 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4578 base = trunc_page(va);
4579 offset = va & PAGE_MASK;
4580 size = roundup(offset + size, PAGE_SIZE);
4581 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
4582 pmap_kremove(tmpva);
4583 pmap_invalidate_range(kernel_pmap, va, tmpva);
4584 kmem_free(kernel_map, base, size);
4588 * Sets the memory attribute for the specified page.
4591 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4593 struct sysmaps *sysmaps;
4594 vm_offset_t sva, eva;
4596 m->md.pat_mode = ma;
4597 if ((m->flags & PG_FICTITIOUS) != 0)
4601 * If "m" is a normal page, flush it from the cache.
4602 * See pmap_invalidate_cache_range().
4604 * First, try to find an existing mapping of the page by sf
4605 * buffer. sf_buf_invalidate_cache() modifies mapping and
4606 * flushes the cache.
4608 if (sf_buf_invalidate_cache(m))
4612 * If page is not mapped by sf buffer, but CPU does not
4613 * support self snoop, map the page transient and do
4614 * invalidation. In the worst case, whole cache is flushed by
4615 * pmap_invalidate_cache_range().
4617 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) {
4618 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4619 mtx_lock(&sysmaps->lock);
4620 if (*sysmaps->CMAP2)
4621 panic("pmap_page_set_memattr: CMAP2 busy");
4623 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) |
4624 PG_A | PG_M | pmap_cache_bits(m->md.pat_mode, 0);
4625 invlcaddr(sysmaps->CADDR2);
4626 sva = (vm_offset_t)sysmaps->CADDR2;
4627 eva = sva + PAGE_SIZE;
4629 sva = eva = 0; /* gcc */
4630 pmap_invalidate_cache_range(sva, eva);
4632 *sysmaps->CMAP2 = 0;
4634 mtx_unlock(&sysmaps->lock);
4639 * Changes the specified virtual address range's memory type to that given by
4640 * the parameter "mode". The specified virtual address range must be
4641 * completely contained within either the kernel map.
4643 * Returns zero if the change completed successfully, and either EINVAL or
4644 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4645 * of the virtual address range was not mapped, and ENOMEM is returned if
4646 * there was insufficient memory available to complete the change.
4649 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4651 vm_offset_t base, offset, tmpva;
4654 int cache_bits_pte, cache_bits_pde;
4657 base = trunc_page(va);
4658 offset = va & PAGE_MASK;
4659 size = roundup(offset + size, PAGE_SIZE);
4662 * Only supported on kernel virtual addresses above the recursive map.
4664 if (base < VM_MIN_KERNEL_ADDRESS)
4667 cache_bits_pde = pmap_cache_bits(mode, 1);
4668 cache_bits_pte = pmap_cache_bits(mode, 0);
4672 * Pages that aren't mapped aren't supported. Also break down
4673 * 2/4MB pages into 4KB pages if required.
4675 PMAP_LOCK(kernel_pmap);
4676 for (tmpva = base; tmpva < base + size; ) {
4677 pde = pmap_pde(kernel_pmap, tmpva);
4679 PMAP_UNLOCK(kernel_pmap);
4684 * If the current 2/4MB page already has
4685 * the required memory type, then we need not
4686 * demote this page. Just increment tmpva to
4687 * the next 2/4MB page frame.
4689 if ((*pde & PG_PDE_CACHE) == cache_bits_pde) {
4690 tmpva = trunc_4mpage(tmpva) + NBPDR;
4695 * If the current offset aligns with a 2/4MB
4696 * page frame and there is at least 2/4MB left
4697 * within the range, then we need not break
4698 * down this page into 4KB pages.
4700 if ((tmpva & PDRMASK) == 0 &&
4701 tmpva + PDRMASK < base + size) {
4705 if (!pmap_demote_pde(kernel_pmap, pde, tmpva)) {
4706 PMAP_UNLOCK(kernel_pmap);
4710 pte = vtopte(tmpva);
4712 PMAP_UNLOCK(kernel_pmap);
4717 PMAP_UNLOCK(kernel_pmap);
4720 * Ok, all the pages exist, so run through them updating their
4721 * cache mode if required.
4723 for (tmpva = base; tmpva < base + size; ) {
4724 pde = pmap_pde(kernel_pmap, tmpva);
4726 if ((*pde & PG_PDE_CACHE) != cache_bits_pde) {
4727 pmap_pde_attr(pde, cache_bits_pde);
4730 tmpva = trunc_4mpage(tmpva) + NBPDR;
4732 pte = vtopte(tmpva);
4733 if ((*pte & PG_PTE_CACHE) != cache_bits_pte) {
4734 pmap_pte_attr(pte, cache_bits_pte);
4742 * Flush CPU caches to make sure any data isn't cached that
4743 * shouldn't be, etc.
4746 pmap_invalidate_range(kernel_pmap, base, tmpva);
4747 pmap_invalidate_cache_range(base, tmpva);
4753 * perform the pmap work for mincore
4756 pmap_mincore(pmap_t pmap, vm_offset_t addr)
4759 pt_entry_t *ptep, pte;
4765 pdep = pmap_pde(pmap, addr);
4767 if (*pdep & PG_PS) {
4769 val = MINCORE_SUPER;
4770 /* Compute the physical address of the 4KB page. */
4771 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
4774 ptep = pmap_pte(pmap, addr);
4776 pmap_pte_release(ptep);
4777 pa = pte & PG_FRAME;
4786 val |= MINCORE_INCORE;
4787 if ((pte & PG_MANAGED) == 0)
4790 m = PHYS_TO_VM_PAGE(pa);
4795 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
4796 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
4799 * Modified by someone else
4801 vm_page_lock_queues();
4802 if (m->dirty || pmap_is_modified(m))
4803 val |= MINCORE_MODIFIED_OTHER;
4804 vm_page_unlock_queues();
4810 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
4813 * Referenced by someone else
4815 vm_page_lock_queues();
4816 if ((m->flags & PG_REFERENCED) ||
4817 pmap_ts_referenced(m)) {
4818 val |= MINCORE_REFERENCED_OTHER;
4819 vm_page_flag_set(m, PG_REFERENCED);
4821 vm_page_unlock_queues();
4828 pmap_activate(struct thread *td)
4830 pmap_t pmap, oldpmap;
4834 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4835 oldpmap = PCPU_GET(curpmap);
4837 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
4838 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
4840 oldpmap->pm_active &= ~1;
4841 pmap->pm_active |= 1;
4844 cr3 = vtophys(pmap->pm_pdpt);
4846 cr3 = vtophys(pmap->pm_pdir);
4849 * pmap_activate is for the current thread on the current cpu
4851 td->td_pcb->pcb_cr3 = cr3;
4853 PCPU_SET(curpmap, pmap);
4858 * Increase the starting virtual address of the given mapping if a
4859 * different alignment might result in more superpage mappings.
4862 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4863 vm_offset_t *addr, vm_size_t size)
4865 vm_offset_t superpage_offset;
4869 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4870 offset += ptoa(object->pg_color);
4871 superpage_offset = offset & PDRMASK;
4872 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
4873 (*addr & PDRMASK) == superpage_offset)
4875 if ((*addr & PDRMASK) < superpage_offset)
4876 *addr = (*addr & ~PDRMASK) + superpage_offset;
4878 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
4882 #if defined(PMAP_DEBUG)
4883 pmap_pid_dump(int pid)
4890 sx_slock(&allproc_lock);
4891 FOREACH_PROC_IN_SYSTEM(p) {
4892 if (p->p_pid != pid)
4898 pmap = vmspace_pmap(p->p_vmspace);
4899 for (i = 0; i < NPDEPTD; i++) {
4902 vm_offset_t base = i << PDRSHIFT;
4904 pde = &pmap->pm_pdir[i];
4905 if (pde && pmap_pde_v(pde)) {
4906 for (j = 0; j < NPTEPG; j++) {
4907 vm_offset_t va = base + (j << PAGE_SHIFT);
4908 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
4913 sx_sunlock(&allproc_lock);
4916 pte = pmap_pte(pmap, va);
4917 if (pte && pmap_pte_v(pte)) {
4921 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
4922 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
4923 va, pa, m->hold_count, m->wire_count, m->flags);
4938 sx_sunlock(&allproc_lock);
4945 static void pads(pmap_t pm);
4946 void pmap_pvdump(vm_offset_t pa);
4948 /* print address space of pmap*/
4956 if (pm == kernel_pmap)
4958 for (i = 0; i < NPDEPTD; i++)
4960 for (j = 0; j < NPTEPG; j++) {
4961 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
4962 if (pm == kernel_pmap && va < KERNBASE)
4964 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
4966 ptep = pmap_pte(pm, va);
4967 if (pmap_pte_v(ptep))
4968 printf("%x:%x ", va, *ptep);
4974 pmap_pvdump(vm_paddr_t pa)
4980 printf("pa %x", pa);
4981 m = PHYS_TO_VM_PAGE(pa);
4982 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4984 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);