2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
108 #include "opt_msgbuf.h"
110 #include "opt_xbox.h"
112 #include <sys/param.h>
113 #include <sys/systm.h>
114 #include <sys/kernel.h>
116 #include <sys/lock.h>
117 #include <sys/malloc.h>
118 #include <sys/mman.h>
119 #include <sys/msgbuf.h>
120 #include <sys/mutex.h>
121 #include <sys/proc.h>
122 #include <sys/sf_buf.h>
124 #include <sys/vmmeter.h>
125 #include <sys/sched.h>
126 #include <sys/sysctl.h>
132 #include <vm/vm_param.h>
133 #include <vm/vm_kern.h>
134 #include <vm/vm_page.h>
135 #include <vm/vm_map.h>
136 #include <vm/vm_object.h>
137 #include <vm/vm_extern.h>
138 #include <vm/vm_pageout.h>
139 #include <vm/vm_pager.h>
140 #include <vm/vm_reserv.h>
143 #include <machine/cpu.h>
144 #include <machine/cputypes.h>
145 #include <machine/md_var.h>
146 #include <machine/pcb.h>
147 #include <machine/specialreg.h>
149 #include <machine/smp.h>
153 #include <machine/xbox.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
164 #if !defined(DIAGNOSTIC)
165 #ifdef __GNUC_GNU_INLINE__
166 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
168 #define PMAP_INLINE extern inline
176 #define PV_STAT(x) do { x ; } while (0)
178 #define PV_STAT(x) do { } while (0)
181 #define pa_index(pa) ((pa) >> PDRSHIFT)
182 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
185 * Get PDEs and PTEs for user/kernel address space
187 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
188 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
190 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
191 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
192 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
193 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
194 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
196 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
197 atomic_clear_int((u_int *)(pte), PG_W))
198 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
200 struct pmap kernel_pmap_store;
201 LIST_HEAD(pmaplist, pmap);
202 static struct pmaplist allpmaps;
203 static struct mtx allpmaps_lock;
205 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
206 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
207 int pgeflag = 0; /* PG_G or-in */
208 int pseflag = 0; /* PG_PS or-in */
210 static int nkpt = NKPT;
211 vm_offset_t kernel_vm_end = KERNBASE + NKPT * NBPDR;
212 extern u_int32_t KERNend;
213 extern u_int32_t KPTphys;
217 static uma_zone_t pdptzone;
220 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
222 static int pat_works = 1;
223 TUNABLE_INT("vm.pmap.pat_works", &pat_works);
224 SYSCTL_INT(_vm_pmap, OID_AUTO, pat_works, CTLFLAG_RDTUN, &pat_works, 1,
225 "Is page attribute table fully functional?");
227 static int pg_ps_enabled = 1;
228 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0,
229 "Are large page mappings enabled?");
231 #define PAT_INDEX_SIZE 8
232 static int pat_index[PAT_INDEX_SIZE]; /* cache mode to PAT index conversion */
235 * Data for the pv entry allocation mechanism
237 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
238 static struct md_page *pv_table;
239 static int shpgperproc = PMAP_SHPGPERPROC;
241 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
242 int pv_maxchunks; /* How many chunks we have KVA for */
243 vm_offset_t pv_vafree; /* freelist stored in the PTE */
246 * All those kernel PT submaps that BSD is so fond of
255 static struct sysmaps sysmaps_pcpu[MAXCPU];
256 pt_entry_t *CMAP1 = 0;
257 static pt_entry_t *CMAP3;
258 static pd_entry_t *KPTD;
259 caddr_t CADDR1 = 0, ptvmmap = 0;
260 static caddr_t CADDR3;
261 struct msgbuf *msgbufp = 0;
266 static caddr_t crashdumpmap;
268 static pt_entry_t *PMAP1 = 0, *PMAP2;
269 static pt_entry_t *PADDR1 = 0, *PADDR2;
272 static int PMAP1changedcpu;
273 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
275 "Number of times pmap_pte_quick changed CPU with same PMAP1");
277 static int PMAP1changed;
278 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
280 "Number of times pmap_pte_quick changed PMAP1");
281 static int PMAP1unchanged;
282 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
284 "Number of times pmap_pte_quick didn't change PMAP1");
285 static struct mtx PMAP2mutex;
287 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
288 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
289 static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
290 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
291 static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
292 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
293 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
295 static int pmap_pvh_wired_mappings(struct md_page *pvh, int count);
297 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
298 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
300 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
301 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
302 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
303 static void pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte);
304 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
305 static boolean_t pmap_is_referenced_pvh(struct md_page *pvh);
306 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
307 static void pmap_kenter_pde(vm_offset_t va, pd_entry_t newpde);
308 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
309 static void pmap_pde_attr(pd_entry_t *pde, int cache_bits);
310 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
311 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
313 static void pmap_pte_attr(pt_entry_t *pte, int cache_bits);
314 static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
316 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
318 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
319 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
321 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
323 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
324 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
326 static void pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
328 static void pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde);
330 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
332 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
333 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
334 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
335 static void pmap_pte_release(pt_entry_t *pte);
336 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
338 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
340 static void pmap_set_pg(void);
342 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
343 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
346 * If you get an error here, then you set KVA_PAGES wrong! See the
347 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
348 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
350 CTASSERT(KERNBASE % (1 << 24) == 0);
353 * Bootstrap the system enough to run with virtual memory.
355 * On the i386 this is called after mapping has already been enabled
356 * and just syncs the pmap module with what has already been done.
357 * [We can't call it easily with mapping off since the kernel is not
358 * mapped with PA == VA, hence we would have to relocate every address
359 * from the linked base (virtual) address "KERNBASE" to the actual
360 * (physical) address starting relative to 0]
363 pmap_bootstrap(vm_paddr_t firstaddr)
366 pt_entry_t *pte, *unused;
367 struct sysmaps *sysmaps;
371 * Initialize the first available kernel virtual address. However,
372 * using "firstaddr" may waste a few pages of the kernel virtual
373 * address space, because locore may not have mapped every physical
374 * page that it allocated. Preferably, locore would provide a first
375 * unused virtual address in addition to "firstaddr".
377 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
379 virtual_end = VM_MAX_KERNEL_ADDRESS;
382 * Initialize the kernel pmap (which is statically allocated).
384 PMAP_LOCK_INIT(kernel_pmap);
385 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
387 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
389 kernel_pmap->pm_root = NULL;
390 kernel_pmap->pm_active = -1; /* don't allow deactivation */
391 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
392 LIST_INIT(&allpmaps);
395 * Request a spin mutex so that changes to allpmaps cannot be
396 * preempted by smp_rendezvous_cpus(). Otherwise,
397 * pmap_update_pde_kernel() could access allpmaps while it is
400 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
401 mtx_lock_spin(&allpmaps_lock);
402 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
403 mtx_unlock_spin(&allpmaps_lock);
406 * Reserve some special page table entries/VA space for temporary
409 #define SYSMAP(c, p, v, n) \
410 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
416 * CMAP1/CMAP2 are used for zeroing and copying pages.
417 * CMAP3 is used for the idle process page zeroing.
419 for (i = 0; i < MAXCPU; i++) {
420 sysmaps = &sysmaps_pcpu[i];
421 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
422 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
423 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
425 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
426 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
431 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
434 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
436 SYSMAP(caddr_t, unused, ptvmmap, 1)
439 * msgbufp is used to map the system message buffer.
441 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
444 * KPTmap is used by pmap_kextract().
446 * KPTmap is first initialized by locore. However, that initial
447 * KPTmap can only support NKPT page table pages. Here, a larger
448 * KPTmap is created that can support KVA_PAGES page table pages.
450 SYSMAP(pt_entry_t *, KPTD, KPTmap, KVA_PAGES)
452 for (i = 0; i < NKPT; i++)
453 KPTD[i] = (KPTphys + (i << PAGE_SHIFT)) | pgeflag | PG_RW | PG_V;
456 * Adjust the start of the KPTD and KPTmap so that the implementation
457 * of pmap_kextract() and pmap_growkernel() can be made simpler.
460 KPTmap -= i386_btop(KPTDI << PDRSHIFT);
463 * ptemap is used for pmap_pte_quick
465 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1)
466 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1)
468 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
473 * Leave in place an identity mapping (virt == phys) for the low 1 MB
474 * physical memory region that is used by the ACPI wakeup code. This
475 * mapping must not have PG_G set.
478 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
479 * an early stadium, we cannot yet neatly map video memory ... :-(
480 * Better fixes are very welcome! */
481 if (!arch_i386_is_xbox)
483 for (i = 1; i < NKPT; i++)
486 /* Initialize the PAT MSR if present. */
489 /* Turn on PG_G on kernel page(s) */
499 int pat_table[PAT_INDEX_SIZE];
504 /* Set default PAT index table. */
505 for (i = 0; i < PAT_INDEX_SIZE; i++)
507 pat_table[PAT_WRITE_BACK] = 0;
508 pat_table[PAT_WRITE_THROUGH] = 1;
509 pat_table[PAT_UNCACHEABLE] = 3;
510 pat_table[PAT_WRITE_COMBINING] = 3;
511 pat_table[PAT_WRITE_PROTECTED] = 3;
512 pat_table[PAT_UNCACHED] = 3;
514 /* Bail if this CPU doesn't implement PAT. */
515 if ((cpu_feature & CPUID_PAT) == 0) {
516 for (i = 0; i < PAT_INDEX_SIZE; i++)
517 pat_index[i] = pat_table[i];
523 * Due to some Intel errata, we can only safely use the lower 4
526 * Intel Pentium III Processor Specification Update
527 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
530 * Intel Pentium IV Processor Specification Update
531 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
533 if (cpu_vendor_id == CPU_VENDOR_INTEL &&
534 !(CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe))
537 /* Initialize default PAT entries. */
538 pat_msr = PAT_VALUE(0, PAT_WRITE_BACK) |
539 PAT_VALUE(1, PAT_WRITE_THROUGH) |
540 PAT_VALUE(2, PAT_UNCACHED) |
541 PAT_VALUE(3, PAT_UNCACHEABLE) |
542 PAT_VALUE(4, PAT_WRITE_BACK) |
543 PAT_VALUE(5, PAT_WRITE_THROUGH) |
544 PAT_VALUE(6, PAT_UNCACHED) |
545 PAT_VALUE(7, PAT_UNCACHEABLE);
549 * Leave the indices 0-3 at the default of WB, WT, UC-, and UC.
550 * Program 5 and 6 as WP and WC.
551 * Leave 4 and 7 as WB and UC.
553 pat_msr &= ~(PAT_MASK(5) | PAT_MASK(6));
554 pat_msr |= PAT_VALUE(5, PAT_WRITE_PROTECTED) |
555 PAT_VALUE(6, PAT_WRITE_COMBINING);
556 pat_table[PAT_UNCACHED] = 2;
557 pat_table[PAT_WRITE_PROTECTED] = 5;
558 pat_table[PAT_WRITE_COMBINING] = 6;
561 * Just replace PAT Index 2 with WC instead of UC-.
563 pat_msr &= ~PAT_MASK(2);
564 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
565 pat_table[PAT_WRITE_COMBINING] = 2;
570 load_cr4(cr4 & ~CR4_PGE);
572 /* Disable caches (CD = 1, NW = 0). */
574 load_cr0((cr0 & ~CR0_NW) | CR0_CD);
576 /* Flushes caches and TLBs. */
580 /* Update PAT and index table. */
581 wrmsr(MSR_PAT, pat_msr);
582 for (i = 0; i < PAT_INDEX_SIZE; i++)
583 pat_index[i] = pat_table[i];
585 /* Flush caches and TLBs again. */
589 /* Restore caches and PGE. */
595 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
601 vm_offset_t va, endva;
606 endva = KERNBASE + KERNend;
609 va = KERNBASE + KERNLOAD;
611 pdir_pde(PTD, va) |= pgeflag;
612 invltlb(); /* Play it safe, invltlb() every time */
616 va = (vm_offset_t)btext;
621 invltlb(); /* Play it safe, invltlb() every time */
628 * Initialize a vm_page's machine-dependent fields.
631 pmap_page_init(vm_page_t m)
634 TAILQ_INIT(&m->md.pv_list);
635 m->md.pat_mode = PAT_WRITE_BACK;
640 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
643 /* Inform UMA that this allocator uses kernel_map/object. */
644 *flags = UMA_SLAB_KERNEL;
645 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
646 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
651 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
653 * - Must deal with pages in order to ensure that none of the PG_* bits
654 * are ever set, PG_V in particular.
655 * - Assumes we can write to ptes without pte_store() atomic ops, even
656 * on PAE systems. This should be ok.
657 * - Assumes nothing will ever test these addresses for 0 to indicate
658 * no mapping instead of correctly checking PG_V.
659 * - Assumes a vm_offset_t will fit in a pte (true for i386).
660 * Because PG_V is never set, there can be no mappings to invalidate.
663 pmap_ptelist_alloc(vm_offset_t *head)
670 return (va); /* Out of memory */
674 panic("pmap_ptelist_alloc: va with PG_V set!");
680 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
685 panic("pmap_ptelist_free: freeing va with PG_V set!");
687 *pte = *head; /* virtual! PG_V is 0 though */
692 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
698 for (i = npages - 1; i >= 0; i--) {
699 va = (vm_offset_t)base + i * PAGE_SIZE;
700 pmap_ptelist_free(head, va);
706 * Initialize the pmap module.
707 * Called by vm_init, to initialize any structures that the pmap
708 * system needs to map virtual memory.
718 * Initialize the vm page array entries for the kernel pmap's
721 for (i = 0; i < NKPT; i++) {
722 mpte = PHYS_TO_VM_PAGE(KPTphys + (i << PAGE_SHIFT));
723 KASSERT(mpte >= vm_page_array &&
724 mpte < &vm_page_array[vm_page_array_size],
725 ("pmap_init: page table page is out of range"));
726 mpte->pindex = i + KPTDI;
727 mpte->phys_addr = KPTphys + (i << PAGE_SHIFT);
731 * Initialize the address space (zone) for the pv entries. Set a
732 * high water mark so that the system can recover from excessive
733 * numbers of pv entries.
735 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
736 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
737 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
738 pv_entry_max = roundup(pv_entry_max, _NPCPV);
739 pv_entry_high_water = 9 * (pv_entry_max / 10);
742 * If the kernel is running in a virtual machine on an AMD Family 10h
743 * processor, then it must assume that MCA is enabled by the virtual
746 if (vm_guest == VM_GUEST_VM && cpu_vendor_id == CPU_VENDOR_AMD &&
747 CPUID_TO_FAMILY(cpu_id) == 0x10)
748 workaround_erratum383 = 1;
751 * Are large page mappings supported and enabled?
753 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
756 else if (pg_ps_enabled) {
757 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
758 ("pmap_init: can't assign to pagesizes[1]"));
759 pagesizes[1] = NBPDR;
763 * Calculate the size of the pv head table for superpages.
765 for (i = 0; phys_avail[i + 1]; i += 2);
766 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
769 * Allocate memory for the pv head table for superpages.
771 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
773 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
774 for (i = 0; i < pv_npg; i++)
775 TAILQ_INIT(&pv_table[i].pv_list);
777 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
778 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
779 PAGE_SIZE * pv_maxchunks);
780 if (pv_chunkbase == NULL)
781 panic("pmap_init: not enough kvm for pv chunks");
782 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
784 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
785 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
786 UMA_ZONE_VM | UMA_ZONE_NOFREE);
787 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
792 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
793 "Max number of PV entries");
794 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
795 "Page share factor per proc");
797 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
798 "2/4MB page mapping counters");
800 static u_long pmap_pde_demotions;
801 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
802 &pmap_pde_demotions, 0, "2/4MB page demotions");
804 static u_long pmap_pde_mappings;
805 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
806 &pmap_pde_mappings, 0, "2/4MB page mappings");
808 static u_long pmap_pde_p_failures;
809 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
810 &pmap_pde_p_failures, 0, "2/4MB page promotion failures");
812 static u_long pmap_pde_promotions;
813 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
814 &pmap_pde_promotions, 0, "2/4MB page promotions");
816 /***************************************************
817 * Low level helper routines.....
818 ***************************************************/
821 * Determine the appropriate bits to set in a PTE or PDE for a specified
825 pmap_cache_bits(int mode, boolean_t is_pde)
827 int cache_bits, pat_flag, pat_idx;
829 if (mode < 0 || mode >= PAT_INDEX_SIZE || pat_index[mode] < 0)
830 panic("Unknown caching mode %d\n", mode);
832 /* The PAT bit is different for PTE's and PDE's. */
833 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
835 /* Map the caching mode to a PAT index. */
836 pat_idx = pat_index[mode];
838 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
841 cache_bits |= pat_flag;
843 cache_bits |= PG_NC_PCD;
845 cache_bits |= PG_NC_PWT;
850 * The caller is responsible for maintaining TLB consistency.
853 pmap_kenter_pde(vm_offset_t va, pd_entry_t newpde)
857 boolean_t PTD_updated;
860 mtx_lock_spin(&allpmaps_lock);
861 LIST_FOREACH(pmap, &allpmaps, pm_list) {
862 if ((pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] &
865 pde = pmap_pde(pmap, va);
866 pde_store(pde, newpde);
868 mtx_unlock_spin(&allpmaps_lock);
870 ("pmap_kenter_pde: current page table is not in allpmaps"));
874 * After changing the page size for the specified virtual address in the page
875 * table, flush the corresponding entries from the processor's TLB. Only the
876 * calling processor's TLB is affected.
878 * The calling thread must be pinned to a processor.
881 pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde)
885 if ((newpde & PG_PS) == 0)
886 /* Demotion: flush a specific 2MB page mapping. */
888 else if ((newpde & PG_G) == 0)
890 * Promotion: flush every 4KB page mapping from the TLB
891 * because there are too many to flush individually.
896 * Promotion: flush every 4KB page mapping from the TLB,
897 * including any global (PG_G) mappings.
900 load_cr4(cr4 & ~CR4_PGE);
902 * Although preemption at this point could be detrimental to
903 * performance, it would not lead to an error. PG_G is simply
904 * ignored if CR4.PGE is clear. Moreover, in case this block
905 * is re-entered, the load_cr4() either above or below will
906 * modify CR4.PGE flushing the TLB.
908 load_cr4(cr4 | CR4_PGE);
913 * For SMP, these functions have to use the IPI mechanism for coherence.
915 * N.B.: Before calling any of the following TLB invalidation functions,
916 * the calling processor must ensure that all stores updating a non-
917 * kernel page table are globally performed. Otherwise, another
918 * processor could cache an old, pre-update entry without being
919 * invalidated. This can happen one of two ways: (1) The pmap becomes
920 * active on another processor after its pm_active field is checked by
921 * one of the following functions but before a store updating the page
922 * table is globally performed. (2) The pmap becomes active on another
923 * processor before its pm_active field is checked but due to
924 * speculative loads one of the following functions stills reads the
925 * pmap as inactive on the other processor.
927 * The kernel page table is exempt because its pm_active field is
928 * immutable. The kernel page table is always active on every
932 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
934 cpumask_t cpumask, other_cpus;
937 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
941 cpumask = PCPU_GET(cpumask);
942 other_cpus = PCPU_GET(other_cpus);
943 if (pmap->pm_active & cpumask)
945 if (pmap->pm_active & other_cpus)
946 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
952 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
954 cpumask_t cpumask, other_cpus;
958 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
959 for (addr = sva; addr < eva; addr += PAGE_SIZE)
961 smp_invlpg_range(sva, eva);
963 cpumask = PCPU_GET(cpumask);
964 other_cpus = PCPU_GET(other_cpus);
965 if (pmap->pm_active & cpumask)
966 for (addr = sva; addr < eva; addr += PAGE_SIZE)
968 if (pmap->pm_active & other_cpus)
969 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
976 pmap_invalidate_all(pmap_t pmap)
978 cpumask_t cpumask, other_cpus;
981 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
985 cpumask = PCPU_GET(cpumask);
986 other_cpus = PCPU_GET(other_cpus);
987 if (pmap->pm_active & cpumask)
989 if (pmap->pm_active & other_cpus)
990 smp_masked_invltlb(pmap->pm_active & other_cpus);
996 pmap_invalidate_cache(void)
1006 cpumask_t store; /* processor that updates the PDE */
1007 cpumask_t invalidate; /* processors that invalidate their TLB */
1014 pmap_update_pde_kernel(void *arg)
1016 struct pde_action *act = arg;
1020 if (act->store == PCPU_GET(cpumask))
1022 * Elsewhere, this operation requires allpmaps_lock for
1023 * synchronization. Here, it does not because it is being
1024 * performed in the context of an all_cpus rendezvous.
1026 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1027 pde = pmap_pde(pmap, act->va);
1028 pde_store(pde, act->newpde);
1033 pmap_update_pde_user(void *arg)
1035 struct pde_action *act = arg;
1037 if (act->store == PCPU_GET(cpumask))
1038 pde_store(act->pde, act->newpde);
1042 pmap_update_pde_teardown(void *arg)
1044 struct pde_action *act = arg;
1046 if ((act->invalidate & PCPU_GET(cpumask)) != 0)
1047 pmap_update_pde_invalidate(act->va, act->newpde);
1051 * Change the page size for the specified virtual address in a way that
1052 * prevents any possibility of the TLB ever having two entries that map the
1053 * same virtual address using different page sizes. This is the recommended
1054 * workaround for Erratum 383 on AMD Family 10h processors. It prevents a
1055 * machine check exception for a TLB state that is improperly diagnosed as a
1059 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
1061 struct pde_action act;
1062 cpumask_t active, cpumask;
1065 cpumask = PCPU_GET(cpumask);
1066 if (pmap == kernel_pmap)
1069 active = pmap->pm_active;
1070 if ((active & PCPU_GET(other_cpus)) != 0) {
1071 act.store = cpumask;
1072 act.invalidate = active;
1075 act.newpde = newpde;
1076 smp_rendezvous_cpus(cpumask | active,
1077 smp_no_rendevous_barrier, pmap == kernel_pmap ?
1078 pmap_update_pde_kernel : pmap_update_pde_user,
1079 pmap_update_pde_teardown, &act);
1081 if (pmap == kernel_pmap)
1082 pmap_kenter_pde(va, newpde);
1084 pde_store(pde, newpde);
1085 if ((active & cpumask) != 0)
1086 pmap_update_pde_invalidate(va, newpde);
1092 * Normal, non-SMP, 486+ invalidation functions.
1093 * We inline these within pmap.c for speed.
1096 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
1099 if (pmap == kernel_pmap || pmap->pm_active)
1104 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1108 if (pmap == kernel_pmap || pmap->pm_active)
1109 for (addr = sva; addr < eva; addr += PAGE_SIZE)
1114 pmap_invalidate_all(pmap_t pmap)
1117 if (pmap == kernel_pmap || pmap->pm_active)
1122 pmap_invalidate_cache(void)
1129 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
1132 if (pmap == kernel_pmap)
1133 pmap_kenter_pde(va, newpde);
1135 pde_store(pde, newpde);
1136 if (pmap == kernel_pmap || pmap->pm_active)
1137 pmap_update_pde_invalidate(va, newpde);
1142 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
1145 KASSERT((sva & PAGE_MASK) == 0,
1146 ("pmap_invalidate_cache_range: sva not page-aligned"));
1147 KASSERT((eva & PAGE_MASK) == 0,
1148 ("pmap_invalidate_cache_range: eva not page-aligned"));
1150 if (cpu_feature & CPUID_SS)
1151 ; /* If "Self Snoop" is supported, do nothing. */
1152 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
1153 eva - sva < 2 * 1024 * 1024) {
1156 * Otherwise, do per-cache line flush. Use the mfence
1157 * instruction to insure that previous stores are
1158 * included in the write-back. The processor
1159 * propagates flush to other processors in the cache
1163 for (; sva < eva; sva += cpu_clflush_line_size)
1169 * No targeted cache flush methods are supported by CPU,
1170 * or the supplied range is bigger than 2MB.
1171 * Globally invalidate cache.
1173 pmap_invalidate_cache();
1178 * Are we current address space or kernel? N.B. We return FALSE when
1179 * a pmap's page table is in use because a kernel thread is borrowing
1180 * it. The borrowed page table can change spontaneously, making any
1181 * dependence on its continued use subject to a race condition.
1184 pmap_is_current(pmap_t pmap)
1187 return (pmap == kernel_pmap ||
1188 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
1189 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
1193 * If the given pmap is not the current or kernel pmap, the returned pte must
1194 * be released by passing it to pmap_pte_release().
1197 pmap_pte(pmap_t pmap, vm_offset_t va)
1202 pde = pmap_pde(pmap, va);
1206 /* are we current address space or kernel? */
1207 if (pmap_is_current(pmap))
1208 return (vtopte(va));
1209 mtx_lock(&PMAP2mutex);
1210 newpf = *pde & PG_FRAME;
1211 if ((*PMAP2 & PG_FRAME) != newpf) {
1212 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
1213 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
1215 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1221 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1224 static __inline void
1225 pmap_pte_release(pt_entry_t *pte)
1228 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
1229 mtx_unlock(&PMAP2mutex);
1232 static __inline void
1233 invlcaddr(void *caddr)
1236 invlpg((u_int)caddr);
1240 * Super fast pmap_pte routine best used when scanning
1241 * the pv lists. This eliminates many coarse-grained
1242 * invltlb calls. Note that many of the pv list
1243 * scans are across different pmaps. It is very wasteful
1244 * to do an entire invltlb for checking a single mapping.
1246 * If the given pmap is not the current pmap, vm_page_queue_mtx
1247 * must be held and curthread pinned to a CPU.
1250 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1255 pde = pmap_pde(pmap, va);
1259 /* are we current address space or kernel? */
1260 if (pmap_is_current(pmap))
1261 return (vtopte(va));
1262 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1263 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1264 newpf = *pde & PG_FRAME;
1265 if ((*PMAP1 & PG_FRAME) != newpf) {
1266 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
1268 PMAP1cpu = PCPU_GET(cpuid);
1274 if (PMAP1cpu != PCPU_GET(cpuid)) {
1275 PMAP1cpu = PCPU_GET(cpuid);
1281 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1287 * Routine: pmap_extract
1289 * Extract the physical page address associated
1290 * with the given map/virtual_address pair.
1293 pmap_extract(pmap_t pmap, vm_offset_t va)
1301 pde = pmap->pm_pdir[va >> PDRSHIFT];
1303 if ((pde & PG_PS) != 0)
1304 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
1306 pte = pmap_pte(pmap, va);
1307 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1308 pmap_pte_release(pte);
1316 * Routine: pmap_extract_and_hold
1318 * Atomically extract and hold the physical page
1319 * with the given pmap and virtual address pair
1320 * if that mapping permits the given protection.
1323 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1334 pde = *pmap_pde(pmap, va);
1337 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1338 if (vm_page_pa_tryrelock(pmap, (pde & PG_PS_FRAME) |
1339 (va & PDRMASK), &pa))
1341 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1347 pte = *pmap_pte_quick(pmap, va);
1349 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1350 if (vm_page_pa_tryrelock(pmap, pte & PG_FRAME, &pa))
1352 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1363 /***************************************************
1364 * Low level mapping routines.....
1365 ***************************************************/
1368 * Add a wired page to the kva.
1369 * Note: not SMP coherent.
1371 * This function may be used before pmap_bootstrap() is called.
1374 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1379 pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1382 static __inline void
1383 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1388 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1392 * Remove a page from the kernel pagetables.
1393 * Note: not SMP coherent.
1395 * This function may be used before pmap_bootstrap() is called.
1398 pmap_kremove(vm_offset_t va)
1407 * Used to map a range of physical addresses into kernel
1408 * virtual address space.
1410 * The value passed in '*virt' is a suggested virtual address for
1411 * the mapping. Architectures which can support a direct-mapped
1412 * physical to virtual region can return the appropriate address
1413 * within that region, leaving '*virt' unchanged. Other
1414 * architectures should map the pages starting at '*virt' and
1415 * update '*virt' with the first usable address after the mapped
1419 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1421 vm_offset_t va, sva;
1424 while (start < end) {
1425 pmap_kenter(va, start);
1429 pmap_invalidate_range(kernel_pmap, sva, va);
1436 * Add a list of wired pages to the kva
1437 * this routine is only used for temporary
1438 * kernel mappings that do not need to have
1439 * page modification or references recorded.
1440 * Note that old mappings are simply written
1441 * over. The page *must* be wired.
1442 * Note: SMP coherent. Uses a ranged shootdown IPI.
1445 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1447 pt_entry_t *endpte, oldpte, pa, *pte;
1452 endpte = pte + count;
1453 while (pte < endpte) {
1455 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
1456 if ((*pte & (PG_FRAME | PG_PTE_CACHE)) != pa) {
1458 pte_store(pte, pa | pgeflag | PG_RW | PG_V);
1462 if (__predict_false((oldpte & PG_V) != 0))
1463 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1468 * This routine tears out page mappings from the
1469 * kernel -- it is meant only for temporary mappings.
1470 * Note: SMP coherent. Uses a ranged shootdown IPI.
1473 pmap_qremove(vm_offset_t sva, int count)
1478 while (count-- > 0) {
1482 pmap_invalidate_range(kernel_pmap, sva, va);
1485 /***************************************************
1486 * Page table page management routines.....
1487 ***************************************************/
1488 static __inline void
1489 pmap_free_zero_pages(vm_page_t free)
1493 while (free != NULL) {
1496 /* Preserve the page's PG_ZERO setting. */
1497 vm_page_free_toq(m);
1502 * Schedule the specified unused page table page to be freed. Specifically,
1503 * add the page to the specified list of pages that will be released to the
1504 * physical memory manager after the TLB has been updated.
1506 static __inline void
1507 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
1511 m->flags |= PG_ZERO;
1513 m->flags &= ~PG_ZERO;
1519 * Inserts the specified page table page into the specified pmap's collection
1520 * of idle page table pages. Each of a pmap's page table pages is responsible
1521 * for mapping a distinct range of virtual addresses. The pmap's collection is
1522 * ordered by this virtual address range.
1525 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
1529 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1530 root = pmap->pm_root;
1535 root = vm_page_splay(mpte->pindex, root);
1536 if (mpte->pindex < root->pindex) {
1537 mpte->left = root->left;
1540 } else if (mpte->pindex == root->pindex)
1541 panic("pmap_insert_pt_page: pindex already inserted");
1543 mpte->right = root->right;
1548 pmap->pm_root = mpte;
1552 * Looks for a page table page mapping the specified virtual address in the
1553 * specified pmap's collection of idle page table pages. Returns NULL if there
1554 * is no page table page corresponding to the specified virtual address.
1557 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
1560 vm_pindex_t pindex = va >> PDRSHIFT;
1562 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1563 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
1564 mpte = vm_page_splay(pindex, mpte);
1565 if ((pmap->pm_root = mpte)->pindex != pindex)
1572 * Removes the specified page table page from the specified pmap's collection
1573 * of idle page table pages. The specified page table page must be a member of
1574 * the pmap's collection.
1577 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
1581 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1582 if (mpte != pmap->pm_root)
1583 vm_page_splay(mpte->pindex, pmap->pm_root);
1584 if (mpte->left == NULL)
1587 root = vm_page_splay(mpte->pindex, mpte->left);
1588 root->right = mpte->right;
1590 pmap->pm_root = root;
1594 * This routine unholds page table pages, and if the hold count
1595 * drops to zero, then it decrements the wire count.
1598 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1602 if (m->wire_count == 0)
1603 return (_pmap_unwire_pte_hold(pmap, m, free));
1609 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1614 * unmap the page table page
1616 pmap->pm_pdir[m->pindex] = 0;
1617 --pmap->pm_stats.resident_count;
1620 * This is a release store so that the ordinary store unmapping
1621 * the page table page is globally performed before TLB shoot-
1624 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1627 * Do an invltlb to make the invalidated mapping
1628 * take effect immediately.
1630 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1631 pmap_invalidate_page(pmap, pteva);
1634 * Put page on a list so that it is released after
1635 * *ALL* TLB shootdown is done
1637 pmap_add_delayed_free_list(m, free, TRUE);
1643 * After removing a page table entry, this routine is used to
1644 * conditionally free the page, and manage the hold/wire counts.
1647 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1652 if (va >= VM_MAXUSER_ADDRESS)
1654 ptepde = *pmap_pde(pmap, va);
1655 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1656 return (pmap_unwire_pte_hold(pmap, mpte, free));
1660 * Initialize the pmap for the swapper process.
1663 pmap_pinit0(pmap_t pmap)
1666 PMAP_LOCK_INIT(pmap);
1668 * Since the page table directory is shared with the kernel pmap,
1669 * which is already included in the list "allpmaps", this pmap does
1670 * not need to be inserted into that list.
1672 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1674 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1676 pmap->pm_root = NULL;
1677 pmap->pm_active = 0;
1678 PCPU_SET(curpmap, pmap);
1679 TAILQ_INIT(&pmap->pm_pvchunk);
1680 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1684 * Initialize a preallocated and zeroed pmap structure,
1685 * such as one in a vmspace structure.
1688 pmap_pinit(pmap_t pmap)
1690 vm_page_t m, ptdpg[NPGPTD];
1695 PMAP_LOCK_INIT(pmap);
1698 * No need to allocate page table space yet but we do need a valid
1699 * page directory table.
1701 if (pmap->pm_pdir == NULL) {
1702 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1705 if (pmap->pm_pdir == NULL) {
1706 PMAP_LOCK_DESTROY(pmap);
1710 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1711 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1712 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1713 ("pmap_pinit: pdpt misaligned"));
1714 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1715 ("pmap_pinit: pdpt above 4g"));
1717 pmap->pm_root = NULL;
1719 KASSERT(pmap->pm_root == NULL,
1720 ("pmap_pinit: pmap has reserved page table page(s)"));
1723 * allocate the page directory page(s)
1725 for (i = 0; i < NPGPTD;) {
1726 m = vm_page_alloc(NULL, color++,
1727 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1736 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1738 for (i = 0; i < NPGPTD; i++) {
1739 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1740 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE);
1743 mtx_lock_spin(&allpmaps_lock);
1744 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1745 /* Copy the kernel page table directory entries. */
1746 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1747 mtx_unlock_spin(&allpmaps_lock);
1749 /* install self-referential address mapping entry(s) */
1750 for (i = 0; i < NPGPTD; i++) {
1751 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1752 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1754 pmap->pm_pdpt[i] = pa | PG_V;
1758 pmap->pm_active = 0;
1759 TAILQ_INIT(&pmap->pm_pvchunk);
1760 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1766 * this routine is called if the page table page is not
1770 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1775 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1776 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1777 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1780 * Allocate a page table page.
1782 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1783 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1784 if (flags & M_WAITOK) {
1786 vm_page_unlock_queues();
1788 vm_page_lock_queues();
1793 * Indicate the need to retry. While waiting, the page table
1794 * page may have been allocated.
1798 if ((m->flags & PG_ZERO) == 0)
1802 * Map the pagetable page into the process address space, if
1803 * it isn't already there.
1806 pmap->pm_stats.resident_count++;
1808 ptepa = VM_PAGE_TO_PHYS(m);
1809 pmap->pm_pdir[ptepindex] =
1810 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1816 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1822 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1823 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1824 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1827 * Calculate pagetable page index
1829 ptepindex = va >> PDRSHIFT;
1832 * Get the page directory entry
1834 ptepa = pmap->pm_pdir[ptepindex];
1837 * This supports switching from a 4MB page to a
1840 if (ptepa & PG_PS) {
1841 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va);
1842 ptepa = pmap->pm_pdir[ptepindex];
1846 * If the page table page is mapped, we just increment the
1847 * hold count, and activate it.
1850 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
1854 * Here if the pte page isn't mapped, or if it has
1857 m = _pmap_allocpte(pmap, ptepindex, flags);
1858 if (m == NULL && (flags & M_WAITOK))
1865 /***************************************************
1866 * Pmap allocation/deallocation routines.
1867 ***************************************************/
1871 * Deal with a SMP shootdown of other users of the pmap that we are
1872 * trying to dispose of. This can be a bit hairy.
1874 static cpumask_t *lazymask;
1875 static u_int lazyptd;
1876 static volatile u_int lazywait;
1878 void pmap_lazyfix_action(void);
1881 pmap_lazyfix_action(void)
1883 cpumask_t mymask = PCPU_GET(cpumask);
1886 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1888 if (rcr3() == lazyptd)
1889 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1890 atomic_clear_int(lazymask, mymask);
1891 atomic_store_rel_int(&lazywait, 1);
1895 pmap_lazyfix_self(cpumask_t mymask)
1898 if (rcr3() == lazyptd)
1899 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1900 atomic_clear_int(lazymask, mymask);
1905 pmap_lazyfix(pmap_t pmap)
1907 cpumask_t mymask, mask;
1910 while ((mask = pmap->pm_active) != 0) {
1912 mask = mask & -mask; /* Find least significant set bit */
1913 mtx_lock_spin(&smp_ipi_mtx);
1915 lazyptd = vtophys(pmap->pm_pdpt);
1917 lazyptd = vtophys(pmap->pm_pdir);
1919 mymask = PCPU_GET(cpumask);
1920 if (mask == mymask) {
1921 lazymask = &pmap->pm_active;
1922 pmap_lazyfix_self(mymask);
1924 atomic_store_rel_int((u_int *)&lazymask,
1925 (u_int)&pmap->pm_active);
1926 atomic_store_rel_int(&lazywait, 0);
1927 ipi_selected(mask, IPI_LAZYPMAP);
1928 while (lazywait == 0) {
1934 mtx_unlock_spin(&smp_ipi_mtx);
1936 printf("pmap_lazyfix: spun for 50000000\n");
1943 * Cleaning up on uniprocessor is easy. For various reasons, we're
1944 * unlikely to have to even execute this code, including the fact
1945 * that the cleanup is deferred until the parent does a wait(2), which
1946 * means that another userland process has run.
1949 pmap_lazyfix(pmap_t pmap)
1953 cr3 = vtophys(pmap->pm_pdir);
1954 if (cr3 == rcr3()) {
1955 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1956 pmap->pm_active &= ~(PCPU_GET(cpumask));
1962 * Release any resources held by the given physical map.
1963 * Called when a pmap initialized by pmap_pinit is being released.
1964 * Should only be called if the map contains no valid mappings.
1967 pmap_release(pmap_t pmap)
1969 vm_page_t m, ptdpg[NPGPTD];
1972 KASSERT(pmap->pm_stats.resident_count == 0,
1973 ("pmap_release: pmap resident count %ld != 0",
1974 pmap->pm_stats.resident_count));
1975 KASSERT(pmap->pm_root == NULL,
1976 ("pmap_release: pmap has reserved page table page(s)"));
1979 mtx_lock_spin(&allpmaps_lock);
1980 LIST_REMOVE(pmap, pm_list);
1981 mtx_unlock_spin(&allpmaps_lock);
1983 for (i = 0; i < NPGPTD; i++)
1984 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] &
1987 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1988 sizeof(*pmap->pm_pdir));
1990 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1992 for (i = 0; i < NPGPTD; i++) {
1995 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1996 ("pmap_release: got wrong ptd page"));
1999 atomic_subtract_int(&cnt.v_wire_count, 1);
2000 vm_page_free_zero(m);
2002 PMAP_LOCK_DESTROY(pmap);
2006 kvm_size(SYSCTL_HANDLER_ARGS)
2008 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
2010 return (sysctl_handle_long(oidp, &ksize, 0, req));
2012 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
2013 0, 0, kvm_size, "IU", "Size of KVM");
2016 kvm_free(SYSCTL_HANDLER_ARGS)
2018 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
2020 return (sysctl_handle_long(oidp, &kfree, 0, req));
2022 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
2023 0, 0, kvm_free, "IU", "Amount of KVM free");
2026 * grow the number of kernel page table entries, if needed
2029 pmap_growkernel(vm_offset_t addr)
2031 vm_paddr_t ptppaddr;
2035 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
2036 addr = roundup2(addr, NBPDR);
2037 if (addr - 1 >= kernel_map->max_offset)
2038 addr = kernel_map->max_offset;
2039 while (kernel_vm_end < addr) {
2040 if (pdir_pde(PTD, kernel_vm_end)) {
2041 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
2042 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2043 kernel_vm_end = kernel_map->max_offset;
2049 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
2050 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2053 panic("pmap_growkernel: no memory to grow kernel");
2057 if ((nkpg->flags & PG_ZERO) == 0)
2058 pmap_zero_page(nkpg);
2059 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2060 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
2061 pdir_pde(KPTD, kernel_vm_end) = pgeflag | newpdir;
2063 pmap_kenter_pde(kernel_vm_end, newpdir);
2064 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
2065 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2066 kernel_vm_end = kernel_map->max_offset;
2073 /***************************************************
2074 * page management routines.
2075 ***************************************************/
2077 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
2078 CTASSERT(_NPCM == 11);
2080 static __inline struct pv_chunk *
2081 pv_to_chunk(pv_entry_t pv)
2084 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
2087 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
2089 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
2090 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
2092 static uint32_t pc_freemask[11] = {
2093 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2094 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2095 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2096 PC_FREE0_9, PC_FREE10
2099 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
2100 "Current number of pv entries");
2103 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
2105 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
2106 "Current number of pv entry chunks");
2107 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
2108 "Current number of pv entry chunks allocated");
2109 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
2110 "Current number of pv entry chunks frees");
2111 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
2112 "Number of times tried to get a chunk page but failed.");
2114 static long pv_entry_frees, pv_entry_allocs;
2115 static int pv_entry_spare;
2117 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
2118 "Current number of pv entry frees");
2119 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
2120 "Current number of pv entry allocs");
2121 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
2122 "Current number of spare pv entries");
2124 static int pmap_collect_inactive, pmap_collect_active;
2126 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
2127 "Current number times pmap_collect called on inactive queue");
2128 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
2129 "Current number times pmap_collect called on active queue");
2133 * We are in a serious low memory condition. Resort to
2134 * drastic measures to free some pages so we can allocate
2135 * another pv entry chunk. This is normally called to
2136 * unmap inactive pages, and if necessary, active pages.
2139 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
2143 pt_entry_t *pte, tpte;
2144 pv_entry_t next_pv, pv;
2149 TAILQ_FOREACH(m, &vpq->pl, pageq) {
2150 if (m->hold_count || m->busy)
2152 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
2155 /* Avoid deadlock and lock recursion. */
2156 if (pmap > locked_pmap)
2158 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
2160 pmap->pm_stats.resident_count--;
2161 pde = pmap_pde(pmap, va);
2162 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
2163 " a 4mpage in page %p's pv list", m));
2164 pte = pmap_pte_quick(pmap, va);
2165 tpte = pte_load_clear(pte);
2166 KASSERT((tpte & PG_W) == 0,
2167 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
2169 vm_page_flag_set(m, PG_REFERENCED);
2170 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2173 pmap_unuse_pt(pmap, va, &free);
2174 pmap_invalidate_page(pmap, va);
2175 pmap_free_zero_pages(free);
2176 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2177 free_pv_entry(pmap, pv);
2178 if (pmap != locked_pmap)
2181 if (TAILQ_EMPTY(&m->md.pv_list) &&
2182 TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list))
2183 vm_page_flag_clear(m, PG_WRITEABLE);
2190 * free the pv_entry back to the free list
2193 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2196 struct pv_chunk *pc;
2197 int idx, field, bit;
2199 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2200 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2201 PV_STAT(pv_entry_frees++);
2202 PV_STAT(pv_entry_spare++);
2204 pc = pv_to_chunk(pv);
2205 idx = pv - &pc->pc_pventry[0];
2208 pc->pc_map[field] |= 1ul << bit;
2209 /* move to head of list */
2210 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2211 for (idx = 0; idx < _NPCM; idx++)
2212 if (pc->pc_map[idx] != pc_freemask[idx]) {
2213 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2216 PV_STAT(pv_entry_spare -= _NPCPV);
2217 PV_STAT(pc_chunk_count--);
2218 PV_STAT(pc_chunk_frees++);
2219 /* entire chunk is free, return it */
2220 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2221 pmap_qremove((vm_offset_t)pc, 1);
2222 vm_page_unwire(m, 0);
2224 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2228 * get a new pv_entry, allocating a block from the system
2232 get_pv_entry(pmap_t pmap, int try)
2234 static const struct timeval printinterval = { 60, 0 };
2235 static struct timeval lastprint;
2236 static vm_pindex_t colour;
2237 struct vpgqueues *pq;
2240 struct pv_chunk *pc;
2243 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2244 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2245 PV_STAT(pv_entry_allocs++);
2247 if (pv_entry_count > pv_entry_high_water)
2248 if (ratecheck(&lastprint, &printinterval))
2249 printf("Approaching the limit on PV entries, consider "
2250 "increasing either the vm.pmap.shpgperproc or the "
2251 "vm.pmap.pv_entry_max tunable.\n");
2254 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2256 for (field = 0; field < _NPCM; field++) {
2257 if (pc->pc_map[field]) {
2258 bit = bsfl(pc->pc_map[field]);
2262 if (field < _NPCM) {
2263 pv = &pc->pc_pventry[field * 32 + bit];
2264 pc->pc_map[field] &= ~(1ul << bit);
2265 /* If this was the last item, move it to tail */
2266 for (field = 0; field < _NPCM; field++)
2267 if (pc->pc_map[field] != 0) {
2268 PV_STAT(pv_entry_spare--);
2269 return (pv); /* not full, return */
2271 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2272 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2273 PV_STAT(pv_entry_spare--);
2278 * Access to the ptelist "pv_vafree" is synchronized by the page
2279 * queues lock. If "pv_vafree" is currently non-empty, it will
2280 * remain non-empty until pmap_ptelist_alloc() completes.
2282 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2283 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2284 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2287 PV_STAT(pc_chunk_tryfail++);
2291 * Reclaim pv entries: At first, destroy mappings to
2292 * inactive pages. After that, if a pv chunk entry
2293 * is still needed, destroy mappings to active pages.
2296 PV_STAT(pmap_collect_inactive++);
2297 pq = &vm_page_queues[PQ_INACTIVE];
2298 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2299 PV_STAT(pmap_collect_active++);
2300 pq = &vm_page_queues[PQ_ACTIVE];
2302 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2303 pmap_collect(pmap, pq);
2306 PV_STAT(pc_chunk_count++);
2307 PV_STAT(pc_chunk_allocs++);
2309 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2310 pmap_qenter((vm_offset_t)pc, &m, 1);
2312 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2313 for (field = 1; field < _NPCM; field++)
2314 pc->pc_map[field] = pc_freemask[field];
2315 pv = &pc->pc_pventry[0];
2316 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2317 PV_STAT(pv_entry_spare += _NPCPV - 1);
2321 static __inline pv_entry_t
2322 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2326 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2327 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
2328 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2329 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2337 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2339 struct md_page *pvh;
2341 vm_offset_t va_last;
2344 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2345 KASSERT((pa & PDRMASK) == 0,
2346 ("pmap_pv_demote_pde: pa is not 4mpage aligned"));
2349 * Transfer the 4mpage's pv entry for this mapping to the first
2352 pvh = pa_to_pvh(pa);
2353 va = trunc_4mpage(va);
2354 pv = pmap_pvh_remove(pvh, pmap, va);
2355 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
2356 m = PHYS_TO_VM_PAGE(pa);
2357 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2358 /* Instantiate the remaining NPTEPG - 1 pv entries. */
2359 va_last = va + NBPDR - PAGE_SIZE;
2362 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
2363 ("pmap_pv_demote_pde: page %p is not managed", m));
2365 pmap_insert_entry(pmap, va, m);
2366 } while (va < va_last);
2370 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2372 struct md_page *pvh;
2374 vm_offset_t va_last;
2377 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2378 KASSERT((pa & PDRMASK) == 0,
2379 ("pmap_pv_promote_pde: pa is not 4mpage aligned"));
2382 * Transfer the first page's pv entry for this mapping to the
2383 * 4mpage's pv list. Aside from avoiding the cost of a call
2384 * to get_pv_entry(), a transfer avoids the possibility that
2385 * get_pv_entry() calls pmap_collect() and that pmap_collect()
2386 * removes one of the mappings that is being promoted.
2388 m = PHYS_TO_VM_PAGE(pa);
2389 va = trunc_4mpage(va);
2390 pv = pmap_pvh_remove(&m->md, pmap, va);
2391 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
2392 pvh = pa_to_pvh(pa);
2393 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2394 /* Free the remaining NPTEPG - 1 pv entries. */
2395 va_last = va + NBPDR - PAGE_SIZE;
2399 pmap_pvh_free(&m->md, pmap, va);
2400 } while (va < va_last);
2404 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2408 pv = pmap_pvh_remove(pvh, pmap, va);
2409 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2410 free_pv_entry(pmap, pv);
2414 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2416 struct md_page *pvh;
2418 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2419 pmap_pvh_free(&m->md, pmap, va);
2420 if (TAILQ_EMPTY(&m->md.pv_list)) {
2421 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2422 if (TAILQ_EMPTY(&pvh->pv_list))
2423 vm_page_flag_clear(m, PG_WRITEABLE);
2428 * Create a pv entry for page at pa for
2432 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2436 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2437 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2438 pv = get_pv_entry(pmap, FALSE);
2440 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2444 * Conditionally create a pv entry.
2447 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2451 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2452 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2453 if (pv_entry_count < pv_entry_high_water &&
2454 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2456 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2463 * Create the pv entries for each of the pages within a superpage.
2466 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2468 struct md_page *pvh;
2471 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2472 if (pv_entry_count < pv_entry_high_water &&
2473 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2475 pvh = pa_to_pvh(pa);
2476 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2483 * Fills a page table page with mappings to consecutive physical pages.
2486 pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte)
2490 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
2492 newpte += PAGE_SIZE;
2497 * Tries to demote a 2- or 4MB page mapping. If demotion fails, the
2498 * 2- or 4MB page mapping is invalidated.
2501 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2503 pd_entry_t newpde, oldpde;
2504 pt_entry_t *firstpte, newpte;
2506 vm_page_t free, mpte;
2508 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2510 KASSERT((oldpde & (PG_PS | PG_V)) == (PG_PS | PG_V),
2511 ("pmap_demote_pde: oldpde is missing PG_PS and/or PG_V"));
2512 mpte = pmap_lookup_pt_page(pmap, va);
2514 pmap_remove_pt_page(pmap, mpte);
2516 KASSERT((oldpde & PG_W) == 0,
2517 ("pmap_demote_pde: page table page for a wired mapping"
2521 * Invalidate the 2- or 4MB page mapping and return
2522 * "failure" if the mapping was never accessed or the
2523 * allocation of the new page table page fails.
2525 if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc(NULL,
2526 va >> PDRSHIFT, VM_ALLOC_NOOBJ | VM_ALLOC_NORMAL |
2527 VM_ALLOC_WIRED)) == NULL) {
2529 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free);
2530 pmap_invalidate_page(pmap, trunc_4mpage(va));
2531 pmap_free_zero_pages(free);
2532 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x"
2533 " in pmap %p", va, pmap);
2536 if (va < VM_MAXUSER_ADDRESS)
2537 pmap->pm_stats.resident_count++;
2539 mptepa = VM_PAGE_TO_PHYS(mpte);
2542 * If the page mapping is in the kernel's address space, then the
2543 * KPTmap can provide access to the page table page. Otherwise,
2544 * temporarily map the page table page (mpte) into the kernel's
2545 * address space at either PADDR1 or PADDR2.
2548 firstpte = &KPTmap[i386_btop(trunc_4mpage(va))];
2549 else if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) {
2550 if ((*PMAP1 & PG_FRAME) != mptepa) {
2551 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2553 PMAP1cpu = PCPU_GET(cpuid);
2559 if (PMAP1cpu != PCPU_GET(cpuid)) {
2560 PMAP1cpu = PCPU_GET(cpuid);
2568 mtx_lock(&PMAP2mutex);
2569 if ((*PMAP2 & PG_FRAME) != mptepa) {
2570 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2571 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
2575 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
2576 KASSERT((oldpde & PG_A) != 0,
2577 ("pmap_demote_pde: oldpde is missing PG_A"));
2578 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
2579 ("pmap_demote_pde: oldpde is missing PG_M"));
2580 newpte = oldpde & ~PG_PS;
2581 if ((newpte & PG_PDE_PAT) != 0)
2582 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
2585 * If the page table page is new, initialize it.
2587 if (mpte->wire_count == 1) {
2588 mpte->wire_count = NPTEPG;
2589 pmap_fill_ptp(firstpte, newpte);
2591 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
2592 ("pmap_demote_pde: firstpte and newpte map different physical"
2596 * If the mapping has changed attributes, update the page table
2599 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
2600 pmap_fill_ptp(firstpte, newpte);
2603 * Demote the mapping. This pmap is locked. The old PDE has
2604 * PG_A set. If the old PDE has PG_RW set, it also has PG_M
2605 * set. Thus, there is no danger of a race with another
2606 * processor changing the setting of PG_A and/or PG_M between
2607 * the read above and the store below.
2609 if (workaround_erratum383)
2610 pmap_update_pde(pmap, va, pde, newpde);
2611 else if (pmap == kernel_pmap)
2612 pmap_kenter_pde(va, newpde);
2614 pde_store(pde, newpde);
2615 if (firstpte == PADDR2)
2616 mtx_unlock(&PMAP2mutex);
2619 * Invalidate the recursive mapping of the page table page.
2621 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
2624 * Demote the pv entry. This depends on the earlier demotion
2625 * of the mapping. Specifically, the (re)creation of a per-
2626 * page pv entry might trigger the execution of pmap_collect(),
2627 * which might reclaim a newly (re)created per-page pv entry
2628 * and destroy the associated mapping. In order to destroy
2629 * the mapping, the PDE must have already changed from mapping
2630 * the 2mpage to referencing the page table page.
2632 if ((oldpde & PG_MANAGED) != 0)
2633 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
2635 pmap_pde_demotions++;
2636 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x"
2637 " in pmap %p", va, pmap);
2642 * pmap_remove_pde: do the things to unmap a superpage in a process
2645 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
2648 struct md_page *pvh;
2650 vm_offset_t eva, va;
2653 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2654 KASSERT((sva & PDRMASK) == 0,
2655 ("pmap_remove_pde: sva is not 4mpage aligned"));
2656 oldpde = pte_load_clear(pdq);
2658 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
2661 * Machines that don't support invlpg, also don't support
2665 pmap_invalidate_page(kernel_pmap, sva);
2666 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2667 if (oldpde & PG_MANAGED) {
2668 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
2669 pmap_pvh_free(pvh, pmap, sva);
2671 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2672 va < eva; va += PAGE_SIZE, m++) {
2673 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2676 vm_page_flag_set(m, PG_REFERENCED);
2677 if (TAILQ_EMPTY(&m->md.pv_list) &&
2678 TAILQ_EMPTY(&pvh->pv_list))
2679 vm_page_flag_clear(m, PG_WRITEABLE);
2682 if (pmap == kernel_pmap) {
2683 if (!pmap_demote_pde(pmap, pdq, sva))
2684 panic("pmap_remove_pde: failed demotion");
2686 mpte = pmap_lookup_pt_page(pmap, sva);
2688 pmap_remove_pt_page(pmap, mpte);
2689 pmap->pm_stats.resident_count--;
2690 KASSERT(mpte->wire_count == NPTEPG,
2691 ("pmap_remove_pde: pte page wire count error"));
2692 mpte->wire_count = 0;
2693 pmap_add_delayed_free_list(mpte, free, FALSE);
2694 atomic_subtract_int(&cnt.v_wire_count, 1);
2700 * pmap_remove_pte: do the things to unmap a page in a process
2703 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2708 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2709 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2710 oldpte = pte_load_clear(ptq);
2712 pmap->pm_stats.wired_count -= 1;
2714 * Machines that don't support invlpg, also don't support
2718 pmap_invalidate_page(kernel_pmap, va);
2719 pmap->pm_stats.resident_count -= 1;
2720 if (oldpte & PG_MANAGED) {
2721 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
2722 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2725 vm_page_flag_set(m, PG_REFERENCED);
2726 pmap_remove_entry(pmap, m, va);
2728 return (pmap_unuse_pt(pmap, va, free));
2732 * Remove a single page from a process address space
2735 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2739 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2740 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2741 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2742 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2744 pmap_remove_pte(pmap, pte, va, free);
2745 pmap_invalidate_page(pmap, va);
2749 * Remove the given range of addresses from the specified map.
2751 * It is assumed that the start and end are properly
2752 * rounded to the page size.
2755 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2760 vm_page_t free = NULL;
2764 * Perform an unsynchronized read. This is, however, safe.
2766 if (pmap->pm_stats.resident_count == 0)
2771 vm_page_lock_queues();
2776 * special handling of removing one page. a very
2777 * common operation and easy to short circuit some
2780 if ((sva + PAGE_SIZE == eva) &&
2781 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2782 pmap_remove_page(pmap, sva, &free);
2786 for (; sva < eva; sva = pdnxt) {
2790 * Calculate index for next page table.
2792 pdnxt = (sva + NBPDR) & ~PDRMASK;
2795 if (pmap->pm_stats.resident_count == 0)
2798 pdirindex = sva >> PDRSHIFT;
2799 ptpaddr = pmap->pm_pdir[pdirindex];
2802 * Weed out invalid mappings. Note: we assume that the page
2803 * directory table is always allocated, and in kernel virtual.
2809 * Check for large page.
2811 if ((ptpaddr & PG_PS) != 0) {
2813 * Are we removing the entire large page? If not,
2814 * demote the mapping and fall through.
2816 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2818 * The TLB entry for a PG_G mapping is
2819 * invalidated by pmap_remove_pde().
2821 if ((ptpaddr & PG_G) == 0)
2823 pmap_remove_pde(pmap,
2824 &pmap->pm_pdir[pdirindex], sva, &free);
2826 } else if (!pmap_demote_pde(pmap,
2827 &pmap->pm_pdir[pdirindex], sva)) {
2828 /* The large page mapping was destroyed. */
2834 * Limit our scan to either the end of the va represented
2835 * by the current page table page, or to the end of the
2836 * range being removed.
2841 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2847 * The TLB entry for a PG_G mapping is invalidated
2848 * by pmap_remove_pte().
2850 if ((*pte & PG_G) == 0)
2852 if (pmap_remove_pte(pmap, pte, sva, &free))
2859 pmap_invalidate_all(pmap);
2860 vm_page_unlock_queues();
2862 pmap_free_zero_pages(free);
2866 * Routine: pmap_remove_all
2868 * Removes this physical page from
2869 * all physical maps in which it resides.
2870 * Reflects back modify bits to the pager.
2873 * Original versions of this routine were very
2874 * inefficient because they iteratively called
2875 * pmap_remove (slow...)
2879 pmap_remove_all(vm_page_t m)
2881 struct md_page *pvh;
2884 pt_entry_t *pte, tpte;
2889 KASSERT((m->flags & PG_FICTITIOUS) == 0,
2890 ("pmap_remove_all: page %p is fictitious", m));
2892 vm_page_lock_queues();
2894 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2895 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2899 pde = pmap_pde(pmap, va);
2900 (void)pmap_demote_pde(pmap, pde, va);
2903 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2906 pmap->pm_stats.resident_count--;
2907 pde = pmap_pde(pmap, pv->pv_va);
2908 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
2909 " a 4mpage in page %p's pv list", m));
2910 pte = pmap_pte_quick(pmap, pv->pv_va);
2911 tpte = pte_load_clear(pte);
2913 pmap->pm_stats.wired_count--;
2915 vm_page_flag_set(m, PG_REFERENCED);
2918 * Update the vm_page_t clean and reference bits.
2920 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2922 pmap_unuse_pt(pmap, pv->pv_va, &free);
2923 pmap_invalidate_page(pmap, pv->pv_va);
2924 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2925 free_pv_entry(pmap, pv);
2928 vm_page_flag_clear(m, PG_WRITEABLE);
2930 vm_page_unlock_queues();
2931 pmap_free_zero_pages(free);
2935 * pmap_protect_pde: do the things to protect a 4mpage in a process
2938 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
2940 pd_entry_t newpde, oldpde;
2941 vm_offset_t eva, va;
2943 boolean_t anychanged;
2945 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2946 KASSERT((sva & PDRMASK) == 0,
2947 ("pmap_protect_pde: sva is not 4mpage aligned"));
2950 oldpde = newpde = *pde;
2951 if (oldpde & PG_MANAGED) {
2953 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2954 va < eva; va += PAGE_SIZE, m++)
2955 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2958 if ((prot & VM_PROT_WRITE) == 0)
2959 newpde &= ~(PG_RW | PG_M);
2961 if ((prot & VM_PROT_EXECUTE) == 0)
2964 if (newpde != oldpde) {
2965 if (!pde_cmpset(pde, oldpde, newpde))
2968 pmap_invalidate_page(pmap, sva);
2972 return (anychanged);
2976 * Set the physical protection on the
2977 * specified range of this map as requested.
2980 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2987 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2988 pmap_remove(pmap, sva, eva);
2993 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2994 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2997 if (prot & VM_PROT_WRITE)
3003 vm_page_lock_queues();
3006 for (; sva < eva; sva = pdnxt) {
3007 pt_entry_t obits, pbits;
3010 pdnxt = (sva + NBPDR) & ~PDRMASK;
3014 pdirindex = sva >> PDRSHIFT;
3015 ptpaddr = pmap->pm_pdir[pdirindex];
3018 * Weed out invalid mappings. Note: we assume that the page
3019 * directory table is always allocated, and in kernel virtual.
3025 * Check for large page.
3027 if ((ptpaddr & PG_PS) != 0) {
3029 * Are we protecting the entire large page? If not,
3030 * demote the mapping and fall through.
3032 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
3034 * The TLB entry for a PG_G mapping is
3035 * invalidated by pmap_protect_pde().
3037 if (pmap_protect_pde(pmap,
3038 &pmap->pm_pdir[pdirindex], sva, prot))
3041 } else if (!pmap_demote_pde(pmap,
3042 &pmap->pm_pdir[pdirindex], sva)) {
3043 /* The large page mapping was destroyed. */
3051 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3057 * Regardless of whether a pte is 32 or 64 bits in
3058 * size, PG_RW, PG_A, and PG_M are among the least
3059 * significant 32 bits.
3061 obits = pbits = *pte;
3062 if ((pbits & PG_V) == 0)
3065 if ((prot & VM_PROT_WRITE) == 0) {
3066 if ((pbits & (PG_MANAGED | PG_M | PG_RW)) ==
3067 (PG_MANAGED | PG_M | PG_RW)) {
3068 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
3071 pbits &= ~(PG_RW | PG_M);
3074 if ((prot & VM_PROT_EXECUTE) == 0)
3078 if (pbits != obits) {
3080 if (!atomic_cmpset_64(pte, obits, pbits))
3083 if (!atomic_cmpset_int((u_int *)pte, obits,
3088 pmap_invalidate_page(pmap, sva);
3096 pmap_invalidate_all(pmap);
3097 vm_page_unlock_queues();
3102 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are
3103 * within a single page table page (PTP) to a single 2- or 4MB page mapping.
3104 * For promotion to occur, two conditions must be met: (1) the 4KB page
3105 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
3106 * mappings must have identical characteristics.
3108 * Managed (PG_MANAGED) mappings within the kernel address space are not
3109 * promoted. The reason is that kernel PDEs are replicated in each pmap but
3110 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel
3114 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
3117 pt_entry_t *firstpte, oldpte, pa, *pte;
3118 vm_offset_t oldpteva;
3121 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3124 * Examine the first PTE in the specified PTP. Abort if this PTE is
3125 * either invalid, unused, or does not map the first 4KB physical page
3126 * within a 2- or 4MB page.
3128 firstpte = pmap_pte_quick(pmap, trunc_4mpage(va));
3131 if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
3132 pmap_pde_p_failures++;
3133 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3134 " in pmap %p", va, pmap);
3137 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) {
3138 pmap_pde_p_failures++;
3139 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3140 " in pmap %p", va, pmap);
3143 if ((newpde & (PG_M | PG_RW)) == PG_RW) {
3145 * When PG_M is already clear, PG_RW can be cleared without
3146 * a TLB invalidation.
3148 if (!atomic_cmpset_int((u_int *)firstpte, newpde, newpde &
3155 * Examine each of the other PTEs in the specified PTP. Abort if this
3156 * PTE maps an unexpected 4KB physical page or does not have identical
3157 * characteristics to the first PTE.
3159 pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
3160 for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
3163 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
3164 pmap_pde_p_failures++;
3165 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3166 " in pmap %p", va, pmap);
3169 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
3171 * When PG_M is already clear, PG_RW can be cleared
3172 * without a TLB invalidation.
3174 if (!atomic_cmpset_int((u_int *)pte, oldpte,
3178 oldpteva = (oldpte & PG_FRAME & PDRMASK) |
3180 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x"
3181 " in pmap %p", oldpteva, pmap);
3183 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
3184 pmap_pde_p_failures++;
3185 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3186 " in pmap %p", va, pmap);
3193 * Save the page table page in its current state until the PDE
3194 * mapping the superpage is demoted by pmap_demote_pde() or
3195 * destroyed by pmap_remove_pde().
3197 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
3198 KASSERT(mpte >= vm_page_array &&
3199 mpte < &vm_page_array[vm_page_array_size],
3200 ("pmap_promote_pde: page table page is out of range"));
3201 KASSERT(mpte->pindex == va >> PDRSHIFT,
3202 ("pmap_promote_pde: page table page's pindex is wrong"));
3203 pmap_insert_pt_page(pmap, mpte);
3206 * Promote the pv entries.
3208 if ((newpde & PG_MANAGED) != 0)
3209 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
3212 * Propagate the PAT index to its proper position.
3214 if ((newpde & PG_PTE_PAT) != 0)
3215 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
3218 * Map the superpage.
3220 if (workaround_erratum383)
3221 pmap_update_pde(pmap, va, pde, PG_PS | newpde);
3222 else if (pmap == kernel_pmap)
3223 pmap_kenter_pde(va, PG_PS | newpde);
3225 pde_store(pde, PG_PS | newpde);
3227 pmap_pde_promotions++;
3228 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x"
3229 " in pmap %p", va, pmap);
3233 * Insert the given physical page (p) at
3234 * the specified virtual address (v) in the
3235 * target physical map with the protection requested.
3237 * If specified, the page will be wired down, meaning
3238 * that the related pte can not be reclaimed.
3240 * NB: This is the only routine which MAY NOT lazy-evaluate
3241 * or lose information. That is, this routine must actually
3242 * insert this page into the given map NOW.
3245 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
3246 vm_prot_t prot, boolean_t wired)
3250 pt_entry_t newpte, origpte;
3256 va = trunc_page(va);
3257 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
3258 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
3259 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)",
3261 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0 ||
3262 (m->oflags & VPO_BUSY) != 0,
3263 ("pmap_enter: page %p is not busy", m));
3267 vm_page_lock_queues();
3272 * In the case that a page table page is not
3273 * resident, we are creating it here.
3275 if (va < VM_MAXUSER_ADDRESS) {
3276 mpte = pmap_allocpte(pmap, va, M_WAITOK);
3279 pde = pmap_pde(pmap, va);
3280 if ((*pde & PG_PS) != 0)
3281 panic("pmap_enter: attempted pmap_enter on 4MB page");
3282 pte = pmap_pte_quick(pmap, va);
3285 * Page Directory table entry not valid, we need a new PT page
3288 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
3289 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
3292 pa = VM_PAGE_TO_PHYS(m);
3295 opa = origpte & PG_FRAME;
3298 * Mapping has not changed, must be protection or wiring change.
3300 if (origpte && (opa == pa)) {
3302 * Wiring change, just update stats. We don't worry about
3303 * wiring PT pages as they remain resident as long as there
3304 * are valid mappings in them. Hence, if a user page is wired,
3305 * the PT page will be also.
3307 if (wired && ((origpte & PG_W) == 0))
3308 pmap->pm_stats.wired_count++;
3309 else if (!wired && (origpte & PG_W))
3310 pmap->pm_stats.wired_count--;
3313 * Remove extra pte reference
3318 if (origpte & PG_MANAGED) {
3328 * Mapping has changed, invalidate old range and fall through to
3329 * handle validating new mapping.
3333 pmap->pm_stats.wired_count--;
3334 if (origpte & PG_MANAGED) {
3335 om = PHYS_TO_VM_PAGE(opa);
3336 pv = pmap_pvh_remove(&om->md, pmap, va);
3340 KASSERT(mpte->wire_count > 0,
3341 ("pmap_enter: missing reference to page table page,"
3345 pmap->pm_stats.resident_count++;
3348 * Enter on the PV list if part of our managed memory.
3350 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3351 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3352 ("pmap_enter: managed mapping within the clean submap"));
3354 pv = get_pv_entry(pmap, FALSE);
3356 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3358 } else if (pv != NULL)
3359 free_pv_entry(pmap, pv);
3362 * Increment counters
3365 pmap->pm_stats.wired_count++;
3369 * Now validate mapping with desired protection/wiring.
3371 newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
3372 if ((prot & VM_PROT_WRITE) != 0) {
3374 if ((newpte & PG_MANAGED) != 0)
3375 vm_page_flag_set(m, PG_WRITEABLE);
3378 if ((prot & VM_PROT_EXECUTE) == 0)
3383 if (va < VM_MAXUSER_ADDRESS)
3385 if (pmap == kernel_pmap)
3389 * if the mapping or permission bits are different, we need
3390 * to update the pte.
3392 if ((origpte & ~(PG_M|PG_A)) != newpte) {
3394 if ((access & VM_PROT_WRITE) != 0)
3396 if (origpte & PG_V) {
3398 origpte = pte_load_store(pte, newpte);
3399 if (origpte & PG_A) {
3400 if (origpte & PG_MANAGED)
3401 vm_page_flag_set(om, PG_REFERENCED);
3402 if (opa != VM_PAGE_TO_PHYS(m))
3405 if ((origpte & PG_NX) == 0 &&
3406 (newpte & PG_NX) != 0)
3410 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3411 if ((origpte & PG_MANAGED) != 0)
3413 if ((prot & VM_PROT_WRITE) == 0)
3416 if ((origpte & PG_MANAGED) != 0 &&
3417 TAILQ_EMPTY(&om->md.pv_list) &&
3418 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list))
3419 vm_page_flag_clear(om, PG_WRITEABLE);
3421 pmap_invalidate_page(pmap, va);
3423 pte_store(pte, newpte);
3427 * If both the page table page and the reservation are fully
3428 * populated, then attempt promotion.
3430 if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
3431 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
3432 pmap_promote_pde(pmap, pde, va);
3435 vm_page_unlock_queues();
3440 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and
3441 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without
3442 * blocking, (2) a mapping already exists at the specified virtual address, or
3443 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3446 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3448 pd_entry_t *pde, newpde;
3450 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3451 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3452 pde = pmap_pde(pmap, va);
3454 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3455 " in pmap %p", va, pmap);
3458 newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
3460 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3461 newpde |= PG_MANAGED;
3464 * Abort this mapping if its PV entry could not be created.
3466 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
3467 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3468 " in pmap %p", va, pmap);
3473 if ((prot & VM_PROT_EXECUTE) == 0)
3476 if (va < VM_MAXUSER_ADDRESS)
3480 * Increment counters.
3482 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3485 * Map the superpage.
3487 pde_store(pde, newpde);
3489 pmap_pde_mappings++;
3490 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
3491 " in pmap %p", va, pmap);
3496 * Maps a sequence of resident pages belonging to the same object.
3497 * The sequence begins with the given page m_start. This page is
3498 * mapped at the given virtual address start. Each subsequent page is
3499 * mapped at a virtual address that is offset from start by the same
3500 * amount as the page is offset from m_start within the object. The
3501 * last page in the sequence is the page with the largest offset from
3502 * m_start that can be mapped at a virtual address less than the given
3503 * virtual address end. Not every virtual page between start and end
3504 * is mapped; only those for which a resident page exists with the
3505 * corresponding offset from m_start are mapped.
3508 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3509 vm_page_t m_start, vm_prot_t prot)
3513 vm_pindex_t diff, psize;
3515 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
3516 psize = atop(end - start);
3519 vm_page_lock_queues();
3521 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3522 va = start + ptoa(diff);
3523 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
3524 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
3525 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3526 pmap_enter_pde(pmap, va, m, prot))
3527 m = &m[NBPDR / PAGE_SIZE - 1];
3529 mpte = pmap_enter_quick_locked(pmap, va, m, prot,
3531 m = TAILQ_NEXT(m, listq);
3533 vm_page_unlock_queues();
3538 * this code makes some *MAJOR* assumptions:
3539 * 1. Current pmap & pmap exists.
3542 * 4. No page table pages.
3543 * but is *MUCH* faster than pmap_enter...
3547 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3550 vm_page_lock_queues();
3552 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL);
3553 vm_page_unlock_queues();
3558 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3559 vm_prot_t prot, vm_page_t mpte)
3565 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3566 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
3567 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3568 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3569 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3572 * In the case that a page table page is not
3573 * resident, we are creating it here.
3575 if (va < VM_MAXUSER_ADDRESS) {
3580 * Calculate pagetable page index
3582 ptepindex = va >> PDRSHIFT;
3583 if (mpte && (mpte->pindex == ptepindex)) {
3587 * Get the page directory entry
3589 ptepa = pmap->pm_pdir[ptepindex];
3592 * If the page table page is mapped, we just increment
3593 * the hold count, and activate it.
3598 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
3601 mpte = _pmap_allocpte(pmap, ptepindex,
3612 * This call to vtopte makes the assumption that we are
3613 * entering the page into the current pmap. In order to support
3614 * quick entry into any pmap, one would likely use pmap_pte_quick.
3615 * But that isn't as quick as vtopte.
3627 * Enter on the PV list if part of our managed memory.
3629 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
3630 !pmap_try_insert_pv_entry(pmap, va, m)) {
3633 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3634 pmap_invalidate_page(pmap, va);
3635 pmap_free_zero_pages(free);
3644 * Increment counters
3646 pmap->pm_stats.resident_count++;
3648 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
3650 if ((prot & VM_PROT_EXECUTE) == 0)
3655 * Now validate mapping with RO protection
3657 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3658 pte_store(pte, pa | PG_V | PG_U);
3660 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3665 * Make a temporary mapping for a physical address. This is only intended
3666 * to be used for panic dumps.
3669 pmap_kenter_temporary(vm_paddr_t pa, int i)
3673 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3674 pmap_kenter(va, pa);
3676 return ((void *)crashdumpmap);
3680 * This code maps large physical mmap regions into the
3681 * processor address space. Note that some shortcuts
3682 * are taken, but the code works.
3685 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3686 vm_pindex_t pindex, vm_size_t size)
3689 vm_paddr_t pa, ptepa;
3693 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3694 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3695 ("pmap_object_init_pt: non-device object"));
3697 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3698 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3700 p = vm_page_lookup(object, pindex);
3701 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3702 ("pmap_object_init_pt: invalid page %p", p));
3703 pat_mode = p->md.pat_mode;
3706 * Abort the mapping if the first page is not physically
3707 * aligned to a 2/4MB page boundary.
3709 ptepa = VM_PAGE_TO_PHYS(p);
3710 if (ptepa & (NBPDR - 1))
3714 * Skip the first page. Abort the mapping if the rest of
3715 * the pages are not physically contiguous or have differing
3716 * memory attributes.
3718 p = TAILQ_NEXT(p, listq);
3719 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3721 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3722 ("pmap_object_init_pt: invalid page %p", p));
3723 if (pa != VM_PAGE_TO_PHYS(p) ||
3724 pat_mode != p->md.pat_mode)
3726 p = TAILQ_NEXT(p, listq);
3730 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3731 * "size" is a multiple of 2/4M, adding the PAT setting to
3732 * "pa" will not affect the termination of this loop.
3735 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3736 size; pa += NBPDR) {
3737 pde = pmap_pde(pmap, addr);
3739 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3740 PG_U | PG_RW | PG_V);
3741 pmap->pm_stats.resident_count += NBPDR /
3743 pmap_pde_mappings++;
3745 /* Else continue on if the PDE is already valid. */
3753 * Routine: pmap_change_wiring
3754 * Function: Change the wiring attribute for a map/virtual-address
3756 * In/out conditions:
3757 * The mapping must already exist in the pmap.
3760 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3764 boolean_t are_queues_locked;
3766 are_queues_locked = FALSE;
3769 pde = pmap_pde(pmap, va);
3770 if ((*pde & PG_PS) != 0) {
3771 if (!wired != ((*pde & PG_W) == 0)) {
3772 if (!are_queues_locked) {
3773 are_queues_locked = TRUE;
3774 if (!mtx_trylock(&vm_page_queue_mtx)) {
3776 vm_page_lock_queues();
3780 if (!pmap_demote_pde(pmap, pde, va))
3781 panic("pmap_change_wiring: demotion failed");
3785 pte = pmap_pte(pmap, va);
3787 if (wired && !pmap_pte_w(pte))
3788 pmap->pm_stats.wired_count++;
3789 else if (!wired && pmap_pte_w(pte))
3790 pmap->pm_stats.wired_count--;
3793 * Wiring is not a hardware characteristic so there is no need to
3796 pmap_pte_set_w(pte, wired);
3797 pmap_pte_release(pte);
3799 if (are_queues_locked)
3800 vm_page_unlock_queues();
3807 * Copy the range specified by src_addr/len
3808 * from the source map to the range dst_addr/len
3809 * in the destination map.
3811 * This routine is only advisory and need not do anything.
3815 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3816 vm_offset_t src_addr)
3820 vm_offset_t end_addr = src_addr + len;
3823 if (dst_addr != src_addr)
3826 if (!pmap_is_current(src_pmap))
3829 vm_page_lock_queues();
3830 if (dst_pmap < src_pmap) {
3831 PMAP_LOCK(dst_pmap);
3832 PMAP_LOCK(src_pmap);
3834 PMAP_LOCK(src_pmap);
3835 PMAP_LOCK(dst_pmap);
3838 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3839 pt_entry_t *src_pte, *dst_pte;
3840 vm_page_t dstmpte, srcmpte;
3841 pd_entry_t srcptepaddr;
3844 KASSERT(addr < UPT_MIN_ADDRESS,
3845 ("pmap_copy: invalid to pmap_copy page tables"));
3847 pdnxt = (addr + NBPDR) & ~PDRMASK;
3850 ptepindex = addr >> PDRSHIFT;
3852 srcptepaddr = src_pmap->pm_pdir[ptepindex];
3853 if (srcptepaddr == 0)
3856 if (srcptepaddr & PG_PS) {
3857 if (dst_pmap->pm_pdir[ptepindex] == 0 &&
3858 ((srcptepaddr & PG_MANAGED) == 0 ||
3859 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
3861 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
3863 dst_pmap->pm_stats.resident_count +=
3869 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3870 KASSERT(srcmpte->wire_count > 0,
3871 ("pmap_copy: source page table page is unused"));
3873 if (pdnxt > end_addr)
3876 src_pte = vtopte(addr);
3877 while (addr < pdnxt) {
3881 * we only virtual copy managed pages
3883 if ((ptetemp & PG_MANAGED) != 0) {
3884 dstmpte = pmap_allocpte(dst_pmap, addr,
3886 if (dstmpte == NULL)
3888 dst_pte = pmap_pte_quick(dst_pmap, addr);
3889 if (*dst_pte == 0 &&
3890 pmap_try_insert_pv_entry(dst_pmap, addr,
3891 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
3893 * Clear the wired, modified, and
3894 * accessed (referenced) bits
3897 *dst_pte = ptetemp & ~(PG_W | PG_M |
3899 dst_pmap->pm_stats.resident_count++;
3902 if (pmap_unwire_pte_hold(dst_pmap,
3904 pmap_invalidate_page(dst_pmap,
3906 pmap_free_zero_pages(free);
3910 if (dstmpte->wire_count >= srcmpte->wire_count)
3919 vm_page_unlock_queues();
3920 PMAP_UNLOCK(src_pmap);
3921 PMAP_UNLOCK(dst_pmap);
3924 static __inline void
3925 pagezero(void *page)
3927 #if defined(I686_CPU)
3928 if (cpu_class == CPUCLASS_686) {
3929 #if defined(CPU_ENABLE_SSE)
3930 if (cpu_feature & CPUID_SSE2)
3931 sse2_pagezero(page);
3934 i686_pagezero(page);
3937 bzero(page, PAGE_SIZE);
3941 * pmap_zero_page zeros the specified hardware page by mapping
3942 * the page into KVM and using bzero to clear its contents.
3945 pmap_zero_page(vm_page_t m)
3947 struct sysmaps *sysmaps;
3949 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3950 mtx_lock(&sysmaps->lock);
3951 if (*sysmaps->CMAP2)
3952 panic("pmap_zero_page: CMAP2 busy");
3954 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3955 pmap_cache_bits(m->md.pat_mode, 0);
3956 invlcaddr(sysmaps->CADDR2);
3957 pagezero(sysmaps->CADDR2);
3958 *sysmaps->CMAP2 = 0;
3960 mtx_unlock(&sysmaps->lock);
3964 * pmap_zero_page_area zeros the specified hardware page by mapping
3965 * the page into KVM and using bzero to clear its contents.
3967 * off and size may not cover an area beyond a single hardware page.
3970 pmap_zero_page_area(vm_page_t m, int off, int size)
3972 struct sysmaps *sysmaps;
3974 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3975 mtx_lock(&sysmaps->lock);
3976 if (*sysmaps->CMAP2)
3977 panic("pmap_zero_page_area: CMAP2 busy");
3979 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3980 pmap_cache_bits(m->md.pat_mode, 0);
3981 invlcaddr(sysmaps->CADDR2);
3982 if (off == 0 && size == PAGE_SIZE)
3983 pagezero(sysmaps->CADDR2);
3985 bzero((char *)sysmaps->CADDR2 + off, size);
3986 *sysmaps->CMAP2 = 0;
3988 mtx_unlock(&sysmaps->lock);
3992 * pmap_zero_page_idle zeros the specified hardware page by mapping
3993 * the page into KVM and using bzero to clear its contents. This
3994 * is intended to be called from the vm_pagezero process only and
3998 pmap_zero_page_idle(vm_page_t m)
4002 panic("pmap_zero_page_idle: CMAP3 busy");
4004 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
4005 pmap_cache_bits(m->md.pat_mode, 0);
4013 * pmap_copy_page copies the specified (machine independent)
4014 * page by mapping the page into virtual memory and using
4015 * bcopy to copy the page, one machine dependent page at a
4019 pmap_copy_page(vm_page_t src, vm_page_t dst)
4021 struct sysmaps *sysmaps;
4023 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4024 mtx_lock(&sysmaps->lock);
4025 if (*sysmaps->CMAP1)
4026 panic("pmap_copy_page: CMAP1 busy");
4027 if (*sysmaps->CMAP2)
4028 panic("pmap_copy_page: CMAP2 busy");
4030 invlpg((u_int)sysmaps->CADDR1);
4031 invlpg((u_int)sysmaps->CADDR2);
4032 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
4033 pmap_cache_bits(src->md.pat_mode, 0);
4034 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
4035 pmap_cache_bits(dst->md.pat_mode, 0);
4036 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
4037 *sysmaps->CMAP1 = 0;
4038 *sysmaps->CMAP2 = 0;
4040 mtx_unlock(&sysmaps->lock);
4044 * Returns true if the pmap's pv is one of the first
4045 * 16 pvs linked to from this page. This count may
4046 * be changed upwards or downwards in the future; it
4047 * is only necessary that true be returned for a small
4048 * subset of pmaps for proper page aging.
4051 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
4053 struct md_page *pvh;
4058 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4059 ("pmap_page_exists_quick: page %p is not managed", m));
4061 vm_page_lock_queues();
4062 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4063 if (PV_PMAP(pv) == pmap) {
4071 if (!rv && loops < 16) {
4072 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4073 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4074 if (PV_PMAP(pv) == pmap) {
4083 vm_page_unlock_queues();
4088 * pmap_page_wired_mappings:
4090 * Return the number of managed mappings to the given physical page
4094 pmap_page_wired_mappings(vm_page_t m)
4099 if ((m->flags & PG_FICTITIOUS) != 0)
4101 vm_page_lock_queues();
4102 count = pmap_pvh_wired_mappings(&m->md, count);
4103 count = pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count);
4104 vm_page_unlock_queues();
4109 * pmap_pvh_wired_mappings:
4111 * Return the updated number "count" of managed mappings that are wired.
4114 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
4120 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4122 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4125 pte = pmap_pte_quick(pmap, pv->pv_va);
4126 if ((*pte & PG_W) != 0)
4135 * Returns TRUE if the given page is mapped individually or as part of
4136 * a 4mpage. Otherwise, returns FALSE.
4139 pmap_page_is_mapped(vm_page_t m)
4143 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
4145 vm_page_lock_queues();
4146 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
4147 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list);
4148 vm_page_unlock_queues();
4153 * Remove all pages from specified address space
4154 * this aids process exit speeds. Also, this code
4155 * is special cased for current process only, but
4156 * can have the more generic (and slightly slower)
4157 * mode enabled. This is much faster than pmap_remove
4158 * in the case of running down an entire address space.
4161 pmap_remove_pages(pmap_t pmap)
4163 pt_entry_t *pte, tpte;
4164 vm_page_t free = NULL;
4165 vm_page_t m, mpte, mt;
4167 struct md_page *pvh;
4168 struct pv_chunk *pc, *npc;
4171 uint32_t inuse, bitmask;
4174 if (pmap != PCPU_GET(curpmap)) {
4175 printf("warning: pmap_remove_pages called with non-current pmap\n");
4178 vm_page_lock_queues();
4181 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
4183 for (field = 0; field < _NPCM; field++) {
4184 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
4185 while (inuse != 0) {
4187 bitmask = 1UL << bit;
4188 idx = field * 32 + bit;
4189 pv = &pc->pc_pventry[idx];
4192 pte = pmap_pde(pmap, pv->pv_va);
4194 if ((tpte & PG_PS) == 0) {
4195 pte = vtopte(pv->pv_va);
4196 tpte = *pte & ~PG_PTE_PAT;
4201 "TPTE at %p IS ZERO @ VA %08x\n",
4207 * We cannot remove wired pages from a process' mapping at this time
4214 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
4215 KASSERT(m->phys_addr == (tpte & PG_FRAME),
4216 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
4217 m, (uintmax_t)m->phys_addr,
4220 KASSERT(m < &vm_page_array[vm_page_array_size],
4221 ("pmap_remove_pages: bad tpte %#jx",
4227 * Update the vm_page_t clean/reference bits.
4229 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4230 if ((tpte & PG_PS) != 0) {
4231 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4238 PV_STAT(pv_entry_frees++);
4239 PV_STAT(pv_entry_spare++);
4241 pc->pc_map[field] |= bitmask;
4242 if ((tpte & PG_PS) != 0) {
4243 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
4244 pvh = pa_to_pvh(tpte & PG_PS_FRAME);
4245 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
4246 if (TAILQ_EMPTY(&pvh->pv_list)) {
4247 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4248 if (TAILQ_EMPTY(&mt->md.pv_list))
4249 vm_page_flag_clear(mt, PG_WRITEABLE);
4251 mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
4253 pmap_remove_pt_page(pmap, mpte);
4254 pmap->pm_stats.resident_count--;
4255 KASSERT(mpte->wire_count == NPTEPG,
4256 ("pmap_remove_pages: pte page wire count error"));
4257 mpte->wire_count = 0;
4258 pmap_add_delayed_free_list(mpte, &free, FALSE);
4259 atomic_subtract_int(&cnt.v_wire_count, 1);
4262 pmap->pm_stats.resident_count--;
4263 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4264 if (TAILQ_EMPTY(&m->md.pv_list)) {
4265 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4266 if (TAILQ_EMPTY(&pvh->pv_list))
4267 vm_page_flag_clear(m, PG_WRITEABLE);
4269 pmap_unuse_pt(pmap, pv->pv_va, &free);
4274 PV_STAT(pv_entry_spare -= _NPCPV);
4275 PV_STAT(pc_chunk_count--);
4276 PV_STAT(pc_chunk_frees++);
4277 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4278 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4279 pmap_qremove((vm_offset_t)pc, 1);
4280 vm_page_unwire(m, 0);
4282 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4286 pmap_invalidate_all(pmap);
4287 vm_page_unlock_queues();
4289 pmap_free_zero_pages(free);
4295 * Return whether or not the specified physical page was modified
4296 * in any physical maps.
4299 pmap_is_modified(vm_page_t m)
4303 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4304 ("pmap_is_modified: page %p is not managed", m));
4307 * If the page is not VPO_BUSY, then PG_WRITEABLE cannot be
4308 * concurrently set while the object is locked. Thus, if PG_WRITEABLE
4309 * is clear, no PTEs can have PG_M set.
4311 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
4312 if ((m->oflags & VPO_BUSY) == 0 &&
4313 (m->flags & PG_WRITEABLE) == 0)
4315 vm_page_lock_queues();
4316 rv = pmap_is_modified_pvh(&m->md) ||
4317 pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m)));
4318 vm_page_unlock_queues();
4323 * Returns TRUE if any of the given mappings were used to modify
4324 * physical memory. Otherwise, returns FALSE. Both page and 2mpage
4325 * mappings are supported.
4328 pmap_is_modified_pvh(struct md_page *pvh)
4335 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4338 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4341 pte = pmap_pte_quick(pmap, pv->pv_va);
4342 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
4352 * pmap_is_prefaultable:
4354 * Return whether or not the specified virtual address is elgible
4358 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
4366 pde = pmap_pde(pmap, addr);
4367 if (*pde != 0 && (*pde & PG_PS) == 0) {
4376 * pmap_is_referenced:
4378 * Return whether or not the specified physical page was referenced
4379 * in any physical maps.
4382 pmap_is_referenced(vm_page_t m)
4386 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4387 ("pmap_is_referenced: page %p is not managed", m));
4388 vm_page_lock_queues();
4389 rv = pmap_is_referenced_pvh(&m->md) ||
4390 pmap_is_referenced_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m)));
4391 vm_page_unlock_queues();
4396 * Returns TRUE if any of the given mappings were referenced and FALSE
4397 * otherwise. Both page and 4mpage mappings are supported.
4400 pmap_is_referenced_pvh(struct md_page *pvh)
4407 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4410 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4413 pte = pmap_pte_quick(pmap, pv->pv_va);
4414 rv = (*pte & (PG_A | PG_V)) == (PG_A | PG_V);
4424 * Clear the write and modified bits in each of the given page's mappings.
4427 pmap_remove_write(vm_page_t m)
4429 struct md_page *pvh;
4430 pv_entry_t next_pv, pv;
4433 pt_entry_t oldpte, *pte;
4436 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4437 ("pmap_remove_write: page %p is not managed", m));
4440 * If the page is not VPO_BUSY, then PG_WRITEABLE cannot be set by
4441 * another thread while the object is locked. Thus, if PG_WRITEABLE
4442 * is clear, no page table entries need updating.
4444 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
4445 if ((m->oflags & VPO_BUSY) == 0 &&
4446 (m->flags & PG_WRITEABLE) == 0)
4448 vm_page_lock_queues();
4450 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4451 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4455 pde = pmap_pde(pmap, va);
4456 if ((*pde & PG_RW) != 0)
4457 (void)pmap_demote_pde(pmap, pde, va);
4460 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4463 pde = pmap_pde(pmap, pv->pv_va);
4464 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
4465 " a 4mpage in page %p's pv list", m));
4466 pte = pmap_pte_quick(pmap, pv->pv_va);
4469 if ((oldpte & PG_RW) != 0) {
4471 * Regardless of whether a pte is 32 or 64 bits
4472 * in size, PG_RW and PG_M are among the least
4473 * significant 32 bits.
4475 if (!atomic_cmpset_int((u_int *)pte, oldpte,
4476 oldpte & ~(PG_RW | PG_M)))
4478 if ((oldpte & PG_M) != 0)
4480 pmap_invalidate_page(pmap, pv->pv_va);
4484 vm_page_flag_clear(m, PG_WRITEABLE);
4486 vm_page_unlock_queues();
4490 * pmap_ts_referenced:
4492 * Return a count of reference bits for a page, clearing those bits.
4493 * It is not necessary for every reference bit to be cleared, but it
4494 * is necessary that 0 only be returned when there are truly no
4495 * reference bits set.
4497 * XXX: The exact number of bits to check and clear is a matter that
4498 * should be tested and standardized at some point in the future for
4499 * optimal aging of shared pages.
4502 pmap_ts_referenced(vm_page_t m)
4504 struct md_page *pvh;
4505 pv_entry_t pv, pvf, pvn;
4507 pd_entry_t oldpde, *pde;
4512 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4513 ("pmap_ts_referenced: page %p is not managed", m));
4514 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4515 vm_page_lock_queues();
4517 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
4521 pde = pmap_pde(pmap, va);
4523 if ((oldpde & PG_A) != 0) {
4524 if (pmap_demote_pde(pmap, pde, va)) {
4525 if ((oldpde & PG_W) == 0) {
4527 * Remove the mapping to a single page
4528 * so that a subsequent access may
4529 * repromote. Since the underlying
4530 * page table page is fully populated,
4531 * this removal never frees a page
4534 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4536 pmap_remove_page(pmap, va, NULL);
4547 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
4550 pvn = TAILQ_NEXT(pv, pv_list);
4551 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4552 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
4555 pde = pmap_pde(pmap, pv->pv_va);
4556 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
4557 " found a 4mpage in page %p's pv list", m));
4558 pte = pmap_pte_quick(pmap, pv->pv_va);
4559 if ((*pte & PG_A) != 0) {
4560 atomic_clear_int((u_int *)pte, PG_A);
4561 pmap_invalidate_page(pmap, pv->pv_va);
4567 } while ((pv = pvn) != NULL && pv != pvf);
4571 vm_page_unlock_queues();
4576 * Clear the modify bits on the specified physical page.
4579 pmap_clear_modify(vm_page_t m)
4581 struct md_page *pvh;
4582 pv_entry_t next_pv, pv;
4584 pd_entry_t oldpde, *pde;
4585 pt_entry_t oldpte, *pte;
4588 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4589 ("pmap_clear_modify: page %p is not managed", m));
4590 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
4591 KASSERT((m->oflags & VPO_BUSY) == 0,
4592 ("pmap_clear_modify: page %p is busy", m));
4595 * If the page is not PG_WRITEABLE, then no PTEs can have PG_M set.
4596 * If the object containing the page is locked and the page is not
4597 * VPO_BUSY, then PG_WRITEABLE cannot be concurrently set.
4599 if ((m->flags & PG_WRITEABLE) == 0)
4601 vm_page_lock_queues();
4603 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4604 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4608 pde = pmap_pde(pmap, va);
4610 if ((oldpde & PG_RW) != 0) {
4611 if (pmap_demote_pde(pmap, pde, va)) {
4612 if ((oldpde & PG_W) == 0) {
4614 * Write protect the mapping to a
4615 * single page so that a subsequent
4616 * write access may repromote.
4618 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4620 pte = pmap_pte_quick(pmap, va);
4622 if ((oldpte & PG_V) != 0) {
4624 * Regardless of whether a pte is 32 or 64 bits
4625 * in size, PG_RW and PG_M are among the least
4626 * significant 32 bits.
4628 while (!atomic_cmpset_int((u_int *)pte,
4630 oldpte & ~(PG_M | PG_RW)))
4633 pmap_invalidate_page(pmap, va);
4640 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4643 pde = pmap_pde(pmap, pv->pv_va);
4644 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
4645 " a 4mpage in page %p's pv list", m));
4646 pte = pmap_pte_quick(pmap, pv->pv_va);
4647 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4649 * Regardless of whether a pte is 32 or 64 bits
4650 * in size, PG_M is among the least significant
4653 atomic_clear_int((u_int *)pte, PG_M);
4654 pmap_invalidate_page(pmap, pv->pv_va);
4659 vm_page_unlock_queues();
4663 * pmap_clear_reference:
4665 * Clear the reference bit on the specified physical page.
4668 pmap_clear_reference(vm_page_t m)
4670 struct md_page *pvh;
4671 pv_entry_t next_pv, pv;
4673 pd_entry_t oldpde, *pde;
4677 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
4678 ("pmap_clear_reference: page %p is not managed", m));
4679 vm_page_lock_queues();
4681 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4682 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4686 pde = pmap_pde(pmap, va);
4688 if ((oldpde & PG_A) != 0) {
4689 if (pmap_demote_pde(pmap, pde, va)) {
4691 * Remove the mapping to a single page so
4692 * that a subsequent access may repromote.
4693 * Since the underlying page table page is
4694 * fully populated, this removal never frees
4695 * a page table page.
4697 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4699 pmap_remove_page(pmap, va, NULL);
4704 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4707 pde = pmap_pde(pmap, pv->pv_va);
4708 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
4709 " a 4mpage in page %p's pv list", m));
4710 pte = pmap_pte_quick(pmap, pv->pv_va);
4711 if ((*pte & PG_A) != 0) {
4713 * Regardless of whether a pte is 32 or 64 bits
4714 * in size, PG_A is among the least significant
4717 atomic_clear_int((u_int *)pte, PG_A);
4718 pmap_invalidate_page(pmap, pv->pv_va);
4723 vm_page_unlock_queues();
4727 * Miscellaneous support routines follow
4730 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
4731 static __inline void
4732 pmap_pte_attr(pt_entry_t *pte, int cache_bits)
4737 * The cache mode bits are all in the low 32-bits of the
4738 * PTE, so we can just spin on updating the low 32-bits.
4741 opte = *(u_int *)pte;
4742 npte = opte & ~PG_PTE_CACHE;
4744 } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
4747 /* Adjust the cache mode for a 2/4MB page mapped via a PDE. */
4748 static __inline void
4749 pmap_pde_attr(pd_entry_t *pde, int cache_bits)
4754 * The cache mode bits are all in the low 32-bits of the
4755 * PDE, so we can just spin on updating the low 32-bits.
4758 opde = *(u_int *)pde;
4759 npde = opde & ~PG_PDE_CACHE;
4761 } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
4765 * Map a set of physical memory pages into the kernel virtual
4766 * address space. Return a pointer to where it is mapped. This
4767 * routine is intended to be used for mapping device memory,
4771 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4773 vm_offset_t va, offset;
4776 offset = pa & PAGE_MASK;
4777 size = roundup(offset + size, PAGE_SIZE);
4780 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4783 va = kmem_alloc_nofault(kernel_map, size);
4785 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4787 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4788 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4789 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4790 pmap_invalidate_cache_range(va, va + size);
4791 return ((void *)(va + offset));
4795 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4798 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4802 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4805 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4809 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4811 vm_offset_t base, offset, tmpva;
4813 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4815 base = trunc_page(va);
4816 offset = va & PAGE_MASK;
4817 size = roundup(offset + size, PAGE_SIZE);
4818 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
4819 pmap_kremove(tmpva);
4820 pmap_invalidate_range(kernel_pmap, va, tmpva);
4821 kmem_free(kernel_map, base, size);
4825 * Sets the memory attribute for the specified page.
4828 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4830 struct sysmaps *sysmaps;
4831 vm_offset_t sva, eva;
4833 m->md.pat_mode = ma;
4834 if ((m->flags & PG_FICTITIOUS) != 0)
4838 * If "m" is a normal page, flush it from the cache.
4839 * See pmap_invalidate_cache_range().
4841 * First, try to find an existing mapping of the page by sf
4842 * buffer. sf_buf_invalidate_cache() modifies mapping and
4843 * flushes the cache.
4845 if (sf_buf_invalidate_cache(m))
4849 * If page is not mapped by sf buffer, but CPU does not
4850 * support self snoop, map the page transient and do
4851 * invalidation. In the worst case, whole cache is flushed by
4852 * pmap_invalidate_cache_range().
4854 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) {
4855 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4856 mtx_lock(&sysmaps->lock);
4857 if (*sysmaps->CMAP2)
4858 panic("pmap_page_set_memattr: CMAP2 busy");
4860 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) |
4861 PG_A | PG_M | pmap_cache_bits(m->md.pat_mode, 0);
4862 invlcaddr(sysmaps->CADDR2);
4863 sva = (vm_offset_t)sysmaps->CADDR2;
4864 eva = sva + PAGE_SIZE;
4866 sva = eva = 0; /* gcc */
4867 pmap_invalidate_cache_range(sva, eva);
4869 *sysmaps->CMAP2 = 0;
4871 mtx_unlock(&sysmaps->lock);
4876 * Changes the specified virtual address range's memory type to that given by
4877 * the parameter "mode". The specified virtual address range must be
4878 * completely contained within either the kernel map.
4880 * Returns zero if the change completed successfully, and either EINVAL or
4881 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4882 * of the virtual address range was not mapped, and ENOMEM is returned if
4883 * there was insufficient memory available to complete the change.
4886 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4888 vm_offset_t base, offset, tmpva;
4891 int cache_bits_pte, cache_bits_pde;
4894 base = trunc_page(va);
4895 offset = va & PAGE_MASK;
4896 size = roundup(offset + size, PAGE_SIZE);
4899 * Only supported on kernel virtual addresses above the recursive map.
4901 if (base < VM_MIN_KERNEL_ADDRESS)
4904 cache_bits_pde = pmap_cache_bits(mode, 1);
4905 cache_bits_pte = pmap_cache_bits(mode, 0);
4909 * Pages that aren't mapped aren't supported. Also break down
4910 * 2/4MB pages into 4KB pages if required.
4912 PMAP_LOCK(kernel_pmap);
4913 for (tmpva = base; tmpva < base + size; ) {
4914 pde = pmap_pde(kernel_pmap, tmpva);
4916 PMAP_UNLOCK(kernel_pmap);
4921 * If the current 2/4MB page already has
4922 * the required memory type, then we need not
4923 * demote this page. Just increment tmpva to
4924 * the next 2/4MB page frame.
4926 if ((*pde & PG_PDE_CACHE) == cache_bits_pde) {
4927 tmpva = trunc_4mpage(tmpva) + NBPDR;
4932 * If the current offset aligns with a 2/4MB
4933 * page frame and there is at least 2/4MB left
4934 * within the range, then we need not break
4935 * down this page into 4KB pages.
4937 if ((tmpva & PDRMASK) == 0 &&
4938 tmpva + PDRMASK < base + size) {
4942 if (!pmap_demote_pde(kernel_pmap, pde, tmpva)) {
4943 PMAP_UNLOCK(kernel_pmap);
4947 pte = vtopte(tmpva);
4949 PMAP_UNLOCK(kernel_pmap);
4954 PMAP_UNLOCK(kernel_pmap);
4957 * Ok, all the pages exist, so run through them updating their
4958 * cache mode if required.
4960 for (tmpva = base; tmpva < base + size; ) {
4961 pde = pmap_pde(kernel_pmap, tmpva);
4963 if ((*pde & PG_PDE_CACHE) != cache_bits_pde) {
4964 pmap_pde_attr(pde, cache_bits_pde);
4967 tmpva = trunc_4mpage(tmpva) + NBPDR;
4969 pte = vtopte(tmpva);
4970 if ((*pte & PG_PTE_CACHE) != cache_bits_pte) {
4971 pmap_pte_attr(pte, cache_bits_pte);
4979 * Flush CPU caches to make sure any data isn't cached that
4980 * shouldn't be, etc.
4983 pmap_invalidate_range(kernel_pmap, base, tmpva);
4984 pmap_invalidate_cache_range(base, tmpva);
4990 * perform the pmap work for mincore
4993 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4996 pt_entry_t *ptep, pte;
5002 pdep = pmap_pde(pmap, addr);
5004 if (*pdep & PG_PS) {
5006 /* Compute the physical address of the 4KB page. */
5007 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
5009 val = MINCORE_SUPER;
5011 ptep = pmap_pte(pmap, addr);
5013 pmap_pte_release(ptep);
5014 pa = pte & PG_FRAME;
5022 if ((pte & PG_V) != 0) {
5023 val |= MINCORE_INCORE;
5024 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
5025 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
5026 if ((pte & PG_A) != 0)
5027 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
5029 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
5030 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
5031 (pte & (PG_MANAGED | PG_V)) == (PG_MANAGED | PG_V)) {
5032 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
5033 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
5036 PA_UNLOCK_COND(*locked_pa);
5042 pmap_activate(struct thread *td)
5044 pmap_t pmap, oldpmap;
5048 pmap = vmspace_pmap(td->td_proc->p_vmspace);
5049 oldpmap = PCPU_GET(curpmap);
5051 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
5052 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
5054 oldpmap->pm_active &= ~1;
5055 pmap->pm_active |= 1;
5058 cr3 = vtophys(pmap->pm_pdpt);
5060 cr3 = vtophys(pmap->pm_pdir);
5063 * pmap_activate is for the current thread on the current cpu
5065 td->td_pcb->pcb_cr3 = cr3;
5067 PCPU_SET(curpmap, pmap);
5072 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
5077 * Increase the starting virtual address of the given mapping if a
5078 * different alignment might result in more superpage mappings.
5081 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
5082 vm_offset_t *addr, vm_size_t size)
5084 vm_offset_t superpage_offset;
5088 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
5089 offset += ptoa(object->pg_color);
5090 superpage_offset = offset & PDRMASK;
5091 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
5092 (*addr & PDRMASK) == superpage_offset)
5094 if ((*addr & PDRMASK) < superpage_offset)
5095 *addr = (*addr & ~PDRMASK) + superpage_offset;
5097 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
5101 #if defined(PMAP_DEBUG)
5102 pmap_pid_dump(int pid)
5109 sx_slock(&allproc_lock);
5110 FOREACH_PROC_IN_SYSTEM(p) {
5111 if (p->p_pid != pid)
5117 pmap = vmspace_pmap(p->p_vmspace);
5118 for (i = 0; i < NPDEPTD; i++) {
5121 vm_offset_t base = i << PDRSHIFT;
5123 pde = &pmap->pm_pdir[i];
5124 if (pde && pmap_pde_v(pde)) {
5125 for (j = 0; j < NPTEPG; j++) {
5126 vm_offset_t va = base + (j << PAGE_SHIFT);
5127 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
5132 sx_sunlock(&allproc_lock);
5135 pte = pmap_pte(pmap, va);
5136 if (pte && pmap_pte_v(pte)) {
5140 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
5141 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
5142 va, pa, m->hold_count, m->wire_count, m->flags);
5157 sx_sunlock(&allproc_lock);
5164 static void pads(pmap_t pm);
5165 void pmap_pvdump(vm_offset_t pa);
5167 /* print address space of pmap*/
5175 if (pm == kernel_pmap)
5177 for (i = 0; i < NPDEPTD; i++)
5179 for (j = 0; j < NPTEPG; j++) {
5180 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
5181 if (pm == kernel_pmap && va < KERNBASE)
5183 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
5185 ptep = pmap_pte(pm, va);
5186 if (pmap_pte_v(ptep))
5187 printf("%x:%x ", va, *ptep);
5193 pmap_pvdump(vm_paddr_t pa)
5199 printf("pa %x", pa);
5200 m = PHYS_TO_VM_PAGE(pa);
5201 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
5203 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);