2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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35 #include "opt_sched.h"
37 #include <machine/asmacros.h>
41 #if defined(SMP) && defined(SCHED_ULE)
43 #define BLOCK_SPIN(reg) \
44 movl $blocked_lock,%eax ; \
47 cmpxchgl %eax,TD_LOCK(reg) ; \
54 #define BLOCK_SPIN(reg)
57 /*****************************************************************************/
59 /*****************************************************************************/
66 * This is the second half of cpu_switch(). It is used when the current
67 * thread is either a dummy or slated to die, and we no longer care
68 * about its state. This is only a slight optimization and is probably
69 * not worth it anymore. Note that we need to clear the pm_active bits so
70 * we do need the old proc if it still exists.
76 movl PCPU(CPUID), %esi
77 movl 4(%esp),%ecx /* Old thread */
78 testl %ecx,%ecx /* no thread? */
80 /* release bit from old pm_active */
81 movl PCPU(CURPMAP), %ebx
85 btrl %esi, PM_ACTIVE(%ebx) /* clear old */
87 movl 8(%esp),%ecx /* New thread */
88 movl TD_PCB(%ecx),%edx
89 movl PCB_CR3(%edx),%eax
91 /* set bit in new pm_active */
92 movl TD_PROC(%ecx),%eax
93 movl P_VMSPACE(%eax), %ebx
95 movl %ebx, PCPU(CURPMAP)
99 btsl %esi, PM_ACTIVE(%ebx) /* set new */
104 * cpu_switch(old, new)
106 * Save the current thread state, then select the next thread to run
107 * and load its state.
115 /* Switch to new thread. First, save context. */
119 testl %ecx,%ecx /* no thread? */
120 jz badsw2 /* no, panic */
123 movl TD_PCB(%ecx),%edx
125 movl (%esp),%eax /* Hardware registers */
126 movl %eax,PCB_EIP(%edx)
127 movl %ebx,PCB_EBX(%edx)
128 movl %esp,PCB_ESP(%edx)
129 movl %ebp,PCB_EBP(%edx)
130 movl %esi,PCB_ESI(%edx)
131 movl %edi,PCB_EDI(%edx)
133 /* Test if debug registers should be saved. */
134 testl $PCB_DBREGS,PCB_FLAGS(%edx)
135 jz 1f /* no, skip over */
136 movl %dr7,%eax /* yes, do the save */
137 movl %eax,PCB_DR7(%edx)
138 andl $0x0000fc00, %eax /* disable all watchpoints */
141 movl %eax,PCB_DR6(%edx)
143 movl %eax,PCB_DR3(%edx)
145 movl %eax,PCB_DR2(%edx)
147 movl %eax,PCB_DR1(%edx)
149 movl %eax,PCB_DR0(%edx)
152 /* have we used fp, and need a save? */
153 cmpl %ecx,PCPU(FPCURTHREAD)
155 pushl PCB_SAVEFPU(%edx) /* h/w bugs make saving complicated */
156 call npxsave /* do it in a big C function */
160 /* Save is done. Now fire up new thread. Leave old vmspace. */
162 movl 8(%esp),%ecx /* New thread */
163 movl 12(%esp),%esi /* New lock */
165 testl %ecx,%ecx /* no thread? */
166 jz badsw3 /* no, panic */
168 movl TD_PCB(%ecx),%edx
170 /* switch address space */
171 movl PCB_CR3(%edx),%eax
172 movl %cr3,%ebx /* The same address space? */
175 movl %eax,%cr3 /* new address space */
177 movl PCPU(CPUID),%esi
178 SETOP %eax,TD_LOCK(%edi) /* Switchout td_lock */
180 /* Release bit from old pmap->pm_active */
181 movl PCPU(CURPMAP), %ebx
185 btrl %esi, PM_ACTIVE(%ebx) /* clear old */
187 /* Set bit in new pmap->pm_active */
188 movl TD_PROC(%ecx),%eax /* newproc */
189 movl P_VMSPACE(%eax), %ebx
191 movl %ebx, PCPU(CURPMAP)
195 btsl %esi, PM_ACTIVE(%ebx) /* set new */
199 SETOP %esi,TD_LOCK(%edi) /* Switchout td_lock */
203 * At this point, we've switched address spaces and are ready
204 * to load up the rest of the next context.
206 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
207 je 1f /* If not, use the default */
208 movl $1, PCPU(PRIVATE_TSS) /* mark use of private tss */
209 movl PCB_EXT(%edx), %edi /* new tss descriptor */
210 jmp 2f /* Load it up */
213 * Use the common default TSS instead of our own.
214 * Set our stack pointer into the TSS, it's set to just
215 * below the PCB. In C, common_tss.tss_esp0 = &pcb - 16;
217 leal -16(%edx), %ebx /* leave space for vm86 */
218 movl %ebx, PCPU(COMMON_TSS) + TSS_ESP0
221 * Test this CPU's bit in the bitmap to see if this
222 * CPU was using a private TSS.
224 cmpl $0, PCPU(PRIVATE_TSS) /* Already using the common? */
225 je 3f /* if so, skip reloading */
226 movl $0, PCPU(PRIVATE_TSS)
227 PCPU_ADDR(COMMON_TSSD, %edi)
229 /* Move correct tss descriptor into GDT slot, then reload tr. */
230 movl PCPU(TSS_GDT), %ebx /* entry in GDT */
235 movl $GPROC0_SEL*8, %esi /* GSEL(GPROC0_SEL, SEL_KPL) */
239 /* Copy the %fs and %gs selectors into this pcpu gdt */
240 leal PCB_FSD(%edx), %esi
241 movl PCPU(FSGS_GDT), %edi
242 movl 0(%esi), %eax /* %fs selector */
246 movl 8(%esi), %eax /* %gs selector, comes straight after */
251 /* Restore context. */
252 movl PCB_EBX(%edx),%ebx
253 movl PCB_ESP(%edx),%esp
254 movl PCB_EBP(%edx),%ebp
255 movl PCB_ESI(%edx),%esi
256 movl PCB_EDI(%edx),%edi
257 movl PCB_EIP(%edx),%eax
260 movl %edx, PCPU(CURPCB)
261 movl %ecx, PCPU(CURTHREAD) /* into next thread */
264 * Determine the LDT to use and load it if is the default one and
265 * that is not the current one.
267 movl TD_PROC(%ecx),%eax
268 cmpl $0,P_MD+MD_LDT(%eax)
270 movl _default_ldt,%eax
271 cmpl PCPU(CURRENTLDT),%eax
274 movl %eax,PCPU(CURRENTLDT)
277 /* Load the LDT when it is not the default one. */
278 pushl %edx /* Preserve pointer to pcb. */
279 addl $P_MD,%eax /* Pointer to mdproc is arg. */
282 * Holding dt_lock prevents context switches, so dt_lock cannot
283 * be held now and set_user_ldt() will not deadlock acquiring it.
290 /* This must be done after loading the user LDT. */
291 .globl cpu_switch_load_gs
295 /* Test if debug registers should be restored. */
296 testl $PCB_DBREGS,PCB_FLAGS(%edx)
300 * Restore debug registers. The special code for dr7 is to
301 * preserve the current values of its reserved bits.
303 movl PCB_DR6(%edx),%eax
305 movl PCB_DR3(%edx),%eax
307 movl PCB_DR2(%edx),%eax
309 movl PCB_DR1(%edx),%eax
311 movl PCB_DR0(%edx),%eax
314 andl $0x0000fc00,%eax
315 movl PCB_DR7(%edx),%ecx
316 andl $~0x0000fc00,%ecx
327 sw0_1: .asciz "cpu_throw: no newthread supplied"
333 sw0_2: .asciz "cpu_switch: no curthread supplied"
339 sw0_3: .asciz "cpu_switch: no newthread supplied"
345 * Update pcb, saving current processor state.
351 /* Save caller's return address. Child won't execute this routine. */
353 movl %eax,PCB_EIP(%ecx)
356 movl %eax,PCB_CR3(%ecx)
358 movl %ebx,PCB_EBX(%ecx)
359 movl %esp,PCB_ESP(%ecx)
360 movl %ebp,PCB_EBP(%ecx)
361 movl %esi,PCB_ESI(%ecx)
362 movl %edi,PCB_EDI(%ecx)
366 movl %eax,PCB_CR0(%ecx)
368 movl %eax,PCB_CR2(%ecx)
370 movl %eax,PCB_CR4(%ecx)
373 movl %eax,PCB_DR0(%ecx)
375 movl %eax,PCB_DR1(%ecx)
377 movl %eax,PCB_DR2(%ecx)
379 movl %eax,PCB_DR3(%ecx)
381 movl %eax,PCB_DR6(%ecx)
383 movl %eax,PCB_DR7(%ecx)
400 * resumectx(pcb) __fastcall
401 * Resuming processor state from pcb.
407 /* Restore segment registers */
408 movzwl PCB_DS(%ecx),%eax
410 movzwl PCB_ES(%ecx),%eax
412 movzwl PCB_FS(%ecx),%eax
414 movzwl PCB_GS(%ecx),%eax
416 movzwl PCB_SS(%ecx),%eax
419 /* Restore CR2, CR4, CR3 and CR0 */
420 movl PCB_CR2(%ecx),%eax
422 movl PCB_CR4(%ecx),%eax
424 movl PCB_CR3(%ecx),%eax
426 movl PCB_CR0(%ecx),%eax
431 /* Restore descriptor tables */
435 #define SDT_SYS386TSS 9
436 #define SDT_SYS386BSY 11
437 /* Clear "task busy" bit and reload TR */
438 movl PCPU(TSS_GDT),%eax
439 andb $(~SDT_SYS386BSY | SDT_SYS386TSS),5(%eax)
440 movzwl PCB_TR(%ecx),%eax
445 /* Restore debug registers */
446 movl PCB_DR0(%ecx),%eax
448 movl PCB_DR1(%ecx),%eax
450 movl PCB_DR2(%ecx),%eax
452 movl PCB_DR3(%ecx),%eax
454 movl PCB_DR6(%ecx),%eax
456 movl PCB_DR7(%ecx),%eax
459 /* Restore other registers */
460 movl PCB_EDI(%ecx),%edi
461 movl PCB_ESI(%ecx),%esi
462 movl PCB_EBP(%ecx),%ebp
463 movl PCB_ESP(%ecx),%esp
464 movl PCB_EBX(%ecx),%ebx
466 /* reload code selector by turning return into intersegmental return */