2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (C) 1994, David Greenman
5 * Copyright (c) 1990, 1993
6 * The Regents of the University of California. All rights reserved.
8 * This code is derived from software contributed to Berkeley by
9 * the University of Utah, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
46 * 386 Trap and System call handling
49 #include "opt_clock.h"
50 #include "opt_compat.h"
52 #include "opt_hwpmc_hooks.h"
55 #include "opt_stack.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
62 #include <sys/pioctl.h>
63 #include <sys/ptrace.h>
65 #include <sys/kernel.h>
68 #include <sys/mutex.h>
69 #include <sys/resourcevar.h>
70 #include <sys/signalvar.h>
71 #include <sys/syscall.h>
72 #include <sys/sysctl.h>
73 #include <sys/sysent.h>
75 #include <sys/vmmeter.h>
77 #include <sys/pmckern.h>
78 PMC_SOFT_DEFINE( , , page_fault, all);
79 PMC_SOFT_DEFINE( , , page_fault, read);
80 PMC_SOFT_DEFINE( , , page_fault, write);
82 #include <security/audit/audit.h>
85 #include <vm/vm_param.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_map.h>
89 #include <vm/vm_page.h>
90 #include <vm/vm_extern.h>
92 #include <machine/cpu.h>
93 #include <machine/intr_machdep.h>
95 #include <machine/md_var.h>
96 #include <machine/pcb.h>
98 #include <machine/smp.h>
100 #include <machine/stack.h>
101 #include <machine/trap.h>
102 #include <machine/tss.h>
103 #include <machine/vm86.h>
106 #include <sys/syslog.h>
107 #include <machine/clock.h>
111 #include <sys/dtrace_bsd.h>
114 void trap(struct trapframe *frame);
115 void syscall(struct trapframe *frame);
117 static int trap_pfault(struct trapframe *, int, vm_offset_t);
118 static void trap_fatal(struct trapframe *, vm_offset_t);
119 void dblfault_handler(void);
121 extern inthand_t IDTVEC(bpt), IDTVEC(dbg), IDTVEC(int0x80_syscall);
122 extern uint64_t pg_nx;
124 #define MAX_TRAP_MSG 32
131 static const struct trap_data trap_data[] = {
132 [T_PRIVINFLT] = { .ei = true, .msg = "privileged instruction fault" },
133 [T_BPTFLT] = { .ei = false, .msg = "breakpoint instruction fault" },
134 [T_ARITHTRAP] = { .ei = true, .msg = "arithmetic trap" },
135 [T_PROTFLT] = { .ei = true, .msg = "general protection fault" },
136 [T_TRCTRAP] = { .ei = false, .msg = "debug exception" },
137 [T_PAGEFLT] = { .ei = true, .msg = "page fault" },
138 [T_ALIGNFLT] = { .ei = true, .msg = "alignment fault" },
139 [T_DIVIDE] = { .ei = true, .msg = "integer divide fault" },
140 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" },
141 [T_OFLOW] = { .ei = true, .msg = "overflow trap" },
142 [T_BOUND] = { .ei = true, .msg = "FPU bounds check fault" },
143 [T_DNA] = { .ei = true, .msg = "FPU device not available" },
144 [T_DOUBLEFLT] = { .ei = false, .msg = "double fault" },
145 [T_FPOPFLT] = { .ei = true, .msg = "FPU operand fetch fault" },
146 [T_TSSFLT] = { .ei = true, .msg = "invalid TSS fault" },
147 [T_SEGNPFLT] = { .ei = true, .msg = "segment not present fault" },
148 [T_STKFLT] = { .ei = true, .msg = "stack fault" },
149 [T_MCHK] = { .ei = true, .msg = "machine check trap" },
150 [T_XMMFLT] = { .ei = true, .msg = "SIMD floating-point exception" },
151 [T_DTRACE_RET] ={ .ei = true, .msg = "DTrace pid return trap" },
155 trap_enable_intr(int trapno)
159 if (trapno < nitems(trap_data) && trap_data[trapno].msg != NULL)
160 return (trap_data[trapno].ei);
168 static const char unkn[] = "UNKNOWN";
171 if (trapno < nitems(trap_data))
172 res = trap_data[trapno].msg;
178 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
179 int has_f00f_bug = 0; /* Initialized so that it can be patched. */
182 static int prot_fault_translation = 0;
183 SYSCTL_INT(_machdep, OID_AUTO, prot_fault_translation, CTLFLAG_RW,
184 &prot_fault_translation, 0, "Select signal to deliver on protection fault");
185 static int uprintf_signal;
186 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RW,
188 "Print debugging information on trap signal to ctty");
191 * Exception, fault, and trap interface to the FreeBSD kernel.
192 * This common code is called from assembly language IDT gate entry
193 * routines that prepare a suitable stack frame, and restore this
194 * frame after the exception has been processed.
198 trap(struct trapframe *frame)
205 register_t addr, dr6;
208 static int lastalert = 0;
219 type = frame->tf_trapno;
221 KASSERT((read_eflags() & PSL_I) == 0,
222 ("trap: interrupts enabled, type %d frame %p", type, frame));
225 /* Handler for NMI IPIs used for stopping CPUs. */
226 if (type == T_NMI && ipi_nmi_handler() == 0)
237 if (type == T_RESERVED) {
238 trap_fatal(frame, 0);
245 * CPU PMCs interrupt using an NMI so we check for that first.
246 * If the HWPMC module is active, 'pmc_hook' will point to
247 * the function to be called. A non-zero return value from the
248 * hook means that the NMI was consumed by it and that we can
249 * return immediately.
251 if (pmc_intr != NULL &&
252 (*pmc_intr)(frame) != 0)
257 if (stack_nmi_handler(frame) != 0)
262 if (type == T_MCHK) {
269 * A trap can occur while DTrace executes a probe. Before
270 * executing the probe, DTrace blocks re-scheduling and sets
271 * a flag in its per-cpu flags to indicate that it doesn't
272 * want to fault. On returning from the probe, the no-fault
273 * flag is cleared and finally re-scheduling is enabled.
275 if ((type == T_PROTFLT || type == T_PAGEFLT) &&
276 dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type))
281 * We must not allow context switches until %cr2 is read.
282 * Also, for some Cyrix CPUs, %cr2 is clobbered by interrupts.
283 * All faults use interrupt gates, so %cr2 can be safely read
284 * now, before optional enable of the interrupts below.
286 if (type == T_PAGEFLT)
290 * Buggy application or kernel code has disabled interrupts
291 * and then trapped. Enabling interrupts now is wrong, but it
292 * is better than running with interrupts disabled until they
293 * are accidentally enabled later.
295 if ((frame->tf_eflags & PSL_I) == 0 && TRAPF_USERMODE(frame) &&
296 (curpcb->pcb_flags & PCB_VM86CALL) == 0)
297 uprintf("pid %ld (%s): trap %d with interrupts disabled\n",
298 (long)curproc->p_pid, curthread->td_name, type);
301 * Conditionally reenable interrupts. If we hold a spin lock,
302 * then we must not reenable interrupts. This might be a
303 * spurious page fault.
305 if (trap_enable_intr(type) && td->td_md.md_spinlock_count == 0 &&
306 frame->tf_eip != (int)cpu_switch_load_gs)
309 if (TRAPF_USERMODE(frame) && (curpcb->pcb_flags & PCB_VM86CALL) == 0) {
313 td->td_frame = frame;
314 addr = frame->tf_eip;
315 if (td->td_cowgen != p->p_cowgen)
316 thread_cow_update(td);
319 case T_PRIVINFLT: /* privileged instruction fault */
324 case T_BPTFLT: /* bpt instruction fault */
327 if (dtrace_pid_probe_ptr != NULL &&
328 dtrace_pid_probe_ptr(frame) == 0)
335 case T_TRCTRAP: /* debug exception */
341 if ((dr6 & DBREG_DR6_BS) != 0) {
342 PROC_LOCK(td->td_proc);
343 if ((td->td_dbgflags & TDB_STEP) != 0) {
344 td->td_frame->tf_eflags &= ~PSL_T;
345 td->td_dbgflags &= ~TDB_STEP;
347 PROC_UNLOCK(td->td_proc);
351 case T_ARITHTRAP: /* arithmetic trap */
352 ucode = npxtrap_x87();
359 * The following two traps can happen in vm86 mode,
360 * and, if so, we want to handle them specially.
362 case T_PROTFLT: /* general protection fault */
363 case T_STKFLT: /* stack fault */
364 if (frame->tf_eflags & PSL_VM) {
365 signo = vm86_emulate((struct vm86frame *)frame);
366 if (signo == SIGTRAP) {
367 load_dr6(rdr6() | 0x4000);
368 goto user_trctrap_out;
375 ucode = (type == T_PROTFLT) ? BUS_OBJERR : BUS_ADRERR;
377 case T_SEGNPFLT: /* segment not present fault */
381 case T_TSSFLT: /* invalid TSS fault */
389 case T_DOUBLEFLT: /* double fault */
395 case T_PAGEFLT: /* page fault */
396 signo = trap_pfault(frame, TRUE, eva);
397 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
400 * The f00f hack workaround has triggered, so
401 * treat the fault as an illegal instruction
402 * (T_PRIVINFLT) instead of a page fault.
404 type = frame->tf_trapno = T_PRIVINFLT;
406 /* Proceed as in that case. */
417 if (signo == SIGSEGV)
419 else if (prot_fault_translation == 0) {
421 * Autodetect. This check also covers
422 * the images without the ABI-tag ELF
425 if (SV_CURPROC_ABI() == SV_ABI_FREEBSD &&
426 p->p_osrel >= P_OSREL_SIGSEGV) {
433 } else if (prot_fault_translation == 1) {
435 * Always compat mode.
441 * Always SIGSEGV mode.
449 case T_DIVIDE: /* integer divide fault */
458 # define TIMER_FREQ 1193182
460 if (time_second - lastalert > 10) {
461 log(LOG_WARNING, "NMI: power fail\n");
463 lastalert = time_second;
466 #else /* !POWERFAIL_NMI */
467 nmi_handle_intr(type, frame);
469 #endif /* POWERFAIL_NMI */
472 case T_OFLOW: /* integer overflow fault */
477 case T_BOUND: /* bounds check fault */
483 KASSERT(PCB_USER_FPU(td->td_pcb),
484 ("kernel FPU ctx has leaked"));
485 /* transparent fault (due to context switch "late") */
488 uprintf("pid %d killed due to lack of floating point\n",
494 case T_FPOPFLT: /* FPU operand fetch fault */
499 case T_XMMFLT: /* SIMD floating-point exception */
500 ucode = npxtrap_sse();
508 if (dtrace_return_probe_ptr != NULL)
509 dtrace_return_probe_ptr(frame);
516 KASSERT(cold || td->td_ucred != NULL,
517 ("kernel trap doesn't have ucred"));
519 case T_PAGEFLT: /* page fault */
520 (void) trap_pfault(frame, FALSE, eva);
524 if (PCB_USER_FPU(td->td_pcb))
525 panic("Unregistered use of FPU in kernel");
530 case T_ARITHTRAP: /* arithmetic trap */
531 case T_XMMFLT: /* SIMD floating-point exception */
532 case T_FPOPFLT: /* FPU operand fetch fault */
534 * XXXKIB for now disable any FPU traps in kernel
535 * handler registration seems to be overkill
537 trap_fatal(frame, 0);
541 * The following two traps can happen in
542 * vm86 mode, and, if so, we want to handle
545 case T_PROTFLT: /* general protection fault */
546 case T_STKFLT: /* stack fault */
547 if (frame->tf_eflags & PSL_VM) {
548 signo = vm86_emulate((struct vm86frame *)frame);
549 if (signo == SIGTRAP) {
551 load_dr6(rdr6() | 0x4000);
556 * returns to original process
558 vm86_trap((struct vm86frame *)frame);
562 case T_SEGNPFLT: /* segment not present fault */
563 if (curpcb->pcb_flags & PCB_VM86CALL)
567 * Invalid %fs's and %gs's can be created using
568 * procfs or PT_SETREGS or by invalidating the
569 * underlying LDT entry. This causes a fault
570 * in kernel mode when the kernel attempts to
571 * switch contexts. Lose the bad context
572 * (XXX) so that we can continue, and generate
575 if (frame->tf_eip == (int)cpu_switch_load_gs) {
579 kern_psignal(p, SIGBUS);
585 if (td->td_intr_nesting_level != 0)
589 * Invalid segment selectors and out of bounds
590 * %eip's and %esp's can be set up in user mode.
591 * This causes a fault in kernel mode when the
592 * kernel tries to return to user mode. We want
593 * to get this fault so that we can fix the
594 * problem here and not have to check all the
595 * selectors and pointers when the user changes
598 * N.B. Comparing to long mode, 32-bit mode
599 * does not push %esp on the trap frame,
600 * because iretl faulted while in ring 0. As
601 * the consequence, there is no need to fixup
602 * the stack pointer for doreti_iret_fault,
603 * the fixup and the complimentary trap() call
604 * are executed on the main thread stack, not
605 * on the trampoline stack.
607 if (frame->tf_eip == (int)doreti_iret + setidt_disp) {
608 frame->tf_eip = (int)doreti_iret_fault +
612 if (type == T_STKFLT)
615 if (frame->tf_eip == (int)doreti_popl_ds +
617 frame->tf_eip = (int)doreti_popl_ds_fault +
621 if (frame->tf_eip == (int)doreti_popl_es +
623 frame->tf_eip = (int)doreti_popl_es_fault +
627 if (frame->tf_eip == (int)doreti_popl_fs +
629 frame->tf_eip = (int)doreti_popl_fs_fault +
633 if (curpcb->pcb_onfault != NULL) {
634 frame->tf_eip = (int)curpcb->pcb_onfault;
641 * PSL_NT can be set in user mode and isn't cleared
642 * automatically when the kernel is entered. This
643 * causes a TSS fault when the kernel attempts to
644 * `iret' because the TSS link is uninitialized. We
645 * want to get this fault so that we can fix the
646 * problem here and not every time the kernel is
649 if (frame->tf_eflags & PSL_NT) {
650 frame->tf_eflags &= ~PSL_NT;
655 case T_TRCTRAP: /* debug exception */
657 /* Clear any pending debug events. */
662 * Ignore debug register exceptions due to
663 * accesses in the user's address space, which
664 * can happen under several conditions such as
665 * if a user sets a watchpoint on a buffer and
666 * then passes that buffer to a system call.
667 * We still want to get TRCTRAPS for addresses
668 * in kernel space because that is useful when
669 * debugging the kernel.
671 if (user_dbreg_trap(dr6) &&
672 !(curpcb->pcb_flags & PCB_VM86CALL))
676 * Malicious user code can configure a debug
677 * register watchpoint to trap on data access
678 * to the top of stack and then execute 'pop
679 * %ss; int 3'. Due to exception deferral for
680 * 'pop %ss', the CPU will not interrupt 'int
681 * 3' to raise the DB# exception for the debug
682 * register but will postpone the DB# until
683 * execution of the first instruction of the
684 * BP# handler (in kernel mode). Normally the
685 * previous check would ignore DB# exceptions
686 * for watchpoints on user addresses raised in
687 * kernel mode. However, some CPU errata
688 * include cases where DB# exceptions do not
689 * properly set bits in %dr6, e.g. Haswell
690 * HSD23 and Skylake-X SKZ24.
692 * A deferred DB# can also be raised on the
693 * first instructions of system call entry
694 * points or single-step traps via similar use
695 * of 'pop %ss' or 'mov xxx, %ss'.
698 (uintptr_t)IDTVEC(int0x80_syscall) + setidt_disp ||
699 frame->tf_eip == (uintptr_t)IDTVEC(bpt) +
701 frame->tf_eip == (uintptr_t)IDTVEC(dbg) +
705 * FALLTHROUGH (TRCTRAP kernel mode, kernel address)
709 * If KDB is enabled, let it handle the debugger trap.
710 * Otherwise, debugger traps "can't happen".
713 if (kdb_trap(type, dr6, frame))
721 if (time_second - lastalert > 10) {
722 log(LOG_WARNING, "NMI: power fail\n");
724 lastalert = time_second;
727 #else /* !POWERFAIL_NMI */
728 nmi_handle_intr(type, frame);
730 #endif /* POWERFAIL_NMI */
734 trap_fatal(frame, eva);
738 /* Translate fault for emulators (e.g. Linux) */
739 if (*p->p_sysent->sv_transtrap != NULL)
740 signo = (*p->p_sysent->sv_transtrap)(signo, type);
742 ksiginfo_init_trap(&ksi);
743 ksi.ksi_signo = signo;
744 ksi.ksi_code = ucode;
745 ksi.ksi_addr = (void *)addr;
746 ksi.ksi_trapno = type;
747 if (uprintf_signal) {
748 uprintf("pid %d comm %s: signal %d err %x code %d type %d "
749 "addr 0x%x ss 0x%04x esp 0x%08x cs 0x%04x eip 0x%08x "
750 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n",
751 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type,
752 addr, frame->tf_ss, frame->tf_esp, frame->tf_cs,
754 fubyte((void *)(frame->tf_eip + 0)),
755 fubyte((void *)(frame->tf_eip + 1)),
756 fubyte((void *)(frame->tf_eip + 2)),
757 fubyte((void *)(frame->tf_eip + 3)),
758 fubyte((void *)(frame->tf_eip + 4)),
759 fubyte((void *)(frame->tf_eip + 5)),
760 fubyte((void *)(frame->tf_eip + 6)),
761 fubyte((void *)(frame->tf_eip + 7)));
763 KASSERT((read_eflags() & PSL_I) != 0, ("interrupts disabled"));
764 trapsignal(td, &ksi);
768 KASSERT(PCB_USER_FPU(td->td_pcb),
769 ("Return from trap with kernel FPU ctx leaked"));
773 trap_pfault(struct trapframe *frame, int usermode, vm_offset_t eva)
785 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) {
787 * Due to both processor errata and lazy TLB invalidation when
788 * access restrictions are removed from virtual pages, memory
789 * accesses that are allowed by the physical mapping layer may
790 * nonetheless cause one spurious page fault per virtual page.
791 * When the thread is executing a "no faulting" section that
792 * is bracketed by vm_fault_{disable,enable}_pagefaults(),
793 * every page fault is treated as a spurious page fault,
794 * unless it accesses the same virtual address as the most
795 * recent page fault within the same "no faulting" section.
797 if (td->td_md.md_spurflt_addr != eva ||
798 (td->td_pflags & TDP_RESETSPUR) != 0) {
800 * Do nothing to the TLB. A stale TLB entry is
801 * flushed automatically by a page fault.
803 td->td_md.md_spurflt_addr = eva;
804 td->td_pflags &= ~TDP_RESETSPUR;
809 * If we get a page fault while in a critical section, then
810 * it is most likely a fatal kernel page fault. The kernel
811 * is already going to panic trying to get a sleep lock to
812 * do the VM lookup, so just consider it a fatal trap so the
813 * kernel can print out a useful trap message and even get
816 * If we get a page fault while holding a non-sleepable
817 * lock, then it is most likely a fatal kernel page fault.
818 * If WITNESS is enabled, then it's going to whine about
819 * bogus LORs with various VM locks, so just skip to the
820 * fatal trap handling directly.
822 if (td->td_critnest != 0 ||
823 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
824 "Kernel page fault") != 0) {
825 trap_fatal(frame, eva);
829 va = trunc_page(eva);
830 if (va >= PMAP_TRM_MIN_ADDRESS) {
832 * Don't allow user-mode faults in kernel address space.
833 * An exception: if the faulting address is the invalid
834 * instruction entry in the IDT, then the Intel Pentium
835 * F00F bug workaround was triggered, and we need to
836 * treat it is as an illegal instruction, and not a page
839 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
840 if ((eva == (unsigned int)&idt[6]) && has_f00f_bug)
845 trap_fatal(frame, eva);
848 map = usermode ? &p->p_vmspace->vm_map : kernel_map;
851 * Kernel cannot access a user-space address directly
852 * because user pages are not mapped. Also, page
853 * faults must not be caused during the interrupts.
855 if (!usermode && td->td_intr_nesting_level != 0) {
856 trap_fatal(frame, eva);
862 * If the trap was caused by errant bits in the PTE then panic.
864 if (frame->tf_err & PGEX_RSV) {
865 trap_fatal(frame, eva);
870 * PGEX_I is defined only if the execute disable bit capability is
871 * supported and enabled.
873 if (frame->tf_err & PGEX_W)
874 ftype = VM_PROT_WRITE;
875 else if ((frame->tf_err & PGEX_I) && pg_nx != 0)
876 ftype = VM_PROT_EXECUTE;
878 ftype = VM_PROT_READ;
880 /* Fault in the page. */
881 rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
882 if (rv == KERN_SUCCESS) {
884 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) {
885 PMC_SOFT_CALL_TF( , , page_fault, all, frame);
886 if (ftype == VM_PROT_READ)
887 PMC_SOFT_CALL_TF( , , page_fault, read,
890 PMC_SOFT_CALL_TF( , , page_fault, write,
897 if (td->td_intr_nesting_level == 0 &&
898 curpcb->pcb_onfault != NULL) {
899 frame->tf_eip = (int)curpcb->pcb_onfault;
902 trap_fatal(frame, eva);
905 return ((rv == KERN_PROTECTION_FAILURE) ? SIGBUS : SIGSEGV);
909 trap_fatal(frame, eva)
910 struct trapframe *frame;
915 struct soft_segment_descriptor softseg;
920 code = frame->tf_err;
921 type = frame->tf_trapno;
922 sdtossd(&gdt[IDXSEL(frame->tf_cs & 0xffff)].sd, &softseg);
924 printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg(type),
925 frame->tf_eflags & PSL_VM ? "vm86" :
926 ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel");
928 /* two separate prints in case of a trap on an unmapped page */
929 printf("cpuid = %d; ", PCPU_GET(cpuid));
930 printf("apic id = %02x\n", PCPU_GET(apic_id));
932 if (type == T_PAGEFLT) {
933 printf("fault virtual address = 0x%x\n", eva);
934 printf("fault code = %s %s%s, %s\n",
935 code & PGEX_U ? "user" : "supervisor",
936 code & PGEX_W ? "write" : "read",
938 (code & PGEX_I ? " instruction" : " data") :
940 code & PGEX_RSV ? "reserved bits in PTE" :
941 code & PGEX_P ? "protection violation" : "page not present");
943 printf("error code = %#x\n", code);
945 printf("instruction pointer = 0x%x:0x%x\n",
946 frame->tf_cs & 0xffff, frame->tf_eip);
947 if (TF_HAS_STACKREGS(frame)) {
948 ss = frame->tf_ss & 0xffff;
951 ss = GSEL(GDATA_SEL, SEL_KPL);
952 esp = (int)&frame->tf_esp;
954 printf("stack pointer = 0x%x:0x%x\n", ss, esp);
955 printf("frame pointer = 0x%x:0x%x\n", ss, frame->tf_ebp);
956 printf("code segment = base 0x%x, limit 0x%x, type 0x%x\n",
957 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type);
958 printf(" = DPL %d, pres %d, def32 %d, gran %d\n",
959 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_def32,
961 printf("processor eflags = ");
962 if (frame->tf_eflags & PSL_T)
963 printf("trace trap, ");
964 if (frame->tf_eflags & PSL_I)
965 printf("interrupt enabled, ");
966 if (frame->tf_eflags & PSL_NT)
967 printf("nested task, ");
968 if (frame->tf_eflags & PSL_RF)
970 if (frame->tf_eflags & PSL_VM)
972 printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12);
973 printf("current process = %d (%s)\n",
974 curproc->p_pid, curthread->td_name);
977 if (debugger_on_trap) {
978 kdb_why = KDB_WHY_TRAP;
979 frame->tf_err = eva; /* smuggle fault address to ddb */
980 handled = kdb_trap(type, 0, frame);
981 frame->tf_err = code; /* restore error code */
982 kdb_why = KDB_WHY_UNSET;
987 printf("trap number = %d\n", type);
988 if (trap_msg(type) != NULL)
989 panic("%s", trap_msg(type));
991 panic("unknown/reserved trap");
995 * Double fault handler. Called when a fault occurs while writing
996 * a frame for a trap/exception onto the stack. This usually occurs
997 * when the stack overflows (such is the case with infinite recursion,
1000 * XXX Note that the current PTD gets replaced by IdlePTD when the
1001 * task switch occurs. This means that the stack that was active at
1002 * the time of the double fault is not available at <kstack> unless
1003 * the machine was idle when the double fault occurred. The downside
1004 * of this is that "trace <ebp>" in ddb won't work.
1007 dblfault_handler(void)
1009 #ifdef KDTRACE_HOOKS
1010 if (dtrace_doubletrap_func != NULL)
1011 (*dtrace_doubletrap_func)();
1013 printf("\nFatal double fault:\n");
1014 printf("eip = 0x%x\n", PCPU_GET(common_tssp)->tss_eip);
1015 printf("esp = 0x%x\n", PCPU_GET(common_tssp)->tss_esp);
1016 printf("ebp = 0x%x\n", PCPU_GET(common_tssp)->tss_ebp);
1018 /* two separate prints in case of a trap on an unmapped page */
1019 printf("cpuid = %d; ", PCPU_GET(cpuid));
1020 printf("apic id = %02x\n", PCPU_GET(apic_id));
1022 panic("double fault");
1026 cpu_fetch_syscall_args(struct thread *td)
1029 struct trapframe *frame;
1030 struct syscall_args *sa;
1040 frame = td->td_frame;
1044 if (__predict_false(frame->tf_cs == 7 && frame->tf_eip == 2)) {
1046 * In lcall $7,$0 after int $0x80. Convert the user
1047 * frame to what it would be for a direct int 0x80 instead
1048 * of lcall $7,$0, by popping the lcall return address.
1050 error = fueword32((void *)frame->tf_esp, &eip);
1053 cs = fuword16((void *)(frame->tf_esp + sizeof(u_int32_t)));
1058 * Unwind in-kernel frame after all stack frame pieces
1059 * were successfully read.
1061 frame->tf_eip = eip;
1063 frame->tf_esp += 2 * sizeof(u_int32_t);
1064 frame->tf_err = 7; /* size of lcall $7,$0 */
1068 sa->code = frame->tf_eax;
1069 params = (caddr_t)frame->tf_esp + sizeof(uint32_t);
1072 * Need to check if this is a 32 bit or 64 bit syscall.
1074 if (sa->code == SYS_syscall) {
1076 * Code is first argument, followed by actual args.
1078 error = fueword(params, &tmp);
1082 params += sizeof(uint32_t);
1083 } else if (sa->code == SYS___syscall) {
1085 * Like syscall, but code is a quad, so as to maintain
1086 * quad alignment for the rest of the arguments.
1088 error = fueword(params, &tmp);
1092 params += sizeof(quad_t);
1095 if (sa->code >= p->p_sysent->sv_size)
1096 sa->callp = &p->p_sysent->sv_table[0];
1098 sa->callp = &p->p_sysent->sv_table[sa->code];
1099 sa->narg = sa->callp->sy_narg;
1101 if (params != NULL && sa->narg != 0)
1102 error = copyin(params, (caddr_t)sa->args,
1103 (u_int)(sa->narg * sizeof(uint32_t)));
1108 td->td_retval[0] = 0;
1109 td->td_retval[1] = frame->tf_edx;
1115 #include "../../kern/subr_syscall.c"
1118 * syscall - system call request C handler. A system call is
1119 * essentially treated as a trap by reusing the frame layout.
1122 syscall(struct trapframe *frame)
1125 register_t orig_tf_eflags;
1130 if (!(TRAPF_USERMODE(frame) &&
1131 (curpcb->pcb_flags & PCB_VM86CALL) == 0)) {
1136 orig_tf_eflags = frame->tf_eflags;
1139 td->td_frame = frame;
1141 error = syscallenter(td);
1146 if ((orig_tf_eflags & PSL_T) && !(orig_tf_eflags & PSL_VM)) {
1147 frame->tf_eflags &= ~PSL_T;
1148 ksiginfo_init_trap(&ksi);
1149 ksi.ksi_signo = SIGTRAP;
1150 ksi.ksi_code = TRAP_TRACE;
1151 ksi.ksi_addr = (void *)frame->tf_eip;
1152 trapsignal(td, &ksi);
1155 KASSERT(PCB_USER_FPU(td->td_pcb),
1156 ("System call %s returning with kernel FPU ctx leaked",
1157 syscallname(td->td_proc, td->td_sa.code)));
1158 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td),
1159 ("System call %s returning with mangled pcb_save",
1160 syscallname(td->td_proc, td->td_sa.code)));
1162 syscallret(td, error);