2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (C) 1994, David Greenman
5 * Copyright (c) 1990, 1993
6 * The Regents of the University of California. All rights reserved.
8 * This code is derived from software contributed to Berkeley by
9 * the University of Utah, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91
42 #include <sys/cdefs.h>
44 * 386 Trap and System call handling
47 #include "opt_clock.h"
49 #include "opt_hwpmc_hooks.h"
54 #include <sys/param.h>
56 #include <sys/systm.h>
58 #include <sys/ptrace.h>
60 #include <sys/kernel.h>
63 #include <sys/mutex.h>
64 #include <sys/resourcevar.h>
65 #include <sys/signalvar.h>
66 #include <sys/syscall.h>
67 #include <sys/sysctl.h>
68 #include <sys/sysent.h>
70 #include <sys/vmmeter.h>
72 #include <sys/pmckern.h>
73 PMC_SOFT_DEFINE( , , page_fault, all);
74 PMC_SOFT_DEFINE( , , page_fault, read);
75 PMC_SOFT_DEFINE( , , page_fault, write);
77 #include <security/audit/audit.h>
80 #include <vm/vm_param.h>
82 #include <vm/vm_kern.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_page.h>
85 #include <vm/vm_extern.h>
87 #include <machine/cpu.h>
88 #include <machine/intr_machdep.h>
90 #include <machine/md_var.h>
91 #include <machine/pcb.h>
93 #include <machine/smp.h>
95 #include <machine/stack.h>
96 #include <machine/trap.h>
97 #include <machine/tss.h>
98 #include <machine/vm86.h>
101 #include <sys/syslog.h>
102 #include <machine/clock.h>
106 #include <sys/dtrace_bsd.h>
109 void trap(struct trapframe *frame);
110 void syscall(struct trapframe *frame);
112 static int trap_pfault(struct trapframe *, bool, vm_offset_t, int *, int *);
113 static void trap_fatal(struct trapframe *, vm_offset_t);
115 static bool trap_user_dtrace(struct trapframe *,
116 int (**hook)(struct trapframe *));
118 void dblfault_handler(void);
120 extern inthand_t IDTVEC(bpt), IDTVEC(dbg), IDTVEC(int0x80_syscall);
121 extern uint64_t pg_nx;
128 static const struct trap_data trap_data[] = {
129 [T_PRIVINFLT] = { .ei = true, .msg = "privileged instruction fault" },
130 [T_BPTFLT] = { .ei = false, .msg = "breakpoint instruction fault" },
131 [T_ARITHTRAP] = { .ei = true, .msg = "arithmetic trap" },
132 [T_PROTFLT] = { .ei = true, .msg = "general protection fault" },
133 [T_TRCTRAP] = { .ei = false, .msg = "debug exception" },
134 [T_PAGEFLT] = { .ei = true, .msg = "page fault" },
135 [T_ALIGNFLT] = { .ei = true, .msg = "alignment fault" },
136 [T_DIVIDE] = { .ei = true, .msg = "integer divide fault" },
137 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" },
138 [T_OFLOW] = { .ei = true, .msg = "overflow trap" },
139 [T_BOUND] = { .ei = true, .msg = "FPU bounds check fault" },
140 [T_DNA] = { .ei = true, .msg = "FPU device not available" },
141 [T_DOUBLEFLT] = { .ei = false, .msg = "double fault" },
142 [T_FPOPFLT] = { .ei = true, .msg = "FPU operand fetch fault" },
143 [T_TSSFLT] = { .ei = true, .msg = "invalid TSS fault" },
144 [T_SEGNPFLT] = { .ei = true, .msg = "segment not present fault" },
145 [T_STKFLT] = { .ei = true, .msg = "stack fault" },
146 [T_MCHK] = { .ei = true, .msg = "machine check trap" },
147 [T_XMMFLT] = { .ei = true, .msg = "SIMD floating-point exception" },
148 [T_DTRACE_RET] ={ .ei = true, .msg = "DTrace pid return trap" },
152 trap_enable_intr(int trapno)
156 if (trapno < nitems(trap_data) && trap_data[trapno].msg != NULL)
157 return (trap_data[trapno].ei);
165 static const char unkn[] = "UNKNOWN";
168 if (trapno < nitems(trap_data))
169 res = trap_data[trapno].msg;
175 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
176 int has_f00f_bug = 0; /* Initialized so that it can be patched. */
179 static int uprintf_signal;
180 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RW,
182 "Print debugging information on trap signal to ctty");
186 static __inline register_t
191 __asm __volatile("movl\t%%esp,%0" : "=r" (res));
196 trap_check_kstack(void)
203 if (stk >= PMAP_TRM_MIN_ADDRESS)
204 panic("td %p stack %#x in trampoline", td, stk);
205 if (!kstack_contains(td, stk, 0))
206 panic("td %p stack %#x not in kstack VA %#x %d",
207 td, stk, td->td_kstack, td->td_kstack_pages);
212 * Exception, fault, and trap interface to the FreeBSD kernel.
213 * This common code is called from assembly language IDT gate entry
214 * routines that prepare a suitable stack frame, and restore this
215 * frame after the exception has been processed.
219 trap(struct trapframe *frame)
224 int pf, signo, ucode;
226 register_t addr, dr6;
229 static int lastalert = 0;
237 type = frame->tf_trapno;
239 KASSERT((read_eflags() & PSL_I) == 0,
240 ("trap: interrupts enabled, type %d frame %p", type, frame));
243 /* Handler for NMI IPIs used for stopping CPUs. */
244 if (type == T_NMI && ipi_nmi_handler() == 0)
256 if (type == T_RESERVED) {
257 trap_fatal(frame, 0);
264 * CPU PMCs interrupt using an NMI so we check for that first.
265 * If the HWPMC module is active, 'pmc_hook' will point to
266 * the function to be called. A non-zero return value from the
267 * hook means that the NMI was consumed by it and that we can
268 * return immediately.
270 if (pmc_intr != NULL &&
271 (*pmc_intr)(frame) != 0)
276 if (type == T_MCHK) {
283 * A trap can occur while DTrace executes a probe. Before
284 * executing the probe, DTrace blocks re-scheduling and sets
285 * a flag in its per-cpu flags to indicate that it doesn't
286 * want to fault. On returning from the probe, the no-fault
287 * flag is cleared and finally re-scheduling is enabled.
289 if ((type == T_PROTFLT || type == T_PAGEFLT) &&
290 dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type))
295 * We must not allow context switches until %cr2 is read.
296 * Also, for some Cyrix CPUs, %cr2 is clobbered by interrupts.
297 * All faults use interrupt gates, so %cr2 can be safely read
298 * now, before optional enable of the interrupts below.
300 if (type == T_PAGEFLT)
304 * Buggy application or kernel code has disabled interrupts
305 * and then trapped. Enabling interrupts now is wrong, but it
306 * is better than running with interrupts disabled until they
307 * are accidentally enabled later.
309 if ((frame->tf_eflags & PSL_I) == 0 && TRAPF_USERMODE(frame) &&
310 (curpcb->pcb_flags & PCB_VM86CALL) == 0)
311 uprintf("pid %ld (%s): usermode trap %d (%s) with "
312 "interrupts disabled\n",
313 (long)curproc->p_pid, curthread->td_name, type,
314 trap_data[type].msg);
317 * Conditionally reenable interrupts. If we hold a spin lock,
318 * then we must not reenable interrupts. This might be a
319 * spurious page fault.
321 if (trap_enable_intr(type) && td->td_md.md_spinlock_count == 0 &&
322 frame->tf_eip != (int)cpu_switch_load_gs)
325 if (TRAPF_USERMODE(frame) && (curpcb->pcb_flags & PCB_VM86CALL) == 0) {
329 td->td_frame = frame;
330 addr = frame->tf_eip;
331 if (td->td_cowgen != atomic_load_int(&p->p_cowgen))
332 thread_cow_update(td);
335 case T_PRIVINFLT: /* privileged instruction fault */
340 case T_BPTFLT: /* bpt instruction fault */
342 if (trap_user_dtrace(frame, &dtrace_pid_probe_ptr))
351 case T_TRCTRAP: /* debug exception */
357 if ((dr6 & DBREG_DR6_BS) != 0) {
358 PROC_LOCK(td->td_proc);
359 if ((td->td_dbgflags & TDB_STEP) != 0) {
360 td->td_frame->tf_eflags &= ~PSL_T;
361 td->td_dbgflags &= ~TDB_STEP;
363 PROC_UNLOCK(td->td_proc);
367 case T_ARITHTRAP: /* arithmetic trap */
368 ucode = npxtrap_x87();
375 * The following two traps can happen in vm86 mode,
376 * and, if so, we want to handle them specially.
378 case T_PROTFLT: /* general protection fault */
379 case T_STKFLT: /* stack fault */
380 if (frame->tf_eflags & PSL_VM) {
381 signo = vm86_emulate((struct vm86frame *)frame);
382 ucode = 0; /* XXXKIB: better code ? */
383 if (signo == SIGTRAP) {
384 load_dr6(rdr6() | 0x4000);
385 goto user_trctrap_out;
392 ucode = (type == T_PROTFLT) ? BUS_OBJERR : BUS_ADRERR;
394 case T_SEGNPFLT: /* segment not present fault */
398 case T_TSSFLT: /* invalid TSS fault */
406 case T_DOUBLEFLT: /* double fault */
412 case T_PAGEFLT: /* page fault */
414 pf = trap_pfault(frame, true, eva, &signo, &ucode);
415 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
418 * The f00f hack workaround has triggered, so
419 * treat the fault as an illegal instruction
420 * (T_PRIVINFLT) instead of a page fault.
422 type = frame->tf_trapno = T_PRIVINFLT;
432 case T_DIVIDE: /* integer divide fault */
440 # define TIMER_FREQ 1193182
442 if (time_second - lastalert > 10) {
443 log(LOG_WARNING, "NMI: power fail\n");
444 sysbeep(880, SBT_1S);
445 lastalert = time_second;
448 #else /* !POWERFAIL_NMI */
449 nmi_handle_intr(type, frame);
451 #endif /* POWERFAIL_NMI */
453 case T_OFLOW: /* integer overflow fault */
458 case T_BOUND: /* bounds check fault */
464 KASSERT(PCB_USER_FPU(td->td_pcb),
465 ("kernel FPU ctx has leaked"));
466 /* transparent fault (due to context switch "late") */
469 uprintf("pid %d killed due to lack of floating point\n",
475 case T_FPOPFLT: /* FPU operand fetch fault */
480 case T_XMMFLT: /* SIMD floating-point exception */
481 ucode = npxtrap_sse();
488 (void)trap_user_dtrace(frame, &dtrace_return_probe_ptr);
495 KASSERT(cold || td->td_ucred != NULL,
496 ("kernel trap doesn't have ucred"));
498 case T_PAGEFLT: /* page fault */
499 (void)trap_pfault(frame, false, eva, NULL, NULL);
503 if (PCB_USER_FPU(td->td_pcb))
504 panic("Unregistered use of FPU in kernel");
509 case T_ARITHTRAP: /* arithmetic trap */
510 case T_XMMFLT: /* SIMD floating-point exception */
511 case T_FPOPFLT: /* FPU operand fetch fault */
513 * XXXKIB for now disable any FPU traps in kernel
514 * handler registration seems to be overkill
516 trap_fatal(frame, 0);
520 * The following two traps can happen in
521 * vm86 mode, and, if so, we want to handle
524 case T_PROTFLT: /* general protection fault */
525 case T_STKFLT: /* stack fault */
526 if (frame->tf_eflags & PSL_VM) {
527 signo = vm86_emulate((struct vm86frame *)frame);
528 if (signo == SIGTRAP) {
530 load_dr6(rdr6() | 0x4000);
535 * returns to original process
537 vm86_trap((struct vm86frame *)frame);
541 case T_SEGNPFLT: /* segment not present fault */
542 if (curpcb->pcb_flags & PCB_VM86CALL)
546 * Invalid %fs's and %gs's can be created using
547 * procfs or PT_SETREGS or by invalidating the
548 * underlying LDT entry. This causes a fault
549 * in kernel mode when the kernel attempts to
550 * switch contexts. Lose the bad context
551 * (XXX) so that we can continue, and generate
554 if (frame->tf_eip == (int)cpu_switch_load_gs) {
558 kern_psignal(p, SIGBUS);
564 if (td->td_intr_nesting_level != 0)
568 * Invalid segment selectors and out of bounds
569 * %eip's and %esp's can be set up in user mode.
570 * This causes a fault in kernel mode when the
571 * kernel tries to return to user mode. We want
572 * to get this fault so that we can fix the
573 * problem here and not have to check all the
574 * selectors and pointers when the user changes
577 * N.B. Comparing to long mode, 32-bit mode
578 * does not push %esp on the trap frame,
579 * because iretl faulted while in ring 0. As
580 * the consequence, there is no need to fixup
581 * the stack pointer for doreti_iret_fault,
582 * the fixup and the complimentary trap() call
583 * are executed on the main thread stack, not
584 * on the trampoline stack.
586 if (frame->tf_eip == (int)doreti_iret + setidt_disp) {
587 frame->tf_eip = (int)doreti_iret_fault +
591 if (type == T_STKFLT)
594 if (frame->tf_eip == (int)doreti_popl_ds +
596 frame->tf_eip = (int)doreti_popl_ds_fault +
600 if (frame->tf_eip == (int)doreti_popl_es +
602 frame->tf_eip = (int)doreti_popl_es_fault +
606 if (frame->tf_eip == (int)doreti_popl_fs +
608 frame->tf_eip = (int)doreti_popl_fs_fault +
612 if (curpcb->pcb_onfault != NULL) {
613 frame->tf_eip = (int)curpcb->pcb_onfault;
620 * PSL_NT can be set in user mode and isn't cleared
621 * automatically when the kernel is entered. This
622 * causes a TSS fault when the kernel attempts to
623 * `iret' because the TSS link is uninitialized. We
624 * want to get this fault so that we can fix the
625 * problem here and not every time the kernel is
628 if (frame->tf_eflags & PSL_NT) {
629 frame->tf_eflags &= ~PSL_NT;
634 case T_TRCTRAP: /* debug exception */
636 /* Clear any pending debug events. */
641 * Ignore debug register exceptions due to
642 * accesses in the user's address space, which
643 * can happen under several conditions such as
644 * if a user sets a watchpoint on a buffer and
645 * then passes that buffer to a system call.
646 * We still want to get TRCTRAPS for addresses
647 * in kernel space because that is useful when
648 * debugging the kernel.
650 if (user_dbreg_trap(dr6) &&
651 !(curpcb->pcb_flags & PCB_VM86CALL))
655 * Malicious user code can configure a debug
656 * register watchpoint to trap on data access
657 * to the top of stack and then execute 'pop
658 * %ss; int 3'. Due to exception deferral for
659 * 'pop %ss', the CPU will not interrupt 'int
660 * 3' to raise the DB# exception for the debug
661 * register but will postpone the DB# until
662 * execution of the first instruction of the
663 * BP# handler (in kernel mode). Normally the
664 * previous check would ignore DB# exceptions
665 * for watchpoints on user addresses raised in
666 * kernel mode. However, some CPU errata
667 * include cases where DB# exceptions do not
668 * properly set bits in %dr6, e.g. Haswell
669 * HSD23 and Skylake-X SKZ24.
671 * A deferred DB# can also be raised on the
672 * first instructions of system call entry
673 * points or single-step traps via similar use
674 * of 'pop %ss' or 'mov xxx, %ss'.
677 (uintptr_t)IDTVEC(int0x80_syscall) + setidt_disp ||
678 frame->tf_eip == (uintptr_t)IDTVEC(bpt) +
680 frame->tf_eip == (uintptr_t)IDTVEC(dbg) +
684 * FALLTHROUGH (TRCTRAP kernel mode, kernel address)
688 * If KDB is enabled, let it handle the debugger trap.
689 * Otherwise, debugger traps "can't happen".
692 if (kdb_trap(type, dr6, frame))
699 if (time_second - lastalert > 10) {
700 log(LOG_WARNING, "NMI: power fail\n");
701 sysbeep(880, SBT_1S);
702 lastalert = time_second;
705 #else /* !POWERFAIL_NMI */
706 nmi_handle_intr(type, frame);
708 #endif /* POWERFAIL_NMI */
711 trap_fatal(frame, eva);
715 ksiginfo_init_trap(&ksi);
716 ksi.ksi_signo = signo;
717 ksi.ksi_code = ucode;
718 ksi.ksi_addr = (void *)addr;
719 ksi.ksi_trapno = type;
720 if (uprintf_signal) {
721 uprintf("pid %d comm %s: signal %d err %#x code %d type %d "
722 "addr %#x ss %#04x esp %#08x cs %#04x eip %#08x eax %#08x"
723 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n",
724 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type,
725 addr, frame->tf_ss, frame->tf_esp, frame->tf_cs,
726 frame->tf_eip, frame->tf_eax,
727 fubyte((void *)(frame->tf_eip + 0)),
728 fubyte((void *)(frame->tf_eip + 1)),
729 fubyte((void *)(frame->tf_eip + 2)),
730 fubyte((void *)(frame->tf_eip + 3)),
731 fubyte((void *)(frame->tf_eip + 4)),
732 fubyte((void *)(frame->tf_eip + 5)),
733 fubyte((void *)(frame->tf_eip + 6)),
734 fubyte((void *)(frame->tf_eip + 7)));
736 KASSERT((read_eflags() & PSL_I) != 0, ("interrupts disabled"));
737 trapsignal(td, &ksi);
741 KASSERT(PCB_USER_FPU(td->td_pcb),
742 ("Return from trap with kernel FPU ctx leaked"));
746 * Handle all details of a page fault.
748 * -2 if the fault was caused by triggered workaround for Intel Pentium
750 * -1 if this fault was fatal, typically from kernel mode
751 * (cannot happen, but we need to return something).
752 * 0 if this fault was handled by updating either the user or kernel
753 * page table, execution can continue.
754 * 1 if this fault was from usermode and it was not handled, a synchronous
755 * signal should be delivered to the thread. *signo returns the signal
756 * number, *ucode gives si_code.
759 trap_pfault(struct trapframe *frame, bool usermode, vm_offset_t eva,
760 int *signo, int *ucode)
768 MPASS(!usermode || (signo != NULL && ucode != NULL));
773 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) {
775 * Due to both processor errata and lazy TLB invalidation when
776 * access restrictions are removed from virtual pages, memory
777 * accesses that are allowed by the physical mapping layer may
778 * nonetheless cause one spurious page fault per virtual page.
779 * When the thread is executing a "no faulting" section that
780 * is bracketed by vm_fault_{disable,enable}_pagefaults(),
781 * every page fault is treated as a spurious page fault,
782 * unless it accesses the same virtual address as the most
783 * recent page fault within the same "no faulting" section.
785 if (td->td_md.md_spurflt_addr != eva ||
786 (td->td_pflags & TDP_RESETSPUR) != 0) {
788 * Do nothing to the TLB. A stale TLB entry is
789 * flushed automatically by a page fault.
791 td->td_md.md_spurflt_addr = eva;
792 td->td_pflags &= ~TDP_RESETSPUR;
797 * If we get a page fault while in a critical section, then
798 * it is most likely a fatal kernel page fault. The kernel
799 * is already going to panic trying to get a sleep lock to
800 * do the VM lookup, so just consider it a fatal trap so the
801 * kernel can print out a useful trap message and even get
804 * If we get a page fault while holding a non-sleepable
805 * lock, then it is most likely a fatal kernel page fault.
806 * If WITNESS is enabled, then it's going to whine about
807 * bogus LORs with various VM locks, so just skip to the
808 * fatal trap handling directly.
810 if (td->td_critnest != 0 ||
811 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
812 "Kernel page fault") != 0) {
813 trap_fatal(frame, eva);
817 if (eva >= PMAP_TRM_MIN_ADDRESS) {
819 * Don't allow user-mode faults in kernel address space.
820 * An exception: if the faulting address is the invalid
821 * instruction entry in the IDT, then the Intel Pentium
822 * F00F bug workaround was triggered, and we need to
823 * treat it is as an illegal instruction, and not a page
826 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
827 if ((eva == (unsigned int)&idt[6]) && has_f00f_bug) {
835 *ucode = SEGV_MAPERR;
838 trap_fatal(frame, eva);
841 map = usermode ? &p->p_vmspace->vm_map : kernel_map;
844 * Kernel cannot access a user-space address directly
845 * because user pages are not mapped. Also, page
846 * faults must not be caused during the interrupts.
848 if (!usermode && td->td_intr_nesting_level != 0) {
849 trap_fatal(frame, eva);
855 * If the trap was caused by errant bits in the PTE then panic.
857 if (frame->tf_err & PGEX_RSV) {
858 trap_fatal(frame, eva);
863 * PGEX_I is defined only if the execute disable bit capability is
864 * supported and enabled.
866 if (frame->tf_err & PGEX_W)
867 ftype = VM_PROT_WRITE;
868 else if ((frame->tf_err & PGEX_I) && pg_nx != 0)
869 ftype = VM_PROT_EXECUTE;
871 ftype = VM_PROT_READ;
873 /* Fault in the page. */
874 rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
875 if (rv == KERN_SUCCESS) {
877 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) {
878 PMC_SOFT_CALL_TF( , , page_fault, all, frame);
879 if (ftype == VM_PROT_READ)
880 PMC_SOFT_CALL_TF( , , page_fault, read,
883 PMC_SOFT_CALL_TF( , , page_fault, write,
891 if (td->td_intr_nesting_level == 0 &&
892 curpcb->pcb_onfault != NULL) {
893 frame->tf_eip = (int)curpcb->pcb_onfault;
896 trap_fatal(frame, eva);
901 trap_fatal(struct trapframe *frame, vm_offset_t eva)
905 struct soft_segment_descriptor softseg;
910 code = frame->tf_err;
911 type = frame->tf_trapno;
912 sdtossd(&gdt[IDXSEL(frame->tf_cs & 0xffff)].sd, &softseg);
914 printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg(type),
915 frame->tf_eflags & PSL_VM ? "vm86" :
916 ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel");
918 /* two separate prints in case of a trap on an unmapped page */
919 printf("cpuid = %d; ", PCPU_GET(cpuid));
920 printf("apic id = %02x\n", PCPU_GET(apic_id));
922 if (type == T_PAGEFLT) {
923 printf("fault virtual address = 0x%x\n", eva);
924 printf("fault code = %s %s%s, %s\n",
925 code & PGEX_U ? "user" : "supervisor",
926 code & PGEX_W ? "write" : "read",
928 (code & PGEX_I ? " instruction" : " data") :
930 code & PGEX_RSV ? "reserved bits in PTE" :
931 code & PGEX_P ? "protection violation" : "page not present");
933 printf("error code = %#x\n", code);
935 printf("instruction pointer = 0x%x:0x%x\n",
936 frame->tf_cs & 0xffff, frame->tf_eip);
937 if (TF_HAS_STACKREGS(frame)) {
938 ss = frame->tf_ss & 0xffff;
941 ss = GSEL(GDATA_SEL, SEL_KPL);
942 esp = (int)&frame->tf_esp;
944 printf("stack pointer = 0x%x:0x%x\n", ss, esp);
945 printf("frame pointer = 0x%x:0x%x\n", ss, frame->tf_ebp);
946 printf("code segment = base 0x%x, limit 0x%x, type 0x%x\n",
947 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type);
948 printf(" = DPL %d, pres %d, def32 %d, gran %d\n",
949 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_def32,
951 printf("processor eflags = ");
952 if (frame->tf_eflags & PSL_T)
953 printf("trace trap, ");
954 if (frame->tf_eflags & PSL_I)
955 printf("interrupt enabled, ");
956 if (frame->tf_eflags & PSL_NT)
957 printf("nested task, ");
958 if (frame->tf_eflags & PSL_RF)
960 if (frame->tf_eflags & PSL_VM)
962 printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12);
963 printf("current process = %d (%s)\n",
964 curproc->p_pid, curthread->td_name);
967 if (debugger_on_trap) {
968 kdb_why = KDB_WHY_TRAP;
969 frame->tf_err = eva; /* smuggle fault address to ddb */
970 handled = kdb_trap(type, 0, frame);
971 frame->tf_err = code; /* restore error code */
972 kdb_why = KDB_WHY_UNSET;
977 printf("trap number = %d\n", type);
978 if (trap_msg(type) != NULL)
979 panic("%s", trap_msg(type));
981 panic("unknown/reserved trap");
986 * Invoke a userspace DTrace hook. The hook pointer is cleared when no
987 * userspace probes are enabled, so we must synchronize with DTrace to ensure
988 * that a trapping thread is able to call the hook before it is cleared.
991 trap_user_dtrace(struct trapframe *frame, int (**hookp)(struct trapframe *))
993 int (*hook)(struct trapframe *);
995 hook = atomic_load_ptr(hookp);
998 return ((hook)(frame) == 0);
1004 * Double fault handler. Called when a fault occurs while writing
1005 * a frame for a trap/exception onto the stack. This usually occurs
1006 * when the stack overflows (such is the case with infinite recursion,
1009 * XXX Note that the current PTD gets replaced by IdlePTD when the
1010 * task switch occurs. This means that the stack that was active at
1011 * the time of the double fault is not available at <kstack> unless
1012 * the machine was idle when the double fault occurred. The downside
1013 * of this is that "trace <ebp>" in ddb won't work.
1016 dblfault_handler(void)
1020 #ifdef KDTRACE_HOOKS
1021 if (dtrace_doubletrap_func != NULL)
1022 (*dtrace_doubletrap_func)();
1024 printf("\nFatal double fault:\n");
1025 t = PCPU_GET(common_tssp);
1027 "eip = %#08x esp = %#08x ebp = %#08x eax = %#08x\n"
1028 "edx = %#08x ecx = %#08x edi = %#08x esi = %#08x\n"
1030 "psl = %#08x cs = %#08x ss = %#08x ds = %#08x\n"
1031 "es = %#08x fs = %#08x gs = %#08x cr3 = %#08x\n",
1032 t->tss_eip, t->tss_esp, t->tss_ebp, t->tss_eax,
1033 t->tss_edx, t->tss_ecx, t->tss_edi, t->tss_esi,
1035 t->tss_eflags, t->tss_cs, t->tss_ss, t->tss_ds,
1036 t->tss_es, t->tss_fs, t->tss_gs, t->tss_cr3);
1038 printf("cpuid = %d; apic id = %02x\n", PCPU_GET(cpuid),
1041 panic("double fault");
1045 cpu_fetch_syscall_args(struct thread *td)
1048 struct trapframe *frame;
1049 struct syscall_args *sa;
1059 frame = td->td_frame;
1063 if (__predict_false(frame->tf_cs == 7 && frame->tf_eip == 2)) {
1065 * In lcall $7,$0 after int $0x80. Convert the user
1066 * frame to what it would be for a direct int 0x80 instead
1067 * of lcall $7,$0, by popping the lcall return address.
1069 error = fueword32((void *)frame->tf_esp, &eip);
1072 cs = fuword16((void *)(frame->tf_esp + sizeof(u_int32_t)));
1077 * Unwind in-kernel frame after all stack frame pieces
1078 * were successfully read.
1080 frame->tf_eip = eip;
1082 frame->tf_esp += 2 * sizeof(u_int32_t);
1083 frame->tf_err = 7; /* size of lcall $7,$0 */
1087 sa->code = frame->tf_eax;
1088 sa->original_code = sa->code;
1089 params = (caddr_t)frame->tf_esp + sizeof(uint32_t);
1092 * Need to check if this is a 32 bit or 64 bit syscall.
1094 if (sa->code == SYS_syscall) {
1096 * Code is first argument, followed by actual args.
1098 error = fueword(params, &tmp);
1102 params += sizeof(uint32_t);
1103 } else if (sa->code == SYS___syscall) {
1105 * Like syscall, but code is a quad, so as to maintain
1106 * quad alignment for the rest of the arguments.
1108 error = fueword(params, &tmp);
1112 params += sizeof(quad_t);
1115 if (sa->code >= p->p_sysent->sv_size)
1116 sa->callp = &nosys_sysent;
1118 sa->callp = &p->p_sysent->sv_table[sa->code];
1120 if (params != NULL && sa->callp->sy_narg != 0)
1121 error = copyin(params, (caddr_t)sa->args,
1122 (u_int)(sa->callp->sy_narg * sizeof(uint32_t)));
1127 td->td_retval[0] = 0;
1128 td->td_retval[1] = frame->tf_edx;
1134 #include "../../kern/subr_syscall.c"
1137 * syscall - system call request C handler. A system call is
1138 * essentially treated as a trap by reusing the frame layout.
1141 syscall(struct trapframe *frame)
1144 register_t orig_tf_eflags;
1148 if (!(TRAPF_USERMODE(frame) &&
1149 (curpcb->pcb_flags & PCB_VM86CALL) == 0)) {
1154 trap_check_kstack();
1155 orig_tf_eflags = frame->tf_eflags;
1158 td->td_frame = frame;
1165 if ((orig_tf_eflags & PSL_T) && !(orig_tf_eflags & PSL_VM)) {
1166 frame->tf_eflags &= ~PSL_T;
1167 ksiginfo_init_trap(&ksi);
1168 ksi.ksi_signo = SIGTRAP;
1169 ksi.ksi_code = TRAP_TRACE;
1170 ksi.ksi_addr = (void *)frame->tf_eip;
1171 trapsignal(td, &ksi);
1174 KASSERT(PCB_USER_FPU(td->td_pcb),
1175 ("System call %s returning with kernel FPU ctx leaked",
1176 syscallname(td->td_proc, td->td_sa.code)));
1177 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td),
1178 ("System call %s returning with mangled pcb_save",
1179 syscallname(td->td_proc, td->td_sa.code)));