2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (C) 1994, David Greenman
5 * Copyright (c) 1990, 1993
6 * The Regents of the University of California. All rights reserved.
8 * This code is derived from software contributed to Berkeley by
9 * the University of Utah, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
46 * 386 Trap and System call handling
49 #include "opt_clock.h"
50 #include "opt_compat.h"
52 #include "opt_hwpmc_hooks.h"
55 #include "opt_stack.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
62 #include <sys/pioctl.h>
63 #include <sys/ptrace.h>
65 #include <sys/kernel.h>
68 #include <sys/mutex.h>
69 #include <sys/resourcevar.h>
70 #include <sys/signalvar.h>
71 #include <sys/syscall.h>
72 #include <sys/sysctl.h>
73 #include <sys/sysent.h>
75 #include <sys/vmmeter.h>
77 #include <sys/pmckern.h>
78 PMC_SOFT_DEFINE( , , page_fault, all);
79 PMC_SOFT_DEFINE( , , page_fault, read);
80 PMC_SOFT_DEFINE( , , page_fault, write);
82 #include <security/audit/audit.h>
85 #include <vm/vm_param.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_map.h>
89 #include <vm/vm_page.h>
90 #include <vm/vm_extern.h>
92 #include <machine/cpu.h>
93 #include <machine/intr_machdep.h>
95 #include <machine/md_var.h>
96 #include <machine/pcb.h>
98 #include <machine/smp.h>
100 #include <machine/stack.h>
101 #include <machine/trap.h>
102 #include <machine/tss.h>
103 #include <machine/vm86.h>
106 #include <sys/syslog.h>
107 #include <machine/clock.h>
111 #include <sys/dtrace_bsd.h>
114 void trap(struct trapframe *frame);
115 void syscall(struct trapframe *frame);
117 static int trap_pfault(struct trapframe *, int, vm_offset_t);
118 static void trap_fatal(struct trapframe *, vm_offset_t);
119 void dblfault_handler(void);
121 extern inthand_t IDTVEC(bpt), IDTVEC(dbg), IDTVEC(int0x80_syscall);
123 #define MAX_TRAP_MSG 32
130 static const struct trap_data trap_data[] = {
131 [T_PRIVINFLT] = { .ei = true, .msg = "privileged instruction fault" },
132 [T_BPTFLT] = { .ei = false, .msg = "breakpoint instruction fault" },
133 [T_ARITHTRAP] = { .ei = true, .msg = "arithmetic trap" },
134 [T_PROTFLT] = { .ei = true, .msg = "general protection fault" },
135 [T_TRCTRAP] = { .ei = false, .msg = "trace trap" },
136 [T_PAGEFLT] = { .ei = true, .msg = "page fault" },
137 [T_ALIGNFLT] = { .ei = true, .msg = "alignment fault" },
138 [T_DIVIDE] = { .ei = true, .msg = "integer divide fault" },
139 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" },
140 [T_OFLOW] = { .ei = true, .msg = "overflow trap" },
141 [T_BOUND] = { .ei = true, .msg = "FPU bounds check fault" },
142 [T_DNA] = { .ei = true, .msg = "FPU device not available" },
143 [T_DOUBLEFLT] = { .ei = false, .msg = "double fault" },
144 [T_FPOPFLT] = { .ei = true, .msg = "FPU operand fetch fault" },
145 [T_TSSFLT] = { .ei = true, .msg = "invalid TSS fault" },
146 [T_SEGNPFLT] = { .ei = true, .msg = "segment not present fault" },
147 [T_STKFLT] = { .ei = true, .msg = "stack fault" },
148 [T_MCHK] = { .ei = true, .msg = "machine check trap" },
149 [T_XMMFLT] = { .ei = true, .msg = "SIMD floating-point exception" },
150 [T_DTRACE_RET] ={ .ei = true, .msg = "DTrace pid return trap" },
154 trap_enable_intr(int trapno)
158 if (trapno < nitems(trap_data) && trap_data[trapno].msg != NULL)
159 return (trap_data[trapno].ei);
167 static const char unkn[] = "UNKNOWN";
170 if (trapno < nitems(trap_data))
171 res = trap_data[trapno].msg;
177 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
178 int has_f00f_bug = 0; /* Initialized so that it can be patched. */
181 static int prot_fault_translation = 0;
182 SYSCTL_INT(_machdep, OID_AUTO, prot_fault_translation, CTLFLAG_RW,
183 &prot_fault_translation, 0, "Select signal to deliver on protection fault");
184 static int uprintf_signal;
185 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RW,
187 "Print debugging information on trap signal to ctty");
190 * Exception, fault, and trap interface to the FreeBSD kernel.
191 * This common code is called from assembly language IDT gate entry
192 * routines that prepare a suitable stack frame, and restore this
193 * frame after the exception has been processed.
197 trap(struct trapframe *frame)
210 static int lastalert = 0;
220 type = frame->tf_trapno;
222 KASSERT((read_eflags() & PSL_I) == 0,
223 ("trap: interrupts enaabled, type %d frame %p", type, frame));
226 /* Handler for NMI IPIs used for stopping CPUs. */
227 if (type == T_NMI && ipi_nmi_handler() == 0)
238 if (type == T_RESERVED) {
239 trap_fatal(frame, 0);
246 * CPU PMCs interrupt using an NMI so we check for that first.
247 * If the HWPMC module is active, 'pmc_hook' will point to
248 * the function to be called. A non-zero return value from the
249 * hook means that the NMI was consumed by it and that we can
250 * return immediately.
252 if (pmc_intr != NULL &&
253 (*pmc_intr)(PCPU_GET(cpuid), frame) != 0)
258 if (stack_nmi_handler(frame) != 0)
263 if (type == T_MCHK) {
270 * A trap can occur while DTrace executes a probe. Before
271 * executing the probe, DTrace blocks re-scheduling and sets
272 * a flag in its per-cpu flags to indicate that it doesn't
273 * want to fault. On returning from the probe, the no-fault
274 * flag is cleared and finally re-scheduling is enabled.
276 if ((type == T_PROTFLT || type == T_PAGEFLT) &&
277 dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type))
282 * We must not allow context switches until %cr2 is read.
283 * Also, for some Cyrix CPUs, %cr2 is clobbered by interrupts.
284 * All faults use interrupt gates, so %cr2 can be safely read
285 * now, before optional enable of the interrupts below.
287 if (type == T_PAGEFLT)
291 * Buggy application or kernel code has disabled interrupts
292 * and then trapped. Enabling interrupts now is wrong, but it
293 * is better than running with interrupts disabled until they
294 * are accidentally enabled later.
296 if ((frame->tf_eflags & PSL_I) == 0 && TRAPF_USERMODE(frame) &&
297 (curpcb->pcb_flags & PCB_VM86CALL) == 0)
298 uprintf("pid %ld (%s): trap %d with interrupts disabled\n",
299 (long)curproc->p_pid, curthread->td_name, type);
302 * Conditionally reenable interrupts. If we hold a spin lock,
303 * then we must not reenable interrupts. This might be a
304 * spurious page fault.
306 if (trap_enable_intr(type) && td->td_md.md_spinlock_count == 0 &&
307 frame->tf_eip != (int)cpu_switch_load_gs)
310 if (TRAPF_USERMODE(frame) && (curpcb->pcb_flags & PCB_VM86CALL) == 0) {
314 td->td_frame = frame;
315 addr = frame->tf_eip;
316 if (td->td_cowgen != p->p_cowgen)
317 thread_cow_update(td);
320 case T_PRIVINFLT: /* privileged instruction fault */
325 case T_BPTFLT: /* bpt instruction fault */
326 case T_TRCTRAP: /* trace trap */
329 if (type == T_BPTFLT) {
330 if (dtrace_pid_probe_ptr != NULL &&
331 dtrace_pid_probe_ptr(frame) == 0)
336 frame->tf_eflags &= ~PSL_T;
338 ucode = (type == T_TRCTRAP ? TRAP_TRACE : TRAP_BRKPT);
341 case T_ARITHTRAP: /* arithmetic trap */
342 ucode = npxtrap_x87();
349 * The following two traps can happen in vm86 mode,
350 * and, if so, we want to handle them specially.
352 case T_PROTFLT: /* general protection fault */
353 case T_STKFLT: /* stack fault */
354 if (frame->tf_eflags & PSL_VM) {
355 signo = vm86_emulate((struct vm86frame *)frame);
356 if (signo == SIGTRAP) {
358 load_dr6(rdr6() | 0x4000);
359 goto user_trctrap_out;
366 ucode = (type == T_PROTFLT) ? BUS_OBJERR : BUS_ADRERR;
368 case T_SEGNPFLT: /* segment not present fault */
372 case T_TSSFLT: /* invalid TSS fault */
380 case T_DOUBLEFLT: /* double fault */
386 case T_PAGEFLT: /* page fault */
387 signo = trap_pfault(frame, TRUE, eva);
388 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
391 * The f00f hack workaround has triggered, so
392 * treat the fault as an illegal instruction
393 * (T_PRIVINFLT) instead of a page fault.
395 type = frame->tf_trapno = T_PRIVINFLT;
397 /* Proceed as in that case. */
408 if (signo == SIGSEGV)
410 else if (prot_fault_translation == 0) {
412 * Autodetect. This check also covers
413 * the images without the ABI-tag ELF
416 if (SV_CURPROC_ABI() == SV_ABI_FREEBSD &&
417 p->p_osrel >= P_OSREL_SIGSEGV) {
424 } else if (prot_fault_translation == 1) {
426 * Always compat mode.
432 * Always SIGSEGV mode.
440 case T_DIVIDE: /* integer divide fault */
449 # define TIMER_FREQ 1193182
451 if (time_second - lastalert > 10) {
452 log(LOG_WARNING, "NMI: power fail\n");
454 lastalert = time_second;
457 #else /* !POWERFAIL_NMI */
458 nmi_handle_intr(type, frame);
460 #endif /* POWERFAIL_NMI */
463 case T_OFLOW: /* integer overflow fault */
468 case T_BOUND: /* bounds check fault */
474 KASSERT(PCB_USER_FPU(td->td_pcb),
475 ("kernel FPU ctx has leaked"));
476 /* transparent fault (due to context switch "late") */
479 uprintf("pid %d killed due to lack of floating point\n",
485 case T_FPOPFLT: /* FPU operand fetch fault */
490 case T_XMMFLT: /* SIMD floating-point exception */
491 ucode = npxtrap_sse();
499 if (dtrace_return_probe_ptr != NULL)
500 dtrace_return_probe_ptr(frame);
507 KASSERT(cold || td->td_ucred != NULL,
508 ("kernel trap doesn't have ucred"));
510 case T_PAGEFLT: /* page fault */
511 (void) trap_pfault(frame, FALSE, eva);
515 if (PCB_USER_FPU(td->td_pcb))
516 panic("Unregistered use of FPU in kernel");
521 case T_ARITHTRAP: /* arithmetic trap */
522 case T_XMMFLT: /* SIMD floating-point exception */
523 case T_FPOPFLT: /* FPU operand fetch fault */
525 * XXXKIB for now disable any FPU traps in kernel
526 * handler registration seems to be overkill
528 trap_fatal(frame, 0);
532 * The following two traps can happen in
533 * vm86 mode, and, if so, we want to handle
536 case T_PROTFLT: /* general protection fault */
537 case T_STKFLT: /* stack fault */
538 if (frame->tf_eflags & PSL_VM) {
539 signo = vm86_emulate((struct vm86frame *)frame);
540 if (signo == SIGTRAP) {
542 load_dr6(rdr6() | 0x4000);
547 * returns to original process
549 vm86_trap((struct vm86frame *)frame);
553 case T_SEGNPFLT: /* segment not present fault */
554 if (curpcb->pcb_flags & PCB_VM86CALL)
558 * Invalid %fs's and %gs's can be created using
559 * procfs or PT_SETREGS or by invalidating the
560 * underlying LDT entry. This causes a fault
561 * in kernel mode when the kernel attempts to
562 * switch contexts. Lose the bad context
563 * (XXX) so that we can continue, and generate
566 if (frame->tf_eip == (int)cpu_switch_load_gs) {
570 kern_psignal(p, SIGBUS);
576 if (td->td_intr_nesting_level != 0)
580 * Invalid segment selectors and out of bounds
581 * %eip's and %esp's can be set up in user mode.
582 * This causes a fault in kernel mode when the
583 * kernel tries to return to user mode. We want
584 * to get this fault so that we can fix the
585 * problem here and not have to check all the
586 * selectors and pointers when the user changes
589 * N.B. Comparing to long mode, 32-bit mode
590 * does not push %esp on the trap frame,
591 * because iretl faulted while in ring 0. As
592 * the consequence, there is no need to fixup
593 * the stack pointer for doreti_iret_fault,
594 * the fixup and the complimentary trap() call
595 * are executed on the main thread stack, not
596 * on the trampoline stack.
598 if (frame->tf_eip == (int)doreti_iret + setidt_disp) {
599 frame->tf_eip = (int)doreti_iret_fault +
603 if (type == T_STKFLT)
606 if (frame->tf_eip == (int)doreti_popl_ds +
608 frame->tf_eip = (int)doreti_popl_ds_fault +
612 if (frame->tf_eip == (int)doreti_popl_es +
614 frame->tf_eip = (int)doreti_popl_es_fault +
618 if (frame->tf_eip == (int)doreti_popl_fs +
620 frame->tf_eip = (int)doreti_popl_fs_fault +
624 if (curpcb->pcb_onfault != NULL) {
625 frame->tf_eip = (int)curpcb->pcb_onfault;
632 * PSL_NT can be set in user mode and isn't cleared
633 * automatically when the kernel is entered. This
634 * causes a TSS fault when the kernel attempts to
635 * `iret' because the TSS link is uninitialized. We
636 * want to get this fault so that we can fix the
637 * problem here and not every time the kernel is
640 if (frame->tf_eflags & PSL_NT) {
641 frame->tf_eflags &= ~PSL_NT;
646 case T_TRCTRAP: /* trace trap */
649 * Ignore debug register trace traps due to
650 * accesses in the user's address space, which
651 * can happen under several conditions such as
652 * if a user sets a watchpoint on a buffer and
653 * then passes that buffer to a system call.
654 * We still want to get TRCTRAPS for addresses
655 * in kernel space because that is useful when
656 * debugging the kernel.
658 if (user_dbreg_trap() &&
659 !(curpcb->pcb_flags & PCB_VM86CALL)) {
661 * Reset breakpoint bits because the
664 load_dr6(rdr6() & ~0xf);
669 * Malicious user code can configure a debug
670 * register watchpoint to trap on data access
671 * to the top of stack and then execute 'pop
672 * %ss; int 3'. Due to exception deferral for
673 * 'pop %ss', the CPU will not interrupt 'int
674 * 3' to raise the DB# exception for the debug
675 * register but will postpone the DB# until
676 * execution of the first instruction of the
677 * BP# handler (in kernel mode). Normally the
678 * previous check would ignore DB# exceptions
679 * for watchpoints on user addresses raised in
680 * kernel mode. However, some CPU errata
681 * include cases where DB# exceptions do not
682 * properly set bits in %dr6, e.g. Haswell
683 * HSD23 and Skylake-X SKZ24.
685 * A deferred DB# can also be raised on the
686 * first instructions of system call entry
687 * points or single-step traps via similar use
688 * of 'pop %ss' or 'mov xxx, %ss'.
691 (uintptr_t)IDTVEC(int0x80_syscall) + setidt_disp ||
692 frame->tf_eip == (uintptr_t)IDTVEC(bpt) +
694 frame->tf_eip == (uintptr_t)IDTVEC(dbg) +
698 * FALLTHROUGH (TRCTRAP kernel mode, kernel address)
702 * If KDB is enabled, let it handle the debugger trap.
703 * Otherwise, debugger traps "can't happen".
706 /* XXX %dr6 is not quite reentrant. */
708 load_dr6(dr6 & ~0x4000);
709 if (kdb_trap(type, dr6, frame))
717 if (time_second - lastalert > 10) {
718 log(LOG_WARNING, "NMI: power fail\n");
720 lastalert = time_second;
723 #else /* !POWERFAIL_NMI */
724 nmi_handle_intr(type, frame);
726 #endif /* POWERFAIL_NMI */
730 trap_fatal(frame, eva);
734 /* Translate fault for emulators (e.g. Linux) */
735 if (*p->p_sysent->sv_transtrap != NULL)
736 signo = (*p->p_sysent->sv_transtrap)(signo, type);
738 ksiginfo_init_trap(&ksi);
739 ksi.ksi_signo = signo;
740 ksi.ksi_code = ucode;
741 ksi.ksi_addr = (void *)addr;
742 ksi.ksi_trapno = type;
743 if (uprintf_signal) {
744 uprintf("pid %d comm %s: signal %d err %x code %d type %d "
745 "addr 0x%x ss 0x%04x esp 0x%08x cs 0x%04x eip 0x%08x "
746 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n",
747 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type,
748 addr, frame->tf_ss, frame->tf_esp, frame->tf_cs,
750 fubyte((void *)(frame->tf_eip + 0)),
751 fubyte((void *)(frame->tf_eip + 1)),
752 fubyte((void *)(frame->tf_eip + 2)),
753 fubyte((void *)(frame->tf_eip + 3)),
754 fubyte((void *)(frame->tf_eip + 4)),
755 fubyte((void *)(frame->tf_eip + 5)),
756 fubyte((void *)(frame->tf_eip + 6)),
757 fubyte((void *)(frame->tf_eip + 7)));
759 KASSERT((read_eflags() & PSL_I) != 0, ("interrupts disabled"));
760 trapsignal(td, &ksi);
764 KASSERT(PCB_USER_FPU(td->td_pcb),
765 ("Return from trap with kernel FPU ctx leaked"));
769 trap_pfault(struct trapframe *frame, int usermode, vm_offset_t eva)
781 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) {
783 * Due to both processor errata and lazy TLB invalidation when
784 * access restrictions are removed from virtual pages, memory
785 * accesses that are allowed by the physical mapping layer may
786 * nonetheless cause one spurious page fault per virtual page.
787 * When the thread is executing a "no faulting" section that
788 * is bracketed by vm_fault_{disable,enable}_pagefaults(),
789 * every page fault is treated as a spurious page fault,
790 * unless it accesses the same virtual address as the most
791 * recent page fault within the same "no faulting" section.
793 if (td->td_md.md_spurflt_addr != eva ||
794 (td->td_pflags & TDP_RESETSPUR) != 0) {
796 * Do nothing to the TLB. A stale TLB entry is
797 * flushed automatically by a page fault.
799 td->td_md.md_spurflt_addr = eva;
800 td->td_pflags &= ~TDP_RESETSPUR;
805 * If we get a page fault while in a critical section, then
806 * it is most likely a fatal kernel page fault. The kernel
807 * is already going to panic trying to get a sleep lock to
808 * do the VM lookup, so just consider it a fatal trap so the
809 * kernel can print out a useful trap message and even get
812 * If we get a page fault while holding a non-sleepable
813 * lock, then it is most likely a fatal kernel page fault.
814 * If WITNESS is enabled, then it's going to whine about
815 * bogus LORs with various VM locks, so just skip to the
816 * fatal trap handling directly.
818 if (td->td_critnest != 0 ||
819 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
820 "Kernel page fault") != 0) {
821 trap_fatal(frame, eva);
825 va = trunc_page(eva);
826 if (va >= PMAP_TRM_MIN_ADDRESS) {
828 * Don't allow user-mode faults in kernel address space.
829 * An exception: if the faulting address is the invalid
830 * instruction entry in the IDT, then the Intel Pentium
831 * F00F bug workaround was triggered, and we need to
832 * treat it is as an illegal instruction, and not a page
835 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
836 if ((eva == (unsigned int)&idt[6]) && has_f00f_bug)
841 trap_fatal(frame, eva);
844 map = usermode ? &p->p_vmspace->vm_map : kernel_map;
847 * Kernel cannot access a user-space address directly
848 * because user pages are not mapped. Also, page
849 * faults must not be caused during the interrupts.
851 if (!usermode && td->td_intr_nesting_level != 0) {
852 trap_fatal(frame, eva);
858 * If the trap was caused by errant bits in the PTE then panic.
860 if (frame->tf_err & PGEX_RSV) {
861 trap_fatal(frame, eva);
866 * PGEX_I is defined only if the execute disable bit capability is
867 * supported and enabled.
869 if (frame->tf_err & PGEX_W)
870 ftype = VM_PROT_WRITE;
871 #if defined(PAE) || defined(PAE_TABLES)
872 else if ((frame->tf_err & PGEX_I) && pg_nx != 0)
873 ftype = VM_PROT_EXECUTE;
876 ftype = VM_PROT_READ;
878 /* Fault in the page. */
879 rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
880 if (rv == KERN_SUCCESS) {
882 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) {
883 PMC_SOFT_CALL_TF( , , page_fault, all, frame);
884 if (ftype == VM_PROT_READ)
885 PMC_SOFT_CALL_TF( , , page_fault, read,
888 PMC_SOFT_CALL_TF( , , page_fault, write,
895 if (td->td_intr_nesting_level == 0 &&
896 curpcb->pcb_onfault != NULL) {
897 frame->tf_eip = (int)curpcb->pcb_onfault;
900 trap_fatal(frame, eva);
903 return ((rv == KERN_PROTECTION_FAILURE) ? SIGBUS : SIGSEGV);
907 trap_fatal(frame, eva)
908 struct trapframe *frame;
913 struct soft_segment_descriptor softseg;
918 code = frame->tf_err;
919 type = frame->tf_trapno;
920 sdtossd(&gdt[IDXSEL(frame->tf_cs & 0xffff)].sd, &softseg);
922 printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg(type),
923 frame->tf_eflags & PSL_VM ? "vm86" :
924 ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel");
926 /* two separate prints in case of a trap on an unmapped page */
927 printf("cpuid = %d; ", PCPU_GET(cpuid));
928 printf("apic id = %02x\n", PCPU_GET(apic_id));
930 if (type == T_PAGEFLT) {
931 printf("fault virtual address = 0x%x\n", eva);
932 printf("fault code = %s %s%s, %s\n",
933 code & PGEX_U ? "user" : "supervisor",
934 code & PGEX_W ? "write" : "read",
935 #if defined(PAE) || defined(PAE_TABLES)
937 (code & PGEX_I ? " instruction" : " data") :
940 code & PGEX_RSV ? "reserved bits in PTE" :
941 code & PGEX_P ? "protection violation" : "page not present");
943 printf("error code = %#x\n", code);
945 printf("instruction pointer = 0x%x:0x%x\n",
946 frame->tf_cs & 0xffff, frame->tf_eip);
947 if (TF_HAS_STACKREGS(frame)) {
948 ss = frame->tf_ss & 0xffff;
951 ss = GSEL(GDATA_SEL, SEL_KPL);
952 esp = (int)&frame->tf_esp;
954 printf("stack pointer = 0x%x:0x%x\n", ss, esp);
955 printf("frame pointer = 0x%x:0x%x\n", ss, frame->tf_ebp);
956 printf("code segment = base 0x%x, limit 0x%x, type 0x%x\n",
957 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type);
958 printf(" = DPL %d, pres %d, def32 %d, gran %d\n",
959 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_def32,
961 printf("processor eflags = ");
962 if (frame->tf_eflags & PSL_T)
963 printf("trace trap, ");
964 if (frame->tf_eflags & PSL_I)
965 printf("interrupt enabled, ");
966 if (frame->tf_eflags & PSL_NT)
967 printf("nested task, ");
968 if (frame->tf_eflags & PSL_RF)
970 if (frame->tf_eflags & PSL_VM)
972 printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12);
973 printf("current process = %d (%s)\n",
974 curproc->p_pid, curthread->td_name);
977 if (debugger_on_panic) {
978 kdb_why = KDB_WHY_TRAP;
979 frame->tf_err = eva; /* smuggle fault address to ddb */
980 handled = kdb_trap(type, 0, frame);
981 frame->tf_err = code; /* restore error code */
982 kdb_why = KDB_WHY_UNSET;
987 printf("trap number = %d\n", type);
988 if (trap_msg(type) != NULL)
989 panic("%s", trap_msg(type));
991 panic("unknown/reserved trap");
995 * Double fault handler. Called when a fault occurs while writing
996 * a frame for a trap/exception onto the stack. This usually occurs
997 * when the stack overflows (such is the case with infinite recursion,
1000 * XXX Note that the current PTD gets replaced by IdlePTD when the
1001 * task switch occurs. This means that the stack that was active at
1002 * the time of the double fault is not available at <kstack> unless
1003 * the machine was idle when the double fault occurred. The downside
1004 * of this is that "trace <ebp>" in ddb won't work.
1007 dblfault_handler(void)
1009 #ifdef KDTRACE_HOOKS
1010 if (dtrace_doubletrap_func != NULL)
1011 (*dtrace_doubletrap_func)();
1013 printf("\nFatal double fault:\n");
1014 printf("eip = 0x%x\n", PCPU_GET(common_tssp)->tss_eip);
1015 printf("esp = 0x%x\n", PCPU_GET(common_tssp)->tss_esp);
1016 printf("ebp = 0x%x\n", PCPU_GET(common_tssp)->tss_ebp);
1018 /* two separate prints in case of a trap on an unmapped page */
1019 printf("cpuid = %d; ", PCPU_GET(cpuid));
1020 printf("apic id = %02x\n", PCPU_GET(apic_id));
1022 panic("double fault");
1026 cpu_fetch_syscall_args(struct thread *td)
1029 struct trapframe *frame;
1030 struct syscall_args *sa;
1040 frame = td->td_frame;
1044 if (__predict_false(frame->tf_cs == 7 && frame->tf_eip == 2)) {
1046 * In lcall $7,$0 after int $0x80. Convert the user
1047 * frame to what it would be for a direct int 0x80 instead
1048 * of lcall $7,$0, by popping the lcall return address.
1050 error = fueword32((void *)frame->tf_esp, &eip);
1053 cs = fuword16((void *)(frame->tf_esp + sizeof(u_int32_t)));
1058 * Unwind in-kernel frame after all stack frame pieces
1059 * were successfully read.
1061 frame->tf_eip = eip;
1063 frame->tf_esp += 2 * sizeof(u_int32_t);
1064 frame->tf_err = 7; /* size of lcall $7,$0 */
1068 sa->code = frame->tf_eax;
1069 params = (caddr_t)frame->tf_esp + sizeof(uint32_t);
1072 * Need to check if this is a 32 bit or 64 bit syscall.
1074 if (sa->code == SYS_syscall) {
1076 * Code is first argument, followed by actual args.
1078 error = fueword(params, &tmp);
1082 params += sizeof(uint32_t);
1083 } else if (sa->code == SYS___syscall) {
1085 * Like syscall, but code is a quad, so as to maintain
1086 * quad alignment for the rest of the arguments.
1088 error = fueword(params, &tmp);
1092 params += sizeof(quad_t);
1095 if (p->p_sysent->sv_mask)
1096 sa->code &= p->p_sysent->sv_mask;
1097 if (sa->code >= p->p_sysent->sv_size)
1098 sa->callp = &p->p_sysent->sv_table[0];
1100 sa->callp = &p->p_sysent->sv_table[sa->code];
1101 sa->narg = sa->callp->sy_narg;
1103 if (params != NULL && sa->narg != 0)
1104 error = copyin(params, (caddr_t)sa->args,
1105 (u_int)(sa->narg * sizeof(uint32_t)));
1110 td->td_retval[0] = 0;
1111 td->td_retval[1] = frame->tf_edx;
1117 #include "../../kern/subr_syscall.c"
1120 * syscall - system call request C handler. A system call is
1121 * essentially treated as a trap by reusing the frame layout.
1124 syscall(struct trapframe *frame)
1127 register_t orig_tf_eflags;
1132 if (!(TRAPF_USERMODE(frame) &&
1133 (curpcb->pcb_flags & PCB_VM86CALL) == 0)) {
1138 orig_tf_eflags = frame->tf_eflags;
1141 td->td_frame = frame;
1143 error = syscallenter(td);
1148 if ((orig_tf_eflags & PSL_T) && !(orig_tf_eflags & PSL_VM)) {
1149 frame->tf_eflags &= ~PSL_T;
1150 ksiginfo_init_trap(&ksi);
1151 ksi.ksi_signo = SIGTRAP;
1152 ksi.ksi_code = TRAP_TRACE;
1153 ksi.ksi_addr = (void *)frame->tf_eip;
1154 trapsignal(td, &ksi);
1157 KASSERT(PCB_USER_FPU(td->td_pcb),
1158 ("System call %s returning with kernel FPU ctx leaked",
1159 syscallname(td->td_proc, td->td_sa.code)));
1160 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td),
1161 ("System call %s returning with mangled pcb_save",
1162 syscallname(td->td_proc, td->td_sa.code)));
1164 syscallret(td, error);