2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (C) 1994, David Greenman
5 * Copyright (c) 1990, 1993
6 * The Regents of the University of California. All rights reserved.
8 * This code is derived from software contributed to Berkeley by
9 * the University of Utah, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)trap.c 7.4 (Berkeley) 5/13/91
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
46 * 386 Trap and System call handling
49 #include "opt_clock.h"
50 #include "opt_compat.h"
52 #include "opt_hwpmc_hooks.h"
55 #include "opt_stack.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
62 #include <sys/pioctl.h>
63 #include <sys/ptrace.h>
65 #include <sys/kernel.h>
68 #include <sys/mutex.h>
69 #include <sys/resourcevar.h>
70 #include <sys/signalvar.h>
71 #include <sys/syscall.h>
72 #include <sys/sysctl.h>
73 #include <sys/sysent.h>
75 #include <sys/vmmeter.h>
77 #include <sys/pmckern.h>
78 PMC_SOFT_DEFINE( , , page_fault, all);
79 PMC_SOFT_DEFINE( , , page_fault, read);
80 PMC_SOFT_DEFINE( , , page_fault, write);
82 #include <security/audit/audit.h>
85 #include <vm/vm_param.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_map.h>
89 #include <vm/vm_page.h>
90 #include <vm/vm_extern.h>
92 #include <machine/cpu.h>
93 #include <machine/intr_machdep.h>
95 #include <machine/md_var.h>
96 #include <machine/pcb.h>
98 #include <machine/smp.h>
100 #include <machine/stack.h>
101 #include <machine/trap.h>
102 #include <machine/tss.h>
103 #include <machine/vm86.h>
106 #include <sys/syslog.h>
107 #include <machine/clock.h>
111 #include <sys/dtrace_bsd.h>
114 void trap(struct trapframe *frame);
115 void syscall(struct trapframe *frame);
117 static int trap_pfault(struct trapframe *, bool, vm_offset_t, int *, int *);
118 static void trap_fatal(struct trapframe *, vm_offset_t);
120 static bool trap_user_dtrace(struct trapframe *,
121 int (**hook)(struct trapframe *));
123 void dblfault_handler(void);
125 extern inthand_t IDTVEC(bpt), IDTVEC(dbg), IDTVEC(int0x80_syscall);
126 extern uint64_t pg_nx;
133 static const struct trap_data trap_data[] = {
134 [T_PRIVINFLT] = { .ei = true, .msg = "privileged instruction fault" },
135 [T_BPTFLT] = { .ei = false, .msg = "breakpoint instruction fault" },
136 [T_ARITHTRAP] = { .ei = true, .msg = "arithmetic trap" },
137 [T_PROTFLT] = { .ei = true, .msg = "general protection fault" },
138 [T_TRCTRAP] = { .ei = false, .msg = "debug exception" },
139 [T_PAGEFLT] = { .ei = true, .msg = "page fault" },
140 [T_ALIGNFLT] = { .ei = true, .msg = "alignment fault" },
141 [T_DIVIDE] = { .ei = true, .msg = "integer divide fault" },
142 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" },
143 [T_OFLOW] = { .ei = true, .msg = "overflow trap" },
144 [T_BOUND] = { .ei = true, .msg = "FPU bounds check fault" },
145 [T_DNA] = { .ei = true, .msg = "FPU device not available" },
146 [T_DOUBLEFLT] = { .ei = false, .msg = "double fault" },
147 [T_FPOPFLT] = { .ei = true, .msg = "FPU operand fetch fault" },
148 [T_TSSFLT] = { .ei = true, .msg = "invalid TSS fault" },
149 [T_SEGNPFLT] = { .ei = true, .msg = "segment not present fault" },
150 [T_STKFLT] = { .ei = true, .msg = "stack fault" },
151 [T_MCHK] = { .ei = true, .msg = "machine check trap" },
152 [T_XMMFLT] = { .ei = true, .msg = "SIMD floating-point exception" },
153 [T_DTRACE_RET] ={ .ei = true, .msg = "DTrace pid return trap" },
157 trap_enable_intr(int trapno)
161 if (trapno < nitems(trap_data) && trap_data[trapno].msg != NULL)
162 return (trap_data[trapno].ei);
170 static const char unkn[] = "UNKNOWN";
173 if (trapno < nitems(trap_data))
174 res = trap_data[trapno].msg;
180 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
181 int has_f00f_bug = 0; /* Initialized so that it can be patched. */
184 static int uprintf_signal;
185 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RW,
187 "Print debugging information on trap signal to ctty");
190 * Exception, fault, and trap interface to the FreeBSD kernel.
191 * This common code is called from assembly language IDT gate entry
192 * routines that prepare a suitable stack frame, and restore this
193 * frame after the exception has been processed.
197 trap(struct trapframe *frame)
202 int pf, signo, ucode;
204 register_t addr, dr6;
207 static int lastalert = 0;
215 type = frame->tf_trapno;
217 KASSERT((read_eflags() & PSL_I) == 0,
218 ("trap: interrupts enabled, type %d frame %p", type, frame));
221 /* Handler for NMI IPIs used for stopping CPUs. */
222 if (type == T_NMI && ipi_nmi_handler() == 0)
233 if (type == T_RESERVED) {
234 trap_fatal(frame, 0);
241 * CPU PMCs interrupt using an NMI so we check for that first.
242 * If the HWPMC module is active, 'pmc_hook' will point to
243 * the function to be called. A non-zero return value from the
244 * hook means that the NMI was consumed by it and that we can
245 * return immediately.
247 if (pmc_intr != NULL &&
248 (*pmc_intr)(frame) != 0)
253 if (stack_nmi_handler(frame) != 0)
258 if (type == T_MCHK) {
265 * A trap can occur while DTrace executes a probe. Before
266 * executing the probe, DTrace blocks re-scheduling and sets
267 * a flag in its per-cpu flags to indicate that it doesn't
268 * want to fault. On returning from the probe, the no-fault
269 * flag is cleared and finally re-scheduling is enabled.
271 if ((type == T_PROTFLT || type == T_PAGEFLT) &&
272 dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type))
277 * We must not allow context switches until %cr2 is read.
278 * Also, for some Cyrix CPUs, %cr2 is clobbered by interrupts.
279 * All faults use interrupt gates, so %cr2 can be safely read
280 * now, before optional enable of the interrupts below.
282 if (type == T_PAGEFLT)
286 * Buggy application or kernel code has disabled interrupts
287 * and then trapped. Enabling interrupts now is wrong, but it
288 * is better than running with interrupts disabled until they
289 * are accidentally enabled later.
291 if ((frame->tf_eflags & PSL_I) == 0 && TRAPF_USERMODE(frame) &&
292 (curpcb->pcb_flags & PCB_VM86CALL) == 0)
293 uprintf("pid %ld (%s): trap %d with interrupts disabled\n",
294 (long)curproc->p_pid, curthread->td_name, type);
297 * Conditionally reenable interrupts. If we hold a spin lock,
298 * then we must not reenable interrupts. This might be a
299 * spurious page fault.
301 if (trap_enable_intr(type) && td->td_md.md_spinlock_count == 0 &&
302 frame->tf_eip != (int)cpu_switch_load_gs)
305 if (TRAPF_USERMODE(frame) && (curpcb->pcb_flags & PCB_VM86CALL) == 0) {
309 td->td_frame = frame;
310 addr = frame->tf_eip;
311 if (td->td_cowgen != p->p_cowgen)
312 thread_cow_update(td);
315 case T_PRIVINFLT: /* privileged instruction fault */
320 case T_BPTFLT: /* bpt instruction fault */
322 if (trap_user_dtrace(frame, &dtrace_pid_probe_ptr))
331 case T_TRCTRAP: /* debug exception */
337 if ((dr6 & DBREG_DR6_BS) != 0) {
338 PROC_LOCK(td->td_proc);
339 if ((td->td_dbgflags & TDB_STEP) != 0) {
340 td->td_frame->tf_eflags &= ~PSL_T;
341 td->td_dbgflags &= ~TDB_STEP;
343 PROC_UNLOCK(td->td_proc);
347 case T_ARITHTRAP: /* arithmetic trap */
348 ucode = npxtrap_x87();
355 * The following two traps can happen in vm86 mode,
356 * and, if so, we want to handle them specially.
358 case T_PROTFLT: /* general protection fault */
359 case T_STKFLT: /* stack fault */
360 if (frame->tf_eflags & PSL_VM) {
361 signo = vm86_emulate((struct vm86frame *)frame);
362 ucode = 0; /* XXXKIB: better code ? */
363 if (signo == SIGTRAP) {
364 load_dr6(rdr6() | 0x4000);
365 goto user_trctrap_out;
372 ucode = (type == T_PROTFLT) ? BUS_OBJERR : BUS_ADRERR;
374 case T_SEGNPFLT: /* segment not present fault */
378 case T_TSSFLT: /* invalid TSS fault */
386 case T_DOUBLEFLT: /* double fault */
392 case T_PAGEFLT: /* page fault */
394 pf = trap_pfault(frame, true, eva, &signo, &ucode);
395 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
398 * The f00f hack workaround has triggered, so
399 * treat the fault as an illegal instruction
400 * (T_PRIVINFLT) instead of a page fault.
402 type = frame->tf_trapno = T_PRIVINFLT;
412 case T_DIVIDE: /* integer divide fault */
421 # define TIMER_FREQ 1193182
423 if (time_second - lastalert > 10) {
424 log(LOG_WARNING, "NMI: power fail\n");
426 lastalert = time_second;
429 #else /* !POWERFAIL_NMI */
430 nmi_handle_intr(type, frame);
432 #endif /* POWERFAIL_NMI */
435 case T_OFLOW: /* integer overflow fault */
440 case T_BOUND: /* bounds check fault */
446 KASSERT(PCB_USER_FPU(td->td_pcb),
447 ("kernel FPU ctx has leaked"));
448 /* transparent fault (due to context switch "late") */
451 uprintf("pid %d killed due to lack of floating point\n",
457 case T_FPOPFLT: /* FPU operand fetch fault */
462 case T_XMMFLT: /* SIMD floating-point exception */
463 ucode = npxtrap_sse();
470 (void)trap_user_dtrace(frame, &dtrace_return_probe_ptr);
477 KASSERT(cold || td->td_ucred != NULL,
478 ("kernel trap doesn't have ucred"));
480 case T_PAGEFLT: /* page fault */
481 (void)trap_pfault(frame, false, eva, NULL, NULL);
485 if (PCB_USER_FPU(td->td_pcb))
486 panic("Unregistered use of FPU in kernel");
491 case T_ARITHTRAP: /* arithmetic trap */
492 case T_XMMFLT: /* SIMD floating-point exception */
493 case T_FPOPFLT: /* FPU operand fetch fault */
495 * XXXKIB for now disable any FPU traps in kernel
496 * handler registration seems to be overkill
498 trap_fatal(frame, 0);
502 * The following two traps can happen in
503 * vm86 mode, and, if so, we want to handle
506 case T_PROTFLT: /* general protection fault */
507 case T_STKFLT: /* stack fault */
508 if (frame->tf_eflags & PSL_VM) {
509 signo = vm86_emulate((struct vm86frame *)frame);
510 if (signo == SIGTRAP) {
512 load_dr6(rdr6() | 0x4000);
517 * returns to original process
519 vm86_trap((struct vm86frame *)frame);
523 case T_SEGNPFLT: /* segment not present fault */
524 if (curpcb->pcb_flags & PCB_VM86CALL)
528 * Invalid %fs's and %gs's can be created using
529 * procfs or PT_SETREGS or by invalidating the
530 * underlying LDT entry. This causes a fault
531 * in kernel mode when the kernel attempts to
532 * switch contexts. Lose the bad context
533 * (XXX) so that we can continue, and generate
536 if (frame->tf_eip == (int)cpu_switch_load_gs) {
540 kern_psignal(p, SIGBUS);
546 if (td->td_intr_nesting_level != 0)
550 * Invalid segment selectors and out of bounds
551 * %eip's and %esp's can be set up in user mode.
552 * This causes a fault in kernel mode when the
553 * kernel tries to return to user mode. We want
554 * to get this fault so that we can fix the
555 * problem here and not have to check all the
556 * selectors and pointers when the user changes
559 * N.B. Comparing to long mode, 32-bit mode
560 * does not push %esp on the trap frame,
561 * because iretl faulted while in ring 0. As
562 * the consequence, there is no need to fixup
563 * the stack pointer for doreti_iret_fault,
564 * the fixup and the complimentary trap() call
565 * are executed on the main thread stack, not
566 * on the trampoline stack.
568 if (frame->tf_eip == (int)doreti_iret + setidt_disp) {
569 frame->tf_eip = (int)doreti_iret_fault +
573 if (type == T_STKFLT)
576 if (frame->tf_eip == (int)doreti_popl_ds +
578 frame->tf_eip = (int)doreti_popl_ds_fault +
582 if (frame->tf_eip == (int)doreti_popl_es +
584 frame->tf_eip = (int)doreti_popl_es_fault +
588 if (frame->tf_eip == (int)doreti_popl_fs +
590 frame->tf_eip = (int)doreti_popl_fs_fault +
594 if (curpcb->pcb_onfault != NULL) {
595 frame->tf_eip = (int)curpcb->pcb_onfault;
602 * PSL_NT can be set in user mode and isn't cleared
603 * automatically when the kernel is entered. This
604 * causes a TSS fault when the kernel attempts to
605 * `iret' because the TSS link is uninitialized. We
606 * want to get this fault so that we can fix the
607 * problem here and not every time the kernel is
610 if (frame->tf_eflags & PSL_NT) {
611 frame->tf_eflags &= ~PSL_NT;
616 case T_TRCTRAP: /* debug exception */
618 /* Clear any pending debug events. */
623 * Ignore debug register exceptions due to
624 * accesses in the user's address space, which
625 * can happen under several conditions such as
626 * if a user sets a watchpoint on a buffer and
627 * then passes that buffer to a system call.
628 * We still want to get TRCTRAPS for addresses
629 * in kernel space because that is useful when
630 * debugging the kernel.
632 if (user_dbreg_trap(dr6) &&
633 !(curpcb->pcb_flags & PCB_VM86CALL))
637 * Malicious user code can configure a debug
638 * register watchpoint to trap on data access
639 * to the top of stack and then execute 'pop
640 * %ss; int 3'. Due to exception deferral for
641 * 'pop %ss', the CPU will not interrupt 'int
642 * 3' to raise the DB# exception for the debug
643 * register but will postpone the DB# until
644 * execution of the first instruction of the
645 * BP# handler (in kernel mode). Normally the
646 * previous check would ignore DB# exceptions
647 * for watchpoints on user addresses raised in
648 * kernel mode. However, some CPU errata
649 * include cases where DB# exceptions do not
650 * properly set bits in %dr6, e.g. Haswell
651 * HSD23 and Skylake-X SKZ24.
653 * A deferred DB# can also be raised on the
654 * first instructions of system call entry
655 * points or single-step traps via similar use
656 * of 'pop %ss' or 'mov xxx, %ss'.
659 (uintptr_t)IDTVEC(int0x80_syscall) + setidt_disp ||
660 frame->tf_eip == (uintptr_t)IDTVEC(bpt) +
662 frame->tf_eip == (uintptr_t)IDTVEC(dbg) +
666 * FALLTHROUGH (TRCTRAP kernel mode, kernel address)
670 * If KDB is enabled, let it handle the debugger trap.
671 * Otherwise, debugger traps "can't happen".
674 if (kdb_trap(type, dr6, frame))
682 if (time_second - lastalert > 10) {
683 log(LOG_WARNING, "NMI: power fail\n");
685 lastalert = time_second;
688 #else /* !POWERFAIL_NMI */
689 nmi_handle_intr(type, frame);
691 #endif /* POWERFAIL_NMI */
695 trap_fatal(frame, eva);
699 /* Translate fault for emulators (e.g. Linux) */
700 if (*p->p_sysent->sv_transtrap != NULL)
701 signo = (*p->p_sysent->sv_transtrap)(signo, type);
703 ksiginfo_init_trap(&ksi);
704 ksi.ksi_signo = signo;
705 ksi.ksi_code = ucode;
706 ksi.ksi_addr = (void *)addr;
707 ksi.ksi_trapno = type;
708 if (uprintf_signal) {
709 uprintf("pid %d comm %s: signal %d err %x code %d type %d "
710 "addr 0x%x ss 0x%04x esp 0x%08x cs 0x%04x eip 0x%08x "
711 "<%02x %02x %02x %02x %02x %02x %02x %02x>\n",
712 p->p_pid, p->p_comm, signo, frame->tf_err, ucode, type,
713 addr, frame->tf_ss, frame->tf_esp, frame->tf_cs,
715 fubyte((void *)(frame->tf_eip + 0)),
716 fubyte((void *)(frame->tf_eip + 1)),
717 fubyte((void *)(frame->tf_eip + 2)),
718 fubyte((void *)(frame->tf_eip + 3)),
719 fubyte((void *)(frame->tf_eip + 4)),
720 fubyte((void *)(frame->tf_eip + 5)),
721 fubyte((void *)(frame->tf_eip + 6)),
722 fubyte((void *)(frame->tf_eip + 7)));
724 KASSERT((read_eflags() & PSL_I) != 0, ("interrupts disabled"));
725 trapsignal(td, &ksi);
729 KASSERT(PCB_USER_FPU(td->td_pcb),
730 ("Return from trap with kernel FPU ctx leaked"));
734 * Handle all details of a page fault.
736 * -2 if the fault was caused by triggered workaround for Intel Pentium
738 * -1 if this fault was fatal, typically from kernel mode
739 * (cannot happen, but we need to return something).
740 * 0 if this fault was handled by updating either the user or kernel
741 * page table, execution can continue.
742 * 1 if this fault was from usermode and it was not handled, a synchronous
743 * signal should be delivered to the thread. *signo returns the signal
744 * number, *ucode gives si_code.
747 trap_pfault(struct trapframe *frame, bool usermode, vm_offset_t eva,
748 int *signo, int *ucode)
756 MPASS(!usermode || (signo != NULL && ucode != NULL));
761 if (__predict_false((td->td_pflags & TDP_NOFAULTING) != 0)) {
763 * Due to both processor errata and lazy TLB invalidation when
764 * access restrictions are removed from virtual pages, memory
765 * accesses that are allowed by the physical mapping layer may
766 * nonetheless cause one spurious page fault per virtual page.
767 * When the thread is executing a "no faulting" section that
768 * is bracketed by vm_fault_{disable,enable}_pagefaults(),
769 * every page fault is treated as a spurious page fault,
770 * unless it accesses the same virtual address as the most
771 * recent page fault within the same "no faulting" section.
773 if (td->td_md.md_spurflt_addr != eva ||
774 (td->td_pflags & TDP_RESETSPUR) != 0) {
776 * Do nothing to the TLB. A stale TLB entry is
777 * flushed automatically by a page fault.
779 td->td_md.md_spurflt_addr = eva;
780 td->td_pflags &= ~TDP_RESETSPUR;
785 * If we get a page fault while in a critical section, then
786 * it is most likely a fatal kernel page fault. The kernel
787 * is already going to panic trying to get a sleep lock to
788 * do the VM lookup, so just consider it a fatal trap so the
789 * kernel can print out a useful trap message and even get
792 * If we get a page fault while holding a non-sleepable
793 * lock, then it is most likely a fatal kernel page fault.
794 * If WITNESS is enabled, then it's going to whine about
795 * bogus LORs with various VM locks, so just skip to the
796 * fatal trap handling directly.
798 if (td->td_critnest != 0 ||
799 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
800 "Kernel page fault") != 0) {
801 trap_fatal(frame, eva);
805 if (eva >= PMAP_TRM_MIN_ADDRESS) {
807 * Don't allow user-mode faults in kernel address space.
808 * An exception: if the faulting address is the invalid
809 * instruction entry in the IDT, then the Intel Pentium
810 * F00F bug workaround was triggered, and we need to
811 * treat it is as an illegal instruction, and not a page
814 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
815 if ((eva == (unsigned int)&idt[6]) && has_f00f_bug) {
823 *ucode = SEGV_MAPERR;
826 trap_fatal(frame, eva);
829 map = usermode ? &p->p_vmspace->vm_map : kernel_map;
832 * Kernel cannot access a user-space address directly
833 * because user pages are not mapped. Also, page
834 * faults must not be caused during the interrupts.
836 if (!usermode && td->td_intr_nesting_level != 0) {
837 trap_fatal(frame, eva);
843 * If the trap was caused by errant bits in the PTE then panic.
845 if (frame->tf_err & PGEX_RSV) {
846 trap_fatal(frame, eva);
851 * PGEX_I is defined only if the execute disable bit capability is
852 * supported and enabled.
854 if (frame->tf_err & PGEX_W)
855 ftype = VM_PROT_WRITE;
856 else if ((frame->tf_err & PGEX_I) && pg_nx != 0)
857 ftype = VM_PROT_EXECUTE;
859 ftype = VM_PROT_READ;
861 /* Fault in the page. */
862 rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
863 if (rv == KERN_SUCCESS) {
865 if (ftype == VM_PROT_READ || ftype == VM_PROT_WRITE) {
866 PMC_SOFT_CALL_TF( , , page_fault, all, frame);
867 if (ftype == VM_PROT_READ)
868 PMC_SOFT_CALL_TF( , , page_fault, read,
871 PMC_SOFT_CALL_TF( , , page_fault, write,
879 if (td->td_intr_nesting_level == 0 &&
880 curpcb->pcb_onfault != NULL) {
881 frame->tf_eip = (int)curpcb->pcb_onfault;
884 trap_fatal(frame, eva);
889 trap_fatal(frame, eva)
890 struct trapframe *frame;
895 struct soft_segment_descriptor softseg;
900 code = frame->tf_err;
901 type = frame->tf_trapno;
902 sdtossd(&gdt[IDXSEL(frame->tf_cs & 0xffff)].sd, &softseg);
904 printf("\n\nFatal trap %d: %s while in %s mode\n", type, trap_msg(type),
905 frame->tf_eflags & PSL_VM ? "vm86" :
906 ISPL(frame->tf_cs) == SEL_UPL ? "user" : "kernel");
908 /* two separate prints in case of a trap on an unmapped page */
909 printf("cpuid = %d; ", PCPU_GET(cpuid));
910 printf("apic id = %02x\n", PCPU_GET(apic_id));
912 if (type == T_PAGEFLT) {
913 printf("fault virtual address = 0x%x\n", eva);
914 printf("fault code = %s %s%s, %s\n",
915 code & PGEX_U ? "user" : "supervisor",
916 code & PGEX_W ? "write" : "read",
918 (code & PGEX_I ? " instruction" : " data") :
920 code & PGEX_RSV ? "reserved bits in PTE" :
921 code & PGEX_P ? "protection violation" : "page not present");
923 printf("error code = %#x\n", code);
925 printf("instruction pointer = 0x%x:0x%x\n",
926 frame->tf_cs & 0xffff, frame->tf_eip);
927 if (TF_HAS_STACKREGS(frame)) {
928 ss = frame->tf_ss & 0xffff;
931 ss = GSEL(GDATA_SEL, SEL_KPL);
932 esp = (int)&frame->tf_esp;
934 printf("stack pointer = 0x%x:0x%x\n", ss, esp);
935 printf("frame pointer = 0x%x:0x%x\n", ss, frame->tf_ebp);
936 printf("code segment = base 0x%x, limit 0x%x, type 0x%x\n",
937 softseg.ssd_base, softseg.ssd_limit, softseg.ssd_type);
938 printf(" = DPL %d, pres %d, def32 %d, gran %d\n",
939 softseg.ssd_dpl, softseg.ssd_p, softseg.ssd_def32,
941 printf("processor eflags = ");
942 if (frame->tf_eflags & PSL_T)
943 printf("trace trap, ");
944 if (frame->tf_eflags & PSL_I)
945 printf("interrupt enabled, ");
946 if (frame->tf_eflags & PSL_NT)
947 printf("nested task, ");
948 if (frame->tf_eflags & PSL_RF)
950 if (frame->tf_eflags & PSL_VM)
952 printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12);
953 printf("current process = %d (%s)\n",
954 curproc->p_pid, curthread->td_name);
957 if (debugger_on_trap) {
958 kdb_why = KDB_WHY_TRAP;
959 frame->tf_err = eva; /* smuggle fault address to ddb */
960 handled = kdb_trap(type, 0, frame);
961 frame->tf_err = code; /* restore error code */
962 kdb_why = KDB_WHY_UNSET;
967 printf("trap number = %d\n", type);
968 if (trap_msg(type) != NULL)
969 panic("%s", trap_msg(type));
971 panic("unknown/reserved trap");
976 * Invoke a userspace DTrace hook. The hook pointer is cleared when no
977 * userspace probes are enabled, so we must synchronize with DTrace to ensure
978 * that a trapping thread is able to call the hook before it is cleared.
981 trap_user_dtrace(struct trapframe *frame, int (**hookp)(struct trapframe *))
983 int (*hook)(struct trapframe *);
985 hook = (int (*)(struct trapframe *))atomic_load_ptr(hookp);
988 return ((hook)(frame) == 0);
994 * Double fault handler. Called when a fault occurs while writing
995 * a frame for a trap/exception onto the stack. This usually occurs
996 * when the stack overflows (such is the case with infinite recursion,
999 * XXX Note that the current PTD gets replaced by IdlePTD when the
1000 * task switch occurs. This means that the stack that was active at
1001 * the time of the double fault is not available at <kstack> unless
1002 * the machine was idle when the double fault occurred. The downside
1003 * of this is that "trace <ebp>" in ddb won't work.
1006 dblfault_handler(void)
1008 #ifdef KDTRACE_HOOKS
1009 if (dtrace_doubletrap_func != NULL)
1010 (*dtrace_doubletrap_func)();
1012 printf("\nFatal double fault:\n");
1013 printf("eip = 0x%x\n", PCPU_GET(common_tssp)->tss_eip);
1014 printf("esp = 0x%x\n", PCPU_GET(common_tssp)->tss_esp);
1015 printf("ebp = 0x%x\n", PCPU_GET(common_tssp)->tss_ebp);
1017 /* two separate prints in case of a trap on an unmapped page */
1018 printf("cpuid = %d; ", PCPU_GET(cpuid));
1019 printf("apic id = %02x\n", PCPU_GET(apic_id));
1021 panic("double fault");
1025 cpu_fetch_syscall_args(struct thread *td)
1028 struct trapframe *frame;
1029 struct syscall_args *sa;
1039 frame = td->td_frame;
1043 if (__predict_false(frame->tf_cs == 7 && frame->tf_eip == 2)) {
1045 * In lcall $7,$0 after int $0x80. Convert the user
1046 * frame to what it would be for a direct int 0x80 instead
1047 * of lcall $7,$0, by popping the lcall return address.
1049 error = fueword32((void *)frame->tf_esp, &eip);
1052 cs = fuword16((void *)(frame->tf_esp + sizeof(u_int32_t)));
1057 * Unwind in-kernel frame after all stack frame pieces
1058 * were successfully read.
1060 frame->tf_eip = eip;
1062 frame->tf_esp += 2 * sizeof(u_int32_t);
1063 frame->tf_err = 7; /* size of lcall $7,$0 */
1067 sa->code = frame->tf_eax;
1068 params = (caddr_t)frame->tf_esp + sizeof(uint32_t);
1071 * Need to check if this is a 32 bit or 64 bit syscall.
1073 if (sa->code == SYS_syscall) {
1075 * Code is first argument, followed by actual args.
1077 error = fueword(params, &tmp);
1081 params += sizeof(uint32_t);
1082 } else if (sa->code == SYS___syscall) {
1084 * Like syscall, but code is a quad, so as to maintain
1085 * quad alignment for the rest of the arguments.
1087 error = fueword(params, &tmp);
1091 params += sizeof(quad_t);
1094 if (sa->code >= p->p_sysent->sv_size)
1095 sa->callp = &p->p_sysent->sv_table[0];
1097 sa->callp = &p->p_sysent->sv_table[sa->code];
1098 sa->narg = sa->callp->sy_narg;
1100 if (params != NULL && sa->narg != 0)
1101 error = copyin(params, (caddr_t)sa->args,
1102 (u_int)(sa->narg * sizeof(uint32_t)));
1107 td->td_retval[0] = 0;
1108 td->td_retval[1] = frame->tf_edx;
1114 #include "../../kern/subr_syscall.c"
1117 * syscall - system call request C handler. A system call is
1118 * essentially treated as a trap by reusing the frame layout.
1121 syscall(struct trapframe *frame)
1124 register_t orig_tf_eflags;
1128 if (!(TRAPF_USERMODE(frame) &&
1129 (curpcb->pcb_flags & PCB_VM86CALL) == 0)) {
1134 orig_tf_eflags = frame->tf_eflags;
1137 td->td_frame = frame;
1144 if ((orig_tf_eflags & PSL_T) && !(orig_tf_eflags & PSL_VM)) {
1145 frame->tf_eflags &= ~PSL_T;
1146 ksiginfo_init_trap(&ksi);
1147 ksi.ksi_signo = SIGTRAP;
1148 ksi.ksi_code = TRAP_TRACE;
1149 ksi.ksi_addr = (void *)frame->tf_eip;
1150 trapsignal(td, &ksi);
1153 KASSERT(PCB_USER_FPU(td->td_pcb),
1154 ("System call %s returning with kernel FPU ctx leaked",
1155 syscallname(td->td_proc, td->td_sa.code)));
1156 KASSERT(td->td_pcb->pcb_save == get_pcb_user_save_td(td),
1157 ("System call %s returning with mangled pcb_save",
1158 syscallname(td->td_proc, td->td_sa.code)));