2 * Copyright (c) 1982, 1986 The Regents of the University of California.
3 * Copyright (c) 1989, 1990 William Jolitz
4 * Copyright (c) 1994 John Dyson
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
48 #include "opt_reset.h"
52 #include <sys/param.h>
53 #include <sys/systm.h>
56 #include <sys/kernel.h>
59 #include <sys/malloc.h>
61 #include <sys/mutex.h>
62 #include <sys/pioctl.h>
64 #include <sys/sysent.h>
65 #include <sys/sf_buf.h>
67 #include <sys/sched.h>
68 #include <sys/sysctl.h>
69 #include <sys/unistd.h>
70 #include <sys/vnode.h>
71 #include <sys/vmmeter.h>
73 #include <machine/cpu.h>
74 #include <machine/cputypes.h>
75 #include <machine/md_var.h>
76 #include <machine/pcb.h>
77 #include <machine/pcb_ext.h>
78 #include <machine/smp.h>
79 #include <machine/vm86.h>
82 #include <machine/elan_mmcr.h>
86 #include <vm/vm_extern.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_page.h>
89 #include <vm/vm_map.h>
90 #include <vm/vm_param.h>
93 #include <pc98/cbus/cbus.h>
95 #include <isa/isareg.h>
99 #include <machine/xbox.h>
103 #define NSFBUFS (512 + maxusers * 16)
106 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
107 #define CPU_ENABLE_SSE
110 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread),
111 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread.");
112 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb),
113 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb.");
114 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf),
115 "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf.");
117 static void cpu_reset_real(void);
119 static void cpu_reset_proxy(void);
120 static u_int cpu_reset_proxyid;
121 static volatile u_int cpu_reset_proxy_active;
125 get_pcb_user_save_td(struct thread *td)
129 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
130 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN);
131 KASSERT((p % XSAVE_AREA_ALIGN) == 0, ("Unaligned pcb_user_save area"));
132 return ((union savefpu *)p);
136 get_pcb_user_save_pcb(struct pcb *pcb)
140 p = (vm_offset_t)(pcb + 1);
141 return ((union savefpu *)p);
145 get_pcb_td(struct thread *td)
149 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
150 roundup2(cpu_max_ext_state_size, XSAVE_AREA_ALIGN) -
152 return ((struct pcb *)p);
156 alloc_fpusave(int flags)
159 #ifdef CPU_ENABLE_SSE
160 struct savefpu_ymm *sf;
163 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags);
164 #ifdef CPU_ENABLE_SSE
166 sf = (struct savefpu_ymm *)res;
167 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd));
168 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask;
174 * Finish a fork operation, with process p2 nearly set up.
175 * Copy and update the pcb, set up the stack so that the child
176 * ready to run and return to user mode.
179 cpu_fork(td1, p2, td2, flags)
180 register struct thread *td1;
181 register struct proc *p2;
185 register struct proc *p1;
190 if ((flags & RFPROC) == 0) {
191 if ((flags & RFMEM) == 0) {
192 /* unshare user LDT */
193 struct mdproc *mdp1 = &p1->p_md;
194 struct proc_ldt *pldt, *pldt1;
196 mtx_lock_spin(&dt_lock);
197 if ((pldt1 = mdp1->md_ldt) != NULL &&
198 pldt1->ldt_refcnt > 1) {
199 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len);
201 panic("could not copy LDT");
204 user_ldt_deref(pldt1);
206 mtx_unlock_spin(&dt_lock);
211 /* Ensure that td1's pcb is up to date. */
212 if (td1 == curthread)
213 td1->td_pcb->pcb_gs = rgs();
216 if (PCPU_GET(fpcurthread) == td1)
217 npxsave(td1->td_pcb->pcb_save);
221 /* Point the pcb to the top of the stack */
222 pcb2 = get_pcb_td(td2);
226 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
228 /* Properly initialize pcb_save */
229 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
230 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2),
231 cpu_max_ext_state_size);
233 /* Point mdproc and then copy over td1's contents */
235 bcopy(&p1->p_md, mdp2, sizeof(*mdp2));
238 * Create a new fresh stack for the new process.
239 * Copy the trap frame for the return to user mode as if from a
240 * syscall. This copies most of the user mode register values.
241 * The -16 is so we can expand the trapframe if we go to vm86.
243 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1;
244 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe));
246 td2->td_frame->tf_eax = 0; /* Child returns zero */
247 td2->td_frame->tf_eflags &= ~PSL_C; /* success */
248 td2->td_frame->tf_edx = 1;
251 * If the parent process has the trap bit set (i.e. a debugger had
252 * single stepped the process to the system call), we need to clear
253 * the trap flag from the new frame unless the debugger had set PF_FORK
254 * on the parent. Otherwise, the child will receive a (likely
255 * unexpected) SIGTRAP when it executes the first instruction after
256 * returning to userland.
258 if ((p1->p_pfsflags & PF_FORK) == 0)
259 td2->td_frame->tf_eflags &= ~PSL_T;
262 * Set registers for trampoline to user mode. Leave space for the
263 * return address on stack. These are the kernel mode register values.
265 #if defined(PAE) || defined(PAE_TABLES)
266 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt);
268 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir);
271 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */
273 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *);
274 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */
275 pcb2->pcb_eip = (int)fork_trampoline;
276 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */
278 * pcb2->pcb_dr*: cloned above.
279 * pcb2->pcb_savefpu: cloned above.
280 * pcb2->pcb_flags: cloned above.
281 * pcb2->pcb_onfault: cloned above (always NULL here?).
282 * pcb2->pcb_gs: cloned above.
283 * pcb2->pcb_ext: cleared below.
287 * XXX don't copy the i/o pages. this should probably be fixed.
291 /* Copy the LDT, if necessary. */
292 mtx_lock_spin(&dt_lock);
293 if (mdp2->md_ldt != NULL) {
295 mdp2->md_ldt->ldt_refcnt++;
297 mdp2->md_ldt = user_ldt_alloc(mdp2,
298 mdp2->md_ldt->ldt_len);
299 if (mdp2->md_ldt == NULL)
300 panic("could not copy LDT");
303 mtx_unlock_spin(&dt_lock);
305 /* Setup to release spin count in fork_exit(). */
306 td2->td_md.md_spinlock_count = 1;
307 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
310 * Now, cpu_switch() can schedule the new process.
311 * pcb_esp is loaded pointing to the cpu_switch() stack frame
312 * containing the return address when exiting cpu_switch.
313 * This will normally be to fork_trampoline(), which will have
314 * %ebx loaded with the new proc's pointer. fork_trampoline()
315 * will set up a stack to call fork_return(p, frame); to complete
316 * the return to user-mode.
321 * Intercept the return address from a freshly forked process that has NOT
322 * been scheduled yet.
324 * This is needed to make kernel threads stay in kernel mode.
327 cpu_set_fork_handler(td, func, arg)
329 void (*func)(void *);
333 * Note that the trap frame follows the args, so the function
334 * is really called like this: func(arg, frame);
336 td->td_pcb->pcb_esi = (int) func; /* function */
337 td->td_pcb->pcb_ebx = (int) arg; /* first arg */
341 cpu_exit(struct thread *td)
345 * If this process has a custom LDT, release it. Reset pc->pcb_gs
346 * and %gs before we free it in case they refer to an LDT entry.
348 mtx_lock_spin(&dt_lock);
349 if (td->td_proc->p_md.md_ldt) {
350 td->td_pcb->pcb_gs = _udatasel;
354 mtx_unlock_spin(&dt_lock);
358 cpu_thread_exit(struct thread *td)
363 if (td == PCPU_GET(fpcurthread))
368 /* Disable any hardware breakpoints. */
369 if (td->td_pcb->pcb_flags & PCB_DBREGS) {
371 td->td_pcb->pcb_flags &= ~PCB_DBREGS;
376 cpu_thread_clean(struct thread *td)
381 if (pcb->pcb_ext != NULL) {
382 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */
384 * XXX do we need to move the TSS off the allocated pages
385 * before freeing them? (not done here)
387 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext,
394 cpu_thread_swapin(struct thread *td)
399 cpu_thread_swapout(struct thread *td)
404 cpu_thread_alloc(struct thread *td)
407 #ifdef CPU_ENABLE_SSE
408 struct xstate_hdr *xhdr;
411 td->td_pcb = pcb = get_pcb_td(td);
412 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1;
414 pcb->pcb_save = get_pcb_user_save_pcb(pcb);
415 #ifdef CPU_ENABLE_SSE
417 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1);
418 bzero(xhdr, sizeof(*xhdr));
419 xhdr->xstate_bv = xsave_mask;
425 cpu_thread_free(struct thread *td)
428 cpu_thread_clean(td);
432 cpu_set_syscall_retval(struct thread *td, int error)
437 td->td_frame->tf_eax = td->td_retval[0];
438 td->td_frame->tf_edx = td->td_retval[1];
439 td->td_frame->tf_eflags &= ~PSL_C;
444 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int
445 * 0x80 is 2 bytes. We saved this in tf_err.
447 td->td_frame->tf_eip -= td->td_frame->tf_err;
454 td->td_frame->tf_eax = SV_ABI_ERRNO(td->td_proc, error);
455 td->td_frame->tf_eflags |= PSL_C;
461 * Initialize machine state (pcb and trap frame) for a new thread about to
462 * upcall. Put enough state in the new thread's PCB to get it to go back
463 * userret(), where we can intercept it again to set the return (upcall)
464 * Address and stack, along with those from upcals that are from other sources
465 * such as those generated in thread_userret() itself.
468 cpu_set_upcall(struct thread *td, struct thread *td0)
472 /* Point the pcb to the top of the stack. */
476 * Copy the upcall pcb. This loads kernel regs.
477 * Those not loaded individually below get their default
480 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
481 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE |
483 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
484 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save,
485 cpu_max_ext_state_size);
488 * Create a new fresh stack for the new thread.
490 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe));
492 /* If the current thread has the trap bit set (i.e. a debugger had
493 * single stepped the process to the system call), we need to clear
494 * the trap flag from the new frame. Otherwise, the new thread will
495 * receive a (likely unexpected) SIGTRAP when it executes the first
496 * instruction after returning to userland.
498 td->td_frame->tf_eflags &= ~PSL_T;
501 * Set registers for trampoline to user mode. Leave space for the
502 * return address on stack. These are the kernel mode register values.
505 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */
507 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */
508 pcb2->pcb_ebx = (int)td; /* trampoline arg */
509 pcb2->pcb_eip = (int)fork_trampoline;
510 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */
511 pcb2->pcb_gs = rgs();
513 * If we didn't copy the pcb, we'd need to do the following registers:
514 * pcb2->pcb_cr3: cloned above.
515 * pcb2->pcb_dr*: cloned above.
516 * pcb2->pcb_savefpu: cloned above.
517 * pcb2->pcb_flags: cloned above.
518 * pcb2->pcb_onfault: cloned above (always NULL here?).
519 * pcb2->pcb_gs: cloned above.
520 * pcb2->pcb_ext: cleared below.
522 pcb2->pcb_ext = NULL;
524 /* Setup to release spin count in fork_exit(). */
525 td->td_md.md_spinlock_count = 1;
526 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
530 * Set that machine state for performing an upcall that has to
531 * be done in thread_userret() so that those upcalls generated
532 * in thread_userret() itself can be done as well.
535 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
540 * Do any extra cleaning that needs to be done.
541 * The thread may have optional components
542 * that are not present in a fresh thread.
543 * This may be a recycled thread so make it look
544 * as though it's newly allocated.
546 cpu_thread_clean(td);
549 * Set the trap frame to point at the beginning of the uts
552 td->td_frame->tf_ebp = 0;
553 td->td_frame->tf_esp =
554 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4;
555 td->td_frame->tf_eip = (int)entry;
558 * Pass the address of the mailbox for this kse to the uts
559 * function as a parameter on the stack.
561 suword((void *)(td->td_frame->tf_esp + sizeof(void *)),
566 cpu_set_user_tls(struct thread *td, void *tls_base)
568 struct segment_descriptor sd;
572 * Construct a descriptor and store it in the pcb for
573 * the next context switch. Also store it in the gdt
574 * so that the load of tf_fs into %fs will activate it
575 * at return to userland.
577 base = (uint32_t)tls_base;
578 sd.sd_lobase = base & 0xffffff;
579 sd.sd_hibase = (base >> 24) & 0xff;
580 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */
582 sd.sd_type = SDT_MEMRWA;
590 td->td_pcb->pcb_gsd = sd;
591 if (td == curthread) {
592 PCPU_GET(fsgs_gdt)[1] = sd;
593 load_gs(GSEL(GUGS_SEL, SEL_UPL));
600 * Convert kernel VA to physical address
607 pa = pmap_kextract((vm_offset_t)addr);
609 panic("kvtop: zero page frame");
619 cpu_reset_proxy_active = 1;
620 while (cpu_reset_proxy_active == 1)
621 ; /* Wait for other cpu to see that we've started */
622 CPU_SETOF(cpu_reset_proxyid, &tcrp);
624 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
634 if (arch_i386_is_xbox) {
635 /* Kick the PIC16L, it can reboot the box */
647 CPU_CLR(PCPU_GET(cpuid), &map);
648 CPU_NAND(&map, &stopped_cpus);
649 if (!CPU_EMPTY(&map)) {
650 printf("cpu_reset: Stopping other CPUs\n");
654 if (PCPU_GET(cpuid) != 0) {
655 cpu_reset_proxyid = PCPU_GET(cpuid);
656 cpustop_restartfunc = cpu_reset_proxy;
657 cpu_reset_proxy_active = 0;
658 printf("cpu_reset: Restarting BSP\n");
660 /* Restart CPU #0. */
661 /* XXX: restart_cpus(1 << 0); */
662 CPU_SETOF(0, &started_cpus);
666 while (cpu_reset_proxy_active == 0 && cnt < 10000000)
667 cnt++; /* Wait for BSP to announce restart */
668 if (cpu_reset_proxy_active == 0)
669 printf("cpu_reset: Failed to restart BSP\n");
671 cpu_reset_proxy_active = 2;
687 struct region_descriptor null_idt;
694 if (elan_mmcr != NULL)
695 elan_mmcr->RESCFG = 1;
698 if (cpu == CPU_GEODE1100) {
699 /* Attempt Geode's own reset */
700 outl(0xcf8, 0x80009044ul);
706 * Attempt to do a CPU reset via CPU reset port.
708 if ((inb(0x35) & 0xa0) != 0xa0) {
709 outb(0x37, 0x0f); /* SHUT0 = 0. */
710 outb(0x37, 0x0b); /* SHUT1 = 0. */
712 outb(0xf0, 0x00); /* Reset. */
714 #if !defined(BROKEN_KEYBOARD_RESET)
716 * Attempt to do a CPU reset via the keyboard controller,
717 * do not turn off GateA20, as any machine that fails
718 * to do the reset here would then end up in no man's land.
720 outb(IO_KBD + 4, 0xFE);
721 DELAY(500000); /* wait 0.5 sec to see if that did it */
725 * Attempt to force a reset via the Reset Control register at
726 * I/O port 0xcf9. Bit 2 forces a system reset when it
727 * transitions from 0 to 1. Bit 1 selects the type of reset
728 * to attempt: 0 selects a "soft" reset, and 1 selects a
729 * "hard" reset. We try a "hard" reset. The first write sets
730 * bit 1 to select a "hard" reset and clears bit 2. The
731 * second write forces a 0 -> 1 transition in bit 2 to trigger
736 DELAY(500000); /* wait 0.5 sec to see if that did it */
739 * Attempt to force a reset via the Fast A20 and Init register
740 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate.
741 * Bit 0 asserts INIT# when set to 1. We are careful to only
742 * preserve bit 1 while setting bit 0. We also must clear bit
743 * 0 before setting it if it isn't already clear.
748 outb(0x92, b & 0xfe);
750 DELAY(500000); /* wait 0.5 sec to see if that did it */
754 printf("No known reset method worked, attempting CPU shutdown\n");
755 DELAY(1000000); /* wait 1 sec for printf to complete */
758 null_idt.rd_limit = 0;
759 null_idt.rd_base = 0;
762 /* "good night, sweet prince .... <THUNK!>" */
770 * Get an sf_buf from the freelist. May block if none are available.
773 sf_buf_map(struct sf_buf *sf, int flags)
775 pt_entry_t opte, *ptep;
778 * Update the sf_buf's virtual-to-physical mapping, flushing the
779 * virtual address from the TLB. Since the reference count for
780 * the sf_buf's old mapping was zero, that mapping is not
781 * currently in use. Consequently, there is no need to exchange
782 * the old and new PTEs atomically, even under PAE.
784 ptep = vtopte(sf->kva);
786 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V |
787 pmap_cache_bits(sf->m->md.pat_mode, 0);
790 * Avoid unnecessary TLB invalidations: If the sf_buf's old
791 * virtual-to-physical mapping was not used, then any processor
792 * that has invalidated the sf_buf's virtual address from its TLB
793 * since the last used mapping need not invalidate again.
796 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A))
797 CPU_ZERO(&sf->cpumask);
799 sf_buf_shootdown(sf, flags);
801 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A))
802 pmap_invalidate_page(kernel_pmap, sf->kva);
808 sf_buf_shootdown(struct sf_buf *sf, int flags)
814 cpuid = PCPU_GET(cpuid);
815 if (!CPU_ISSET(cpuid, &sf->cpumask)) {
816 CPU_SET(cpuid, &sf->cpumask);
819 if ((flags & SFB_CPUPRIVATE) == 0) {
820 other_cpus = all_cpus;
821 CPU_CLR(cpuid, &other_cpus);
822 CPU_NAND(&other_cpus, &sf->cpumask);
823 if (!CPU_EMPTY(&other_cpus)) {
824 CPU_OR(&sf->cpumask, &other_cpus);
825 smp_masked_invlpg(other_cpus, sf->kva);
833 * MD part of sf_buf_free().
836 sf_buf_unmap(struct sf_buf *sf)
843 sf_buf_invalidate(struct sf_buf *sf)
848 * Use pmap_qenter to update the pte for
849 * existing mapping, in particular, the PAT
850 * settings are recalculated.
852 pmap_qenter(sf->kva, &m, 1);
853 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE);
857 * Invalidate the cache lines that may belong to the page, if
858 * (possibly old) mapping of the page by sf buffer exists. Returns
859 * TRUE when mapping was found and cache invalidated.
862 sf_buf_invalidate_cache(vm_page_t m)
865 return (sf_buf_process_page(m, sf_buf_invalidate));
869 * Software interrupt handler for queued VM system processing.
874 if (busdma_swi_pending != 0)
879 * Tell whether this address is in some physical memory region.
880 * Currently used by the kernel coredump code in order to avoid
881 * dumping the ``ISA memory hole'' which could cause indefinite hangs,
882 * or other unpredictable behaviour.
886 is_physical_memory(vm_paddr_t addr)
890 /* The ISA ``memory hole''. */
891 if (addr >= 0xa0000 && addr < 0x100000)
896 * stuff other tests for known memory-mapped devices (PCI?)