2 * Copyright (c) 1982, 1986 The Regents of the University of California.
3 * Copyright (c) 1989, 1990 William Jolitz
4 * Copyright (c) 1994 John Dyson
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
40 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
48 #include "opt_reset.h"
52 #include <sys/param.h>
53 #include <sys/systm.h>
56 #include <sys/kernel.h>
59 #include <sys/malloc.h>
61 #include <sys/mutex.h>
62 #include <sys/pioctl.h>
64 #include <sys/sysent.h>
65 #include <sys/sf_buf.h>
67 #include <sys/sched.h>
68 #include <sys/sysctl.h>
69 #include <sys/unistd.h>
70 #include <sys/vnode.h>
71 #include <sys/vmmeter.h>
73 #include <machine/cpu.h>
74 #include <machine/cputypes.h>
75 #include <machine/md_var.h>
76 #include <machine/pcb.h>
77 #include <machine/pcb_ext.h>
78 #include <machine/smp.h>
79 #include <machine/vm86.h>
82 #include <machine/elan_mmcr.h>
86 #include <vm/vm_extern.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_page.h>
89 #include <vm/vm_map.h>
90 #include <vm/vm_param.h>
93 #include <pc98/cbus/cbus.h>
95 #include <isa/isareg.h>
99 #include <machine/xbox.h>
103 #define NSFBUFS (512 + maxusers * 16)
106 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
107 #define CPU_ENABLE_SSE
110 _Static_assert(OFFSETOF_CURTHREAD == offsetof(struct pcpu, pc_curthread),
111 "OFFSETOF_CURTHREAD does not correspond with offset of pc_curthread.");
112 _Static_assert(OFFSETOF_CURPCB == offsetof(struct pcpu, pc_curpcb),
113 "OFFSETOF_CURPCB does not correspond with offset of pc_curpcb.");
114 _Static_assert(__OFFSETOF_MONITORBUF == offsetof(struct pcpu, pc_monitorbuf),
115 "__OFFSETOF_MONINORBUF does not correspond with offset of pc_monitorbuf.");
117 static void cpu_reset_real(void);
119 static void cpu_reset_proxy(void);
120 static u_int cpu_reset_proxyid;
121 static volatile u_int cpu_reset_proxy_active;
125 get_pcb_user_save_td(struct thread *td)
129 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
130 cpu_max_ext_state_size;
131 KASSERT((p % 64) == 0, ("Unaligned pcb_user_save area"));
132 return ((union savefpu *)p);
136 get_pcb_user_save_pcb(struct pcb *pcb)
140 p = (vm_offset_t)(pcb + 1);
141 return ((union savefpu *)p);
145 get_pcb_td(struct thread *td)
149 p = td->td_kstack + td->td_kstack_pages * PAGE_SIZE -
150 cpu_max_ext_state_size - sizeof(struct pcb);
151 return ((struct pcb *)p);
155 alloc_fpusave(int flags)
158 #ifdef CPU_ENABLE_SSE
159 struct savefpu_ymm *sf;
162 res = malloc(cpu_max_ext_state_size, M_DEVBUF, flags);
163 #ifdef CPU_ENABLE_SSE
165 sf = (struct savefpu_ymm *)res;
166 bzero(&sf->sv_xstate.sx_hd, sizeof(sf->sv_xstate.sx_hd));
167 sf->sv_xstate.sx_hd.xstate_bv = xsave_mask;
173 * Finish a fork operation, with process p2 nearly set up.
174 * Copy and update the pcb, set up the stack so that the child
175 * ready to run and return to user mode.
178 cpu_fork(td1, p2, td2, flags)
179 register struct thread *td1;
180 register struct proc *p2;
184 register struct proc *p1;
189 if ((flags & RFPROC) == 0) {
190 if ((flags & RFMEM) == 0) {
191 /* unshare user LDT */
192 struct mdproc *mdp1 = &p1->p_md;
193 struct proc_ldt *pldt, *pldt1;
195 mtx_lock_spin(&dt_lock);
196 if ((pldt1 = mdp1->md_ldt) != NULL &&
197 pldt1->ldt_refcnt > 1) {
198 pldt = user_ldt_alloc(mdp1, pldt1->ldt_len);
200 panic("could not copy LDT");
203 user_ldt_deref(pldt1);
205 mtx_unlock_spin(&dt_lock);
210 /* Ensure that td1's pcb is up to date. */
211 if (td1 == curthread)
212 td1->td_pcb->pcb_gs = rgs();
215 if (PCPU_GET(fpcurthread) == td1)
216 npxsave(td1->td_pcb->pcb_save);
220 /* Point the pcb to the top of the stack */
221 pcb2 = get_pcb_td(td2);
225 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
227 /* Properly initialize pcb_save */
228 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
229 bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2),
230 cpu_max_ext_state_size);
232 /* Point mdproc and then copy over td1's contents */
234 bcopy(&p1->p_md, mdp2, sizeof(*mdp2));
237 * Create a new fresh stack for the new process.
238 * Copy the trap frame for the return to user mode as if from a
239 * syscall. This copies most of the user mode register values.
240 * The -16 is so we can expand the trapframe if we go to vm86.
242 td2->td_frame = (struct trapframe *)((caddr_t)td2->td_pcb - 16) - 1;
243 bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe));
245 td2->td_frame->tf_eax = 0; /* Child returns zero */
246 td2->td_frame->tf_eflags &= ~PSL_C; /* success */
247 td2->td_frame->tf_edx = 1;
250 * If the parent process has the trap bit set (i.e. a debugger had
251 * single stepped the process to the system call), we need to clear
252 * the trap flag from the new frame unless the debugger had set PF_FORK
253 * on the parent. Otherwise, the child will receive a (likely
254 * unexpected) SIGTRAP when it executes the first instruction after
255 * returning to userland.
257 if ((p1->p_pfsflags & PF_FORK) == 0)
258 td2->td_frame->tf_eflags &= ~PSL_T;
261 * Set registers for trampoline to user mode. Leave space for the
262 * return address on stack. These are the kernel mode register values.
264 #if defined(PAE) || defined(PAE_TABLES)
265 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdpt);
267 pcb2->pcb_cr3 = vtophys(vmspace_pmap(p2->p_vmspace)->pm_pdir);
270 pcb2->pcb_esi = (int)fork_return; /* fork_trampoline argument */
272 pcb2->pcb_esp = (int)td2->td_frame - sizeof(void *);
273 pcb2->pcb_ebx = (int)td2; /* fork_trampoline argument */
274 pcb2->pcb_eip = (int)fork_trampoline;
275 pcb2->pcb_psl = PSL_KERNEL; /* ints disabled */
277 * pcb2->pcb_dr*: cloned above.
278 * pcb2->pcb_savefpu: cloned above.
279 * pcb2->pcb_flags: cloned above.
280 * pcb2->pcb_onfault: cloned above (always NULL here?).
281 * pcb2->pcb_gs: cloned above.
282 * pcb2->pcb_ext: cleared below.
286 * XXX don't copy the i/o pages. this should probably be fixed.
290 /* Copy the LDT, if necessary. */
291 mtx_lock_spin(&dt_lock);
292 if (mdp2->md_ldt != NULL) {
294 mdp2->md_ldt->ldt_refcnt++;
296 mdp2->md_ldt = user_ldt_alloc(mdp2,
297 mdp2->md_ldt->ldt_len);
298 if (mdp2->md_ldt == NULL)
299 panic("could not copy LDT");
302 mtx_unlock_spin(&dt_lock);
304 /* Setup to release spin count in fork_exit(). */
305 td2->td_md.md_spinlock_count = 1;
306 td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
309 * Now, cpu_switch() can schedule the new process.
310 * pcb_esp is loaded pointing to the cpu_switch() stack frame
311 * containing the return address when exiting cpu_switch.
312 * This will normally be to fork_trampoline(), which will have
313 * %ebx loaded with the new proc's pointer. fork_trampoline()
314 * will set up a stack to call fork_return(p, frame); to complete
315 * the return to user-mode.
320 * Intercept the return address from a freshly forked process that has NOT
321 * been scheduled yet.
323 * This is needed to make kernel threads stay in kernel mode.
326 cpu_set_fork_handler(td, func, arg)
328 void (*func)(void *);
332 * Note that the trap frame follows the args, so the function
333 * is really called like this: func(arg, frame);
335 td->td_pcb->pcb_esi = (int) func; /* function */
336 td->td_pcb->pcb_ebx = (int) arg; /* first arg */
340 cpu_exit(struct thread *td)
344 * If this process has a custom LDT, release it. Reset pc->pcb_gs
345 * and %gs before we free it in case they refer to an LDT entry.
347 mtx_lock_spin(&dt_lock);
348 if (td->td_proc->p_md.md_ldt) {
349 td->td_pcb->pcb_gs = _udatasel;
353 mtx_unlock_spin(&dt_lock);
357 cpu_thread_exit(struct thread *td)
362 if (td == PCPU_GET(fpcurthread))
367 /* Disable any hardware breakpoints. */
368 if (td->td_pcb->pcb_flags & PCB_DBREGS) {
370 td->td_pcb->pcb_flags &= ~PCB_DBREGS;
375 cpu_thread_clean(struct thread *td)
380 if (pcb->pcb_ext != NULL) {
381 /* if (pcb->pcb_ext->ext_refcount-- == 1) ?? */
383 * XXX do we need to move the TSS off the allocated pages
384 * before freeing them? (not done here)
386 kmem_free(kernel_arena, (vm_offset_t)pcb->pcb_ext,
393 cpu_thread_swapin(struct thread *td)
398 cpu_thread_swapout(struct thread *td)
403 cpu_thread_alloc(struct thread *td)
406 #ifdef CPU_ENABLE_SSE
407 struct xstate_hdr *xhdr;
410 td->td_pcb = pcb = get_pcb_td(td);
411 td->td_frame = (struct trapframe *)((caddr_t)pcb - 16) - 1;
413 pcb->pcb_save = get_pcb_user_save_pcb(pcb);
414 #ifdef CPU_ENABLE_SSE
416 xhdr = (struct xstate_hdr *)(pcb->pcb_save + 1);
417 bzero(xhdr, sizeof(*xhdr));
418 xhdr->xstate_bv = xsave_mask;
424 cpu_thread_free(struct thread *td)
427 cpu_thread_clean(td);
431 cpu_set_syscall_retval(struct thread *td, int error)
436 td->td_frame->tf_eax = td->td_retval[0];
437 td->td_frame->tf_edx = td->td_retval[1];
438 td->td_frame->tf_eflags &= ~PSL_C;
443 * Reconstruct pc, assuming lcall $X,y is 7 bytes, int
444 * 0x80 is 2 bytes. We saved this in tf_err.
446 td->td_frame->tf_eip -= td->td_frame->tf_err;
453 if (td->td_proc->p_sysent->sv_errsize) {
454 if (error >= td->td_proc->p_sysent->sv_errsize)
455 error = -1; /* XXX */
457 error = td->td_proc->p_sysent->sv_errtbl[error];
459 td->td_frame->tf_eax = error;
460 td->td_frame->tf_eflags |= PSL_C;
466 * Initialize machine state (pcb and trap frame) for a new thread about to
467 * upcall. Put enough state in the new thread's PCB to get it to go back
468 * userret(), where we can intercept it again to set the return (upcall)
469 * Address and stack, along with those from upcals that are from other sources
470 * such as those generated in thread_userret() itself.
473 cpu_set_upcall(struct thread *td, struct thread *td0)
477 /* Point the pcb to the top of the stack. */
481 * Copy the upcall pcb. This loads kernel regs.
482 * Those not loaded individually below get their default
485 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
486 pcb2->pcb_flags &= ~(PCB_NPXINITDONE | PCB_NPXUSERINITDONE |
488 pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
489 bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save,
490 cpu_max_ext_state_size);
493 * Create a new fresh stack for the new thread.
495 bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe));
497 /* If the current thread has the trap bit set (i.e. a debugger had
498 * single stepped the process to the system call), we need to clear
499 * the trap flag from the new frame. Otherwise, the new thread will
500 * receive a (likely unexpected) SIGTRAP when it executes the first
501 * instruction after returning to userland.
503 td->td_frame->tf_eflags &= ~PSL_T;
506 * Set registers for trampoline to user mode. Leave space for the
507 * return address on stack. These are the kernel mode register values.
510 pcb2->pcb_esi = (int)fork_return; /* trampoline arg */
512 pcb2->pcb_esp = (int)td->td_frame - sizeof(void *); /* trampoline arg */
513 pcb2->pcb_ebx = (int)td; /* trampoline arg */
514 pcb2->pcb_eip = (int)fork_trampoline;
515 pcb2->pcb_psl &= ~(PSL_I); /* interrupts must be disabled */
516 pcb2->pcb_gs = rgs();
518 * If we didn't copy the pcb, we'd need to do the following registers:
519 * pcb2->pcb_cr3: cloned above.
520 * pcb2->pcb_dr*: cloned above.
521 * pcb2->pcb_savefpu: cloned above.
522 * pcb2->pcb_flags: cloned above.
523 * pcb2->pcb_onfault: cloned above (always NULL here?).
524 * pcb2->pcb_gs: cloned above.
525 * pcb2->pcb_ext: cleared below.
527 pcb2->pcb_ext = NULL;
529 /* Setup to release spin count in fork_exit(). */
530 td->td_md.md_spinlock_count = 1;
531 td->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
535 * Set that machine state for performing an upcall that has to
536 * be done in thread_userret() so that those upcalls generated
537 * in thread_userret() itself can be done as well.
540 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
545 * Do any extra cleaning that needs to be done.
546 * The thread may have optional components
547 * that are not present in a fresh thread.
548 * This may be a recycled thread so make it look
549 * as though it's newly allocated.
551 cpu_thread_clean(td);
554 * Set the trap frame to point at the beginning of the uts
557 td->td_frame->tf_ebp = 0;
558 td->td_frame->tf_esp =
559 (((int)stack->ss_sp + stack->ss_size - 4) & ~0x0f) - 4;
560 td->td_frame->tf_eip = (int)entry;
563 * Pass the address of the mailbox for this kse to the uts
564 * function as a parameter on the stack.
566 suword((void *)(td->td_frame->tf_esp + sizeof(void *)),
571 cpu_set_user_tls(struct thread *td, void *tls_base)
573 struct segment_descriptor sd;
577 * Construct a descriptor and store it in the pcb for
578 * the next context switch. Also store it in the gdt
579 * so that the load of tf_fs into %fs will activate it
580 * at return to userland.
582 base = (uint32_t)tls_base;
583 sd.sd_lobase = base & 0xffffff;
584 sd.sd_hibase = (base >> 24) & 0xff;
585 sd.sd_lolimit = 0xffff; /* 4GB limit, wraps around */
587 sd.sd_type = SDT_MEMRWA;
595 td->td_pcb->pcb_gsd = sd;
596 if (td == curthread) {
597 PCPU_GET(fsgs_gdt)[1] = sd;
598 load_gs(GSEL(GUGS_SEL, SEL_UPL));
605 * Convert kernel VA to physical address
612 pa = pmap_kextract((vm_offset_t)addr);
614 panic("kvtop: zero page frame");
624 cpu_reset_proxy_active = 1;
625 while (cpu_reset_proxy_active == 1)
626 ; /* Wait for other cpu to see that we've started */
627 CPU_SETOF(cpu_reset_proxyid, &tcrp);
629 printf("cpu_reset_proxy: Stopped CPU %d\n", cpu_reset_proxyid);
639 if (arch_i386_is_xbox) {
640 /* Kick the PIC16L, it can reboot the box */
652 CPU_CLR(PCPU_GET(cpuid), &map);
653 CPU_NAND(&map, &stopped_cpus);
654 if (!CPU_EMPTY(&map)) {
655 printf("cpu_reset: Stopping other CPUs\n");
659 if (PCPU_GET(cpuid) != 0) {
660 cpu_reset_proxyid = PCPU_GET(cpuid);
661 cpustop_restartfunc = cpu_reset_proxy;
662 cpu_reset_proxy_active = 0;
663 printf("cpu_reset: Restarting BSP\n");
665 /* Restart CPU #0. */
666 /* XXX: restart_cpus(1 << 0); */
667 CPU_SETOF(0, &started_cpus);
671 while (cpu_reset_proxy_active == 0 && cnt < 10000000)
672 cnt++; /* Wait for BSP to announce restart */
673 if (cpu_reset_proxy_active == 0)
674 printf("cpu_reset: Failed to restart BSP\n");
676 cpu_reset_proxy_active = 2;
692 struct region_descriptor null_idt;
699 if (elan_mmcr != NULL)
700 elan_mmcr->RESCFG = 1;
703 if (cpu == CPU_GEODE1100) {
704 /* Attempt Geode's own reset */
705 outl(0xcf8, 0x80009044ul);
711 * Attempt to do a CPU reset via CPU reset port.
713 if ((inb(0x35) & 0xa0) != 0xa0) {
714 outb(0x37, 0x0f); /* SHUT0 = 0. */
715 outb(0x37, 0x0b); /* SHUT1 = 0. */
717 outb(0xf0, 0x00); /* Reset. */
719 #if !defined(BROKEN_KEYBOARD_RESET)
721 * Attempt to do a CPU reset via the keyboard controller,
722 * do not turn off GateA20, as any machine that fails
723 * to do the reset here would then end up in no man's land.
725 outb(IO_KBD + 4, 0xFE);
726 DELAY(500000); /* wait 0.5 sec to see if that did it */
730 * Attempt to force a reset via the Reset Control register at
731 * I/O port 0xcf9. Bit 2 forces a system reset when it
732 * transitions from 0 to 1. Bit 1 selects the type of reset
733 * to attempt: 0 selects a "soft" reset, and 1 selects a
734 * "hard" reset. We try a "hard" reset. The first write sets
735 * bit 1 to select a "hard" reset and clears bit 2. The
736 * second write forces a 0 -> 1 transition in bit 2 to trigger
741 DELAY(500000); /* wait 0.5 sec to see if that did it */
744 * Attempt to force a reset via the Fast A20 and Init register
745 * at I/O port 0x92. Bit 1 serves as an alternate A20 gate.
746 * Bit 0 asserts INIT# when set to 1. We are careful to only
747 * preserve bit 1 while setting bit 0. We also must clear bit
748 * 0 before setting it if it isn't already clear.
753 outb(0x92, b & 0xfe);
755 DELAY(500000); /* wait 0.5 sec to see if that did it */
759 printf("No known reset method worked, attempting CPU shutdown\n");
760 DELAY(1000000); /* wait 1 sec for printf to complete */
763 null_idt.rd_limit = 0;
764 null_idt.rd_base = 0;
767 /* "good night, sweet prince .... <THUNK!>" */
775 * Get an sf_buf from the freelist. May block if none are available.
778 sf_buf_map(struct sf_buf *sf, int flags)
780 pt_entry_t opte, *ptep;
783 * Update the sf_buf's virtual-to-physical mapping, flushing the
784 * virtual address from the TLB. Since the reference count for
785 * the sf_buf's old mapping was zero, that mapping is not
786 * currently in use. Consequently, there is no need to exchange
787 * the old and new PTEs atomically, even under PAE.
789 ptep = vtopte(sf->kva);
791 *ptep = VM_PAGE_TO_PHYS(sf->m) | pgeflag | PG_RW | PG_V |
792 pmap_cache_bits(sf->m->md.pat_mode, 0);
795 * Avoid unnecessary TLB invalidations: If the sf_buf's old
796 * virtual-to-physical mapping was not used, then any processor
797 * that has invalidated the sf_buf's virtual address from its TLB
798 * since the last used mapping need not invalidate again.
801 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A))
802 CPU_ZERO(&sf->cpumask);
804 sf_buf_shootdown(sf, flags);
806 if ((opte & (PG_V | PG_A)) == (PG_V | PG_A))
807 pmap_invalidate_page(kernel_pmap, sf->kva);
813 sf_buf_shootdown(struct sf_buf *sf, int flags)
819 cpuid = PCPU_GET(cpuid);
820 if (!CPU_ISSET(cpuid, &sf->cpumask)) {
821 CPU_SET(cpuid, &sf->cpumask);
824 if ((flags & SFB_CPUPRIVATE) == 0) {
825 other_cpus = all_cpus;
826 CPU_CLR(cpuid, &other_cpus);
827 CPU_NAND(&other_cpus, &sf->cpumask);
828 if (!CPU_EMPTY(&other_cpus)) {
829 CPU_OR(&sf->cpumask, &other_cpus);
830 smp_masked_invlpg(other_cpus, sf->kva);
838 * MD part of sf_buf_free().
841 sf_buf_unmap(struct sf_buf *sf)
848 sf_buf_invalidate(struct sf_buf *sf)
853 * Use pmap_qenter to update the pte for
854 * existing mapping, in particular, the PAT
855 * settings are recalculated.
857 pmap_qenter(sf->kva, &m, 1);
858 pmap_invalidate_cache_range(sf->kva, sf->kva + PAGE_SIZE, FALSE);
862 * Invalidate the cache lines that may belong to the page, if
863 * (possibly old) mapping of the page by sf buffer exists. Returns
864 * TRUE when mapping was found and cache invalidated.
867 sf_buf_invalidate_cache(vm_page_t m)
870 return (sf_buf_process_page(m, sf_buf_invalidate));
874 * Software interrupt handler for queued VM system processing.
879 if (busdma_swi_pending != 0)
884 * Tell whether this address is in some physical memory region.
885 * Currently used by the kernel coredump code in order to avoid
886 * dumping the ``ISA memory hole'' which could cause indefinite hangs,
887 * or other unpredictable behaviour.
891 is_physical_memory(vm_paddr_t addr)
895 /* The ISA ``memory hole''. */
896 if (addr >= 0xa0000 && addr < 0x100000)
901 * stuff other tests for known memory-mapped devices (PCI?)