2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #ifndef _MACHINE_ATOMIC_H_
29 #define _MACHINE_ATOMIC_H_
32 #error this file needs sys/cdefs.h as a prerequisite
36 #include <machine/md_var.h>
37 #include <machine/specialreg.h>
40 #ifndef __OFFSETOF_MONITORBUF
42 * __OFFSETOF_MONITORBUF == __pcpu_offset(pc_monitorbuf).
44 * The open-coded number is used instead of the symbolic expression to
45 * avoid a dependency on sys/pcpu.h in machine/atomic.h consumers.
46 * An assertion in i386/vm_machdep.c ensures that the value is correct.
48 #define __OFFSETOF_MONITORBUF 0x180
54 __asm __volatile("lock; addl $0,%%fs:%0"
55 : "+m" (*(u_int *)__OFFSETOF_MONITORBUF) : : "memory", "cc");
62 __asm __volatile("lock; addl $0,(%%esp)" : : : "memory", "cc");
67 * Various simple operations on memory, each of which is atomic in the
68 * presence of interrupts and multiple processors.
70 * atomic_set_char(P, V) (*(u_char *)(P) |= (V))
71 * atomic_clear_char(P, V) (*(u_char *)(P) &= ~(V))
72 * atomic_add_char(P, V) (*(u_char *)(P) += (V))
73 * atomic_subtract_char(P, V) (*(u_char *)(P) -= (V))
75 * atomic_set_short(P, V) (*(u_short *)(P) |= (V))
76 * atomic_clear_short(P, V) (*(u_short *)(P) &= ~(V))
77 * atomic_add_short(P, V) (*(u_short *)(P) += (V))
78 * atomic_subtract_short(P, V) (*(u_short *)(P) -= (V))
80 * atomic_set_int(P, V) (*(u_int *)(P) |= (V))
81 * atomic_clear_int(P, V) (*(u_int *)(P) &= ~(V))
82 * atomic_add_int(P, V) (*(u_int *)(P) += (V))
83 * atomic_subtract_int(P, V) (*(u_int *)(P) -= (V))
84 * atomic_swap_int(P, V) (return (*(u_int *)(P)); *(u_int *)(P) = (V);)
85 * atomic_readandclear_int(P) (return (*(u_int *)(P)); *(u_int *)(P) = 0;)
87 * atomic_set_long(P, V) (*(u_long *)(P) |= (V))
88 * atomic_clear_long(P, V) (*(u_long *)(P) &= ~(V))
89 * atomic_add_long(P, V) (*(u_long *)(P) += (V))
90 * atomic_subtract_long(P, V) (*(u_long *)(P) -= (V))
91 * atomic_swap_long(P, V) (return (*(u_long *)(P)); *(u_long *)(P) = (V);)
92 * atomic_readandclear_long(P) (return (*(u_long *)(P)); *(u_long *)(P) = 0;)
96 * The above functions are expanded inline in the statically-linked
97 * kernel. Lock prefixes are generated if an SMP kernel is being
100 * Kernel modules call real functions which are built into the kernel.
101 * This allows kernel modules to be portable between UP and SMP systems.
103 #if defined(KLD_MODULE) || !defined(__GNUCLIKE_ASM)
104 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
105 void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
106 void atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
108 int atomic_cmpset_int(volatile u_int *dst, u_int expect, u_int src);
109 int atomic_fcmpset_int(volatile u_int *dst, u_int *expect, u_int src);
110 u_int atomic_fetchadd_int(volatile u_int *p, u_int v);
111 int atomic_testandset_int(volatile u_int *p, u_int v);
112 int atomic_testandclear_int(volatile u_int *p, u_int v);
113 void atomic_thread_fence_acq(void);
114 void atomic_thread_fence_acq_rel(void);
115 void atomic_thread_fence_rel(void);
116 void atomic_thread_fence_seq_cst(void);
118 #define ATOMIC_LOAD(TYPE) \
119 u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p)
120 #define ATOMIC_STORE(TYPE) \
121 void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
123 int atomic_cmpset_64(volatile uint64_t *, uint64_t, uint64_t);
124 uint64_t atomic_load_acq_64(volatile uint64_t *);
125 void atomic_store_rel_64(volatile uint64_t *, uint64_t);
126 uint64_t atomic_swap_64(volatile uint64_t *, uint64_t);
128 #else /* !KLD_MODULE && __GNUCLIKE_ASM */
131 * For userland, always use lock prefixes so that the binaries will run
132 * on both SMP and !SMP systems.
134 #if defined(SMP) || !defined(_KERNEL)
135 #define MPLOCKED "lock ; "
141 * The assembly is volatilized to avoid code chunk removal by the compiler.
142 * GCC aggressively reorders operations and memory clobbering is necessary
143 * in order to avoid that for memory barriers.
145 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
146 static __inline void \
147 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
149 __asm __volatile(MPLOCKED OP \
155 static __inline void \
156 atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
158 __asm __volatile(MPLOCKED OP \
166 * Atomic compare and set, used by the mutex functions
168 * if (*dst == expect) *dst = src (all 32 bit words)
170 * Returns 0 on failure, non-zero on success
174 atomic_cmpset_int(volatile u_int *dst, u_int expect, u_int src)
182 "# atomic_cmpset_int"
183 : "=q" (res), /* 0 */
185 "+a" (expect) /* 2 */
192 atomic_fcmpset_int(volatile u_int *dst, u_int *expect, u_int src)
200 "# atomic_cmpset_int"
201 : "=q" (res), /* 0 */
203 "+a" (*expect) /* 2 */
210 * Atomically add the value of v to the integer pointed to by p and return
211 * the previous value of *p.
213 static __inline u_int
214 atomic_fetchadd_int(volatile u_int *p, u_int v)
220 "# atomic_fetchadd_int"
228 atomic_testandset_int(volatile u_int *p, u_int v)
236 "# atomic_testandset_int"
237 : "=q" (res), /* 0 */
239 : "Ir" (v & 0x1f) /* 2 */
245 atomic_testandclear_int(volatile u_int *p, u_int v)
253 "# atomic_testandclear_int"
254 : "=q" (res), /* 0 */
256 : "Ir" (v & 0x1f) /* 2 */
262 * We assume that a = b will do atomic loads and stores. Due to the
263 * IA32 memory model, a simple store guarantees release semantics.
265 * However, a load may pass a store if they are performed on distinct
266 * addresses, so we need Store/Load barrier for sequentially
267 * consistent fences in SMP kernels. We use "lock addl $0,mem" for a
268 * Store/Load barrier, as recommended by the AMD Software Optimization
269 * Guide, and not mfence. In the kernel, we use a private per-cpu
270 * cache line for "mem", to avoid introducing false data
271 * dependencies. In user space, we use the word at the top of the
274 * For UP kernels, however, the memory of the single processor is
275 * always consistent, so we only need to stop the compiler from
276 * reordering accesses in a way that violates the semantics of acquire
282 #define __storeload_barrier() __mbk()
283 #else /* _KERNEL && UP */
284 #define __storeload_barrier() __compiler_membar()
287 #define __storeload_barrier() __mbu()
290 #define ATOMIC_LOAD(TYPE) \
291 static __inline u_##TYPE \
292 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
297 __compiler_membar(); \
302 #define ATOMIC_STORE(TYPE) \
303 static __inline void \
304 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) \
307 __compiler_membar(); \
313 atomic_thread_fence_acq(void)
320 atomic_thread_fence_rel(void)
327 atomic_thread_fence_acq_rel(void)
334 atomic_thread_fence_seq_cst(void)
337 __storeload_barrier();
342 #ifdef WANT_FUNCTIONS
343 int atomic_cmpset_64_i386(volatile uint64_t *, uint64_t, uint64_t);
344 int atomic_cmpset_64_i586(volatile uint64_t *, uint64_t, uint64_t);
345 uint64_t atomic_load_acq_64_i386(volatile uint64_t *);
346 uint64_t atomic_load_acq_64_i586(volatile uint64_t *);
347 void atomic_store_rel_64_i386(volatile uint64_t *, uint64_t);
348 void atomic_store_rel_64_i586(volatile uint64_t *, uint64_t);
349 uint64_t atomic_swap_64_i386(volatile uint64_t *, uint64_t);
350 uint64_t atomic_swap_64_i586(volatile uint64_t *, uint64_t);
353 /* I486 does not support SMP or CMPXCHG8B. */
355 atomic_cmpset_64_i386(volatile uint64_t *dst, uint64_t expect, uint64_t src)
357 volatile uint32_t *p;
360 p = (volatile uint32_t *)dst;
366 " orl %%edx,%%eax ; "
373 : "+A" (expect), /* 0 */
375 "+m" (*(p + 1)), /* 2 */
377 : "r" ((uint32_t)src), /* 4 */
378 "r" ((uint32_t)(src >> 32)) /* 5 */
383 static __inline uint64_t
384 atomic_load_acq_64_i386(volatile uint64_t *p)
386 volatile uint32_t *q;
389 q = (volatile uint32_t *)p;
396 : "=&A" (res) /* 0 */
398 "m" (*(q + 1)) /* 2 */
404 atomic_store_rel_64_i386(volatile uint64_t *p, uint64_t v)
406 volatile uint32_t *q;
408 q = (volatile uint32_t *)p;
416 "=m" (*(q + 1)) /* 1 */
421 static __inline uint64_t
422 atomic_swap_64_i386(volatile uint64_t *p, uint64_t v)
424 volatile uint32_t *q;
427 q = (volatile uint32_t *)p;
436 : "=&A" (res), /* 0 */
438 "+m" (*(q + 1)) /* 2 */
439 : "r" ((uint32_t)v), /* 3 */
440 "r" ((uint32_t)(v >> 32))); /* 4 */
445 atomic_cmpset_64_i586(volatile uint64_t *dst, uint64_t expect, uint64_t src)
453 : "=q" (res), /* 0 */
455 "+A" (expect) /* 2 */
456 : "b" ((uint32_t)src), /* 3 */
457 "c" ((uint32_t)(src >> 32)) /* 4 */
462 static __inline uint64_t
463 atomic_load_acq_64_i586(volatile uint64_t *p)
468 " movl %%ebx,%%eax ; "
469 " movl %%ecx,%%edx ; "
472 : "=&A" (res), /* 0 */
479 atomic_store_rel_64_i586(volatile uint64_t *p, uint64_t v)
483 " movl %%eax,%%ebx ; "
484 " movl %%edx,%%ecx ; "
491 : : "ebx", "ecx", "memory", "cc");
494 static __inline uint64_t
495 atomic_swap_64_i586(volatile uint64_t *p, uint64_t v)
499 " movl %%eax,%%ebx ; "
500 " movl %%edx,%%ecx ; "
507 : : "ebx", "ecx", "memory", "cc");
512 atomic_cmpset_64(volatile uint64_t *dst, uint64_t expect, uint64_t src)
515 if ((cpu_feature & CPUID_CX8) == 0)
516 return (atomic_cmpset_64_i386(dst, expect, src));
518 return (atomic_cmpset_64_i586(dst, expect, src));
521 static __inline uint64_t
522 atomic_load_acq_64(volatile uint64_t *p)
525 if ((cpu_feature & CPUID_CX8) == 0)
526 return (atomic_load_acq_64_i386(p));
528 return (atomic_load_acq_64_i586(p));
532 atomic_store_rel_64(volatile uint64_t *p, uint64_t v)
535 if ((cpu_feature & CPUID_CX8) == 0)
536 atomic_store_rel_64_i386(p, v);
538 atomic_store_rel_64_i586(p, v);
541 static __inline uint64_t
542 atomic_swap_64(volatile uint64_t *p, uint64_t v)
545 if ((cpu_feature & CPUID_CX8) == 0)
546 return (atomic_swap_64_i386(p, v));
548 return (atomic_swap_64_i586(p, v));
553 #endif /* KLD_MODULE || !__GNUCLIKE_ASM */
555 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v);
556 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v);
557 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v);
558 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v);
560 ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v);
561 ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v);
562 ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v);
563 ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v);
565 ATOMIC_ASM(set, int, "orl %1,%0", "ir", v);
566 ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
567 ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
568 ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
570 ATOMIC_ASM(set, long, "orl %1,%0", "ir", v);
571 ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v);
572 ATOMIC_ASM(add, long, "addl %1,%0", "ir", v);
573 ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v);
575 #define ATOMIC_LOADSTORE(TYPE) \
579 ATOMIC_LOADSTORE(char);
580 ATOMIC_LOADSTORE(short);
581 ATOMIC_LOADSTORE(int);
582 ATOMIC_LOADSTORE(long);
587 #undef ATOMIC_LOADSTORE
589 #ifndef WANT_FUNCTIONS
592 atomic_cmpset_long(volatile u_long *dst, u_long expect, u_long src)
595 return (atomic_cmpset_int((volatile u_int *)dst, (u_int)expect,
599 static __inline u_long
600 atomic_fetchadd_long(volatile u_long *p, u_long v)
603 return (atomic_fetchadd_int((volatile u_int *)p, (u_int)v));
607 atomic_testandset_long(volatile u_long *p, u_int v)
610 return (atomic_testandset_int((volatile u_int *)p, v));
614 atomic_testandclear_long(volatile u_long *p, u_int v)
617 return (atomic_testandclear_int((volatile u_int *)p, v));
620 /* Read the current value and store a new value in the destination. */
621 #ifdef __GNUCLIKE_ASM
623 static __inline u_int
624 atomic_swap_int(volatile u_int *p, u_int v)
635 static __inline u_long
636 atomic_swap_long(volatile u_long *p, u_long v)
639 return (atomic_swap_int((volatile u_int *)p, (u_int)v));
642 #else /* !__GNUCLIKE_ASM */
644 u_int atomic_swap_int(volatile u_int *p, u_int v);
645 u_long atomic_swap_long(volatile u_long *p, u_long v);
647 #endif /* __GNUCLIKE_ASM */
649 #define atomic_set_acq_char atomic_set_barr_char
650 #define atomic_set_rel_char atomic_set_barr_char
651 #define atomic_clear_acq_char atomic_clear_barr_char
652 #define atomic_clear_rel_char atomic_clear_barr_char
653 #define atomic_add_acq_char atomic_add_barr_char
654 #define atomic_add_rel_char atomic_add_barr_char
655 #define atomic_subtract_acq_char atomic_subtract_barr_char
656 #define atomic_subtract_rel_char atomic_subtract_barr_char
658 #define atomic_set_acq_short atomic_set_barr_short
659 #define atomic_set_rel_short atomic_set_barr_short
660 #define atomic_clear_acq_short atomic_clear_barr_short
661 #define atomic_clear_rel_short atomic_clear_barr_short
662 #define atomic_add_acq_short atomic_add_barr_short
663 #define atomic_add_rel_short atomic_add_barr_short
664 #define atomic_subtract_acq_short atomic_subtract_barr_short
665 #define atomic_subtract_rel_short atomic_subtract_barr_short
667 #define atomic_set_acq_int atomic_set_barr_int
668 #define atomic_set_rel_int atomic_set_barr_int
669 #define atomic_clear_acq_int atomic_clear_barr_int
670 #define atomic_clear_rel_int atomic_clear_barr_int
671 #define atomic_add_acq_int atomic_add_barr_int
672 #define atomic_add_rel_int atomic_add_barr_int
673 #define atomic_subtract_acq_int atomic_subtract_barr_int
674 #define atomic_subtract_rel_int atomic_subtract_barr_int
675 #define atomic_cmpset_acq_int atomic_cmpset_int
676 #define atomic_cmpset_rel_int atomic_cmpset_int
677 #define atomic_fcmpset_acq_int atomic_fcmpset_int
678 #define atomic_fcmpset_rel_int atomic_fcmpset_int
680 #define atomic_set_acq_long atomic_set_barr_long
681 #define atomic_set_rel_long atomic_set_barr_long
682 #define atomic_clear_acq_long atomic_clear_barr_long
683 #define atomic_clear_rel_long atomic_clear_barr_long
684 #define atomic_add_acq_long atomic_add_barr_long
685 #define atomic_add_rel_long atomic_add_barr_long
686 #define atomic_subtract_acq_long atomic_subtract_barr_long
687 #define atomic_subtract_rel_long atomic_subtract_barr_long
688 #define atomic_cmpset_acq_long atomic_cmpset_long
689 #define atomic_cmpset_rel_long atomic_cmpset_long
690 #define atomic_fcmpset_acq_long atomic_fcmpset_long
691 #define atomic_fcmpset_rel_long atomic_fcmpset_long
693 #define atomic_readandclear_int(p) atomic_swap_int(p, 0)
694 #define atomic_readandclear_long(p) atomic_swap_long(p, 0)
696 /* Operations on 8-bit bytes. */
697 #define atomic_set_8 atomic_set_char
698 #define atomic_set_acq_8 atomic_set_acq_char
699 #define atomic_set_rel_8 atomic_set_rel_char
700 #define atomic_clear_8 atomic_clear_char
701 #define atomic_clear_acq_8 atomic_clear_acq_char
702 #define atomic_clear_rel_8 atomic_clear_rel_char
703 #define atomic_add_8 atomic_add_char
704 #define atomic_add_acq_8 atomic_add_acq_char
705 #define atomic_add_rel_8 atomic_add_rel_char
706 #define atomic_subtract_8 atomic_subtract_char
707 #define atomic_subtract_acq_8 atomic_subtract_acq_char
708 #define atomic_subtract_rel_8 atomic_subtract_rel_char
709 #define atomic_load_acq_8 atomic_load_acq_char
710 #define atomic_store_rel_8 atomic_store_rel_char
712 /* Operations on 16-bit words. */
713 #define atomic_set_16 atomic_set_short
714 #define atomic_set_acq_16 atomic_set_acq_short
715 #define atomic_set_rel_16 atomic_set_rel_short
716 #define atomic_clear_16 atomic_clear_short
717 #define atomic_clear_acq_16 atomic_clear_acq_short
718 #define atomic_clear_rel_16 atomic_clear_rel_short
719 #define atomic_add_16 atomic_add_short
720 #define atomic_add_acq_16 atomic_add_acq_short
721 #define atomic_add_rel_16 atomic_add_rel_short
722 #define atomic_subtract_16 atomic_subtract_short
723 #define atomic_subtract_acq_16 atomic_subtract_acq_short
724 #define atomic_subtract_rel_16 atomic_subtract_rel_short
725 #define atomic_load_acq_16 atomic_load_acq_short
726 #define atomic_store_rel_16 atomic_store_rel_short
728 /* Operations on 32-bit double words. */
729 #define atomic_set_32 atomic_set_int
730 #define atomic_set_acq_32 atomic_set_acq_int
731 #define atomic_set_rel_32 atomic_set_rel_int
732 #define atomic_clear_32 atomic_clear_int
733 #define atomic_clear_acq_32 atomic_clear_acq_int
734 #define atomic_clear_rel_32 atomic_clear_rel_int
735 #define atomic_add_32 atomic_add_int
736 #define atomic_add_acq_32 atomic_add_acq_int
737 #define atomic_add_rel_32 atomic_add_rel_int
738 #define atomic_subtract_32 atomic_subtract_int
739 #define atomic_subtract_acq_32 atomic_subtract_acq_int
740 #define atomic_subtract_rel_32 atomic_subtract_rel_int
741 #define atomic_load_acq_32 atomic_load_acq_int
742 #define atomic_store_rel_32 atomic_store_rel_int
743 #define atomic_cmpset_32 atomic_cmpset_int
744 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
745 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
746 #define atomic_fcmpset_32 atomic_fcmpset_int
747 #define atomic_fcmpset_acq_32 atomic_fcmpset_acq_int
748 #define atomic_fcmpset_rel_32 atomic_fcmpset_rel_int
749 #define atomic_swap_32 atomic_swap_int
750 #define atomic_readandclear_32 atomic_readandclear_int
751 #define atomic_fetchadd_32 atomic_fetchadd_int
752 #define atomic_testandset_32 atomic_testandset_int
753 #define atomic_testandclear_32 atomic_testandclear_int
755 /* Operations on pointers. */
756 #define atomic_set_ptr(p, v) \
757 atomic_set_int((volatile u_int *)(p), (u_int)(v))
758 #define atomic_set_acq_ptr(p, v) \
759 atomic_set_acq_int((volatile u_int *)(p), (u_int)(v))
760 #define atomic_set_rel_ptr(p, v) \
761 atomic_set_rel_int((volatile u_int *)(p), (u_int)(v))
762 #define atomic_clear_ptr(p, v) \
763 atomic_clear_int((volatile u_int *)(p), (u_int)(v))
764 #define atomic_clear_acq_ptr(p, v) \
765 atomic_clear_acq_int((volatile u_int *)(p), (u_int)(v))
766 #define atomic_clear_rel_ptr(p, v) \
767 atomic_clear_rel_int((volatile u_int *)(p), (u_int)(v))
768 #define atomic_add_ptr(p, v) \
769 atomic_add_int((volatile u_int *)(p), (u_int)(v))
770 #define atomic_add_acq_ptr(p, v) \
771 atomic_add_acq_int((volatile u_int *)(p), (u_int)(v))
772 #define atomic_add_rel_ptr(p, v) \
773 atomic_add_rel_int((volatile u_int *)(p), (u_int)(v))
774 #define atomic_subtract_ptr(p, v) \
775 atomic_subtract_int((volatile u_int *)(p), (u_int)(v))
776 #define atomic_subtract_acq_ptr(p, v) \
777 atomic_subtract_acq_int((volatile u_int *)(p), (u_int)(v))
778 #define atomic_subtract_rel_ptr(p, v) \
779 atomic_subtract_rel_int((volatile u_int *)(p), (u_int)(v))
780 #define atomic_load_acq_ptr(p) \
781 atomic_load_acq_int((volatile u_int *)(p))
782 #define atomic_store_rel_ptr(p, v) \
783 atomic_store_rel_int((volatile u_int *)(p), (v))
784 #define atomic_cmpset_ptr(dst, old, new) \
785 atomic_cmpset_int((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
786 #define atomic_cmpset_acq_ptr(dst, old, new) \
787 atomic_cmpset_acq_int((volatile u_int *)(dst), (u_int)(old), \
789 #define atomic_cmpset_rel_ptr(dst, old, new) \
790 atomic_cmpset_rel_int((volatile u_int *)(dst), (u_int)(old), \
792 #define atomic_fcmpset_ptr(dst, old, new) \
793 atomic_fcmpset_int((volatile u_int *)(dst), (u_int *)(old), (u_int)(new))
794 #define atomic_fcmpset_acq_ptr(dst, old, new) \
795 atomic_fcmpset_acq_int((volatile u_int *)(dst), (u_int *)(old), \
797 #define atomic_fcmpset_rel_ptr(dst, old, new) \
798 atomic_fcmpset_rel_int((volatile u_int *)(dst), (u_int *)(old), \
800 #define atomic_swap_ptr(p, v) \
801 atomic_swap_int((volatile u_int *)(p), (u_int)(v))
802 #define atomic_readandclear_ptr(p) \
803 atomic_readandclear_int((volatile u_int *)(p))
805 #endif /* !WANT_FUNCTIONS */
809 #define wmb() __mbk()
810 #define rmb() __mbk()
813 #define wmb() __mbu()
814 #define rmb() __mbu()
817 #endif /* !_MACHINE_ATOMIC_H_ */