sys/i386/include/counter.h

   1 /*-
   2  * Copyright (c) 2012 Konstantin Belousov <kib@FreeBSD.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef __MACHINE_COUNTER_H__
  30 #define __MACHINE_COUNTER_H__
  31
  32 #include <sys/pcpu.h>
  33 #ifdef INVARIANTS
  34 #include <sys/proc.h>
  35 #endif
  36 #include <machine/md_var.h>
  37 #include <machine/specialreg.h>
  38
  39 extern struct pcpu __pcpu[];
  40
  41 #define EARLY_COUNTER   &__pcpu[0].pc_early_dummy_counter
  42
  43 #define counter_enter() do {                            \
  44         if ((cpu_feature & CPUID_CX8) == 0)             \
  45                 critical_enter();                       \
  46 } while (0)
  47
  48 #define counter_exit()  do {                            \
  49         if ((cpu_feature & CPUID_CX8) == 0)             \
  50                 critical_exit();                        \
  51 } while (0)
  52
  53 static inline void
  54 counter_64_inc_8b(uint64_t *p, int64_t inc)
  55 {
  56
  57         __asm __volatile(
  58         "movl   %%fs:(%%esi),%%eax\n\t"
  59         "movl   %%fs:4(%%esi),%%edx\n"
  60 "1:\n\t"
  61         "movl   %%eax,%%ebx\n\t"
  62         "movl   %%edx,%%ecx\n\t"
  63         "addl   (%%edi),%%ebx\n\t"
  64         "adcl   4(%%edi),%%ecx\n\t"
  65         "cmpxchg8b %%fs:(%%esi)\n\t"
  66         "jnz    1b"
  67         :
  68         : "S" ((char *)p - (char *)&__pcpu[0]), "D" (&inc)
  69         : "memory", "cc", "eax", "edx", "ebx", "ecx");
  70 }
  71
  72 #ifdef IN_SUBR_COUNTER_C
  73 static inline uint64_t
  74 counter_u64_read_one_8b(uint64_t *p)
  75 {
  76         uint32_t res_lo, res_high;
  77
  78         __asm __volatile(
  79         "movl   %%eax,%%ebx\n\t"
  80         "movl   %%edx,%%ecx\n\t"
  81         "cmpxchg8b      (%2)"
  82         : "=a" (res_lo), "=d"(res_high)
  83         : "SD" (p)
  84         : "cc", "ebx", "ecx");
  85         return (res_lo + ((uint64_t)res_high << 32));
  86 }
  87
  88 static inline uint64_t
  89 counter_u64_fetch_inline(uint64_t *p)
  90 {
  91         uint64_t res;
  92         int i;
  93
  94         res = 0;
  95         if ((cpu_feature & CPUID_CX8) == 0) {
  96                 /*
  97                  * The machines without cmpxchg8b are not SMP.
  98                  * Disabling the preemption provides atomicity of the
  99                  * counter reading, since update is done in the
 100                  * critical section as well.
 101                  */
 102                 critical_enter();
 103                 CPU_FOREACH(i) {
 104                         res += *(uint64_t *)((char *)p +
 105                             sizeof(struct pcpu) * i);
 106                 }
 107                 critical_exit();
 108         } else {
 109                 CPU_FOREACH(i)
 110                         res += counter_u64_read_one_8b((uint64_t *)((char *)p +
 111                             sizeof(struct pcpu) * i));
 112         }
 113         return (res);
 114 }
 115
 116 static inline void
 117 counter_u64_zero_one_8b(uint64_t *p)
 118 {
 119
 120         __asm __volatile(
 121         "movl   (%0),%%eax\n\t"
 122         "movl   4(%0),%%edx\n"
 123         "xorl   %%ebx,%%ebx\n\t"
 124         "xorl   %%ecx,%%ecx\n\t"
 125 "1:\n\t"
 126         "cmpxchg8b      (%0)\n\t"
 127         "jnz    1b"
 128         :
 129         : "SD" (p)
 130         : "memory", "cc", "eax", "edx", "ebx", "ecx");
 131 }
 132
 133 static void
 134 counter_u64_zero_one_cpu(void *arg)
 135 {
 136         uint64_t *p;
 137
 138         p = (uint64_t *)((char *)arg + sizeof(struct pcpu) * PCPU_GET(cpuid));
 139         counter_u64_zero_one_8b(p);
 140 }
 141
 142 static inline void
 143 counter_u64_zero_inline(counter_u64_t c)
 144 {
 145         int i;
 146
 147         if ((cpu_feature & CPUID_CX8) == 0) {
 148                 critical_enter();
 149                 CPU_FOREACH(i)
 150                         *(uint64_t *)((char *)c + sizeof(struct pcpu) * i) = 0;
 151                 critical_exit();
 152         } else {
 153                 smp_rendezvous(smp_no_rendezvous_barrier,
 154                     counter_u64_zero_one_cpu, smp_no_rendezvous_barrier, c);
 155         }
 156 }
 157 #endif
 158
 159 #define counter_u64_add_protected(c, inc)       do {    \
 160         if ((cpu_feature & CPUID_CX8) == 0) {           \
 161                 CRITICAL_ASSERT(curthread);             \
 162                 *(uint64_t *)zpcpu_get(c) += (inc);     \
 163         } else                                          \
 164                 counter_64_inc_8b((c), (inc));          \
 165 } while (0)
 166
 167 static inline void
 168 counter_u64_add(counter_u64_t c, int64_t inc)
 169 {
 170
 171         if ((cpu_feature & CPUID_CX8) == 0) {
 172                 critical_enter();
 173                 *(uint64_t *)zpcpu_get(c) += inc;
 174                 critical_exit();
 175         } else {
 176                 counter_64_inc_8b(c, inc);
 177         }
 178 }
 179
 180 #endif  /* ! __MACHINE_COUNTER_H__ */