2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifndef __MACHINE_INTR_MACHDEP_H__
30 #define __MACHINE_INTR_MACHDEP_H__
35 * The maximum number of I/O interrupts we allow. This number is rather
36 * arbitrary as it is just the maximum IRQ resource value. The interrupt
37 * source for a given IRQ maps that I/O interrupt to device interrupt
38 * source whether it be a pin on an interrupt controller or an MSI interrupt.
39 * The 16 ISA IRQs are assigned fixed IDT vectors, but all other device
40 * interrupts allocate IDT vectors on demand. Currently we have 191 IDT
41 * vectors available for device interrupts. On many systems with I/O APICs,
42 * a lot of the IRQs are not used, so this number can be much larger than
43 * 191 and still be safe since only interrupt sources in actual use will
44 * allocate IDT vectors.
46 * For now we stick with 255 as ISA IRQs and PCI intline IRQs only allow
47 * for IRQs in the range 0 - 254. When MSI support is added this number
48 * will likely increase.
50 #define NUM_IO_INTS 255
53 * - 1 ??? dummy counter.
54 * - 2 counters for each I/O interrupt.
55 * - 1 counter for each CPU for lapic timer.
56 * - 7 counters for each CPU for IPI counters for SMP.
59 #define INTRCNT_COUNT (1 + NUM_IO_INTS * 2 + 1)
61 #define INTRCNT_COUNT (1 + NUM_IO_INTS * 2 + (1 + 7) * MAXCPU)
66 typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
68 #define IDTVEC(name) __CONCAT(X,name)
73 * Methods that a PIC provides to mask/unmask a given interrupt source,
74 * "turn on" the interrupt on the CPU side by setting up an IDT entry, and
75 * return the vector associated with this source.
78 void (*pic_enable_source)(struct intsrc *);
79 void (*pic_disable_source)(struct intsrc *, int);
80 void (*pic_eoi_source)(struct intsrc *);
81 void (*pic_enable_intr)(struct intsrc *);
82 int (*pic_vector)(struct intsrc *);
83 int (*pic_source_pending)(struct intsrc *);
84 void (*pic_suspend)(struct intsrc *);
85 void (*pic_resume)(struct intsrc *);
86 int (*pic_config_intr)(struct intsrc *, enum intr_trigger,
88 void (*pic_assign_cpu)(struct intsrc *, u_int apic_id);
91 /* Flags for pic_disable_source() */
98 * An interrupt source. The upper-layer code uses the PIC methods to
99 * control a given source. The lower-layer PIC drivers can store additional
100 * private data in a given interrupt source such as an interrupt pin number
101 * or an I/O APIC pointer.
105 struct intr_event *is_event;
107 u_long *is_straycount;
114 extern struct mtx icu_lock;
115 extern int elcr_found;
117 /* XXX: The elcr_* prototypes probably belong somewhere else. */
118 int elcr_probe(void);
119 enum intr_trigger elcr_read_trigger(u_int irq);
120 void elcr_resume(void);
121 void elcr_write_trigger(u_int irq, enum intr_trigger trigger);
123 void intr_add_cpu(u_int apic_id);
125 #define intr_add_cpu(apic_id)
127 int intr_add_handler(const char *name, int vector, driver_intr_t handler,
128 void *arg, enum intr_type flags, void **cookiep);
129 int intr_config_intr(int vector, enum intr_trigger trig,
130 enum intr_polarity pol);
131 void intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame);
132 struct intsrc *intr_lookup_source(int vector);
133 int intr_register_source(struct intsrc *isrc);
134 int intr_remove_handler(void *cookie);
135 void intr_resume(void);
136 void intr_suspend(void);
137 void intrcnt_add(const char *name, u_long **countp);
141 #endif /* !__MACHINE_INTR_MACHDEP_H__ */