2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)npx.h 5.3 (Berkeley) 1/18/91
37 * 287/387 NPX Coprocessor Data Structures and Constants
41 #ifndef _MACHINE_NPX_H_
42 #define _MACHINE_NPX_H_
44 /* Environment information of floating point unit */
46 long en_cw; /* control word (16bits) */
47 long en_sw; /* status word (16bits) */
48 long en_tw; /* tag word (16bits) */
49 long en_fip; /* floating point instruction pointer */
50 u_short en_fcs; /* floating code segment selector */
51 u_short en_opcode; /* opcode last executed (11 bits ) */
52 long en_foo; /* floating operand offset */
53 long en_fos; /* floating operand segment selector */
56 /* Contents of each floating point accumulator */
58 #ifdef dontdef /* too unportable */
59 u_long fp_mantlo; /* mantissa low (31:0) */
60 u_long fp_manthi; /* mantissa high (63:32) */
61 int fp_exp:15; /* exponent */
62 int fp_sgn:1; /* mantissa sign */
68 /* Floating point context */
70 struct env87 sv_env; /* floating point control/status */
71 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
72 u_char sv_pad0[4]; /* padding for (now unused) saved status word */
74 * Bogus padding for emulators. Emulators should use their own
75 * struct and arrange to store into this struct (ending here)
76 * before it is inspected for ptracing or for core dumps. Some
77 * emulators overwrite the whole struct. We have no good way of
78 * knowing how much padding to leave. Leave just enough for the
79 * GPL emulator's i387_union (176 bytes total).
81 u_char sv_pad[64]; /* padding; used by emulators */
85 u_int16_t en_cw; /* control word (16bits) */
86 u_int16_t en_sw; /* status word (16bits) */
87 u_int16_t en_tw; /* tag word (16bits) */
88 u_int16_t en_opcode; /* opcode last executed (11 bits ) */
89 u_int32_t en_fip; /* floating point instruction pointer */
90 u_int16_t en_fcs; /* floating code segment selector */
91 u_int16_t en_pad0; /* padding */
92 u_int32_t en_foo; /* floating operand offset */
93 u_int16_t en_fos; /* floating operand segment selector */
94 u_int16_t en_pad1; /* padding */
95 u_int32_t en_mxcsr; /* SSE control/status register */
96 u_int32_t en_mxcsr_mask; /* valid bits in mxcsr */
99 /* Contents of each SSE extended accumulator */
101 u_char xmm_bytes[16];
105 struct envxmm sv_env;
107 struct fpacc87 fp_acc;
108 u_char fp_pad[6]; /* padding */
110 struct xmmacc sv_xmm[8];
116 struct savexmm sv_xmm;
120 * The hardware default control word for i387's and later coprocessors is
125 * all exceptions masked.
127 * We modify the affine mode bit and precision bits in this to give:
129 * affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
130 * 53-bit precision (2 in bitfield 3<<8)
132 * 64-bit precision often gives bad results with high level languages
133 * because it makes the results of calculations depend on whether
134 * intermediate values are stored in memory or in FPU registers.
136 #define __INITIAL_NPXCW__ 0x127F
137 #define __INITIAL_MXCSR__ 0x1F80
141 #define IO_NPX 0x0F0 /* Numeric Coprocessor */
142 #define IO_NPXSIZE 16 /* 80387/80487 NPX registers */
146 /* full reset on some systems, NOP on others */
147 #define npx_full_reset() outb(IO_NPX + 1, 0)
151 void npxexit(struct thread *td);
153 int npxgetregs(struct thread *td, union savefpu *addr);
154 void npxinit(u_short control);
155 void npxsave(union savefpu *addr);
156 void npxsetregs(struct thread *td, union savefpu *addr);
161 #endif /* !_MACHINE_NPX_H_ */