2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
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34 * from: @(#)param.h 5.8 (Berkeley) 6/28/91
39 #ifndef _I386_INCLUDE_PARAM_H_
40 #define _I386_INCLUDE_PARAM_H_
42 #include <machine/_align.h>
45 * Machine dependent constants for Intel 386.
51 #define __PCI_REROUTE_INTERRUPT
54 #define MACHINE "i386"
57 #define MACHINE_ARCH "i386"
59 #define MID_MACHINE MID_I386
61 #if defined(SMP) || defined(KLD_MODULE)
67 #endif /* SMP || KLD_MODULE */
73 #define ALIGNBYTES _ALIGNBYTES
74 #define ALIGN(p) _ALIGN(p)
76 * ALIGNED_POINTER is a boolean macro that checks whether an address
77 * is valid to fetch data elements of type t from on this architecture.
78 * This does not reflect the optimal alignment, just the possibility
79 * (within reasonable limits).
81 #define ALIGNED_POINTER(p, t) 1
84 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
85 * architecture. It should be used with appropriate caution.
87 #define CACHE_LINE_SHIFT 6
88 #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
90 #define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */
91 #define PAGE_SIZE (1<<PAGE_SHIFT) /* bytes/page */
92 #define PAGE_MASK (PAGE_SIZE-1)
93 #define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
95 #if defined(PAE) || defined(PAE_TABLES)
97 #define PDRSHIFT 21 /* LOG2(NBPDR) */
98 #define NPGPTD_SHIFT 9
101 #define PDRSHIFT 22 /* LOG2(NBPDR) */
102 #define NPGPTD_SHIFT 10
105 #define NBPTD (NPGPTD<<PAGE_SHIFT)
106 #define NPDEPTD (NBPTD/(sizeof (pd_entry_t)))
107 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
108 #define NBPDR (1<<PDRSHIFT) /* bytes/page dir */
109 #define PDRMASK (NBPDR-1)
111 #define MAXPAGESIZES 2 /* maximum number of supported page sizes */
113 #define IOPAGES 2 /* pages of i/o permission bitmap */
116 #define KSTACK_PAGES 4 /* Includes pcb! */
118 #define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */
120 #define TD0_KSTACK_PAGES 4
122 #define TD0_KSTACK_PAGES KSTACK_PAGES
126 * Ceiling on amount of swblock kva space, can be changed via
127 * the kern.maxswzone /boot/loader.conf variable.
129 * 276 is sizeof(struct swblock), but we do not always have a definition
130 * in scope for struct swblock, so we have to hardcode it. Each struct
131 * swblock holds metadata for 32 pages, so in theory, this is enough for
132 * 16 GB of swap. In practice, however, the usable amount is considerably
133 * lower due to fragmentation.
135 #ifndef VM_SWZONE_SIZE_MAX
136 #define VM_SWZONE_SIZE_MAX (276 * 128 * 1024)
140 * Ceiling on size of buffer cache (really only effects write queueing,
141 * the VM page cache is not effected), can be changed via
142 * the kern.maxbcache /boot/loader.conf variable.
144 * The value is equal to the size of the auto-tuned buffer map for
145 * the machine with 4GB of RAM, see vfs_bio.c:kern_vfs_bio_buffer_alloc().
147 #ifndef VM_BCACHE_SIZE_MAX
148 #define VM_BCACHE_SIZE_MAX (7224 * 16 * 1024)
152 * Mach derived conversion macros
154 #define trunc_page(x) ((x) & ~PAGE_MASK)
155 #define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK)
156 #define trunc_4mpage(x) ((x) & ~PDRMASK)
157 #define round_4mpage(x) ((((x)) + PDRMASK) & ~PDRMASK)
159 #define atop(x) ((x) >> PAGE_SHIFT)
160 #define ptoa(x) ((x) << PAGE_SHIFT)
162 #define i386_btop(x) ((x) >> PAGE_SHIFT)
163 #define i386_ptob(x) ((x) << PAGE_SHIFT)
165 #define pgtok(x) ((x) * (PAGE_SIZE / 1024))
167 #define INKERNEL(va) (((vm_offset_t)(va)) >= VM_MAXUSER_ADDRESS && \
168 ((vm_offset_t)(va)) < VM_MAX_KERNEL_ADDRESS)
170 #endif /* !_I386_INCLUDE_PARAM_H_ */