2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1991 Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department and William Jolitz of UUNET Technologies Inc.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * Derived from hp300 version by Mike Hibler, this version by William
36 * Jolitz uses a recursive map [a pde points to the page directory] to
37 * map the page tables using the pagetables themselves. This is done to
38 * reduce the impact on kernel virtual memory for lots of sparse address
39 * space, and to reduce the cost of memory to each process.
41 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
42 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
46 #ifndef _MACHINE_PMAP_H_
47 #define _MACHINE_PMAP_H_
50 * Page-directory and page-table entries follow this format, with a few
51 * of the fields not present here and there, depending on a lot of things.
53 /* ---- Intel Nomenclature ---- */
54 #define PG_V 0x001 /* P Valid */
55 #define PG_RW 0x002 /* R/W Read/Write */
56 #define PG_U 0x004 /* U/S User/Supervisor */
57 #define PG_NC_PWT 0x008 /* PWT Write through */
58 #define PG_NC_PCD 0x010 /* PCD Cache disable */
59 #define PG_A 0x020 /* A Accessed */
60 #define PG_M 0x040 /* D Dirty */
61 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */
62 #define PG_PTE_PAT 0x080 /* PAT PAT index */
63 #define PG_G 0x100 /* G Global */
64 #define PG_AVAIL1 0x200 /* / Available for system */
65 #define PG_AVAIL2 0x400 /* < programmers use */
66 #define PG_AVAIL3 0x800 /* \ */
67 #define PG_PDE_PAT 0x1000 /* PAT PAT index */
68 #define PG_NX (1ull<<63) /* No-execute */
71 /* Our various interpretations of the above */
72 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
73 #define PG_MANAGED PG_AVAIL2
74 #define PG_PROMOTED PG_AVAIL3 /* PDE only */
76 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */
77 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */
79 /* Page level cache control fields used to determine the PAT type */
80 #define PG_PDE_CACHE (PG_PDE_PAT | PG_NC_PWT | PG_NC_PCD)
81 #define PG_PTE_CACHE (PG_PTE_PAT | PG_NC_PWT | PG_NC_PCD)
84 * Promotion to a 2 or 4MB (PDE) page mapping requires that the corresponding
85 * 4KB (PTE) page mappings have identical settings for the following fields:
87 #define PG_PTE_PROMOTE (PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \
88 PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V)
91 * Page Protection Exception bits
94 #define PGEX_P 0x01 /* Protection violation vs. not present */
95 #define PGEX_W 0x02 /* during a Write cycle */
96 #define PGEX_U 0x04 /* access from User mode (UPL) */
97 #define PGEX_RSV 0x08 /* reserved PTE field is non-zero */
98 #define PGEX_I 0x10 /* during an instruction fetch */
103 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT)))
106 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */
109 #define PDRSHIFT_PAE 21 /* LOG2(NBPDR) */
110 #define PG_FRAME_PAE (0x000ffffffffff000ull)
111 #define PG_PS_FRAME_PAE (0x000fffffffe00000ull)
113 #define PDRSHIFT_NOPAE 22
114 #define PG_FRAME_NOPAE (~PAGE_MASK)
115 #define PG_PS_FRAME_NOPAE (0xffc00000)
118 * The *PTDI values control the layout of virtual memory
120 #define KPTDI 0 /* start of kernel virtual pde's */
121 /* ptd entry that points to ptd */
122 #define PTDPTDI (NPDEPTD - NTRPPTD - NPGPTD)
123 #define TRPTDI (NPDEPTD - NTRPPTD) /* u/k trampoline ptd */
126 * XXX doesn't really belong here I guess...
128 #define ISA_HOLE_START 0xa0000
129 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
133 #include <sys/queue.h>
134 #include <sys/_cpuset.h>
135 #include <sys/_lock.h>
136 #include <sys/_mutex.h>
138 #include <vm/_vm_radix.h>
141 * Address of current address space page table maps and directories.
146 * Translate a virtual address to its physical address.
148 * This macro may be used before pmap_bootstrap() is called.
150 #define vtophys(va) pmap_kextract((vm_offset_t)(va))
152 #define pte_clear(ptep) pte_store(ptep, 0)
154 #define pde_store(pdep, pde) pte_store(pdep, pde)
165 TAILQ_HEAD(,pv_entry) pv_list;
169 #define PMAP_EXTERN_FIELDS \
170 cpuset_t pm_active; /* active on cpus */ \
172 struct pmap_statistics pm_stats; /* pmap statistics */
182 pd_entry_t *pm_pdir; /* KVA of page directory */
183 TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
184 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */
185 pdpt_entry_t *pm_pdpt; /* KVA of page directory pointer
187 struct vm_radix pm_root; /* spare page table pages */
188 vm_page_t pm_ptdpg[NPGPTD];
191 #define pmap pmap_KBI
194 typedef struct pmap *pmap_t;
197 extern struct pmap kernel_pmap_store;
198 #define kernel_pmap (&kernel_pmap_store)
200 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
201 #define PMAP_LOCK_ASSERT(pmap, type) \
202 mtx_assert(&(pmap)->pm_mtx, (type))
203 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
204 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \
205 NULL, MTX_DEF | MTX_DUPOK)
206 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
207 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
208 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
209 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
213 * For each vm_page_t, there is a list of all currently valid virtual
214 * mappings of that page. An entry is a pv_entry_t, the list is pv_list.
216 typedef struct pv_entry {
217 vm_offset_t pv_va; /* virtual address for mapping */
218 TAILQ_ENTRY(pv_entry) pv_next;
222 * pv_entries are allocated in chunks per-process. This avoids the
223 * need to track per-pmap assignments.
229 TAILQ_ENTRY(pv_chunk) pc_list;
230 uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */
231 TAILQ_ENTRY(pv_chunk) pc_lru;
232 struct pv_entry pc_pventry[_NPCPV];
237 extern char *ptvmmap; /* poor name! */
238 extern vm_offset_t virtual_avail;
239 extern vm_offset_t virtual_end;
241 #define pmap_page_get_memattr(m) ((vm_memattr_t)(m)->md.pat_mode)
242 #define pmap_page_is_write_mapped(m) (((m)->aflags & PGA_WRITEABLE) != 0)
243 #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz))
246 pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused)
255 * Only the following functions or macros may be used before pmap_bootstrap()
256 * is called: pmap_kenter(), pmap_kextract(), pmap_kremove(), vtophys(), and
259 void pmap_activate_boot(pmap_t pmap);
260 void pmap_basemem_setup(u_int basemem);
261 void *pmap_bios16_enter(void);
262 void pmap_bios16_leave(void *handle);
263 void pmap_bootstrap(vm_paddr_t);
264 int pmap_cache_bits(pmap_t, int mode, boolean_t is_pde);
265 int pmap_change_attr(vm_offset_t, vm_size_t, int);
266 caddr_t pmap_cmap3(vm_paddr_t pa, u_int pte_bits);
267 void pmap_cp_slow0_map(vm_offset_t kaddr, int plen, vm_page_t *ma);
268 void pmap_flush_page(vm_page_t m);
269 u_int pmap_get_kcr3(void);
270 u_int pmap_get_cr3(pmap_t);
271 vm_offset_t pmap_get_map_low(void);
272 vm_offset_t pmap_get_vm_maxuser_address(void);
273 void pmap_init_pat(void);
274 void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
275 void *pmap_kenter_temporary(vm_paddr_t pa, int i);
276 vm_paddr_t pmap_kextract(vm_offset_t va);
277 void pmap_kremove(vm_offset_t);
278 void pmap_ksetrw(vm_offset_t va);
279 void *pmap_mapbios(vm_paddr_t, vm_size_t);
280 void *pmap_mapdev(vm_paddr_t, vm_size_t);
281 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
282 boolean_t pmap_page_is_mapped(vm_page_t m);
283 void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
284 vm_paddr_t pmap_pg_frame(vm_paddr_t pa);
285 bool pmap_ps_enabled(pmap_t pmap);
286 void pmap_remap_lower(bool);
287 void pmap_remap_lowptdi(bool);
288 void pmap_set_nx(void);
289 void pmap_sf_buf_map(struct sf_buf *sf);
290 void pmap_unmapdev(vm_offset_t, vm_size_t);
291 void pmap_invalidate_page(pmap_t, vm_offset_t);
292 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
293 void pmap_invalidate_all(pmap_t);
294 void pmap_invalidate_cache(void);
295 void pmap_invalidate_cache_pages(vm_page_t *pages, int count);
296 void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
297 void pmap_force_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
298 void *pmap_trm_alloc(size_t size, int flags);
299 void pmap_trm_free(void *addr, size_t size);
301 void invltlb_glob(void);
306 extern int i386_pmap_VM_NFREEORDER;
307 extern int i386_pmap_VM_LEVEL_0_ORDER;
308 extern int i386_pmap_PDRSHIFT;
314 #endif /* !_MACHINE_PMAP_H_ */