1 #ifndef __XEN_SYNCH_BITOPS_H__
2 #define __XEN_SYNCH_BITOPS_H__
5 * Copyright 1992, Linus Torvalds.
6 * Heavily modified to provide guaranteed strong synchronisation
7 * when communicating with Xen or other guest OSes running on other CPUs.
10 #define ADDR (*(volatile long *) addr)
12 static __inline__ void synch_set_bit(int nr, volatile void * addr)
14 __asm__ __volatile__ (
16 : "=m" (ADDR) : "Ir" (nr) : "memory" );
19 static __inline__ void synch_clear_bit(int nr, volatile void * addr)
21 __asm__ __volatile__ (
23 : "=m" (ADDR) : "Ir" (nr) : "memory" );
26 static __inline__ void synch_change_bit(int nr, volatile void * addr)
28 __asm__ __volatile__ (
30 : "=m" (ADDR) : "Ir" (nr) : "memory" );
33 static __inline__ int synch_test_and_set_bit(int nr, volatile void * addr)
36 __asm__ __volatile__ (
37 "lock btsl %2,%1\n\tsbbl %0,%0"
38 : "=r" (oldbit), "=m" (ADDR) : "Ir" (nr) : "memory");
42 static __inline__ int synch_test_and_clear_bit(int nr, volatile void * addr)
45 __asm__ __volatile__ (
46 "lock btrl %2,%1\n\tsbbl %0,%0"
47 : "=r" (oldbit), "=m" (ADDR) : "Ir" (nr) : "memory");
51 static __inline__ int synch_test_and_change_bit(int nr, volatile void * addr)
55 __asm__ __volatile__ (
56 "lock btcl %2,%1\n\tsbbl %0,%0"
57 : "=r" (oldbit), "=m" (ADDR) : "Ir" (nr) : "memory");
61 struct __synch_xchg_dummy { unsigned long a[100]; };
62 #define __synch_xg(x) ((volatile struct __synch_xchg_dummy *)(x))
64 #define synch_cmpxchg(ptr, old, new) \
65 ((__typeof__(*(ptr)))__synch_cmpxchg((ptr),\
66 (unsigned long)(old), \
67 (unsigned long)(new), \
70 static inline unsigned long __synch_cmpxchg(volatile void *ptr,
72 unsigned long new, int size)
77 __asm__ __volatile__("lock; cmpxchgb %b1,%2"
79 : "q"(new), "m"(*__synch_xg(ptr)),
84 __asm__ __volatile__("lock; cmpxchgw %w1,%2"
86 : "q"(new), "m"(*__synch_xg(ptr)),
92 __asm__ __volatile__("lock; cmpxchgl %k1,%2"
94 : "q"(new), "m"(*__synch_xg(ptr)),
99 __asm__ __volatile__("lock; cmpxchgq %1,%2"
101 : "q"(new), "m"(*__synch_xg(ptr)),
107 __asm__ __volatile__("lock; cmpxchgl %1,%2"
109 : "q"(new), "m"(*__synch_xg(ptr)),
118 static __inline__ int synch_const_test_bit(int nr, const volatile void * addr)
120 return ((1UL << (nr & 31)) &
121 (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
124 static __inline__ int synch_var_test_bit(int nr, volatile void * addr)
127 __asm__ __volatile__ (
128 "btl %2,%1\n\tsbbl %0,%0"
129 : "=r" (oldbit) : "m" (ADDR), "Ir" (nr) );
133 #define synch_test_bit(nr,addr) \
134 (__builtin_constant_p(nr) ? \
135 synch_const_test_bit((nr),(addr)) : \
136 synch_var_test_bit((nr),(addr)))
138 #endif /* __XEN_SYNCH_BITOPS_H__ */