2 * ----------------------------------------------------------------------------
3 * "THE BEER-WARE LICENSE" (Revision 42):
4 * <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
5 * can do whatever you want with this stuff. If we meet some day, and you think
6 * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
7 * ----------------------------------------------------------------------------
11 * This device-driver helps the userland controlprogram for a LORAN-C
12 * receiver avoid monopolizing the CPU.
14 * This is clearly a candidate for the "most weird hardware support in
15 * FreeBSD" prize. At this time only two copies of the receiver are
16 * known to exist in the entire world.
18 * Details can be found at:
19 * ftp://ftp.eecis.udel.edu/pub/ntp/loran.tar.Z
24 #include <sys/param.h>
25 #include <sys/systm.h>
26 #include <sys/sysctl.h>
28 #include <sys/kernel.h>
30 #include <sys/malloc.h>
32 #include <i386/isa/isa_device.h>
35 typedef TAILQ_HEAD(, datapoint) dphead_t;
38 /* Fields used by kernel */
50 TAILQ_ENTRY(datapoint) list;
59 /* Fields used only in userland */
60 void (*proc)(struct datapoint *);
66 /* Fields used only in userland */
75 * Mode register (PAR) hardware definitions
77 #define INTEG 0x03 /* integrator mask */
78 #define INTEG_1000us 0
82 #define GATE 0x0C /* gate source mask */
87 #define MSB 0x10 /* load dac high-order bits */
88 #define IEN 0x20 /* enable interrupt bit */
89 #define EN5 0x40 /* enable counter 5 bit */
90 #define ENG 0x80 /* enable gri bit */
92 #define VCO_SHIFT 8 /* bits of fraction on VCO value */
93 #define VCO (2048 << VCO_SHIFT) /* initial vco dac (0 V)*/
96 #define PGUARD 990 /* program guard time (cycle) (990!) */
100 #define NLORAN 10 /* Allow ten minor devices */
102 #define NDUMMY 4 /* How many idlers we want */
104 #define PORT 0x0300 /* controller port address */
107 #define GRI 800 /* pulse-group gate (cycle) */
110 * Analog/digital converter (ADC) hardware definitions
112 #define ADC PORT+2 /* adc buffer (r)/address (w) */
113 #define ADCGO PORT+3 /* adc status (r)/adc start (w) */
114 #define ADC_START 0x01 /* converter start bit (w) */
115 #define ADC_BUSY 0x01 /* converter busy bit (r) */
116 #define ADC_DONE 0x80 /* converter done bit (r) */
117 #define ADC_I 0 /* i channel (phase) */
118 #define ADC_Q 1 /* q channel (amplitude) */
119 #define ADC_S 2 /* s channel (agc) */
122 * Digital/analog converter (DAC) hardware definitions
123 * Note: output voltage increases with value programmed; the buffer
124 * is loaded in two 8-bit bytes, the lsb 8 bits with the MSB bit off in
125 * the PAR register, the msb 4 bits with the MSB on.
127 #define DACA PORT+4 /* vco (dac a) buffer (w) */
128 #define DACB PORT+5 /* agc (dac b) buffer (w) */
130 #define LOAD_DAC(dac, val) if (0) { } else { \
131 par &= ~MSB; outb(PAR, par); outb((dac), (val) & 0xff); \
132 par |= MSB; outb(PAR, par); outb((dac), ((val) >> 8) & 0xff); \
136 * Pulse-code generator (CODE) hardware definitions
137 * Note: bits are shifted out from the lsb first
139 #define CODE PORT+6 /* pulse-code buffer (w) */
140 #define MPCA 0xCA /* LORAN-C master pulse code group a */
141 #define MPCB 0x9F /* LORAN-C master pulse code group b */
142 #define SPCA 0xF9 /* LORAN-C slave pulse code group a */
143 #define SPCB 0xAC /* LORAN-C slave pulse code group b */
146 * Mode register (PAR) hardware definitions
148 #define PAR PORT+7 /* parameter buffer (w) */
150 #define TGC PORT+0 /* stc control port (r/w) */
151 #define TGD PORT+1 /* stc data port (r/w) */
154 * Timing generator (STC) hardware commands
156 /* argument sssss = counter numbers 5-1 */
157 #define TG_LOADDP 0x00 /* load data pointer */
158 /* argument ee = element (all groups except ggg = 000 or 111) */
159 #define MODEREG 0x00 /* mode register */
160 #define LOADREG 0x08 /* load register */
161 #define HOLDREG 0x10 /* hold register */
162 #define HOLDINC 0x18 /* hold register (hold cycle increm) */
163 /* argument ee = element (group ggg = 111) */
164 #define ALARM1 0x07 /* alarm register 1 */
165 #define ALARM2 0x0F /* alarm register 2 */
166 #define MASTER 0x17 /* master mode register */
167 #define STATUS 0x1F /* status register */
168 #define ARM 0x20 /* arm counters */
169 #define LOAD 0x40 /* load counters */
170 #define TG_LOADARM 0x60 /* load and arm counters */
171 #define DISSAVE 0x80 /* disarm and save counters */
172 #define TG_SAVE 0xA0 /* save counters */
173 #define DISARM 0xC0 /* disarm counters */
174 /* argument nnn = counter number */
175 #define SETTOG 0xE8 /* set toggle output HIGH for counter */
176 #define CLRTOG 0xE0 /* set toggle output LOW for counter */
177 #define STEP 0xF0 /* step counter */
178 /* argument eeggg, where ee = element, ggg - counter group */
180 #define ENABDPS 0xE0 /* enable data pointer sequencing */
181 #define ENABFOUT 0xE6 /* enable fout */
182 #define ENAB8 0xE7 /* enable 8-bit data bus */
183 #define DSABDPS 0xE8 /* disable data pointer sequencing */
184 #define ENAB16 0xEF /* enable 16-bit data bus */
185 #define DSABFOUT 0xEE /* disable fout */
186 #define ENABPFW 0xF8 /* enable prefetch for write */
187 #define DSABPFW 0xF9 /* disable prefetch for write */
188 #define TG_RESET 0xFF /* master reset */
190 #define LOAD_9513(index, val) if (0) {} else { \
191 outb(TGC, TG_LOADDP + (index)); \
192 outb(TGD, (val) & 0xff); \
193 outb(TGD, ((val) >> 8) & 0xff); \
196 #define NENV 40 /* size of envelope filter */
197 #define CLOCK 50 /* clock period (clock) */
198 #define CYCLE 10 /* carrier period (us) */
199 #define PCX (NENV * CLOCK) /* envelope gate (clock) */
200 #define STROBE 50 /* strobe gate (clock) */
202 /**********************************************************************/
204 extern struct cdevsw loran_cdevsw;
206 static dphead_t minors[NLORAN + 1], working;
208 static struct datapoint dummy[NDUMMY], *first, *second;
210 static u_int64_t ticker;
214 static MALLOC_DEFINE(M_LORAN, "Loran", "Loran datapoints");
216 static int loranerror;
217 static char lorantext[160];
220 static u_int vco_should;
221 static u_int vco_want;
222 static u_int64_t vco_when;
223 static int64_t vco_error;
225 /**********************************************************************/
227 static int loranprobe (struct isa_device *dvp);
228 static void init_tgc (void);
229 static int loranattach (struct isa_device *isdp);
230 static void loranenqueue (struct datapoint *);
231 static d_open_t loranopen;
232 static d_close_t loranclose;
233 static d_read_t loranread;
234 static d_write_t loranwrite;
235 static ointhand2_t loranintr;
236 extern struct timecounter loran_timecounter;
238 /**********************************************************************/
241 loranprobe(struct isa_device *dvp)
246 cdevsw_add(&loran_cdevsw);
247 dvp->id_iobase = PORT;
251 static u_short tg_init[] = { /* stc initialization vector */
252 0x0562, 12, 13, /* counter 1 (p0) Mode J */
253 0x0262, PGUARD, GRI, /* counter 2 (gri) Mode J */
254 0x8562, PCX, 5000 - PCX, /* counter 3 (pcx) */
255 0xc562, 0, STROBE, /* counter 4 (stb) Mode L */
256 0x052a, 0, 0 /* counter 5 (out) */
264 /* Initialize the 9513A */
265 outb(TGC, TG_RESET); outb(TGC, LOAD+0x1f); /* reset STC chip */
266 LOAD_9513(MASTER, 0x8af0);
267 outb(TGC, TG_LOADDP+1);
268 tg_init[4] = 7499 - GRI;
269 for (i = 0; i < 5*3; i++) {
270 outb(TGD, tg_init[i]);
271 outb(TGD, tg_init[i] >> 8);
273 outb(TGC, TG_LOADARM+0x1f); /* let the good times roll */
277 loranattach(struct isa_device *isdp)
281 isdp->id_ointr = loranintr;
283 /* We need to be a "fast-intr" */
284 /* isdp->id_ri_flags |= RI_FAST; XXX unimplemented - use newbus! */
286 printf("loran0: LORAN-C Receiver\n");
288 vco_want = vco_should = VCO;
289 vco_is = vco_should >> VCO_SHIFT;
290 LOAD_DAC(DACA, vco_is);
294 init_timecounter(&loran_timecounter);
296 TAILQ_INIT(&working);
297 for (i = 0; i < NLORAN + 1; i++) {
298 TAILQ_INIT(&minors[i]);
302 for (i = 0; i < NDUMMY; i++) {
304 dummy[i].code = 0xac;
305 dummy[i].fri = PGUARD;
306 dummy[i].scheduled = PGUARD * 2 * i;
309 dummy[i].priority = NLORAN * 256;
310 dummy[i].home = &minors[NLORAN];
316 TAILQ_INSERT_TAIL(&working, &dummy[i], list);
319 inb(ADC); /* Flush any old result */
329 loranopen (dev_t dev, int flags, int fmt, struct proc *p)
341 loranclose(dev_t dev, int flags, int fmt, struct proc *p)
347 loranread(dev_t dev, struct uio * uio, int ioflag)
350 struct datapoint *this;
357 printf("Loran0: %s", lorantext);
361 if (TAILQ_EMPTY(&minors[idx]))
362 tsleep ((caddr_t)&minors[idx], (PZERO + 8) |PCATCH, "loranrd", hz*2);
363 if (TAILQ_EMPTY(&minors[idx]))
365 this = TAILQ_FIRST(&minors[idx]);
368 TAILQ_REMOVE(&minors[idx], this, list);
371 c = imin(uio->uio_resid, (int)sizeof *this);
372 err = uiomove((caddr_t)this, c, uio);
378 loranenqueue(struct datapoint *dp)
380 struct datapoint *dpp;
382 TAILQ_FOREACH(dpp, &working, list) {
383 if (dpp->priority <= dp->priority)
385 TAILQ_INSERT_BEFORE(dpp, dp, list);
388 TAILQ_INSERT_TAIL(&working, dp, list);
392 loranwrite(dev_t dev, struct uio * uio, int ioflag)
396 struct datapoint *this;
403 MALLOC(this, struct datapoint *, sizeof *this, M_LORAN, M_WAITOK);
404 c = imin(uio->uio_resid, (int)sizeof *this);
405 err = uiomove((caddr_t)this, c, uio);
410 if (this->fri == 0) {
414 this->par &= INTEG|GATE;
415 /* XXX more checks needed! */
416 this->home = &minors[idx];
417 this->priority &= 0xff;
418 this->priority += idx * 256;
420 when = second->scheduled + PGUARD;
421 if (when > this->scheduled) {
422 dt = when - this->scheduled;
423 dt -= dt % this->fri;
424 this->scheduled += dt;
431 vco_want = this->vco;
445 struct timespec there, then;
446 struct datapoint *dp, *done;
452 * Pick up the measurement which just completed, and setup
453 * the next measurement. We have 1100 microseconds for this
454 * of which some eaten by the A/D of the S channel and the
455 * interrupt to get us here.
461 done->ssig = inb(ADC);
467 outb(ADCGO, ADC_START);
469 /* Interlude: while we wait: setup the next measurement */
470 LOAD_DAC(DACB, second->agc);
471 outb(CODE, second->code);
472 par &= ~(INTEG|GATE);
476 while (!(inb(ADCGO) & ADC_DONE))
478 done->isig = inb(ADC);
481 outb(ADCGO, ADC_START);
482 /* Interlude: while we wait: setup the next measurement */
484 * We need to load this from the opposite register due to some
485 * weirdness which you can read about in in the 9513 manual on
486 * page 1-26 under "LOAD"
488 LOAD_9513(0x0c, second->phase);
489 LOAD_9513(0x14, second->phase);
490 outb(TGC, TG_LOADARM + 0x08);
491 LOAD_9513(0x14, second->width);
492 while (!(inb(ADCGO) & ADC_DONE))
494 done->qsig = inb(ADC);
501 * End of VERY time critical stuff, we have 8 msec to find
502 * the next measurement and program the delay.
509 when = first->scheduled + PGUARD;
510 TAILQ_FOREACH(dp, &working, list) {
511 while (dp->scheduled < when)
512 dp->scheduled += dp->fri;
513 if (second && dp->scheduled + PGUARD >= second->scheduled)
518 delay = (second->scheduled - first->scheduled) - GRI;
520 LOAD_9513(0x0a, delay);
522 /* Done, the rest is leisure work */
524 vco_error += ((vco_is << VCO_SHIFT) - vco_should) *
526 vco_should = vco_want;
527 i = vco_should >> VCO_SHIFT;
537 /* Check if we overran */
542 outb(TGC, TG_SAVE + 2); /* save counter #2 */
543 outb(TGC, TG_LOADDP + 0x12); /* hold counter #2 */
545 count |= inb(TGD) << 8;
551 printf( "Missed: %02x %d first:%p second:%p %.09ld\n",
552 status, delay, first, second,
553 then.tv_nsec - there.tv_nsec);
557 TAILQ_REMOVE(&working, second, list);
563 done->epoch = ticker;
566 TAILQ_INSERT_TAIL(done->home, done, list);
567 wakeup((caddr_t)done->home);
570 ticker = first->scheduled;
572 while ((dp = TAILQ_FIRST(&minors[NLORAN])) != NULL) {
573 TAILQ_REMOVE(&minors[NLORAN], dp, list);
574 TAILQ_INSERT_TAIL(&working, dp, list);
577 when = second->scheduled + PGUARD;
579 TAILQ_FOREACH(dp, &working, list) {
580 while (dp->scheduled < when)
581 dp->scheduled += dp->fri;
586 /**********************************************************************/
589 loran_get_timecount(struct timecounter *tc)
597 outb(TGC, TG_SAVE + 0x10); /* save counter #5 */
598 outb(TGC, TG_LOADDP +0x15); /* hold counter #5 */
600 count |= inb(TGD) << 8;
606 static struct timecounter loran_timecounter = {
607 loran_get_timecount, /* get_timecount */
609 0xffff, /* counter_mask */
610 5000000, /* frequency */
614 SYSCTL_OPAQUE(_debug, OID_AUTO, loran_timecounter, CTLFLAG_RD,
615 &loran_timecounter, sizeof(loran_timecounter), "S,timecounter", "");
618 /**********************************************************************/
620 struct isa_driver lorandriver = {
621 loranprobe, loranattach, "loran"
624 #define CDEV_MAJOR 94
625 static struct cdevsw loran_cdevsw = {
626 /* open */ loranopen,
627 /* close */ loranclose,
628 /* read */ loranread,
629 /* write */ loranwrite,
633 /* strategy */ nostrategy,
635 /* maj */ CDEV_MAJOR,