2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
40 * This file contains an aggregated module marked:
41 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
42 * All rights reserved.
43 * See the notice for details.
46 #include "opt_auto_eoi.h"
48 #include <sys/param.h>
50 #include <machine/lock.h>
52 #include <sys/systm.h>
53 #include <sys/syslog.h>
54 #include <sys/malloc.h>
55 #include <sys/errno.h>
56 #include <sys/interrupt.h>
57 #include <machine/ipl.h>
58 #include <machine/md_var.h>
59 #include <machine/segments.h>
63 #include <machine/smp.h>
64 #include <machine/smptests.h> /** FAST_HI */
67 #include <pc98/pc98/pc98.h>
68 #include <pc98/pc98/pc98_machdep.h>
69 #include <pc98/pc98/epsonio.h>
71 #include <i386/isa/isa.h>
73 #include <i386/isa/icu.h>
75 #include <isa/isavar.h>
76 #include <i386/isa/intr_machdep.h>
77 #include <sys/interrupt.h>
79 #include <machine/clock.h>
84 #include <i386/isa/mca_machdep.h>
87 /* XXX should be in suitable include files */
89 #define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */
92 #define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */
98 * This is to accommodate "mixed-mode" programming for
99 * motherboards that don't connect the 8254 to the IO APIC.
104 #define NR_INTRNAMES (1 + ICU_LEN + 2 * ICU_LEN)
106 u_long *intr_countp[ICU_LEN];
107 inthand2_t *intr_handler[ICU_LEN];
108 u_int intr_mask[ICU_LEN];
109 static u_int* intr_mptr[ICU_LEN];
110 void *intr_unit[ICU_LEN];
112 static inthand_t *fastintr[ICU_LEN] = {
113 &IDTVEC(fastintr0), &IDTVEC(fastintr1),
114 &IDTVEC(fastintr2), &IDTVEC(fastintr3),
115 &IDTVEC(fastintr4), &IDTVEC(fastintr5),
116 &IDTVEC(fastintr6), &IDTVEC(fastintr7),
117 &IDTVEC(fastintr8), &IDTVEC(fastintr9),
118 &IDTVEC(fastintr10), &IDTVEC(fastintr11),
119 &IDTVEC(fastintr12), &IDTVEC(fastintr13),
120 &IDTVEC(fastintr14), &IDTVEC(fastintr15),
122 &IDTVEC(fastintr16), &IDTVEC(fastintr17),
123 &IDTVEC(fastintr18), &IDTVEC(fastintr19),
124 &IDTVEC(fastintr20), &IDTVEC(fastintr21),
125 &IDTVEC(fastintr22), &IDTVEC(fastintr23),
129 static inthand_t *slowintr[ICU_LEN] = {
130 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
131 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
132 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
133 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15),
135 &IDTVEC(intr16), &IDTVEC(intr17), &IDTVEC(intr18), &IDTVEC(intr19),
136 &IDTVEC(intr20), &IDTVEC(intr21), &IDTVEC(intr22), &IDTVEC(intr23),
140 static inthand2_t isa_strayintr;
143 #define NMI_PARITY 0x04
144 #define NMI_EPARITY 0x02
146 #define NMI_PARITY (1 << 7)
147 #define NMI_IOCHAN (1 << 6)
148 #define ENMI_WATCHDOG (1 << 7)
149 #define ENMI_BUSTIMER (1 << 6)
150 #define ENMI_IOSTATUS (1 << 5)
154 * Handle a NMI, possibly a machine check.
155 * return true to panic system, false to ignore.
162 int port = inb(0x33);
163 if (epson_machine_id == 0x20)
164 epson_outb(0xc16, epson_inb(0xc16) | 0x1);
165 if (port & NMI_PARITY) {
166 panic("BASE RAM parity error, likely hardware failure.");
167 } else if (port & NMI_EPARITY) {
168 panic("EXTENDED RAM parity error, likely hardware failure.");
170 printf("\nNMI Resume ??\n");
174 int isa_port = inb(0x61);
175 int eisa_port = inb(0x461);
178 if (MCA_system && mca_bus_nmi())
182 if (isa_port & NMI_PARITY)
183 panic("RAM parity error, likely hardware failure.");
185 if (isa_port & NMI_IOCHAN)
186 panic("I/O channel check, likely hardware failure.");
189 * On a real EISA machine, this will never happen. However it can
190 * happen on ISA machines which implement XT style floating point
191 * error handling (very rare). Save them from a meaningless panic.
193 if (eisa_port == 0xff)
196 if (eisa_port & ENMI_WATCHDOG)
197 panic("EISA watchdog timer expired, likely hardware failure.");
199 if (eisa_port & ENMI_BUSTIMER)
200 panic("EISA bus timeout, likely hardware failure.");
202 if (eisa_port & ENMI_IOSTATUS)
203 panic("EISA I/O port status error.");
205 printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
211 * Fill in default interrupt table (in case of spuruious interrupt
212 * during configuration of kernel, setup interrupt control unit
220 for (i = 0; i < ICU_LEN; i++)
221 icu_unset(i, (inthand2_t *)NULL);
223 /* initialize 8259's */
226 outb(IO_ICU1, 0x19); /* reset; program device, four bytes */
229 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
231 outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */
232 outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */
235 outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */
237 outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */
241 outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
243 outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */
246 outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
247 outb(IO_ICU1, 0x0a); /* default to IRR on read */
249 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
254 outb(IO_ICU2, 0x19); /* reset; program device, four bytes */
257 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
259 outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */
260 outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */
262 outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */
265 outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */
267 outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */
270 outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */
271 outb(IO_ICU2, 0x0a); /* default to IRR on read */
275 * Caught a stray interrupt, notify
278 isa_strayintr(vcookiep)
281 int intr = (void **)vcookiep - &intr_unit[0];
283 /* DON'T BOTHER FOR NOW! */
284 /* for some reason, we get bursts of intr #7, even if not enabled! */
286 * Well the reason you got bursts of intr #7 is because someone
287 * raised an interrupt line and dropped it before the 8259 could
288 * prioritize it. This is documented in the intel data book. This
289 * means you have BAD hardware! I have changed this so that only
290 * the first 5 get logged, then it quits logging them, and puts
291 * out a special message. rgrimes 3/25/1993
294 * XXX TODO print a different message for #7 if it is for a
295 * glitch. Glitches can be distinguished from real #7's by
296 * testing that the in-service bit is _not_ set. The test
297 * must be done before sending an EOI so it can't be done if
298 * we are using AUTO_EOI_1.
300 if (intrcnt[1 + intr] <= 5)
301 log(LOG_ERR, "stray irq %d\n", intr);
302 if (intrcnt[1 + intr] == 5)
304 "too many stray irq %d's; not logging any more\n", intr);
308 * Return a bitmap of the current interrupt requests. This is 8259-specific
309 * and is only suitable for use at probe time.
319 return ((irr2 << 8) | irr1);
323 update_intr_masks(void)
328 for (intr=0; intr < ICU_LEN; intr ++) {
330 /* no 8259 SLAVE to ignore */
332 if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */
334 maskptr = intr_mptr[intr];
337 *maskptr |= SWI_CLOCK_MASK | (1 << intr);
339 if (mask != intr_mask[intr]) {
341 printf ("intr_mask[%2d] old=%08x new=%08x ptr=%p.\n",
342 intr, intr_mask[intr], mask, maskptr);
344 intr_mask[intr]=mask;
353 update_intrname(int intr, char *name)
357 int name_index, off, strayintr;
360 * Initialise strings for bitbucket and stray interrupt counters.
361 * These have statically allocated indices 0 and 1 through ICU_LEN.
363 if (intrnames[0] == '\0') {
364 off = sprintf(intrnames, "???") + 1;
365 for (strayintr = 0; strayintr < ICU_LEN; strayintr++)
366 off += sprintf(intrnames + off, "stray irq%d",
372 if (snprintf(buf, sizeof(buf), "%s irq%d", name, intr) >= sizeof(buf))
376 * Search for `buf' in `intrnames'. In the usual case when it is
377 * not found, append it to the end if there is enough space (the \0
378 * terminator for the previous string, if any, becomes a separator).
380 for (cp = intrnames, name_index = 0;
381 cp != eintrnames && name_index < NR_INTRNAMES;
382 cp += strlen(cp) + 1, name_index++) {
384 if (strlen(buf) >= eintrnames - cp)
389 if (strcmp(cp, buf) == 0)
394 printf("update_intrname: counting %s irq%d as %s\n", name, intr,
398 intr_countp[intr] = &intrcnt[name_index];
402 icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
405 int select; /* the select register is 8 bits */
407 u_int32_t value; /* the window register is 32 bits */
410 u_int mask = (maskptr ? *maskptr : 0);
413 if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */
415 if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID)
417 if (intr_handler[intr] != isa_strayintr)
422 intr_handler[intr] = handler;
423 intr_mptr[intr] = maskptr;
424 intr_mask[intr] = mask | SWI_CLOCK_MASK | (1 << intr);
425 intr_unit[intr] = arg;
427 if (flags & INTR_FAST) {
428 vector = TPR_FAST_INTS + intr;
429 setidt(vector, fastintr[intr],
430 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
433 vector = TPR_SLOW_INTS + intr;
434 #ifdef APIC_INTR_REORDER
435 #ifdef APIC_INTR_HIGHPRI_CLOCK
436 /* XXX: Hack (kludge?) for more accurate clock. */
437 if (intr == apic_8254_intr || intr == 8) {
438 vector = TPR_FAST_INTS + intr;
442 setidt(vector, slowintr[intr],
443 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
445 #ifdef APIC_INTR_REORDER
446 set_lapic_isrloc(intr, vector);
449 * Reprogram the vector in the IO APIC.
451 if (int_to_apicintpin[intr].ioapic >= 0) {
452 select = int_to_apicintpin[intr].redirindex;
453 value = io_apic_read(int_to_apicintpin[intr].ioapic,
454 select) & ~IOART_INTVEC;
455 io_apic_write(int_to_apicintpin[intr].ioapic,
456 select, value | vector);
459 setidt(ICU_OFFSET + intr,
460 flags & INTR_FAST ? fastintr[intr] : slowintr[intr],
461 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
470 icu_unset(intr, handler)
476 if ((u_int)intr >= ICU_LEN || handler != intr_handler[intr])
482 intr_countp[intr] = &intrcnt[1 + intr];
483 intr_handler[intr] = isa_strayintr;
484 intr_mptr[intr] = NULL;
485 intr_mask[intr] = HWI_MASK | SWI_MASK;
486 intr_unit[intr] = &intr_unit[intr];
488 /* XXX how do I re-create dvp here? */
489 setidt(flags & INTR_FAST ? TPR_FAST_INTS + intr : TPR_SLOW_INTS + intr,
490 slowintr[intr], SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
492 #ifdef APIC_INTR_REORDER
493 set_lapic_isrloc(intr, ICU_OFFSET + intr);
495 setidt(ICU_OFFSET + intr, slowintr[intr], SDT_SYS386IGT, SEL_KPL,
496 GSEL(GCODE_SEL, SEL_KPL));
503 /* The following notice applies beyond this point in the file */
506 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
507 * All rights reserved.
509 * Redistribution and use in source and binary forms, with or without
510 * modification, are permitted provided that the following conditions
512 * 1. Redistributions of source code must retain the above copyright
513 * notice unmodified, this list of conditions, and the following
515 * 2. Redistributions in binary form must reproduce the above copyright
516 * notice, this list of conditions and the following disclaimer in the
517 * documentation and/or other materials provided with the distribution.
519 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
520 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
521 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
522 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
523 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
524 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
525 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
526 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
527 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
528 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
534 typedef struct intrec {
545 static intrec *intreclist_head[ICU_LEN];
547 typedef struct isarec {
549 ointhand2_t *id_handler;
552 static isarec *isareclist[ICU_LEN];
555 * The interrupt multiplexer calls each of the handlers in turn. The
556 * ipl is initially quite low. It is raised as necessary for each call
557 * and lowered after the call. Thus out of order handling is possible
558 * even for interrupts of the same type. This is probably no more
559 * harmful than out of order handling in general (not harmful except
560 * for real time response which we don't support anyway).
568 for (p = arg; p != NULL; p = p->next) {
569 oldspl = splq(p->mask);
570 p->handler(p->argument);
576 isa_intr_wrap(void *cookie)
578 isarec *irec = (isarec *)cookie;
580 irec->id_handler(irec->id_unit);
584 find_idesc(unsigned *maskptr, int irq)
586 intrec *p = intreclist_head[irq];
588 while (p && p->maskptr != maskptr)
595 find_pred(intrec *idesc, int irq)
597 intrec **pp = &intreclist_head[irq];
610 * Both the low level handler and the shared interrupt multiplexer
611 * block out further interrupts as set in the handlers "mask", while
612 * the handler is running. In fact *maskptr should be used for this
613 * purpose, but since this requires one more pointer dereference on
614 * each interrupt, we rather bother update "mask" whenever *maskptr
615 * changes. The function "update_masks" should be called **after**
616 * all manipulation of the linked list of interrupt handlers hung
617 * off of intrdec_head[irq] is complete, since the chain of handlers
618 * will both determine the *maskptr values and the instances of mask
619 * that are fixed. This function should be called with the irq for
620 * which a new handler has been add blocked, since the masks may not
621 * yet know about the use of this irq for a device of a certain class.
625 update_mux_masks(void)
628 for (irq = 0; irq < ICU_LEN; irq++) {
629 intrec *idesc = intreclist_head[irq];
630 while (idesc != NULL) {
631 if (idesc->maskptr != NULL) {
632 /* our copy of *maskptr may be stale, refresh */
633 idesc->mask = *idesc->maskptr;
641 update_masks(intrmask_t *maskptr, int irq)
643 intrmask_t mask = 1 << irq;
648 if (find_idesc(maskptr, irq) == NULL) {
649 /* no reference to this maskptr was found in this irq's chain */
650 if ((*maskptr & mask) == 0)
652 /* the irq was included in the classes mask, remove it */
653 INTRUNMASK(*maskptr, mask);
655 /* a reference to this maskptr was found in this irq's chain */
656 if ((*maskptr & mask) != 0)
658 /* put the irq into the classes mask */
659 INTRMASK(*maskptr, mask);
661 /* we need to update all values in the intr_mask[irq] array */
663 /* update mask in chains of the interrupt multiplex handler as well */
668 * Add interrupt handler to linked list hung off of intreclist_head[irq]
669 * and install shared interrupt multiplex handler, if necessary
673 add_intrdesc(intrec *idesc)
675 int irq = idesc->intr;
677 intrec *head = intreclist_head[irq];
680 /* first handler for this irq, just install it */
681 if (icu_setup(irq, idesc->handler, idesc->argument,
682 idesc->maskptr, idesc->flags) != 0)
685 update_intrname(irq, idesc->name);
687 intreclist_head[irq] = idesc;
689 if ((idesc->flags & INTR_EXCL) != 0
690 || (head->flags & INTR_EXCL) != 0) {
692 * can't append new handler, if either list head or
693 * new handler do not allow interrupts to be shared
696 printf("\tdevice combination doesn't support "
697 "shared irq%d\n", irq);
700 if (head->next == NULL) {
702 * second handler for this irq, replace device driver's
703 * handler by shared interrupt multiplexer function
705 icu_unset(irq, head->handler);
706 if (icu_setup(irq, intr_mux, head, 0, 0) != 0)
709 printf("\tusing shared irq%d.\n", irq);
710 update_intrname(irq, "mux");
712 /* just append to the end of the chain */
713 while (head->next != NULL)
717 update_masks(idesc->maskptr, irq);
722 * Create and activate an interrupt handler descriptor data structure.
724 * The dev_instance pointer is required for resource management, and will
725 * only be passed through to resource_claim().
727 * There will be functions that derive a driver and unit name from a
728 * dev_instance variable, and those functions will be used to maintain the
729 * interrupt counter label array referenced by systat and vmstat to report
730 * device interrupt rates (->update_intrlabels).
732 * Add the interrupt handler descriptor data structure created by an
733 * earlier call of create_intr() to the linked list for its irq and
734 * adjust the interrupt masks if necessary.
738 inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
739 intrmask_t *maskptr, int flags)
745 if (ICU_LEN > 8 * sizeof *maskptr) {
746 printf("create_intr: ICU_LEN of %d too high for %d bit intrmask\n",
747 ICU_LEN, 8 * sizeof *maskptr);
750 if ((unsigned)irq >= ICU_LEN) {
751 printf("create_intr: requested irq%d too high, limit is %d\n",
756 idesc = malloc(sizeof *idesc, M_DEVBUF, M_WAITOK);
759 bzero(idesc, sizeof *idesc);
763 idesc->name = malloc(strlen(name) + 1, M_DEVBUF, M_WAITOK);
764 if (idesc->name == NULL) {
765 free(idesc, M_DEVBUF);
768 strcpy(idesc->name, name);
770 idesc->handler = handler;
771 idesc->argument = arg;
772 idesc->maskptr = maskptr;
774 idesc->flags = flags;
777 oldspl = splq(1 << irq);
779 /* add irq to class selected by maskptr */
780 errcode = add_intrdesc(idesc);
785 printf("\tintr_connect(irq%d) failed, result=%d\n",
787 free(idesc->name, M_DEVBUF);
788 free(idesc, M_DEVBUF);
796 * Deactivate and remove the interrupt handler descriptor data connected
797 * created by an earlier call of intr_connect() from the linked list and
798 * adjust theinterrupt masks if necessary.
800 * Return the memory held by the interrupt handler descriptor data structure
801 * to the system. Make sure, the handler is not actively used anymore, before.
805 inthand_remove(intrec *idesc)
807 intrec **hook, *head;
817 /* find pointer that keeps the reference to this interrupt descriptor */
818 hook = find_pred(idesc, irq);
822 /* make copy of original list head, the line after may overwrite it */
823 head = intreclist_head[irq];
825 /* unlink: make predecessor point to idesc->next instead of to idesc */
828 /* now check whether the element we removed was the list head */
831 oldspl = splq(1 << irq);
833 /* check whether the new list head is the only element on list */
834 head = intreclist_head[irq];
836 icu_unset(irq, intr_mux);
837 if (head->next != NULL) {
838 /* install the multiplex handler with new list head as argument */
839 errcode = icu_setup(irq, intr_mux, head, 0, 0);
841 update_intrname(irq, NULL);
843 /* install the one remaining handler for this irq */
844 errcode = icu_setup(irq, head->handler,
846 head->maskptr, head->flags);
848 update_intrname(irq, head->name);
851 /* revert to old handler, eg: strayintr */
852 icu_unset(irq, idesc->handler);
856 update_masks(idesc->maskptr, irq);
857 free(idesc, M_DEVBUF);
862 * Emulate the register_intr() call previously defined as low level function.
863 * That function (now icu_setup()) may no longer be directly called, since
864 * a conflict between an ISA and PCI interrupt might go by unnocticed, else.
868 register_intr(int intr, int device_id, u_int flags,
869 ointhand2_t handler, u_int *maskptr, int unit)
874 irec = malloc(sizeof *irec, M_DEVBUF, M_WAITOK);
877 bzero(irec, sizeof *irec);
878 irec->id_unit = unit;
879 irec->id_handler = handler;
882 idesc = inthand_add("old", intr, isa_intr_wrap, irec, maskptr, flags);
884 free(irec, M_DEVBUF);
887 isareclist[intr] = irec;
892 * Emulate the old unregister_intr() low level function.
893 * Make sure there is just one interrupt, that it was
894 * registered as non-shared, and that the handlers match.
898 unregister_intr(int intr, ointhand2_t handler)
900 intrec *p = intreclist_head[intr];
902 if (p != NULL && (p->flags & INTR_EXCL) != 0 &&
903 p->handler == isa_intr_wrap && isareclist[intr] != NULL &&
904 isareclist[intr]->id_handler == handler) {
905 free(isareclist[intr], M_DEVBUF);
906 isareclist[intr] = NULL;
907 return (inthand_remove(p));