2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * Since the information managed by this module is
84 * also stored by the logical address mapping module,
85 * this module may throw away valid virtual-to-physical
86 * mappings at almost any time. However, invalidations
87 * of virtual-to-physical mappings must be done as
90 * In order to cope with hardware architectures which
91 * make virtual-to-physical map invalidates expensive,
92 * this module may delay invalidate or reduced protection
93 * operations until such time as they are actually
94 * necessary. This module is given full information as
95 * to which processors are currently using which maps,
96 * and to when physical maps must be made correct.
100 #include "opt_pmap.h"
102 #include "opt_xbox.h"
104 #include <sys/param.h>
105 #include <sys/systm.h>
106 #include <sys/kernel.h>
108 #include <sys/lock.h>
109 #include <sys/malloc.h>
110 #include <sys/mman.h>
111 #include <sys/msgbuf.h>
112 #include <sys/mutex.h>
113 #include <sys/proc.h>
114 #include <sys/rwlock.h>
115 #include <sys/sf_buf.h>
117 #include <sys/vmmeter.h>
118 #include <sys/sched.h>
119 #include <sys/sysctl.h>
123 #include <sys/cpuset.h>
127 #include <vm/vm_param.h>
128 #include <vm/vm_kern.h>
129 #include <vm/vm_page.h>
130 #include <vm/vm_map.h>
131 #include <vm/vm_object.h>
132 #include <vm/vm_extern.h>
133 #include <vm/vm_pageout.h>
134 #include <vm/vm_pager.h>
137 #include <machine/cpu.h>
138 #include <machine/cputypes.h>
139 #include <machine/md_var.h>
140 #include <machine/pcb.h>
141 #include <machine/specialreg.h>
143 #include <machine/smp.h>
147 #include <machine/xbox.h>
150 #include <xen/interface/xen.h>
151 #include <xen/hypervisor.h>
152 #include <machine/xen/hypercall.h>
153 #include <machine/xen/xenvar.h>
154 #include <machine/xen/xenfunc.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
166 #if !defined(DIAGNOSTIC)
167 #ifdef __GNUC_GNU_INLINE__
168 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
170 #define PMAP_INLINE extern inline
177 #define PV_STAT(x) do { x ; } while (0)
179 #define PV_STAT(x) do { } while (0)
183 * Get PDEs and PTEs for user/kernel address space
185 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
186 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
188 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
189 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
190 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
191 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
192 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
194 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
196 #define HAMFISTED_LOCKING
197 #ifdef HAMFISTED_LOCKING
198 static struct mtx createdelete_lock;
201 struct pmap kernel_pmap_store;
202 LIST_HEAD(pmaplist, pmap);
203 static struct pmaplist allpmaps;
204 static struct mtx allpmaps_lock;
206 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
207 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
208 int pgeflag = 0; /* PG_G or-in */
209 int pseflag = 0; /* PG_PS or-in */
212 vm_offset_t kernel_vm_end;
213 extern u_int32_t KERNend;
219 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
221 static int pat_works; /* Is page attribute table sane? */
224 * This lock is defined as static in other pmap implementations. It cannot,
225 * however, be defined as static here, because it is (ab)used to serialize
226 * queued page table changes in other sources files.
228 struct rwlock pvh_global_lock;
231 * Data for the pv entry allocation mechanism
233 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
234 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
235 static int shpgperproc = PMAP_SHPGPERPROC;
237 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
238 int pv_maxchunks; /* How many chunks we have KVA for */
239 vm_offset_t pv_vafree; /* freelist stored in the PTE */
242 * All those kernel PT submaps that BSD is so fond of
251 static struct sysmaps sysmaps_pcpu[MAXCPU];
255 struct msgbuf *msgbufp = 0;
260 static caddr_t crashdumpmap;
262 static pt_entry_t *PMAP1 = 0, *PMAP2;
263 static pt_entry_t *PADDR1 = 0, *PADDR2;
266 static int PMAP1changedcpu;
267 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
269 "Number of times pmap_pte_quick changed CPU with same PMAP1");
271 static int PMAP1changed;
272 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
274 "Number of times pmap_pte_quick changed PMAP1");
275 static int PMAP1unchanged;
276 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
278 "Number of times pmap_pte_quick didn't change PMAP1");
279 static struct mtx PMAP2mutex;
281 static void free_pv_chunk(struct pv_chunk *pc);
282 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
283 static pv_entry_t get_pv_entry(pmap_t pmap, boolean_t try);
284 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
285 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
288 static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va,
289 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
290 static void pmap_flush_page(vm_page_t m);
291 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
292 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
294 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
296 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
298 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
303 static vm_page_t _pmap_allocpte(pmap_t pmap, u_int ptepindex, int flags);
304 static void _pmap_unwire_ptp(pmap_t pmap, vm_page_t m, vm_page_t *free);
305 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
306 static void pmap_pte_release(pt_entry_t *pte);
307 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
308 static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr);
310 static __inline void pagezero(void *page);
312 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
313 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
316 * If you get an error here, then you set KVA_PAGES wrong! See the
317 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
318 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
320 CTASSERT(KERNBASE % (1 << 24) == 0);
323 pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type)
325 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]);
330 xen_queue_pt_update(shadow_pdir_ma,
331 xpmap_ptom(val & ~(PG_RW)));
333 xen_queue_pt_update(pdir_ma,
336 case SH_PD_SET_VA_MA:
338 xen_queue_pt_update(shadow_pdir_ma,
341 xen_queue_pt_update(pdir_ma, val);
343 case SH_PD_SET_VA_CLEAR:
345 xen_queue_pt_update(shadow_pdir_ma, 0);
347 xen_queue_pt_update(pdir_ma, 0);
353 * Bootstrap the system enough to run with virtual memory.
355 * On the i386 this is called after mapping has already been enabled
356 * and just syncs the pmap module with what has already been done.
357 * [We can't call it easily with mapping off since the kernel is not
358 * mapped with PA == VA, hence we would have to relocate every address
359 * from the linked base (virtual) address "KERNBASE" to the actual
360 * (physical) address starting relative to 0]
363 pmap_bootstrap(vm_paddr_t firstaddr)
366 pt_entry_t *pte, *unused;
367 struct sysmaps *sysmaps;
371 * Initialize the first available kernel virtual address. However,
372 * using "firstaddr" may waste a few pages of the kernel virtual
373 * address space, because locore may not have mapped every physical
374 * page that it allocated. Preferably, locore would provide a first
375 * unused virtual address in addition to "firstaddr".
377 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
379 virtual_end = VM_MAX_KERNEL_ADDRESS;
382 * Initialize the kernel pmap (which is statically allocated).
384 PMAP_LOCK_INIT(kernel_pmap);
385 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
387 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
389 CPU_FILL(&kernel_pmap->pm_active); /* don't allow deactivation */
390 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
393 * Initialize the global pv list lock.
395 rw_init_flags(&pvh_global_lock, "pmap pv global", RW_RECURSE);
397 LIST_INIT(&allpmaps);
398 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
399 mtx_lock_spin(&allpmaps_lock);
400 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
401 mtx_unlock_spin(&allpmaps_lock);
406 * Reserve some special page table entries/VA space for temporary
409 #define SYSMAP(c, p, v, n) \
410 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
416 * CMAP1/CMAP2 are used for zeroing and copying pages.
417 * CMAP3 is used for the idle process page zeroing.
419 for (i = 0; i < MAXCPU; i++) {
420 sysmaps = &sysmaps_pcpu[i];
421 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
422 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
423 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
424 PT_SET_MA(sysmaps->CADDR1, 0);
425 PT_SET_MA(sysmaps->CADDR2, 0);
427 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
428 PT_SET_MA(CADDR3, 0);
433 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
436 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
438 SYSMAP(caddr_t, unused, ptvmmap, 1)
441 * msgbufp is used to map the system message buffer.
443 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(msgbufsize)))
446 * PADDR1 and PADDR2 are used by pmap_pte_quick() and pmap_pte(),
449 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1)
450 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1)
452 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
457 * Leave in place an identity mapping (virt == phys) for the low 1 MB
458 * physical memory region that is used by the ACPI wakeup code. This
459 * mapping must not have PG_G set.
463 * leave here deliberately to show that this is not supported
466 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
467 * an early stadium, we cannot yet neatly map video memory ... :-(
468 * Better fixes are very welcome! */
469 if (!arch_i386_is_xbox)
471 for (i = 1; i < NKPT; i++)
474 /* Initialize the PAT MSR if present. */
477 /* Turn on PG_G on kernel page(s) */
481 #ifdef HAMFISTED_LOCKING
482 mtx_init(&createdelete_lock, "pmap create/delete", NULL, MTX_DEF);
494 /* Bail if this CPU doesn't implement PAT. */
495 if (!(cpu_feature & CPUID_PAT))
498 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
499 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) {
501 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
502 * Program 4 and 5 as WP and WC.
503 * Leave 6 and 7 as UC and UC-.
505 pat_msr = rdmsr(MSR_PAT);
506 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
507 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
508 PAT_VALUE(5, PAT_WRITE_COMBINING);
512 * Due to some Intel errata, we can only safely use the lower 4
513 * PAT entries. Thus, just replace PAT Index 2 with WC instead
516 * Intel Pentium III Processor Specification Update
517 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
520 * Intel Pentium IV Processor Specification Update
521 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
523 pat_msr = rdmsr(MSR_PAT);
524 pat_msr &= ~PAT_MASK(2);
525 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
528 wrmsr(MSR_PAT, pat_msr);
532 * Initialize a vm_page's machine-dependent fields.
535 pmap_page_init(vm_page_t m)
538 TAILQ_INIT(&m->md.pv_list);
539 m->md.pat_mode = PAT_WRITE_BACK;
543 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
545 * - Must deal with pages in order to ensure that none of the PG_* bits
546 * are ever set, PG_V in particular.
547 * - Assumes we can write to ptes without pte_store() atomic ops, even
548 * on PAE systems. This should be ok.
549 * - Assumes nothing will ever test these addresses for 0 to indicate
550 * no mapping instead of correctly checking PG_V.
551 * - Assumes a vm_offset_t will fit in a pte (true for i386).
552 * Because PG_V is never set, there can be no mappings to invalidate.
554 static int ptelist_count = 0;
556 pmap_ptelist_alloc(vm_offset_t *head)
559 vm_offset_t *phead = (vm_offset_t *)*head;
561 if (ptelist_count == 0) {
562 printf("out of memory!!!!!!\n");
563 return (0); /* Out of memory */
566 va = phead[ptelist_count];
571 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
573 vm_offset_t *phead = (vm_offset_t *)*head;
575 phead[ptelist_count++] = va;
579 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
585 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t));
586 for (i = 0; i < nstackpages; i++) {
587 va = (vm_offset_t)base + i * PAGE_SIZE;
588 m = vm_page_alloc(NULL, i,
589 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
591 pmap_qenter(va, &m, 1);
594 *head = (vm_offset_t)base;
595 for (i = npages - 1; i >= nstackpages; i--) {
596 va = (vm_offset_t)base + i * PAGE_SIZE;
597 pmap_ptelist_free(head, va);
603 * Initialize the pmap module.
604 * Called by vm_init, to initialize any structures that the pmap
605 * system needs to map virtual memory.
612 * Initialize the address space (zone) for the pv entries. Set a
613 * high water mark so that the system can recover from excessive
614 * numbers of pv entries.
616 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
617 pv_entry_max = shpgperproc * maxproc + vm_cnt.v_page_count;
618 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
619 pv_entry_max = roundup(pv_entry_max, _NPCPV);
620 pv_entry_high_water = 9 * (pv_entry_max / 10);
622 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
623 pv_chunkbase = (struct pv_chunk *)kva_alloc(PAGE_SIZE * pv_maxchunks);
624 if (pv_chunkbase == NULL)
625 panic("pmap_init: not enough kvm for pv chunks");
626 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
630 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
631 "Max number of PV entries");
632 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
633 "Page share factor per proc");
635 static SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
636 "2/4MB page mapping counters");
638 static u_long pmap_pde_mappings;
639 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
640 &pmap_pde_mappings, 0, "2/4MB page mappings");
642 /***************************************************
643 * Low level helper routines.....
644 ***************************************************/
647 * Determine the appropriate bits to set in a PTE or PDE for a specified
651 pmap_cache_bits(int mode, boolean_t is_pde)
653 int pat_flag, pat_index, cache_bits;
655 /* The PAT bit is different for PTE's and PDE's. */
656 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
658 /* If we don't support PAT, map extended modes to older ones. */
659 if (!(cpu_feature & CPUID_PAT)) {
661 case PAT_UNCACHEABLE:
662 case PAT_WRITE_THROUGH:
666 case PAT_WRITE_COMBINING:
667 case PAT_WRITE_PROTECTED:
668 mode = PAT_UNCACHEABLE;
673 /* Map the caching mode to a PAT index. */
676 case PAT_UNCACHEABLE:
679 case PAT_WRITE_THROUGH:
688 case PAT_WRITE_COMBINING:
691 case PAT_WRITE_PROTECTED:
695 panic("Unknown caching mode %d\n", mode);
700 case PAT_UNCACHEABLE:
701 case PAT_WRITE_PROTECTED:
704 case PAT_WRITE_THROUGH:
710 case PAT_WRITE_COMBINING:
714 panic("Unknown caching mode %d\n", mode);
718 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
721 cache_bits |= pat_flag;
723 cache_bits |= PG_NC_PCD;
725 cache_bits |= PG_NC_PWT;
730 * For SMP, these functions have to use the IPI mechanism for coherence.
732 * N.B.: Before calling any of the following TLB invalidation functions,
733 * the calling processor must ensure that all stores updating a non-
734 * kernel page table are globally performed. Otherwise, another
735 * processor could cache an old, pre-update entry without being
736 * invalidated. This can happen one of two ways: (1) The pmap becomes
737 * active on another processor after its pm_active field is checked by
738 * one of the following functions but before a store updating the page
739 * table is globally performed. (2) The pmap becomes active on another
740 * processor before its pm_active field is checked but due to
741 * speculative loads one of the following functions stills reads the
742 * pmap as inactive on the other processor.
744 * The kernel page table is exempt because its pm_active field is
745 * immutable. The kernel page table is always active on every
749 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
754 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
758 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
762 cpuid = PCPU_GET(cpuid);
763 other_cpus = all_cpus;
764 CPU_CLR(cpuid, &other_cpus);
765 if (CPU_ISSET(cpuid, &pmap->pm_active))
767 CPU_AND(&other_cpus, &pmap->pm_active);
768 if (!CPU_EMPTY(&other_cpus))
769 smp_masked_invlpg(other_cpus, va);
776 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
782 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x",
786 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
787 for (addr = sva; addr < eva; addr += PAGE_SIZE)
789 smp_invlpg_range(sva, eva);
791 cpuid = PCPU_GET(cpuid);
792 other_cpus = all_cpus;
793 CPU_CLR(cpuid, &other_cpus);
794 if (CPU_ISSET(cpuid, &pmap->pm_active))
795 for (addr = sva; addr < eva; addr += PAGE_SIZE)
797 CPU_AND(&other_cpus, &pmap->pm_active);
798 if (!CPU_EMPTY(&other_cpus))
799 smp_masked_invlpg_range(other_cpus, sva, eva);
806 pmap_invalidate_all(pmap_t pmap)
811 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap);
814 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
818 cpuid = PCPU_GET(cpuid);
819 other_cpus = all_cpus;
820 CPU_CLR(cpuid, &other_cpus);
821 if (CPU_ISSET(cpuid, &pmap->pm_active))
823 CPU_AND(&other_cpus, &pmap->pm_active);
824 if (!CPU_EMPTY(&other_cpus))
825 smp_masked_invltlb(other_cpus);
831 pmap_invalidate_cache(void)
841 * Normal, non-SMP, 486+ invalidation functions.
842 * We inline these within pmap.c for speed.
845 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
847 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
850 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
856 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
860 if (eva - sva > PAGE_SIZE)
861 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x",
864 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
865 for (addr = sva; addr < eva; addr += PAGE_SIZE)
871 pmap_invalidate_all(pmap_t pmap)
874 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap);
876 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
881 pmap_invalidate_cache(void)
888 #define PMAP_CLFLUSH_THRESHOLD (2 * 1024 * 1024)
891 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
894 KASSERT((sva & PAGE_MASK) == 0,
895 ("pmap_invalidate_cache_range: sva not page-aligned"));
896 KASSERT((eva & PAGE_MASK) == 0,
897 ("pmap_invalidate_cache_range: eva not page-aligned"));
899 if (cpu_feature & CPUID_SS)
900 ; /* If "Self Snoop" is supported, do nothing. */
901 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
902 eva - sva < PMAP_CLFLUSH_THRESHOLD) {
905 * Otherwise, do per-cache line flush. Use the mfence
906 * instruction to insure that previous stores are
907 * included in the write-back. The processor
908 * propagates flush to other processors in the cache
912 for (; sva < eva; sva += cpu_clflush_line_size)
918 * No targeted cache flush methods are supported by CPU,
919 * or the supplied range is bigger than 2MB.
920 * Globally invalidate cache.
922 pmap_invalidate_cache();
927 pmap_invalidate_cache_pages(vm_page_t *pages, int count)
931 if (count >= PMAP_CLFLUSH_THRESHOLD / PAGE_SIZE ||
932 (cpu_feature & CPUID_CLFSH) == 0) {
933 pmap_invalidate_cache();
935 for (i = 0; i < count; i++)
936 pmap_flush_page(pages[i]);
941 * Are we current address space or kernel? N.B. We return FALSE when
942 * a pmap's page table is in use because a kernel thread is borrowing
943 * it. The borrowed page table can change spontaneously, making any
944 * dependence on its continued use subject to a race condition.
947 pmap_is_current(pmap_t pmap)
950 return (pmap == kernel_pmap ||
951 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
952 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
956 * If the given pmap is not the current or kernel pmap, the returned pte must
957 * be released by passing it to pmap_pte_release().
960 pmap_pte(pmap_t pmap, vm_offset_t va)
965 pde = pmap_pde(pmap, va);
969 /* are we current address space or kernel? */
970 if (pmap_is_current(pmap))
972 mtx_lock(&PMAP2mutex);
973 newpf = *pde & PG_FRAME;
974 if ((*PMAP2 & PG_FRAME) != newpf) {
975 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M);
976 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x",
977 pmap, va, (*PMAP2 & 0xffffffff));
979 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
985 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
989 pmap_pte_release(pt_entry_t *pte)
992 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) {
993 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx",
995 rw_wlock(&pvh_global_lock);
996 PT_SET_VA(PMAP2, 0, TRUE);
997 rw_wunlock(&pvh_global_lock);
998 mtx_unlock(&PMAP2mutex);
1002 static __inline void
1003 invlcaddr(void *caddr)
1006 invlpg((u_int)caddr);
1011 * Super fast pmap_pte routine best used when scanning
1012 * the pv lists. This eliminates many coarse-grained
1013 * invltlb calls. Note that many of the pv list
1014 * scans are across different pmaps. It is very wasteful
1015 * to do an entire invltlb for checking a single mapping.
1017 * If the given pmap is not the current pmap, pvh_global_lock
1018 * must be held and curthread pinned to a CPU.
1021 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1026 pde = pmap_pde(pmap, va);
1030 /* are we current address space or kernel? */
1031 if (pmap_is_current(pmap))
1032 return (vtopte(va));
1033 rw_assert(&pvh_global_lock, RA_WLOCKED);
1034 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1035 newpf = *pde & PG_FRAME;
1036 if ((*PMAP1 & PG_FRAME) != newpf) {
1037 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M);
1038 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x",
1039 pmap, va, (u_long)*PMAP1);
1042 PMAP1cpu = PCPU_GET(cpuid);
1047 if (PMAP1cpu != PCPU_GET(cpuid)) {
1048 PMAP1cpu = PCPU_GET(cpuid);
1054 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1060 * Routine: pmap_extract
1062 * Extract the physical page address associated
1063 * with the given map/virtual_address pair.
1066 pmap_extract(pmap_t pmap, vm_offset_t va)
1075 pde = pmap->pm_pdir[va >> PDRSHIFT];
1077 if ((pde & PG_PS) != 0) {
1078 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK);
1082 pte = pmap_pte(pmap, va);
1083 pteval = *pte ? xpmap_mtop(*pte) : 0;
1084 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK);
1085 pmap_pte_release(pte);
1092 * Routine: pmap_extract_ma
1094 * Like pmap_extract, but returns machine address
1097 pmap_extract_ma(pmap_t pmap, vm_offset_t va)
1105 pde = pmap->pm_pdir[va >> PDRSHIFT];
1107 if ((pde & PG_PS) != 0) {
1108 rtval = (pde & ~PDRMASK) | (va & PDRMASK);
1112 pte = pmap_pte(pmap, va);
1113 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1114 pmap_pte_release(pte);
1121 * Routine: pmap_extract_and_hold
1123 * Atomically extract and hold the physical page
1124 * with the given pmap and virtual address pair
1125 * if that mapping permits the given protection.
1128 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1131 pt_entry_t pte, *ptep;
1139 pde = PT_GET(pmap_pde(pmap, va));
1142 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1143 if (vm_page_pa_tryrelock(pmap, (pde &
1144 PG_PS_FRAME) | (va & PDRMASK), &pa))
1146 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1151 ptep = pmap_pte(pmap, va);
1153 pmap_pte_release(ptep);
1155 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1156 if (vm_page_pa_tryrelock(pmap, pte & PG_FRAME,
1159 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1169 /***************************************************
1170 * Low level mapping routines.....
1171 ***************************************************/
1174 * Add a wired page to the kva.
1175 * Note: not SMP coherent.
1177 * This function may be used before pmap_bootstrap() is called.
1180 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1183 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag);
1187 pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma)
1192 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag);
1195 static __inline void
1196 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1199 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1203 * Remove a page from the kernel pagetables.
1204 * Note: not SMP coherent.
1206 * This function may be used before pmap_bootstrap() is called.
1209 pmap_kremove(vm_offset_t va)
1214 PT_CLEAR_VA(pte, FALSE);
1218 * Used to map a range of physical addresses into kernel
1219 * virtual address space.
1221 * The value passed in '*virt' is a suggested virtual address for
1222 * the mapping. Architectures which can support a direct-mapped
1223 * physical to virtual region can return the appropriate address
1224 * within that region, leaving '*virt' unchanged. Other
1225 * architectures should map the pages starting at '*virt' and
1226 * update '*virt' with the first usable address after the mapped
1230 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1232 vm_offset_t va, sva;
1235 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x",
1236 va, start, end, prot);
1237 while (start < end) {
1238 pmap_kenter(va, start);
1242 pmap_invalidate_range(kernel_pmap, sva, va);
1249 * Add a list of wired pages to the kva
1250 * this routine is only used for temporary
1251 * kernel mappings that do not need to have
1252 * page modification or references recorded.
1253 * Note that old mappings are simply written
1254 * over. The page *must* be wired.
1255 * Note: SMP coherent. Uses a ranged shootdown IPI.
1258 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1260 pt_entry_t *endpte, *pte;
1262 vm_offset_t va = sva;
1264 multicall_entry_t mcl[16];
1265 multicall_entry_t *mclp = mcl;
1268 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count);
1270 endpte = pte + count;
1271 while (pte < endpte) {
1272 pa = VM_PAGE_TO_MACH(*ma) | pgeflag | PG_RW | PG_V | PG_M | PG_A;
1274 mclp->op = __HYPERVISOR_update_va_mapping;
1276 mclp->args[1] = (uint32_t)(pa & 0xffffffff);
1277 mclp->args[2] = (uint32_t)(pa >> 32);
1278 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0;
1285 if (mclcount == 16) {
1286 error = HYPERVISOR_multicall(mcl, mclcount);
1289 KASSERT(error == 0, ("bad multicall %d", error));
1293 error = HYPERVISOR_multicall(mcl, mclcount);
1294 KASSERT(error == 0, ("bad multicall %d", error));
1298 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++)
1299 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE));
1304 * This routine tears out page mappings from the
1305 * kernel -- it is meant only for temporary mappings.
1306 * Note: SMP coherent. Uses a ranged shootdown IPI.
1309 pmap_qremove(vm_offset_t sva, int count)
1313 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count);
1315 rw_wlock(&pvh_global_lock);
1317 while (count-- > 0) {
1322 pmap_invalidate_range(kernel_pmap, sva, va);
1324 rw_wunlock(&pvh_global_lock);
1327 /***************************************************
1328 * Page table page management routines.....
1329 ***************************************************/
1330 static __inline void
1331 pmap_free_zero_pages(vm_page_t free)
1335 while (free != NULL) {
1337 free = (void *)m->object;
1339 vm_page_free_zero(m);
1344 * Decrements a page table page's wire count, which is used to record the
1345 * number of valid page table entries within the page. If the wire count
1346 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1347 * page table page was unmapped and FALSE otherwise.
1349 static inline boolean_t
1350 pmap_unwire_ptp(pmap_t pmap, vm_page_t m, vm_page_t *free)
1354 if (m->wire_count == 0) {
1355 _pmap_unwire_ptp(pmap, m, free);
1362 _pmap_unwire_ptp(pmap_t pmap, vm_page_t m, vm_page_t *free)
1368 * unmap the page table page
1370 xen_pt_unpin(pmap->pm_pdir[m->pindex]);
1372 * page *might* contain residual mapping :-/
1374 PD_CLEAR_VA(pmap, m->pindex, TRUE);
1376 --pmap->pm_stats.resident_count;
1379 * This is a release store so that the ordinary store unmapping
1380 * the page table page is globally performed before TLB shoot-
1383 atomic_subtract_rel_int(&vm_cnt.v_wire_count, 1);
1386 * Do an invltlb to make the invalidated mapping
1387 * take effect immediately.
1389 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1390 pmap_invalidate_page(pmap, pteva);
1393 * Put page on a list so that it is released after
1394 * *ALL* TLB shootdown is done
1396 m->object = (void *)*free;
1401 * After removing a page table entry, this routine is used to
1402 * conditionally free the page, and manage the hold/wire counts.
1405 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1410 if (va >= VM_MAXUSER_ADDRESS)
1412 ptepde = PT_GET(pmap_pde(pmap, va));
1413 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1414 return (pmap_unwire_ptp(pmap, mpte, free));
1418 * Initialize the pmap for the swapper process.
1421 pmap_pinit0(pmap_t pmap)
1424 PMAP_LOCK_INIT(pmap);
1426 * Since the page table directory is shared with the kernel pmap,
1427 * which is already included in the list "allpmaps", this pmap does
1428 * not need to be inserted into that list.
1430 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1432 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1434 CPU_ZERO(&pmap->pm_active);
1435 PCPU_SET(curpmap, pmap);
1436 TAILQ_INIT(&pmap->pm_pvchunk);
1437 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1441 * Initialize a preallocated and zeroed pmap structure,
1442 * such as one in a vmspace structure.
1445 pmap_pinit(pmap_t pmap)
1447 vm_page_t m, ptdpg[NPGPTD + 1];
1448 int npgptd = NPGPTD + 1;
1451 #ifdef HAMFISTED_LOCKING
1452 mtx_lock(&createdelete_lock);
1456 * No need to allocate page table space yet but we do need a valid
1457 * page directory table.
1459 if (pmap->pm_pdir == NULL) {
1460 pmap->pm_pdir = (pd_entry_t *)kva_alloc(NBPTD);
1461 if (pmap->pm_pdir == NULL) {
1462 PMAP_LOCK_DESTROY(pmap);
1463 #ifdef HAMFISTED_LOCKING
1464 mtx_unlock(&createdelete_lock);
1469 pmap->pm_pdpt = (pd_entry_t *)kva_alloc(1);
1474 * allocate the page directory page(s)
1476 for (i = 0; i < npgptd;) {
1477 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1478 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1486 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1488 for (i = 0; i < NPGPTD; i++)
1489 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1490 pagezero(pmap->pm_pdir + (i * NPDEPG));
1492 mtx_lock_spin(&allpmaps_lock);
1493 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1494 /* Copy the kernel page table directory entries. */
1495 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1496 mtx_unlock_spin(&allpmaps_lock);
1499 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1);
1500 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0)
1501 bzero(pmap->pm_pdpt, PAGE_SIZE);
1502 for (i = 0; i < NPGPTD; i++) {
1505 ma = VM_PAGE_TO_MACH(ptdpg[i]);
1506 pmap->pm_pdpt[i] = ma | PG_V;
1510 for (i = 0; i < NPGPTD; i++) {
1514 ma = VM_PAGE_TO_MACH(ptdpg[i]);
1515 pd = pmap->pm_pdir + (i * NPDEPG);
1516 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW));
1523 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW);
1525 rw_wlock(&pvh_global_lock);
1527 xen_pgdpt_pin(VM_PAGE_TO_MACH(ptdpg[NPGPTD]));
1528 for (i = 0; i < NPGPTD; i++) {
1529 vm_paddr_t ma = VM_PAGE_TO_MACH(ptdpg[i]);
1530 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE);
1533 rw_wunlock(&pvh_global_lock);
1534 CPU_ZERO(&pmap->pm_active);
1535 TAILQ_INIT(&pmap->pm_pvchunk);
1536 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1538 #ifdef HAMFISTED_LOCKING
1539 mtx_unlock(&createdelete_lock);
1545 * this routine is called if the page table page is not
1549 _pmap_allocpte(pmap_t pmap, u_int ptepindex, int flags)
1554 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1555 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1556 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1559 * Allocate a page table page.
1561 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1562 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1563 if (flags & M_WAITOK) {
1565 rw_wunlock(&pvh_global_lock);
1567 rw_wlock(&pvh_global_lock);
1572 * Indicate the need to retry. While waiting, the page table
1573 * page may have been allocated.
1577 if ((m->flags & PG_ZERO) == 0)
1581 * Map the pagetable page into the process address space, if
1582 * it isn't already there.
1585 pmap->pm_stats.resident_count++;
1587 ptema = VM_PAGE_TO_MACH(m);
1589 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex],
1590 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE);
1592 KASSERT(pmap->pm_pdir[ptepindex],
1593 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex));
1598 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1604 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1605 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1606 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1609 * Calculate pagetable page index
1611 ptepindex = va >> PDRSHIFT;
1614 * Get the page directory entry
1616 ptema = pmap->pm_pdir[ptepindex];
1619 * This supports switching from a 4MB page to a
1622 if (ptema & PG_PS) {
1626 pmap->pm_pdir[ptepindex] = 0;
1628 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1629 pmap_invalidate_all(kernel_pmap);
1633 * If the page table page is mapped, we just increment the
1634 * hold count, and activate it.
1637 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME);
1641 * Here if the pte page isn't mapped, or if it has
1644 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x",
1646 m = _pmap_allocpte(pmap, ptepindex, flags);
1647 if (m == NULL && (flags & M_WAITOK))
1650 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex));
1656 /***************************************************
1657 * Pmap allocation/deallocation routines.
1658 ***************************************************/
1662 * Deal with a SMP shootdown of other users of the pmap that we are
1663 * trying to dispose of. This can be a bit hairy.
1665 static cpuset_t *lazymask;
1666 static u_int lazyptd;
1667 static volatile u_int lazywait;
1669 void pmap_lazyfix_action(void);
1672 pmap_lazyfix_action(void)
1676 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1678 if (rcr3() == lazyptd)
1679 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1680 CPU_CLR_ATOMIC(PCPU_GET(cpuid), lazymask);
1681 atomic_store_rel_int(&lazywait, 1);
1685 pmap_lazyfix_self(u_int cpuid)
1688 if (rcr3() == lazyptd)
1689 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1690 CPU_CLR_ATOMIC(cpuid, lazymask);
1695 pmap_lazyfix(pmap_t pmap)
1697 cpuset_t mymask, mask;
1701 mask = pmap->pm_active;
1702 while (!CPU_EMPTY(&mask)) {
1705 /* Find least significant set bit. */
1706 lsb = CPU_FFS(&mask);
1709 CPU_SETOF(lsb, &mask);
1710 mtx_lock_spin(&smp_ipi_mtx);
1712 lazyptd = vtophys(pmap->pm_pdpt);
1714 lazyptd = vtophys(pmap->pm_pdir);
1716 cpuid = PCPU_GET(cpuid);
1718 /* Use a cpuset just for having an easy check. */
1719 CPU_SETOF(cpuid, &mymask);
1720 if (!CPU_CMP(&mask, &mymask)) {
1721 lazymask = &pmap->pm_active;
1722 pmap_lazyfix_self(cpuid);
1724 atomic_store_rel_int((u_int *)&lazymask,
1725 (u_int)&pmap->pm_active);
1726 atomic_store_rel_int(&lazywait, 0);
1727 ipi_selected(mask, IPI_LAZYPMAP);
1728 while (lazywait == 0) {
1734 mtx_unlock_spin(&smp_ipi_mtx);
1736 printf("pmap_lazyfix: spun for 50000000\n");
1737 mask = pmap->pm_active;
1744 * Cleaning up on uniprocessor is easy. For various reasons, we're
1745 * unlikely to have to even execute this code, including the fact
1746 * that the cleanup is deferred until the parent does a wait(2), which
1747 * means that another userland process has run.
1750 pmap_lazyfix(pmap_t pmap)
1754 cr3 = vtophys(pmap->pm_pdir);
1755 if (cr3 == rcr3()) {
1756 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1757 CPU_CLR(PCPU_GET(cpuid), &pmap->pm_active);
1763 * Release any resources held by the given physical map.
1764 * Called when a pmap initialized by pmap_pinit is being released.
1765 * Should only be called if the map contains no valid mappings.
1768 pmap_release(pmap_t pmap)
1770 vm_page_t m, ptdpg[2*NPGPTD+1];
1774 int npgptd = NPGPTD + 1;
1776 int npgptd = NPGPTD;
1779 KASSERT(pmap->pm_stats.resident_count == 0,
1780 ("pmap_release: pmap resident count %ld != 0",
1781 pmap->pm_stats.resident_count));
1784 #ifdef HAMFISTED_LOCKING
1785 mtx_lock(&createdelete_lock);
1789 mtx_lock_spin(&allpmaps_lock);
1790 LIST_REMOVE(pmap, pm_list);
1791 mtx_unlock_spin(&allpmaps_lock);
1793 for (i = 0; i < NPGPTD; i++)
1794 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME);
1795 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1797 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt));
1800 for (i = 0; i < npgptd; i++) {
1802 ma = VM_PAGE_TO_MACH(m);
1803 /* unpinning L1 and L2 treated the same */
1812 KASSERT(VM_PAGE_TO_MACH(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1813 ("pmap_release: got wrong ptd page"));
1816 atomic_subtract_int(&vm_cnt.v_wire_count, 1);
1820 pmap_qremove((vm_offset_t)pmap->pm_pdpt, 1);
1823 #ifdef HAMFISTED_LOCKING
1824 mtx_unlock(&createdelete_lock);
1829 kvm_size(SYSCTL_HANDLER_ARGS)
1831 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1833 return (sysctl_handle_long(oidp, &ksize, 0, req));
1835 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1836 0, 0, kvm_size, "IU", "Size of KVM");
1839 kvm_free(SYSCTL_HANDLER_ARGS)
1841 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1843 return (sysctl_handle_long(oidp, &kfree, 0, req));
1845 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1846 0, 0, kvm_free, "IU", "Amount of KVM free");
1849 * grow the number of kernel page table entries, if needed
1852 pmap_growkernel(vm_offset_t addr)
1855 vm_paddr_t ptppaddr;
1859 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1860 if (kernel_vm_end == 0) {
1861 kernel_vm_end = KERNBASE;
1863 while (pdir_pde(PTD, kernel_vm_end)) {
1864 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1866 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1867 kernel_vm_end = kernel_map->max_offset;
1872 addr = roundup2(addr, NBPDR);
1873 if (addr - 1 >= kernel_map->max_offset)
1874 addr = kernel_map->max_offset;
1875 while (kernel_vm_end < addr) {
1876 if (pdir_pde(PTD, kernel_vm_end)) {
1877 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
1878 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1879 kernel_vm_end = kernel_map->max_offset;
1885 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
1886 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1889 panic("pmap_growkernel: no memory to grow kernel");
1893 if ((nkpg->flags & PG_ZERO) == 0)
1894 pmap_zero_page(nkpg);
1895 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1896 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1897 rw_wlock(&pvh_global_lock);
1898 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1899 mtx_lock_spin(&allpmaps_lock);
1900 LIST_FOREACH(pmap, &allpmaps, pm_list)
1901 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1903 mtx_unlock_spin(&allpmaps_lock);
1904 rw_wunlock(&pvh_global_lock);
1906 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
1907 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1908 kernel_vm_end = kernel_map->max_offset;
1915 /***************************************************
1916 * page management routines.
1917 ***************************************************/
1919 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1920 CTASSERT(_NPCM == 11);
1921 CTASSERT(_NPCPV == 336);
1923 static __inline struct pv_chunk *
1924 pv_to_chunk(pv_entry_t pv)
1927 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1930 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1932 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1933 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1935 static const uint32_t pc_freemask[_NPCM] = {
1936 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1937 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1938 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1939 PC_FREE0_9, PC_FREE10
1942 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1943 "Current number of pv entries");
1946 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1948 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1949 "Current number of pv entry chunks");
1950 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1951 "Current number of pv entry chunks allocated");
1952 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1953 "Current number of pv entry chunks frees");
1954 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1955 "Number of times tried to get a chunk page but failed.");
1957 static long pv_entry_frees, pv_entry_allocs;
1958 static int pv_entry_spare;
1960 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1961 "Current number of pv entry frees");
1962 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1963 "Current number of pv entry allocs");
1964 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1965 "Current number of spare pv entries");
1969 * We are in a serious low memory condition. Resort to
1970 * drastic measures to free some pages so we can allocate
1971 * another pv entry chunk.
1974 pmap_pv_reclaim(pmap_t locked_pmap)
1977 struct pv_chunk *pc;
1979 pt_entry_t *pte, tpte;
1982 vm_page_t free, m, m_pc;
1984 int bit, field, freed;
1986 PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED);
1989 TAILQ_INIT(&newtail);
1990 while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL && (pv_vafree == 0 ||
1992 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1993 if (pmap != pc->pc_pmap) {
1995 pmap_invalidate_all(pmap);
1996 if (pmap != locked_pmap)
2000 /* Avoid deadlock and lock recursion. */
2001 if (pmap > locked_pmap)
2003 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
2005 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
2011 * Destroy every non-wired, 4 KB page mapping in the chunk.
2014 for (field = 0; field < _NPCM; field++) {
2015 for (inuse = ~pc->pc_map[field] & pc_freemask[field];
2016 inuse != 0; inuse &= ~(1UL << bit)) {
2018 pv = &pc->pc_pventry[field * 32 + bit];
2020 pte = pmap_pte(pmap, va);
2022 if ((tpte & PG_W) == 0)
2023 tpte = pte_load_clear(pte);
2024 pmap_pte_release(pte);
2025 if ((tpte & PG_W) != 0)
2028 ("pmap_pv_reclaim: pmap %p va %x zero pte",
2030 if ((tpte & PG_G) != 0)
2031 pmap_invalidate_page(pmap, va);
2032 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
2033 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2035 if ((tpte & PG_A) != 0)
2036 vm_page_aflag_set(m, PGA_REFERENCED);
2037 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2038 if (TAILQ_EMPTY(&m->md.pv_list))
2039 vm_page_aflag_clear(m, PGA_WRITEABLE);
2040 pc->pc_map[field] |= 1UL << bit;
2041 pmap_unuse_pt(pmap, va, &free);
2046 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
2049 /* Every freed mapping is for a 4 KB page. */
2050 pmap->pm_stats.resident_count -= freed;
2051 PV_STAT(pv_entry_frees += freed);
2052 PV_STAT(pv_entry_spare += freed);
2053 pv_entry_count -= freed;
2054 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2055 for (field = 0; field < _NPCM; field++)
2056 if (pc->pc_map[field] != pc_freemask[field]) {
2057 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
2059 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
2062 * One freed pv entry in locked_pmap is
2065 if (pmap == locked_pmap)
2069 if (field == _NPCM) {
2070 PV_STAT(pv_entry_spare -= _NPCPV);
2071 PV_STAT(pc_chunk_count--);
2072 PV_STAT(pc_chunk_frees++);
2073 /* Entire chunk is free; return it. */
2074 m_pc = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2075 pmap_qremove((vm_offset_t)pc, 1);
2076 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2081 TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
2083 pmap_invalidate_all(pmap);
2084 if (pmap != locked_pmap)
2087 if (m_pc == NULL && pv_vafree != 0 && free != NULL) {
2089 free = (void *)m_pc->object;
2090 /* Recycle a freed page table page. */
2091 m_pc->wire_count = 1;
2092 atomic_add_int(&vm_cnt.v_wire_count, 1);
2094 pmap_free_zero_pages(free);
2099 * free the pv_entry back to the free list
2102 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2104 struct pv_chunk *pc;
2105 int idx, field, bit;
2107 rw_assert(&pvh_global_lock, RA_WLOCKED);
2108 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2109 PV_STAT(pv_entry_frees++);
2110 PV_STAT(pv_entry_spare++);
2112 pc = pv_to_chunk(pv);
2113 idx = pv - &pc->pc_pventry[0];
2116 pc->pc_map[field] |= 1ul << bit;
2117 for (idx = 0; idx < _NPCM; idx++)
2118 if (pc->pc_map[idx] != pc_freemask[idx]) {
2120 * 98% of the time, pc is already at the head of the
2121 * list. If it isn't already, move it to the head.
2123 if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
2125 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2126 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
2131 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2136 free_pv_chunk(struct pv_chunk *pc)
2140 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
2141 PV_STAT(pv_entry_spare -= _NPCPV);
2142 PV_STAT(pc_chunk_count--);
2143 PV_STAT(pc_chunk_frees++);
2144 /* entire chunk is free, return it */
2145 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2146 pmap_qremove((vm_offset_t)pc, 1);
2147 vm_page_unwire(m, PQ_INACTIVE);
2149 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2153 * get a new pv_entry, allocating a block from the system
2157 get_pv_entry(pmap_t pmap, boolean_t try)
2159 static const struct timeval printinterval = { 60, 0 };
2160 static struct timeval lastprint;
2163 struct pv_chunk *pc;
2166 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2167 rw_assert(&pvh_global_lock, RA_WLOCKED);
2168 PV_STAT(pv_entry_allocs++);
2170 if (pv_entry_count > pv_entry_high_water)
2171 if (ratecheck(&lastprint, &printinterval))
2172 printf("Approaching the limit on PV entries, consider "
2173 "increasing either the vm.pmap.shpgperproc or the "
2174 "vm.pmap.pv_entry_max tunable.\n");
2176 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2178 for (field = 0; field < _NPCM; field++) {
2179 if (pc->pc_map[field]) {
2180 bit = bsfl(pc->pc_map[field]);
2184 if (field < _NPCM) {
2185 pv = &pc->pc_pventry[field * 32 + bit];
2186 pc->pc_map[field] &= ~(1ul << bit);
2187 /* If this was the last item, move it to tail */
2188 for (field = 0; field < _NPCM; field++)
2189 if (pc->pc_map[field] != 0) {
2190 PV_STAT(pv_entry_spare--);
2191 return (pv); /* not full, return */
2193 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2194 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2195 PV_STAT(pv_entry_spare--);
2200 * Access to the ptelist "pv_vafree" is synchronized by the page
2201 * queues lock. If "pv_vafree" is currently non-empty, it will
2202 * remain non-empty until pmap_ptelist_alloc() completes.
2204 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2205 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2208 PV_STAT(pc_chunk_tryfail++);
2211 m = pmap_pv_reclaim(pmap);
2215 PV_STAT(pc_chunk_count++);
2216 PV_STAT(pc_chunk_allocs++);
2217 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2218 pmap_qenter((vm_offset_t)pc, &m, 1);
2219 if ((m->flags & PG_ZERO) == 0)
2222 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2223 for (field = 1; field < _NPCM; field++)
2224 pc->pc_map[field] = pc_freemask[field];
2225 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
2226 pv = &pc->pc_pventry[0];
2227 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2228 PV_STAT(pv_entry_spare += _NPCPV - 1);
2232 static __inline pv_entry_t
2233 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2237 rw_assert(&pvh_global_lock, RA_WLOCKED);
2238 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
2239 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2240 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
2248 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2252 pv = pmap_pvh_remove(pvh, pmap, va);
2253 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2254 free_pv_entry(pmap, pv);
2258 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2261 rw_assert(&pvh_global_lock, RA_WLOCKED);
2262 pmap_pvh_free(&m->md, pmap, va);
2263 if (TAILQ_EMPTY(&m->md.pv_list))
2264 vm_page_aflag_clear(m, PGA_WRITEABLE);
2268 * Conditionally create a pv entry.
2271 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2275 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2276 rw_assert(&pvh_global_lock, RA_WLOCKED);
2277 if (pv_entry_count < pv_entry_high_water &&
2278 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2280 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2287 * pmap_remove_pte: do the things to unmap a page in a process
2290 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2295 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x",
2296 pmap, (u_long)*ptq, va);
2298 rw_assert(&pvh_global_lock, RA_WLOCKED);
2299 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2301 PT_SET_VA_MA(ptq, 0, TRUE);
2302 KASSERT(oldpte != 0,
2303 ("pmap_remove_pte: pmap %p va %x zero pte", pmap, va));
2305 pmap->pm_stats.wired_count -= 1;
2307 * Machines that don't support invlpg, also don't support
2311 pmap_invalidate_page(kernel_pmap, va);
2312 pmap->pm_stats.resident_count -= 1;
2313 if (oldpte & PG_MANAGED) {
2314 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME);
2315 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2318 vm_page_aflag_set(m, PGA_REFERENCED);
2319 pmap_remove_entry(pmap, m, va);
2321 return (pmap_unuse_pt(pmap, va, free));
2325 * Remove a single page from a process address space
2328 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2332 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x",
2335 rw_assert(&pvh_global_lock, RA_WLOCKED);
2336 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2337 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2338 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0)
2340 pmap_remove_pte(pmap, pte, va, free);
2341 pmap_invalidate_page(pmap, va);
2343 PT_SET_MA(PADDR1, 0);
2348 * Remove the given range of addresses from the specified map.
2350 * It is assumed that the start and end are properly
2351 * rounded to the page size.
2354 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2359 vm_page_t free = NULL;
2362 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x",
2366 * Perform an unsynchronized read. This is, however, safe.
2368 if (pmap->pm_stats.resident_count == 0)
2373 rw_wlock(&pvh_global_lock);
2378 * special handling of removing one page. a very
2379 * common operation and easy to short circuit some
2382 if ((sva + PAGE_SIZE == eva) &&
2383 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2384 pmap_remove_page(pmap, sva, &free);
2388 for (; sva < eva; sva = pdnxt) {
2392 * Calculate index for next page table.
2394 pdnxt = (sva + NBPDR) & ~PDRMASK;
2397 if (pmap->pm_stats.resident_count == 0)
2400 pdirindex = sva >> PDRSHIFT;
2401 ptpaddr = pmap->pm_pdir[pdirindex];
2404 * Weed out invalid mappings. Note: we assume that the page
2405 * directory table is always allocated, and in kernel virtual.
2411 * Check for large page.
2413 if ((ptpaddr & PG_PS) != 0) {
2414 PD_CLEAR_VA(pmap, pdirindex, TRUE);
2415 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2421 * Limit our scan to either the end of the va represented
2422 * by the current page table page, or to the end of the
2423 * range being removed.
2428 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2430 if ((*pte & PG_V) == 0)
2434 * The TLB entry for a PG_G mapping is invalidated
2435 * by pmap_remove_pte().
2437 if ((*pte & PG_G) == 0)
2439 if (pmap_remove_pte(pmap, pte, sva, &free))
2445 PT_SET_VA_MA(PMAP1, 0, TRUE);
2448 pmap_invalidate_all(pmap);
2450 rw_wunlock(&pvh_global_lock);
2452 pmap_free_zero_pages(free);
2456 * Routine: pmap_remove_all
2458 * Removes this physical page from
2459 * all physical maps in which it resides.
2460 * Reflects back modify bits to the pager.
2463 * Original versions of this routine were very
2464 * inefficient because they iteratively called
2465 * pmap_remove (slow...)
2469 pmap_remove_all(vm_page_t m)
2473 pt_entry_t *pte, tpte;
2476 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2477 ("pmap_remove_all: page %p is not managed", m));
2479 rw_wlock(&pvh_global_lock);
2481 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2484 pmap->pm_stats.resident_count--;
2485 pte = pmap_pte_quick(pmap, pv->pv_va);
2487 PT_SET_VA_MA(pte, 0, TRUE);
2488 KASSERT(tpte != 0, ("pmap_remove_all: pmap %p va %x zero pte",
2491 pmap->pm_stats.wired_count--;
2493 vm_page_aflag_set(m, PGA_REFERENCED);
2496 * Update the vm_page_t clean and reference bits.
2498 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2500 pmap_unuse_pt(pmap, pv->pv_va, &free);
2501 pmap_invalidate_page(pmap, pv->pv_va);
2502 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2503 free_pv_entry(pmap, pv);
2506 vm_page_aflag_clear(m, PGA_WRITEABLE);
2509 PT_SET_MA(PADDR1, 0);
2511 rw_wunlock(&pvh_global_lock);
2512 pmap_free_zero_pages(free);
2516 * Set the physical protection on the
2517 * specified range of this map as requested.
2520 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2527 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x",
2528 pmap, sva, eva, prot);
2530 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2531 pmap_remove(pmap, sva, eva);
2536 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2537 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2540 if (prot & VM_PROT_WRITE)
2546 rw_wlock(&pvh_global_lock);
2549 for (; sva < eva; sva = pdnxt) {
2550 pt_entry_t obits, pbits;
2553 pdnxt = (sva + NBPDR) & ~PDRMASK;
2557 pdirindex = sva >> PDRSHIFT;
2558 ptpaddr = pmap->pm_pdir[pdirindex];
2561 * Weed out invalid mappings. Note: we assume that the page
2562 * directory table is always allocated, and in kernel virtual.
2568 * Check for large page.
2570 if ((ptpaddr & PG_PS) != 0) {
2571 if ((prot & VM_PROT_WRITE) == 0)
2572 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW);
2574 if ((prot & VM_PROT_EXECUTE) == 0)
2575 pmap->pm_pdir[pdirindex] |= pg_nx;
2584 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2590 * Regardless of whether a pte is 32 or 64 bits in
2591 * size, PG_RW, PG_A, and PG_M are among the least
2592 * significant 32 bits.
2594 obits = pbits = *pte;
2595 if ((pbits & PG_V) == 0)
2598 if ((prot & VM_PROT_WRITE) == 0) {
2599 if ((pbits & (PG_MANAGED | PG_M | PG_RW)) ==
2600 (PG_MANAGED | PG_M | PG_RW)) {
2601 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) &
2605 pbits &= ~(PG_RW | PG_M);
2608 if ((prot & VM_PROT_EXECUTE) == 0)
2612 if (pbits != obits) {
2614 PT_SET_VA_MA(pte, pbits, TRUE);
2618 pmap_invalidate_page(pmap, sva);
2626 PT_SET_VA_MA(PMAP1, 0, TRUE);
2628 pmap_invalidate_all(pmap);
2630 rw_wunlock(&pvh_global_lock);
2635 * Insert the given physical page (p) at
2636 * the specified virtual address (v) in the
2637 * target physical map with the protection requested.
2639 * If specified, the page will be wired down, meaning
2640 * that the related pte can not be reclaimed.
2642 * NB: This is the only routine which MAY NOT lazy-evaluate
2643 * or lose information. That is, this routine must actually
2644 * insert this page into the given map NOW.
2647 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2648 vm_prot_t prot, boolean_t wired)
2652 pt_entry_t newpte, origpte;
2658 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d",
2659 pmap, va, access, VM_PAGE_TO_MACH(m), prot, wired);
2660 va = trunc_page(va);
2661 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
2662 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
2663 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)",
2665 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2666 VM_OBJECT_ASSERT_WLOCKED(m->object);
2670 rw_wlock(&pvh_global_lock);
2675 * In the case that a page table page is not
2676 * resident, we are creating it here.
2678 if (va < VM_MAXUSER_ADDRESS) {
2679 mpte = pmap_allocpte(pmap, va, M_WAITOK);
2682 pde = pmap_pde(pmap, va);
2683 if ((*pde & PG_PS) != 0)
2684 panic("pmap_enter: attempted pmap_enter on 4MB page");
2685 pte = pmap_pte_quick(pmap, va);
2688 * Page Directory table entry not valid, we need a new PT page
2691 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
2692 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va);
2695 pa = VM_PAGE_TO_PHYS(m);
2700 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx",
2705 origpte = xpmap_mtop(origpte);
2706 opa = origpte & PG_FRAME;
2709 * Mapping has not changed, must be protection or wiring change.
2711 if (origpte && (opa == pa)) {
2713 * Wiring change, just update stats. We don't worry about
2714 * wiring PT pages as they remain resident as long as there
2715 * are valid mappings in them. Hence, if a user page is wired,
2716 * the PT page will be also.
2718 if (wired && ((origpte & PG_W) == 0))
2719 pmap->pm_stats.wired_count++;
2720 else if (!wired && (origpte & PG_W))
2721 pmap->pm_stats.wired_count--;
2724 * Remove extra pte reference
2729 if (origpte & PG_MANAGED) {
2739 * Mapping has changed, invalidate old range and fall through to
2740 * handle validating new mapping.
2744 pmap->pm_stats.wired_count--;
2745 if (origpte & PG_MANAGED) {
2746 om = PHYS_TO_VM_PAGE(opa);
2747 pv = pmap_pvh_remove(&om->md, pmap, va);
2748 } else if (va < VM_MAXUSER_ADDRESS)
2749 printf("va=0x%x is unmanaged :-( \n", va);
2753 KASSERT(mpte->wire_count > 0,
2754 ("pmap_enter: missing reference to page table page,"
2758 pmap->pm_stats.resident_count++;
2761 * Enter on the PV list if part of our managed memory.
2763 if ((m->oflags & VPO_UNMANAGED) == 0) {
2764 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
2765 ("pmap_enter: managed mapping within the clean submap"));
2767 pv = get_pv_entry(pmap, FALSE);
2769 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2771 } else if (pv != NULL)
2772 free_pv_entry(pmap, pv);
2775 * Increment counters
2778 pmap->pm_stats.wired_count++;
2782 * Now validate mapping with desired protection/wiring.
2784 newpte = (pt_entry_t)(pa | PG_V);
2785 if ((prot & VM_PROT_WRITE) != 0) {
2787 if ((newpte & PG_MANAGED) != 0)
2788 vm_page_aflag_set(m, PGA_WRITEABLE);
2791 if ((prot & VM_PROT_EXECUTE) == 0)
2796 if (va < VM_MAXUSER_ADDRESS)
2798 if (pmap == kernel_pmap)
2803 * if the mapping or permission bits are different, we need
2804 * to update the pte.
2806 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2810 PT_SET_VA(pte, newpte | PG_A, FALSE);
2811 if (origpte & PG_A) {
2812 if (origpte & PG_MANAGED)
2813 vm_page_aflag_set(om, PGA_REFERENCED);
2814 if (opa != VM_PAGE_TO_PHYS(m))
2817 if ((origpte & PG_NX) == 0 &&
2818 (newpte & PG_NX) != 0)
2822 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
2823 if ((origpte & PG_MANAGED) != 0)
2825 if ((prot & VM_PROT_WRITE) == 0)
2828 if ((origpte & PG_MANAGED) != 0 &&
2829 TAILQ_EMPTY(&om->md.pv_list))
2830 vm_page_aflag_clear(om, PGA_WRITEABLE);
2832 pmap_invalidate_page(pmap, va);
2834 PT_SET_VA(pte, newpte | PG_A, FALSE);
2841 PT_SET_VA_MA(PMAP1, 0, TRUE);
2843 rw_wunlock(&pvh_global_lock);
2848 * Maps a sequence of resident pages belonging to the same object.
2849 * The sequence begins with the given page m_start. This page is
2850 * mapped at the given virtual address start. Each subsequent page is
2851 * mapped at a virtual address that is offset from start by the same
2852 * amount as the page is offset from m_start within the object. The
2853 * last page in the sequence is the page with the largest offset from
2854 * m_start that can be mapped at a virtual address less than the given
2855 * virtual address end. Not every virtual page between start and end
2856 * is mapped; only those for which a resident page exists with the
2857 * corresponding offset from m_start are mapped.
2860 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2861 vm_page_t m_start, vm_prot_t prot)
2864 vm_pindex_t diff, psize;
2865 multicall_entry_t mcl[16];
2866 multicall_entry_t *mclp = mcl;
2867 int error, count = 0;
2869 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2871 psize = atop(end - start);
2874 rw_wlock(&pvh_global_lock);
2876 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2877 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m,
2879 m = TAILQ_NEXT(m, listq);
2881 error = HYPERVISOR_multicall(mcl, count);
2882 KASSERT(error == 0, ("bad multicall %d", error));
2888 error = HYPERVISOR_multicall(mcl, count);
2889 KASSERT(error == 0, ("bad multicall %d", error));
2891 rw_wunlock(&pvh_global_lock);
2896 * this code makes some *MAJOR* assumptions:
2897 * 1. Current pmap & pmap exists.
2900 * 4. No page table pages.
2901 * but is *MUCH* faster than pmap_enter...
2905 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2907 multicall_entry_t mcl, *mclp;
2911 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x",
2914 rw_wlock(&pvh_global_lock);
2916 (void)pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL);
2918 HYPERVISOR_multicall(&mcl, count);
2919 rw_wunlock(&pvh_global_lock);
2925 pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count)
2927 int i, error, index = 0;
2928 multicall_entry_t mcl[16];
2929 multicall_entry_t *mclp = mcl;
2932 for (i = 0; i < count; i++, addrs++, pages++, prots++) {
2933 if (!pmap_is_prefaultable_locked(pmap, *addrs))
2936 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL);
2938 error = HYPERVISOR_multicall(mcl, index);
2941 KASSERT(error == 0, ("bad multicall %d", error));
2945 error = HYPERVISOR_multicall(mcl, index);
2946 KASSERT(error == 0, ("bad multicall %d", error));
2954 pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m,
2955 vm_prot_t prot, vm_page_t mpte)
2960 multicall_entry_t *mcl = *mclpp;
2962 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2963 (m->oflags & VPO_UNMANAGED) != 0,
2964 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2965 rw_assert(&pvh_global_lock, RA_WLOCKED);
2966 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2969 * In the case that a page table page is not
2970 * resident, we are creating it here.
2972 if (va < VM_MAXUSER_ADDRESS) {
2977 * Calculate pagetable page index
2979 ptepindex = va >> PDRSHIFT;
2980 if (mpte && (mpte->pindex == ptepindex)) {
2984 * Get the page directory entry
2986 ptema = pmap->pm_pdir[ptepindex];
2989 * If the page table page is mapped, we just increment
2990 * the hold count, and activate it.
2994 panic("pmap_enter_quick: unexpected mapping into 4MB page");
2995 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME);
2998 mpte = _pmap_allocpte(pmap, ptepindex,
3009 * This call to vtopte makes the assumption that we are
3010 * entering the page into the current pmap. In order to support
3011 * quick entry into any pmap, one would likely use pmap_pte_quick.
3012 * But that isn't as quick as vtopte.
3014 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap"));
3025 * Enter on the PV list if part of our managed memory.
3027 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3028 !pmap_try_insert_pv_entry(pmap, va, m)) {
3031 if (pmap_unwire_ptp(pmap, mpte, &free)) {
3032 pmap_invalidate_page(pmap, va);
3033 pmap_free_zero_pages(free);
3042 * Increment counters
3044 pmap->pm_stats.resident_count++;
3046 pa = VM_PAGE_TO_PHYS(m);
3048 if ((prot & VM_PROT_EXECUTE) == 0)
3054 * Now validate mapping with RO protection
3056 if ((m->oflags & VPO_UNMANAGED) != 0)
3057 pte_store(pte, pa | PG_V | PG_U);
3059 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3062 * Now validate mapping with RO protection
3064 if ((m->oflags & VPO_UNMANAGED) != 0)
3065 pa = xpmap_ptom(pa | PG_V | PG_U);
3067 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED);
3069 mcl->op = __HYPERVISOR_update_va_mapping;
3071 mcl->args[1] = (uint32_t)(pa & 0xffffffff);
3072 mcl->args[2] = (uint32_t)(pa >> 32);
3075 *count = *count + 1;
3081 * Make a temporary mapping for a physical address. This is only intended
3082 * to be used for panic dumps.
3085 pmap_kenter_temporary(vm_paddr_t pa, int i)
3088 vm_paddr_t ma = xpmap_ptom(pa);
3090 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3091 PT_SET_MA(va, (ma & ~PAGE_MASK) | PG_V | pgeflag);
3093 return ((void *)crashdumpmap);
3097 * This code maps large physical mmap regions into the
3098 * processor address space. Note that some shortcuts
3099 * are taken, but the code works.
3102 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3103 vm_pindex_t pindex, vm_size_t size)
3106 vm_paddr_t pa, ptepa;
3110 VM_OBJECT_ASSERT_WLOCKED(object);
3111 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3112 ("pmap_object_init_pt: non-device object"));
3114 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3115 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3117 p = vm_page_lookup(object, pindex);
3118 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3119 ("pmap_object_init_pt: invalid page %p", p));
3120 pat_mode = p->md.pat_mode;
3123 * Abort the mapping if the first page is not physically
3124 * aligned to a 2/4MB page boundary.
3126 ptepa = VM_PAGE_TO_PHYS(p);
3127 if (ptepa & (NBPDR - 1))
3131 * Skip the first page. Abort the mapping if the rest of
3132 * the pages are not physically contiguous or have differing
3133 * memory attributes.
3135 p = TAILQ_NEXT(p, listq);
3136 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3138 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3139 ("pmap_object_init_pt: invalid page %p", p));
3140 if (pa != VM_PAGE_TO_PHYS(p) ||
3141 pat_mode != p->md.pat_mode)
3143 p = TAILQ_NEXT(p, listq);
3147 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3148 * "size" is a multiple of 2/4M, adding the PAT setting to
3149 * "pa" will not affect the termination of this loop.
3152 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3153 size; pa += NBPDR) {
3154 pde = pmap_pde(pmap, addr);
3156 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3157 PG_U | PG_RW | PG_V);
3158 pmap->pm_stats.resident_count += NBPDR /
3160 pmap_pde_mappings++;
3162 /* Else continue on if the PDE is already valid. */
3170 * Routine: pmap_change_wiring
3171 * Function: Change the wiring attribute for a map/virtual-address
3173 * In/out conditions:
3174 * The mapping must already exist in the pmap.
3177 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3181 rw_wlock(&pvh_global_lock);
3183 pte = pmap_pte(pmap, va);
3185 if (wired && !pmap_pte_w(pte)) {
3186 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE);
3187 pmap->pm_stats.wired_count++;
3188 } else if (!wired && pmap_pte_w(pte)) {
3189 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE);
3190 pmap->pm_stats.wired_count--;
3194 * Wiring is not a hardware characteristic so there is no need to
3197 pmap_pte_release(pte);
3199 rw_wunlock(&pvh_global_lock);
3203 * Clear the wired attribute from the mappings for the specified range of
3204 * addresses in the given pmap. Every valid mapping within that range
3205 * must have the wired attribute set. In contrast, invalid mappings
3206 * cannot have the wired attribute set, so they are ignored.
3208 * The wired attribute of the page table entry is not a hardware feature,
3209 * so there is no need to invalidate any TLB entries.
3212 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3218 CTR3(KTR_PMAP, "pmap_unwire: pmap=%p sva=0x%x eva=0x%x", pmap, sva,
3220 rw_wlock(&pvh_global_lock);
3223 for (; sva < eva; sva = pdnxt) {
3224 pdnxt = (sva + NBPDR) & ~PDRMASK;
3227 pde = pmap_pde(pmap, sva);
3228 if ((*pde & PG_V) == 0)
3230 if ((*pde & PG_PS) != 0)
3231 panic("pmap_unwire: unexpected PG_PS in pde %#jx",
3235 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3237 if ((*pte & PG_V) == 0)
3239 if ((*pte & PG_W) == 0)
3240 panic("pmap_unwire: pte %#jx is missing PG_W",
3242 PT_SET_VA_MA(pte, *pte & ~PG_W, FALSE);
3243 pmap->pm_stats.wired_count--;
3247 PT_CLEAR_VA(PMAP1, FALSE);
3250 rw_wunlock(&pvh_global_lock);
3256 * Copy the range specified by src_addr/len
3257 * from the source map to the range dst_addr/len
3258 * in the destination map.
3260 * This routine is only advisory and need not do anything.
3264 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3265 vm_offset_t src_addr)
3269 vm_offset_t end_addr = src_addr + len;
3272 if (dst_addr != src_addr)
3275 if (!pmap_is_current(src_pmap)) {
3277 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx",
3278 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME));
3282 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x",
3283 dst_pmap, src_pmap, dst_addr, len, src_addr);
3285 #ifdef HAMFISTED_LOCKING
3286 mtx_lock(&createdelete_lock);
3289 rw_wlock(&pvh_global_lock);
3290 if (dst_pmap < src_pmap) {
3291 PMAP_LOCK(dst_pmap);
3292 PMAP_LOCK(src_pmap);
3294 PMAP_LOCK(src_pmap);
3295 PMAP_LOCK(dst_pmap);
3298 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3299 pt_entry_t *src_pte, *dst_pte;
3300 vm_page_t dstmpte, srcmpte;
3301 pd_entry_t srcptepaddr;
3304 KASSERT(addr < UPT_MIN_ADDRESS,
3305 ("pmap_copy: invalid to pmap_copy page tables"));
3307 pdnxt = (addr + NBPDR) & ~PDRMASK;
3310 ptepindex = addr >> PDRSHIFT;
3312 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]);
3313 if (srcptepaddr == 0)
3316 if (srcptepaddr & PG_PS) {
3317 if (dst_pmap->pm_pdir[ptepindex] == 0) {
3318 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE);
3319 dst_pmap->pm_stats.resident_count +=
3325 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3326 KASSERT(srcmpte->wire_count > 0,
3327 ("pmap_copy: source page table page is unused"));
3329 if (pdnxt > end_addr)
3332 src_pte = vtopte(addr);
3333 while (addr < pdnxt) {
3337 * we only virtual copy managed pages
3339 if ((ptetemp & PG_MANAGED) != 0) {
3340 dstmpte = pmap_allocpte(dst_pmap, addr,
3342 if (dstmpte == NULL)
3344 dst_pte = pmap_pte_quick(dst_pmap, addr);
3345 if (*dst_pte == 0 &&
3346 pmap_try_insert_pv_entry(dst_pmap, addr,
3347 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) {
3349 * Clear the wired, modified, and
3350 * accessed (referenced) bits
3353 KASSERT(ptetemp != 0, ("src_pte not set"));
3354 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */);
3355 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)),
3356 ("no pmap copy expected: 0x%jx saw: 0x%jx",
3357 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte));
3358 dst_pmap->pm_stats.resident_count++;
3361 if (pmap_unwire_ptp(dst_pmap, dstmpte,
3363 pmap_invalidate_page(dst_pmap,
3365 pmap_free_zero_pages(free);
3369 if (dstmpte->wire_count >= srcmpte->wire_count)
3379 rw_wunlock(&pvh_global_lock);
3380 PMAP_UNLOCK(src_pmap);
3381 PMAP_UNLOCK(dst_pmap);
3383 #ifdef HAMFISTED_LOCKING
3384 mtx_unlock(&createdelete_lock);
3388 static __inline void
3389 pagezero(void *page)
3391 #if defined(I686_CPU)
3392 if (cpu_class == CPUCLASS_686) {
3393 #if defined(CPU_ENABLE_SSE)
3394 if (cpu_feature & CPUID_SSE2)
3395 sse2_pagezero(page);
3398 i686_pagezero(page);
3401 bzero(page, PAGE_SIZE);
3405 * pmap_zero_page zeros the specified hardware page by mapping
3406 * the page into KVM and using bzero to clear its contents.
3409 pmap_zero_page(vm_page_t m)
3411 struct sysmaps *sysmaps;
3413 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3414 mtx_lock(&sysmaps->lock);
3415 if (*sysmaps->CMAP2)
3416 panic("pmap_zero_page: CMAP2 busy");
3418 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M);
3419 pagezero(sysmaps->CADDR2);
3420 PT_SET_MA(sysmaps->CADDR2, 0);
3422 mtx_unlock(&sysmaps->lock);
3426 * pmap_zero_page_area zeros the specified hardware page by mapping
3427 * the page into KVM and using bzero to clear its contents.
3429 * off and size may not cover an area beyond a single hardware page.
3432 pmap_zero_page_area(vm_page_t m, int off, int size)
3434 struct sysmaps *sysmaps;
3436 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3437 mtx_lock(&sysmaps->lock);
3438 if (*sysmaps->CMAP2)
3439 panic("pmap_zero_page_area: CMAP2 busy");
3441 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M);
3443 if (off == 0 && size == PAGE_SIZE)
3444 pagezero(sysmaps->CADDR2);
3446 bzero((char *)sysmaps->CADDR2 + off, size);
3447 PT_SET_MA(sysmaps->CADDR2, 0);
3449 mtx_unlock(&sysmaps->lock);
3453 * pmap_zero_page_idle zeros the specified hardware page by mapping
3454 * the page into KVM and using bzero to clear its contents. This
3455 * is intended to be called from the vm_pagezero process only and
3459 pmap_zero_page_idle(vm_page_t m)
3463 panic("pmap_zero_page_idle: CMAP3 busy");
3465 PT_SET_MA(CADDR3, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M);
3467 PT_SET_MA(CADDR3, 0);
3472 * pmap_copy_page copies the specified (machine independent)
3473 * page by mapping the page into virtual memory and using
3474 * bcopy to copy the page, one machine dependent page at a
3478 pmap_copy_page(vm_page_t src, vm_page_t dst)
3480 struct sysmaps *sysmaps;
3482 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3483 mtx_lock(&sysmaps->lock);
3484 if (*sysmaps->CMAP1)
3485 panic("pmap_copy_page: CMAP1 busy");
3486 if (*sysmaps->CMAP2)
3487 panic("pmap_copy_page: CMAP2 busy");
3489 PT_SET_MA(sysmaps->CADDR1, PG_V | VM_PAGE_TO_MACH(src) | PG_A);
3490 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(dst) | PG_A | PG_M);
3491 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3492 PT_SET_MA(sysmaps->CADDR1, 0);
3493 PT_SET_MA(sysmaps->CADDR2, 0);
3495 mtx_unlock(&sysmaps->lock);
3498 int unmapped_buf_allowed = 1;
3501 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3502 vm_offset_t b_offset, int xfersize)
3504 struct sysmaps *sysmaps;
3505 vm_page_t a_pg, b_pg;
3507 vm_offset_t a_pg_offset, b_pg_offset;
3510 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3511 mtx_lock(&sysmaps->lock);
3512 if (*sysmaps->CMAP1 != 0)
3513 panic("pmap_copy_pages: CMAP1 busy");
3514 if (*sysmaps->CMAP2 != 0)
3515 panic("pmap_copy_pages: CMAP2 busy");
3517 while (xfersize > 0) {
3518 a_pg = ma[a_offset >> PAGE_SHIFT];
3519 a_pg_offset = a_offset & PAGE_MASK;
3520 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3521 b_pg = mb[b_offset >> PAGE_SHIFT];
3522 b_pg_offset = b_offset & PAGE_MASK;
3523 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3524 PT_SET_MA(sysmaps->CADDR1, PG_V | VM_PAGE_TO_MACH(a_pg) | PG_A);
3525 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW |
3526 VM_PAGE_TO_MACH(b_pg) | PG_A | PG_M);
3527 a_cp = sysmaps->CADDR1 + a_pg_offset;
3528 b_cp = sysmaps->CADDR2 + b_pg_offset;
3529 bcopy(a_cp, b_cp, cnt);
3534 PT_SET_MA(sysmaps->CADDR1, 0);
3535 PT_SET_MA(sysmaps->CADDR2, 0);
3537 mtx_unlock(&sysmaps->lock);
3541 * Returns true if the pmap's pv is one of the first
3542 * 16 pvs linked to from this page. This count may
3543 * be changed upwards or downwards in the future; it
3544 * is only necessary that true be returned for a small
3545 * subset of pmaps for proper page aging.
3548 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3554 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3555 ("pmap_page_exists_quick: page %p is not managed", m));
3557 rw_wlock(&pvh_global_lock);
3558 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3559 if (PV_PMAP(pv) == pmap) {
3567 rw_wunlock(&pvh_global_lock);
3572 * pmap_page_wired_mappings:
3574 * Return the number of managed mappings to the given physical page
3578 pmap_page_wired_mappings(vm_page_t m)
3586 if ((m->oflags & VPO_UNMANAGED) != 0)
3588 rw_wlock(&pvh_global_lock);
3590 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3593 pte = pmap_pte_quick(pmap, pv->pv_va);
3594 if ((*pte & PG_W) != 0)
3599 rw_wunlock(&pvh_global_lock);
3604 * Returns TRUE if the given page is mapped. Otherwise, returns FALSE.
3607 pmap_page_is_mapped(vm_page_t m)
3610 if ((m->oflags & VPO_UNMANAGED) != 0)
3612 return (!TAILQ_EMPTY(&m->md.pv_list));
3616 * Remove all pages from specified address space
3617 * this aids process exit speeds. Also, this code
3618 * is special cased for current process only, but
3619 * can have the more generic (and slightly slower)
3620 * mode enabled. This is much faster than pmap_remove
3621 * in the case of running down an entire address space.
3624 pmap_remove_pages(pmap_t pmap)
3626 pt_entry_t *pte, tpte;
3627 vm_page_t m, free = NULL;
3629 struct pv_chunk *pc, *npc;
3632 uint32_t inuse, bitmask;
3635 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap);
3637 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
3638 printf("warning: pmap_remove_pages called with non-current pmap\n");
3641 rw_wlock(&pvh_global_lock);
3642 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap"));
3645 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3646 KASSERT(pc->pc_pmap == pmap, ("Wrong pmap %p %p", pmap,
3649 for (field = 0; field < _NPCM; field++) {
3650 inuse = ~pc->pc_map[field] & pc_freemask[field];
3651 while (inuse != 0) {
3653 bitmask = 1UL << bit;
3654 idx = field * 32 + bit;
3655 pv = &pc->pc_pventry[idx];
3658 pte = vtopte(pv->pv_va);
3659 tpte = *pte ? xpmap_mtop(*pte) : 0;
3663 "TPTE at %p IS ZERO @ VA %08x\n",
3669 * We cannot remove wired pages from a process' mapping at this time
3676 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
3677 KASSERT(m->phys_addr == (tpte & PG_FRAME),
3678 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
3679 m, (uintmax_t)m->phys_addr,
3682 KASSERT(m < &vm_page_array[vm_page_array_size],
3683 ("pmap_remove_pages: bad tpte %#jx",
3687 PT_CLEAR_VA(pte, FALSE);
3690 * Update the vm_page_t clean/reference bits.
3695 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3696 if (TAILQ_EMPTY(&m->md.pv_list))
3697 vm_page_aflag_clear(m, PGA_WRITEABLE);
3699 pmap_unuse_pt(pmap, pv->pv_va, &free);
3702 PV_STAT(pv_entry_frees++);
3703 PV_STAT(pv_entry_spare++);
3705 pc->pc_map[field] |= bitmask;
3706 pmap->pm_stats.resident_count--;
3711 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3717 PT_SET_MA(PADDR1, 0);
3720 pmap_invalidate_all(pmap);
3721 rw_wunlock(&pvh_global_lock);
3723 pmap_free_zero_pages(free);
3729 * Return whether or not the specified physical page was modified
3730 * in any physical maps.
3733 pmap_is_modified(vm_page_t m)
3740 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3741 ("pmap_is_modified: page %p is not managed", m));
3745 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3746 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3747 * is clear, no PTEs can have PG_M set.
3749 VM_OBJECT_ASSERT_WLOCKED(m->object);
3750 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3752 rw_wlock(&pvh_global_lock);
3754 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3757 pte = pmap_pte_quick(pmap, pv->pv_va);
3758 rv = (*pte & PG_M) != 0;
3764 PT_SET_MA(PADDR1, 0);
3766 rw_wunlock(&pvh_global_lock);
3771 * pmap_is_prefaultable:
3773 * Return whether or not the specified virtual address is elgible
3777 pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr)
3780 boolean_t rv = FALSE;
3784 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) {
3792 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3797 rv = pmap_is_prefaultable_locked(pmap, addr);
3803 pmap_is_referenced(vm_page_t m)
3810 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3811 ("pmap_is_referenced: page %p is not managed", m));
3813 rw_wlock(&pvh_global_lock);
3815 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3818 pte = pmap_pte_quick(pmap, pv->pv_va);
3819 rv = (*pte & (PG_A | PG_V)) == (PG_A | PG_V);
3825 PT_SET_MA(PADDR1, 0);
3827 rw_wunlock(&pvh_global_lock);
3832 pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len)
3834 int i, npages = round_page(len) >> PAGE_SHIFT;
3835 for (i = 0; i < npages; i++) {
3837 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3838 rw_wlock(&pvh_global_lock);
3839 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M)));
3840 rw_wunlock(&pvh_global_lock);
3841 PMAP_MARK_PRIV(xpmap_mtop(*pte));
3842 pmap_pte_release(pte);
3847 pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len)
3849 int i, npages = round_page(len) >> PAGE_SHIFT;
3850 for (i = 0; i < npages; i++) {
3852 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3853 PMAP_MARK_UNPRIV(xpmap_mtop(*pte));
3854 rw_wlock(&pvh_global_lock);
3855 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M));
3856 rw_wunlock(&pvh_global_lock);
3857 pmap_pte_release(pte);
3862 * Clear the write and modified bits in each of the given page's mappings.
3865 pmap_remove_write(vm_page_t m)
3869 pt_entry_t oldpte, *pte;
3871 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3872 ("pmap_remove_write: page %p is not managed", m));
3875 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3876 * set by another thread while the object is locked. Thus,
3877 * if PGA_WRITEABLE is clear, no page table entries need updating.
3879 VM_OBJECT_ASSERT_WLOCKED(m->object);
3880 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3882 rw_wlock(&pvh_global_lock);
3884 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3887 pte = pmap_pte_quick(pmap, pv->pv_va);
3890 if ((oldpte & PG_RW) != 0) {
3891 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M);
3894 * Regardless of whether a pte is 32 or 64 bits
3895 * in size, PG_RW and PG_M are among the least
3896 * significant 32 bits.
3898 PT_SET_VA_MA(pte, newpte, TRUE);
3902 if ((oldpte & PG_M) != 0)
3904 pmap_invalidate_page(pmap, pv->pv_va);
3908 vm_page_aflag_clear(m, PGA_WRITEABLE);
3911 PT_SET_MA(PADDR1, 0);
3913 rw_wunlock(&pvh_global_lock);
3917 * pmap_ts_referenced:
3919 * Return a count of reference bits for a page, clearing those bits.
3920 * It is not necessary for every reference bit to be cleared, but it
3921 * is necessary that 0 only be returned when there are truly no
3922 * reference bits set.
3924 * XXX: The exact number of bits to check and clear is a matter that
3925 * should be tested and standardized at some point in the future for
3926 * optimal aging of shared pages.
3929 pmap_ts_referenced(vm_page_t m)
3931 pv_entry_t pv, pvf, pvn;
3936 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3937 ("pmap_ts_referenced: page %p is not managed", m));
3938 rw_wlock(&pvh_global_lock);
3940 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3943 pvn = TAILQ_NEXT(pv, pv_next);
3944 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3945 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3948 pte = pmap_pte_quick(pmap, pv->pv_va);
3949 if ((*pte & PG_A) != 0) {
3950 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE);
3951 pmap_invalidate_page(pmap, pv->pv_va);
3957 } while ((pv = pvn) != NULL && pv != pvf);
3961 PT_SET_MA(PADDR1, 0);
3963 rw_wunlock(&pvh_global_lock);
3968 * Apply the given advice to the specified range of addresses within the
3969 * given pmap. Depending on the advice, clear the referenced and/or
3970 * modified flags in each mapping and set the mapped page's dirty field.
3973 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3979 boolean_t anychanged;
3981 if (advice != MADV_DONTNEED && advice != MADV_FREE)
3984 rw_wlock(&pvh_global_lock);
3987 for (; sva < eva; sva = pdnxt) {
3988 pdnxt = (sva + NBPDR) & ~PDRMASK;
3991 oldpde = pmap->pm_pdir[sva >> PDRSHIFT];
3992 if ((oldpde & (PG_PS | PG_V)) != PG_V)
3996 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3998 if ((*pte & (PG_MANAGED | PG_V)) != (PG_MANAGED |
4001 else if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4002 if (advice == MADV_DONTNEED) {
4004 * Future calls to pmap_is_modified()
4005 * can be avoided by making the page
4008 m = PHYS_TO_VM_PAGE(xpmap_mtop(*pte) &
4012 PT_SET_VA_MA(pte, *pte & ~(PG_M | PG_A), TRUE);
4013 } else if ((*pte & PG_A) != 0)
4014 PT_SET_VA_MA(pte, *pte & ~PG_A, TRUE);
4017 if ((*pte & PG_G) != 0)
4018 pmap_invalidate_page(pmap, sva);
4025 PT_SET_VA_MA(PMAP1, 0, TRUE);
4027 pmap_invalidate_all(pmap);
4029 rw_wunlock(&pvh_global_lock);
4034 * Clear the modify bits on the specified physical page.
4037 pmap_clear_modify(vm_page_t m)
4043 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4044 ("pmap_clear_modify: page %p is not managed", m));
4045 VM_OBJECT_ASSERT_WLOCKED(m->object);
4046 KASSERT(!vm_page_xbusied(m),
4047 ("pmap_clear_modify: page %p is exclusive busied", m));
4050 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4051 * If the object containing the page is locked and the page is not
4052 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4054 if ((m->aflags & PGA_WRITEABLE) == 0)
4056 rw_wlock(&pvh_global_lock);
4058 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4061 pte = pmap_pte_quick(pmap, pv->pv_va);
4062 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4064 * Regardless of whether a pte is 32 or 64 bits
4065 * in size, PG_M is among the least significant
4068 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE);
4069 pmap_invalidate_page(pmap, pv->pv_va);
4074 rw_wunlock(&pvh_global_lock);
4078 * Miscellaneous support routines follow
4082 * Map a set of physical memory pages into the kernel virtual
4083 * address space. Return a pointer to where it is mapped. This
4084 * routine is intended to be used for mapping device memory,
4088 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4090 vm_offset_t va, offset;
4093 offset = pa & PAGE_MASK;
4094 size = round_page(offset + size);
4097 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4100 va = kva_alloc(size);
4102 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4104 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4105 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4106 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4107 pmap_invalidate_cache_range(va, va + size);
4108 return ((void *)(va + offset));
4112 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4115 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4119 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4122 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4126 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4128 vm_offset_t base, offset;
4130 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4132 base = trunc_page(va);
4133 offset = va & PAGE_MASK;
4134 size = round_page(offset + size);
4135 kva_free(base, size);
4139 * Sets the memory attribute for the specified page.
4142 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4145 m->md.pat_mode = ma;
4146 if ((m->flags & PG_FICTITIOUS) != 0)
4150 * If "m" is a normal page, flush it from the cache.
4151 * See pmap_invalidate_cache_range().
4153 * First, try to find an existing mapping of the page by sf
4154 * buffer. sf_buf_invalidate_cache() modifies mapping and
4155 * flushes the cache.
4157 if (sf_buf_invalidate_cache(m))
4161 * If page is not mapped by sf buffer, but CPU does not
4162 * support self snoop, map the page transient and do
4163 * invalidation. In the worst case, whole cache is flushed by
4164 * pmap_invalidate_cache_range().
4166 if ((cpu_feature & CPUID_SS) == 0)
4171 pmap_flush_page(vm_page_t m)
4173 struct sysmaps *sysmaps;
4174 vm_offset_t sva, eva;
4176 if ((cpu_feature & CPUID_CLFSH) != 0) {
4177 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4178 mtx_lock(&sysmaps->lock);
4179 if (*sysmaps->CMAP2)
4180 panic("pmap_flush_page: CMAP2 busy");
4182 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW |
4183 VM_PAGE_TO_MACH(m) | PG_A | PG_M |
4184 pmap_cache_bits(m->md.pat_mode, 0));
4185 invlcaddr(sysmaps->CADDR2);
4186 sva = (vm_offset_t)sysmaps->CADDR2;
4187 eva = sva + PAGE_SIZE;
4190 * Use mfence despite the ordering implied by
4191 * mtx_{un,}lock() because clflush is not guaranteed
4192 * to be ordered by any other instruction.
4195 for (; sva < eva; sva += cpu_clflush_line_size)
4198 PT_SET_MA(sysmaps->CADDR2, 0);
4200 mtx_unlock(&sysmaps->lock);
4202 pmap_invalidate_cache();
4206 * Changes the specified virtual address range's memory type to that given by
4207 * the parameter "mode". The specified virtual address range must be
4208 * completely contained within either the kernel map.
4210 * Returns zero if the change completed successfully, and either EINVAL or
4211 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4212 * of the virtual address range was not mapped, and ENOMEM is returned if
4213 * there was insufficient memory available to complete the change.
4216 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4218 vm_offset_t base, offset, tmpva;
4224 base = trunc_page(va);
4225 offset = va & PAGE_MASK;
4226 size = round_page(offset + size);
4228 /* Only supported on kernel virtual addresses. */
4229 if (base <= VM_MAXUSER_ADDRESS)
4232 /* 4MB pages and pages that aren't mapped aren't supported. */
4233 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) {
4234 pde = pmap_pde(kernel_pmap, tmpva);
4237 if ((*pde & PG_V) == 0)
4240 if ((*pte & PG_V) == 0)
4247 * Ok, all the pages exist and are 4k, so run through them updating
4250 for (tmpva = base; size > 0; ) {
4251 pte = vtopte(tmpva);
4254 * The cache mode bits are all in the low 32-bits of the
4255 * PTE, so we can just spin on updating the low 32-bits.
4258 opte = *(u_int *)pte;
4259 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
4260 npte |= pmap_cache_bits(mode, 0);
4261 PT_SET_VA_MA(pte, npte, TRUE);
4262 } while (npte != opte && (*pte != npte));
4270 * Flush CPU caches to make sure any data isn't cached that
4271 * shouldn't be, etc.
4274 pmap_invalidate_range(kernel_pmap, base, tmpva);
4275 pmap_invalidate_cache_range(base, tmpva);
4281 * perform the pmap work for mincore
4284 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4286 pt_entry_t *ptep, pte;
4292 ptep = pmap_pte(pmap, addr);
4293 pte = (ptep != NULL) ? PT_GET(ptep) : 0;
4294 pmap_pte_release(ptep);
4296 if ((pte & PG_V) != 0) {
4297 val |= MINCORE_INCORE;
4298 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
4299 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4300 if ((pte & PG_A) != 0)
4301 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4303 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4304 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
4305 (pte & (PG_MANAGED | PG_V)) == (PG_MANAGED | PG_V)) {
4306 pa = pte & PG_FRAME;
4307 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4308 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4311 PA_UNLOCK_COND(*locked_pa);
4317 pmap_activate(struct thread *td)
4319 pmap_t pmap, oldpmap;
4324 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4325 oldpmap = PCPU_GET(curpmap);
4326 cpuid = PCPU_GET(cpuid);
4328 CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active);
4329 CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
4331 CPU_CLR(cpuid, &oldpmap->pm_active);
4332 CPU_SET(cpuid, &pmap->pm_active);
4335 cr3 = vtophys(pmap->pm_pdpt);
4337 cr3 = vtophys(pmap->pm_pdir);
4340 * pmap_activate is for the current thread on the current cpu
4342 td->td_pcb->pcb_cr3 = cr3;
4345 PCPU_SET(curpmap, pmap);
4350 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
4355 * Increase the starting virtual address of the given mapping if a
4356 * different alignment might result in more superpage mappings.
4359 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4360 vm_offset_t *addr, vm_size_t size)
4362 vm_offset_t superpage_offset;
4366 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4367 offset += ptoa(object->pg_color);
4368 superpage_offset = offset & PDRMASK;
4369 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
4370 (*addr & PDRMASK) == superpage_offset)
4372 if ((*addr & PDRMASK) < superpage_offset)
4373 *addr = (*addr & ~PDRMASK) + superpage_offset;
4375 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
4382 int i, pdir, offset;
4387 * We need to remove the recursive mapping structure from all
4388 * our pmaps so that Xen doesn't get confused when it restores
4389 * the page tables. The recursive map lives at page directory
4390 * index PTDPTDI. We assume that the suspend code has stopped
4391 * the other vcpus (if any).
4393 LIST_FOREACH(pmap, &allpmaps, pm_list) {
4394 for (i = 0; i < 4; i++) {
4396 * Figure out which page directory (L2) page
4397 * contains this bit of the recursive map and
4398 * the offset within that page of the map
4401 pdir = (PTDPTDI + i) / NPDEPG;
4402 offset = (PTDPTDI + i) % NPDEPG;
4403 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME;
4404 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t);
4407 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF);
4415 int i, pdir, offset;
4420 * Restore the recursive map that we removed on suspend.
4422 LIST_FOREACH(pmap, &allpmaps, pm_list) {
4423 for (i = 0; i < 4; i++) {
4425 * Figure out which page directory (L2) page
4426 * contains this bit of the recursive map and
4427 * the offset within that page of the map
4430 pdir = (PTDPTDI + i) / NPDEPG;
4431 offset = (PTDPTDI + i) % NPDEPG;
4432 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME;
4433 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t);
4434 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V;
4436 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF);
4440 #if defined(PMAP_DEBUG)
4441 pmap_pid_dump(int pid)
4448 sx_slock(&allproc_lock);
4449 FOREACH_PROC_IN_SYSTEM(p) {
4450 if (p->p_pid != pid)
4456 pmap = vmspace_pmap(p->p_vmspace);
4457 for (i = 0; i < NPDEPTD; i++) {
4460 vm_offset_t base = i << PDRSHIFT;
4462 pde = &pmap->pm_pdir[i];
4463 if (pde && pmap_pde_v(pde)) {
4464 for (j = 0; j < NPTEPG; j++) {
4465 vm_offset_t va = base + (j << PAGE_SHIFT);
4466 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
4471 sx_sunlock(&allproc_lock);
4474 pte = pmap_pte(pmap, va);
4475 if (pte && pmap_pte_v(pte)) {
4479 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
4480 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
4481 va, pa, m->hold_count, m->wire_count, m->flags);
4496 sx_sunlock(&allproc_lock);
4503 static void pads(pmap_t pm);
4504 void pmap_pvdump(vm_paddr_t pa);
4506 /* print address space of pmap*/
4514 if (pm == kernel_pmap)
4516 for (i = 0; i < NPDEPTD; i++)
4518 for (j = 0; j < NPTEPG; j++) {
4519 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
4520 if (pm == kernel_pmap && va < KERNBASE)
4522 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
4524 ptep = pmap_pte(pm, va);
4525 if (pmap_pte_v(ptep))
4526 printf("%x:%x ", va, *ptep);
4532 pmap_pvdump(vm_paddr_t pa)
4538 printf("pa %x", pa);
4539 m = PHYS_TO_VM_PAGE(pa);
4540 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4542 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);