2 * Copyright (c) 2000 Hans Petter Selasky. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 *---------------------------------------------------------------------------
27 * i4b_ihfc.h - ihfc common header file
28 * ------------------------------------
30 * last edit-date: [Wed Jul 19 09:40:45 2000]
32 * $Id: i4b_ihfc.h,v 1.9 2000/09/19 13:50:36 hm Exp $
36 *---------------------------------------------------------------------------*/
41 #include <i4b/include/i4b_l3l4.h>
43 /*---------------------------------------------------------------------------*
44 * global stuff (HFC-1/S/SP)
45 *---------------------------------------------------------------------------*/
46 #define DCH_MAX_LEN 264 /* max length of a D frame */
48 #define IHFC_ACTIVATION_TIMEOUT 3*hz /* S0-bus must activate before this time */
50 #define IHFC_IO_BASES 1
52 #define IHFC_DISBUSYTO 500 /* do at least 500 inb's before giving up */
53 #define IHFC_NONBUSYTO 8000 /* do at least 8000 inb's before giving up */
55 #define IHFC_NTMODE 0 /* use TE-mode as default */
56 #define IHFC_DLP 0 /* use (8/9) priority as default */
58 #define IHFC_MAXUNIT 4
60 /* #define IHFC_DEBUG internal debugging enabled *
61 * #undef IHFC_DEBUG internal debugging disabled */
71 #define HFC_1 0x01 /* HFC 2B */
72 #define HFC_S 0x02 /* HFC - S 2BDS0 */
73 #define HFC_SP 0x04 /* HFC - SP 2BDS0 */
74 #define HFC_SPCI 0x08 /* HFC - SPCI 2BDS0 X */
75 #define HFC_S2M 0x10 /* HFC - S2M 2BDS0 X */
76 #define HFC_USB 0x20 /* HFC - USB 2BDS0 X */
78 /*---------------------------------------------------------------------------*
79 * "Help Fix Corruption" macros (HFC-1/S/SP)
81 * NOTE: If the code does not run at splhigh, we will sporadically
82 * lose bytes. On fast PC's (200 Mhz), this is very little noticable.
83 *---------------------------------------------------------------------------*/
84 #define HFC_VAR int _s_ /* declare variable */
85 #define HFC_BEG _s_ = splhigh() /* save spl */
86 #define HFC_END splx(_s_) /* restore spl */
88 /*---------------------------------------------------------------------------*
89 * macros related to i4b linking (HFC-1/S/SP)
90 *---------------------------------------------------------------------------*/
91 #define S_BLINK sc->sc_blinktab[(chan > 3) ? 1 : 0]
92 #define S_BDRVLINK sc->sc_bdrvlinktab[(chan > 3) ? 1 : 0]
94 /*---------------------------------------------------------------------------*
95 * macros related to ihfc_sc (HFC-1/S/SP)
96 *---------------------------------------------------------------------------*/
100 #define S_IOM2 (sc->sc_config.i_adf2 & 0x80)
101 /* 0x80: IOM2 mode selected */
103 #define S_DLP (sc->sc_config.dlp)
104 #define S_NTMODE (sc->sc_config.ntmode)
105 #define S_STDEL (sc->sc_config.stdel)
107 #define S_PHSTATE sc->sc_statemachine.state
108 #define S_STM_T3 sc->sc_statemachine.T3
109 #define S_STM_T3CALLOUT sc->sc_statemachine.T3callout
113 #define S_UNIT sc->sc_unit
114 #define S_FLAG sc->sc_flag
115 #define S_I4BUNIT sc->sc_i4bunit
116 #define S_I4BFLAG sc->sc_i4bflag
120 #define S_IOBASE sc->sc_resources.io_base
121 #define S_IORID sc->sc_resources.io_rid
122 #define S_IRQ sc->sc_resources.irq
123 #define S_IRQRID sc->sc_resources.irq_rid
127 #define S_HFC sc->sc_config.chiptype
128 #define S_IIO sc->sc_config.iio
129 #define S_IIRQ sc->sc_config.iirq
131 /* registers of the HFC-S/SP (write only) */
133 #define S_HFC_CONFIG sc->sc_config.cirm
135 #define S_CIRM sc->sc_config.cirm
136 #define S_CTMT sc->sc_config.ctmt
137 #define S_TEST sc->sc_config.test
138 #define S_SCTRL sc->sc_config.sctrl
139 #define S_CLKDEL sc->sc_config.clkdel
140 #define S_INT_M1 sc->sc_config.int_m1
141 #define S_INT_M2 sc->sc_config.int_m2
142 #define S_CONNECT sc->sc_config.connect
143 #define S_SCTRL_R sc->sc_config.sctrl_r
144 #define S_MST_MODE sc->sc_config.mst_mode
146 /* registers of the HFC-S/SP (read only) */
148 #define S_INT_S1 sc->sc_config.int_s1
150 /* registers of the ISAC (write only) */
152 #define S_ISAC_CONFIG sc->sc_config.i_adf2
154 #define S_ADF1 sc->sc_config.i_adf1
155 #define S_ADF2 sc->sc_config.i_adf2
156 #define S_MASK sc->sc_config.i_mask
157 #define S_MODE sc->sc_config.i_mode
158 #define S_SPCR sc->sc_config.i_spcr
159 #define S_SQXR sc->sc_config.i_sqxr
160 #define S_STCR sc->sc_config.i_stcr
161 #define S_STAR2 sc->sc_config.i_star2
163 /* registers of the ISAC (read only) */
165 #define S_ISTA sc->sc_config.i_ista
167 /* state of the softc */
169 #define S_ENABLED sc->sc_enabled
170 #define S_INTR_ACTIVE sc->sc_intr_active
174 #define S_HDLC_IB sc->sc_fifo.chan[chan].hdlc.ib /* u_short */
175 #define S_HDLC_CRC sc->sc_fifo.chan[chan].hdlc.crc /* u_short */
176 #define S_HDLC_TMP sc->sc_fifo.chan[chan].hdlc.tmp /* u_int */
177 #define S_HDLC_FLAG sc->sc_fifo.chan[chan].hdlc.flag /* u_char */
178 #define S_HDLC_BLEVEL sc->sc_fifo.chan[chan].hdlc.blevel /* u_short */
182 #define S_BYTES sc->sc_fifo.chan[chan].bytes
186 #define S_HDLC_DZ_TAB sc->sc_fifo.dztable
190 #define S_PROT sc->sc_fifo.chan[chan].prot
191 #define S_FILTER sc->sc_fifo.chan[chan].filter
192 #define S_ACTIVITY sc->sc_fifo.chan[chan].activity
193 #define S_LAST_CHAN sc->sc_fifo.last_chan
197 #define RESET_SOFT_CHAN(sc, chan) bzero(&sc->sc_fifo.chan[chan], sizeof(sc->sc_fifo.chan[0]))
201 #define S_TRACE sc->sc_trace
202 #define S_DTRACECOUNT sc->sc_Dtracecount
203 #define S_BTRACECOUNT sc->sc_Btracecount
207 #define S_MBUF sc->sc_fifo.chan[chan].buffer.mbuf
208 #define S_MBUFDUMMY sc->sc_fifo.chan[chan].buffer.mbufdummy
209 #define S_MBUFLEN sc->sc_fifo.chan[chan].buffer.mbuf->m_len
210 #define S_MBUFPKTHDR sc->sc_fifo.chan[chan].buffer.mbuf->m_pkthdr
211 #define S_MBUFDATA sc->sc_fifo.chan[chan].buffer.mbuf->m_data
212 #define S_MBUFDAT sc->sc_fifo.chan[chan].buffer.mbuf->m_dat
214 #define S_IFQUEUE sc->sc_fifo.chan[chan].buffer.ifqueue
218 #define HFC_INIT ihfc_init
219 #define HFC_INTR ((S_HFC & HFC_1) ? ihfc_intr1 : ihfc_intr2)
220 #define HFC_FSM ihfc_fsm
221 #define HFC_CONTROL ihfc_control
227 struct sc_resources {
228 struct resource * io_base[IHFC_IO_BASES];
229 int io_rid [IHFC_IO_BASES];
230 struct resource * irq;
243 struct ifqueue ifqueue; /* data queue */
244 struct mbuf *mbuf; /* current mbuf */
245 struct mbuf *mbufdummy; /* temporary */
252 struct buffer buffer;
253 void (*filter)(struct ihfc_sc *sc, u_char chan);
265 u_short chiptype; /* chiptype (eg. HFC_1) */
266 u_char dlp; /* D-priority */
267 u_short iio; /* internal IO */
268 u_char iirq; /* internal IRQ */
269 u_char ntmode; /* mode */
270 u_char stdel; /* S/T delay */
284 /* isac write only - hfc-1: */
297 /* isac read only - hfc-1: */
301 struct sc_statemachine {
302 u_char state; /* see i4b_ihfc_drv.h */
304 u_char T3; /* T3 running */
305 struct callout_handle T3callout;
308 /*---------------------------------------------------------------------------*
310 *---------------------------------------------------------------------------*/
311 typedef struct ihfc_sc
315 int sc_i4bunit; /* L0IHFCUNIT(sc_unit) */
316 int sc_i4bflag; /* FLAG_TEL_S0_16_3C .. */
318 u_char sc_enabled; /* daemon running if set */
319 u_char sc_intr_active; /* interrupt is active */
322 u_int sc_Btracecount;
323 u_int sc_Dtracecount;
325 struct sc_config sc_config;
326 struct sc_resources sc_resources;
327 struct sc_statemachine sc_statemachine;
329 isdn_link_t sc_blinktab[2];
330 drvr_link_t *sc_bdrvlinktab[2];
332 struct sc_fifo sc_fifo;
335 extern ihfc_sc_t ihfc_softc[];
337 #endif /* _I4B_IHFC_H_ */