2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/syscall.h>
30 #include <machine/asm.h>
31 #include <machine/ia64_cpu.h>
32 #include <machine/intrcnt.h>
33 #include <machine/pte.h>
34 #include <machine/intrcnt.h>
37 .section .data.proc0,"aw"
40 kstack: .space KSTACK_PAGES * PAGE_SIZE
45 * Not really a leaf but we can't return.
46 * The EFI loader passes the physical address of the bootinfo block in
49 ENTRY_NOPROFILE(__start, 1)
55 movl r16=ia64_vector_table // set up IVT early
67 mov r17=KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
71 add sp=r16,r17 // proc0's stack
72 movl gp=__gp // find kernel globals
76 mov ar.bspstore=r16 // switch backing store
81 st8 [r16]=r8 // save the PA of the bootinfo block
82 loadrs // invalidate regs
83 mov r17=IA64_DCR_DEFAULT
88 mov ar.rsc=3 // turn rse back on
94 alloc r16=ar.pfs,0,0,1,0
95 mov out0=r0 // we are linked at the right address
96 ;; // we just need to process fptrs
101 br.call.sptk.many rp=_reloc
107 br.call.sptk.many rp=ia64_init
110 // We have the new bspstore in r8 and the new sp in r9.
111 // Switch onto the new stack and call mi_startup().
129 br.call.sptk.many rp=mi_startup
133 1: br.cond.sptk.few 1b
139 * Arrange for a function to be invoked neatly, after a cpu_switch().
141 * Invokes fork_exit() passing in three arguments: a callout function, an
142 * argument to the callout, and a trapframe pointer. For child processes
143 * returning from fork(2), the argument is a pointer to the child process.
145 * The callout function and its argument is in the trapframe in scratch
146 * registers r2 and r3.
148 ENTRY(fork_trampoline, 0)
153 alloc r14=ar.pfs,0,0,3,0
154 add r15=32+SIZEOF_SPECIAL+8,sp
155 add r16=32+SIZEOF_SPECIAL+16,sp
166 br.call.sptk rp=fork_exit
169 // If we get back here, it means we're a user space process that's
170 // the immediate result of fork(2).
171 .global enter_userland
172 .type enter_userland, @function
177 br.sptk epc_syscall_return
184 * AP wake-up entry point. The handoff state is similar as for the BSP,
185 * as described on page 3-9 of the IPF SAL Specification. The difference
186 * lies in the contents of register b0. For APs this register holds the
187 * return address into the SAL rendezvous routine.
189 * Note that we're responsible for clearing the IRR bit by reading cr.ivr
190 * and issuing the EOI to the local SAPIC.
193 ENTRY_NOPROFILE(os_boot_rendez,0)
194 mov r16=cr.ivr // clear IRR bit
197 mov cr.eoi=r0 // ACK the wake-up
200 rsm IA64_PSR_IC|IA64_PSR_I
202 mov r16 = (5<<8)|(PAGE_SHIFT<<2)|1
208 mov r16 = (6<<8)|(IA64_ID_PAGE_SHIFT<<2)
214 mov r16 = (7<<8)|(IA64_ID_PAGE_SHIFT<<2)
221 movl r16 = PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+ \
222 PTE_PL_KERN+PTE_AR_RWX+PTE_ED
232 mov r18 = IA64_DCR_DEFAULT
241 movl r18 = (IA64_PSR_AC|IA64_PSR_BN|IA64_PSR_DFH|IA64_PSR_DT|IA64_PSR_IC|IA64_PSR_IT|IA64_PSR_RT)
255 movl r16 = ia64_vector_table // set up IVT early
267 mov r18 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
271 mov ar.bspstore = r16
278 alloc r17 = ar.pfs, 0, 0, 0, 0
285 br.call.sptk.few rp = ia64_ap_startup
301 * Create a default interrupt name table. The first entry (vector 0) is
302 * hardwaired to the clock interrupt.
308 .fill INTRNAME_LEN - 5 - 1, 1, ' '
311 .rept INTRCNT_COUNT - 1
313 .byte intr_n / 100 + '0'
314 .byte (intr_n % 100) / 10 + '0'
315 .byte intr_n % 10 + '0'
316 .fill INTRNAME_LEN - 1 - 3 - 1, 1, ' '
323 .fill INTRCNT_COUNT, 8, 0
328 STATIC_ENTRY(_reloc, 1)
329 alloc loc0=ar.pfs,1,2,0,0
332 movl r15=@gprel(_DYNAMIC) // find _DYNAMIC etc.
333 movl r2=@gprel(fptr_storage)
334 movl r3=@gprel(fptr_storage_end)
336 add r15=r15,gp // relocate _DYNAMIC etc.
340 1: ld8 r16=[r15],8 // read r15->d_tag
342 ld8 r17=[r15],8 // and r15->d_val
344 cmp.eq p6,p0=DT_NULL,r16 // done?
345 (p6) br.cond.dpnt.few 2f
347 cmp.eq p6,p0=DT_RELA,r16
349 (p6) add r18=r17,in0 // found rela section
351 cmp.eq p6,p0=DT_RELASZ,r16
353 (p6) mov r19=r17 // found rela size
355 cmp.eq p6,p0=DT_SYMTAB,r16
357 (p6) add r20=r17,in0 // found symbol table
361 cmp.eq p6,p0=DT_SYMENT,r16
363 (p6) setf.sig f9=r17 // found symbol entry size
365 cmp.eq p6,p0=DT_RELAENT,r16
367 (p6) mov r22=r17 // found rela entry size
372 ld8 r15=[r18],8 // read r_offset
374 ld8 r16=[r18],8 // read r_info
375 add r15=r15,in0 // relocate r_offset
377 ld8 r17=[r18],8 // read r_addend
378 sub r19=r19,r22 // update relasz
380 extr.u r23=r16,0,32 // ELF64_R_TYPE(r16)
382 cmp.eq p6,p0=R_IA_64_NONE,r23
383 (p6) br.cond.dpnt.few 3f
385 cmp.eq p6,p0=R_IA_64_REL64LSB,r23
386 (p6) br.cond.dptk.few 4f
389 extr.u r16=r16,32,32 // ELF64_R_SYM(r16)
391 setf.sig f10=r16 // so we can multiply
393 xma.lu f10=f10,f9,f8 // f10=symtab + r_sym*syment
397 add r16=8,r16 // address of st_value
399 ld8 r16=[r16] // read symbol value
401 add r16=r16,in0 // relocate symbol value
404 cmp.eq p6,p0=R_IA_64_DIR64LSB,r23
405 (p6) br.cond.dptk.few 5f
407 cmp.eq p6,p0=R_IA_64_FPTR64LSB,r23
408 (p6) br.cond.dptk.few 6f
412 cmp.ltu p6,p0=0,r19 // more?
413 (p6) br.cond.dptk.few 2b // loop
414 mov r8=0 // success return value
415 br.cond.sptk.few 9f // done
418 add r16=in0,r17 // BD + A
420 st8 [r15]=r16 // word64 (LSB)
424 add r16=r16,r17 // S + A
426 st8 [r15]=r16 // word64 (LSB)
430 movl r17=@gprel(fptr_storage)
432 add r17=r17,gp // start of fptrs
434 7: cmp.geu p6,p0=r17,r2 // end of fptrs?
435 (p6) br.cond.dpnt.few 8f // can't find existing fptr
436 ld8 r20=[r17] // read function from fptr
438 cmp.eq p6,p0=r16,r20 // same function?
440 (p6) st8 [r15]=r17 // reuse fptr
441 (p6) br.cond.sptk.few 3b // done
442 add r17=16,r17 // next fptr
445 8: // allocate new fptr
446 mov r8=1 // failure return value
447 cmp.geu p6,p0=r2,r3 // space left?
448 (p6) br.cond.dpnt.few 9f // bail out
450 st8 [r15]=r2 // install fptr
451 st8 [r2]=r16,8 // write fptr address
453 st8 [r2]=gp,8 // write fptr gp
468 .space 4096*16 // XXX