2 * Copyright (c) 2003,2004 Marcel Moolenaar
3 * Copyright (c) 2000,2001 Doug Rabson
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include "opt_compat.h"
33 #include "opt_kstack_pages.h"
34 #include "opt_msgbuf.h"
35 #include "opt_sched.h"
37 #include <sys/param.h>
39 #include <sys/systm.h>
45 #include <sys/eventhandler.h>
47 #include <sys/imgact.h>
49 #include <sys/kernel.h>
50 #include <sys/linker.h>
52 #include <sys/malloc.h>
54 #include <sys/msgbuf.h>
56 #include <sys/ptrace.h>
57 #include <sys/random.h>
58 #include <sys/reboot.h>
59 #include <sys/sched.h>
60 #include <sys/signalvar.h>
61 #include <sys/syscall.h>
62 #include <sys/syscallsubr.h>
63 #include <sys/sysctl.h>
64 #include <sys/sysproto.h>
65 #include <sys/ucontext.h>
68 #include <sys/vmmeter.h>
69 #include <sys/vnode.h>
73 #include <net/netisr.h>
76 #include <vm/vm_extern.h>
77 #include <vm/vm_kern.h>
78 #include <vm/vm_page.h>
79 #include <vm/vm_map.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_pager.h>
83 #include <machine/bootinfo.h>
84 #include <machine/cpu.h>
85 #include <machine/efi.h>
86 #include <machine/elf.h>
87 #include <machine/fpu.h>
88 #include <machine/intr.h>
89 #include <machine/mca.h>
90 #include <machine/md_var.h>
91 #include <machine/mutex.h>
92 #include <machine/pal.h>
93 #include <machine/pcb.h>
94 #include <machine/reg.h>
95 #include <machine/sal.h>
96 #include <machine/sigframe.h>
98 #include <machine/smp.h>
100 #include <machine/unwind.h>
101 #include <machine/vmparam.h>
103 SYSCTL_NODE(_hw, OID_AUTO, freq, CTLFLAG_RD, 0, "");
104 SYSCTL_NODE(_machdep, OID_AUTO, cpu, CTLFLAG_RD, 0, "");
106 static u_int bus_freq;
107 SYSCTL_UINT(_hw_freq, OID_AUTO, bus, CTLFLAG_RD, &bus_freq, 0,
108 "Bus clock frequency");
110 static u_int cpu_freq;
111 SYSCTL_UINT(_hw_freq, OID_AUTO, cpu, CTLFLAG_RD, &cpu_freq, 0,
112 "CPU clock frequency");
114 static u_int itc_freq;
115 SYSCTL_UINT(_hw_freq, OID_AUTO, itc, CTLFLAG_RD, &itc_freq, 0,
120 u_int64_t pa_bootinfo;
121 struct bootinfo bootinfo;
125 extern u_int64_t kernel_text[], _end[];
127 extern u_int64_t ia64_gateway_page[];
128 extern u_int64_t break_sigtramp[];
129 extern u_int64_t epc_sigtramp[];
131 struct fpswa_iface *fpswa_iface;
133 u_int64_t ia64_pal_base;
134 u_int64_t ia64_port_base;
136 u_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR;
138 struct ia64_pib *ia64_pib;
140 static int ia64_sync_icache_needed;
142 char machine[] = MACHINE;
143 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
145 static char cpu_model[64];
146 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0,
147 "The CPU model name");
149 static char cpu_family[64];
150 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0,
151 "The CPU family name");
154 extern vm_offset_t ksym_start, ksym_end;
158 struct msgbuf *msgbufp = NULL;
160 /* Other subsystems (e.g., ACPI) can hook this later. */
161 void (*cpu_idle_hook)(void) = NULL;
166 #define PHYSMAP_SIZE (2 * VM_PHYSSEG_MAX)
168 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
170 /* must be 2 less so 0 0 can signal end of chunks */
171 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
173 struct kva_md_info kmi;
176 #define Ghz (1000L*Mhz)
178 #define SN_SAL_SET_OS_FEATURE_SET 0x02000066
180 #define OSF_ACPI_ENABLE 2
181 #define OSF_PCISEGMENT_ENABLE 3
183 #include <contrib/dev/acpica/include/acpi.h>
184 #include <contrib/dev/acpica/include/actables.h>
185 #include <dev/acpica/acpivar.h>
188 srat_dump_entry(ACPI_SUBTABLE_HEADER *entry, void *arg)
190 ACPI_SRAT_CPU_AFFINITY *cpu;
191 ACPI_SRAT_MEM_AFFINITY *mem;
195 switch (entry->Type) {
196 case ACPI_SRAT_TYPE_CPU_AFFINITY:
197 cpu = (ACPI_SRAT_CPU_AFFINITY *)entry;
198 domain = cpu->ProximityDomainLo |
199 cpu->ProximityDomainHi[0] << 8 |
200 cpu->ProximityDomainHi[1] << 16 |
201 cpu->ProximityDomainHi[2] << 24;
202 sapicid = (cpu->ApicId << 8) | cpu->LocalSapicEid;
203 printf("SRAT: Sapic ID %u domain %d: %s\n", sapicid, domain,
204 (cpu->Flags & ACPI_SRAT_CPU_ENABLED) ? "enabled" :
207 case ACPI_SRAT_TYPE_MEMORY_AFFINITY:
208 mem = (ACPI_SRAT_MEM_AFFINITY *)entry;
209 printf("SRAT: memory domain %d addr %lx len %lx: %s\n",
210 mem->ProximityDomain, mem->BaseAddress, mem->Length,
211 (mem->Flags & ACPI_SRAT_MEM_ENABLED) ? "enabled" :
215 printf("SRAT: unknown type (%u)\n", entry->Type);
223 struct ia64_sal_result r;
224 ACPI_TABLE_HEADER *tbl;
227 r = ia64_sal_entry(SAL_SGISN_SN_INFO, 0, 0, 0, 0, 0, 0, 0);
228 printf("XXX: %s: stat=%ld, res0=%#lx, res1=%#lx, res2=%#lx\n",
229 __func__, r.sal_status, r.sal_result[0], r.sal_result[1],
231 if (r.sal_status != 0)
234 tbl = ptr = acpi_find_table(ACPI_SIG_SRAT);
235 printf("XXX: %s: SRAT table at %p\n", __func__, ptr);
236 acpi_walk_subtables((char *)ptr + sizeof(ACPI_TABLE_SRAT),
237 (char *)ptr + tbl->Length, srat_dump_entry, ptr);
238 tbl = acpi_find_table(ACPI_SIG_SLIT);
239 printf("XXX: %s: SLIT table at %p\n", __func__, tbl);
246 char *family_name, *model_name;
247 u_int64_t features, tmp;
248 int number, revision, model, family, archrev;
251 * Assumes little-endian.
253 *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0);
254 *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1);
257 tmp = ia64_get_cpuid(3);
258 number = (tmp >> 0) & 0xff;
259 revision = (tmp >> 8) & 0xff;
260 model = (tmp >> 16) & 0xff;
261 family = (tmp >> 24) & 0xff;
262 archrev = (tmp >> 32) & 0xff;
264 family_name = model_name = "unknown";
267 family_name = "Itanium";
268 model_name = "Merced";
271 family_name = "Itanium 2";
274 model_name = "McKinley";
278 * Deerfield is a low-voltage variant based on the
279 * Madison core. We need circumstantial evidence
280 * (i.e. the clock frequency) to identify those.
281 * Allow for roughly 1% error margin.
283 if (cpu_freq > 990 && cpu_freq < 1010)
284 model_name = "Deerfield";
286 model_name = "Madison";
289 model_name = "Madison II";
294 ia64_sync_icache_needed = 1;
296 family_name = "Itanium 2";
299 model_name = "Montecito";
304 snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
305 snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
307 features = ia64_get_cpuid(4);
309 printf("CPU: %s (", model_name);
311 printf("%u Mhz ", cpu_freq);
312 printf("%s)\n", family_name);
313 printf(" Origin = \"%s\" Revision = %d\n", vendor, revision);
314 printf(" Features = 0x%b\n", (u_int32_t) features,
316 "\001LB" /* long branch (brl) instruction. */
317 "\002SD" /* Spontaneous deferral. */
318 "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ );
322 cpu_startup(void *dummy)
326 struct pcpu_stats *pcs;
329 * Good {morning,afternoon,evening,night}.
336 printf("real memory = %ld (%ld MB)\n", ia64_ptob(Maxmem),
337 ia64_ptob(Maxmem) / 1048576);
341 * Display any holes after the first chunk of extended memory.
346 printf("Physical memory chunk(s):\n");
347 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
348 long size1 = phys_avail[indx + 1] - phys_avail[indx];
350 printf("0x%08lx - 0x%08lx, %ld bytes (%ld pages)\n",
351 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
352 size1 >> PAGE_SHIFT);
356 vm_ksubmap_init(&kmi);
358 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
359 ptoa(cnt.v_free_count) / 1048576);
361 if (fpswa_iface == NULL)
362 printf("Warning: no FPSWA package supplied\n");
364 printf("FPSWA Revision = 0x%lx, Entry = %p\n",
365 (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
368 * Set up buffers, so they can be used to read disk labels.
371 vm_pager_bufferinit();
374 * Traverse the MADT to discover IOSAPIC and Local SAPIC
378 ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib));
383 * Create sysctl tree for per-CPU information.
385 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
386 snprintf(nodename, sizeof(nodename), "%u", pc->pc_cpuid);
387 sysctl_ctx_init(&pc->pc_md.sysctl_ctx);
388 pc->pc_md.sysctl_tree = SYSCTL_ADD_NODE(&pc->pc_md.sysctl_ctx,
389 SYSCTL_STATIC_CHILDREN(_machdep_cpu), OID_AUTO, nodename,
390 CTLFLAG_RD, NULL, "");
391 if (pc->pc_md.sysctl_tree == NULL)
394 pcs = &pc->pc_md.stats;
396 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
397 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
398 "nasts", CTLFLAG_RD, &pcs->pcs_nasts,
399 "Number of IPI_AST interrupts");
401 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
402 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
403 "nclks", CTLFLAG_RD, &pcs->pcs_nclks,
404 "Number of clock interrupts");
406 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
407 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
408 "nextints", CTLFLAG_RD, &pcs->pcs_nextints,
409 "Number of ExtINT interrupts");
411 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
412 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
413 "nhighfps", CTLFLAG_RD, &pcs->pcs_nhighfps,
414 "Number of IPI_HIGH_FP interrupts");
416 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
417 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
418 "nhwints", CTLFLAG_RD, &pcs->pcs_nhwints,
419 "Number of hardware (device) interrupts");
421 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
422 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
423 "npreempts", CTLFLAG_RD, &pcs->pcs_npreempts,
424 "Number of IPI_PREEMPT interrupts");
426 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
427 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
428 "nrdvs", CTLFLAG_RD, &pcs->pcs_nrdvs,
429 "Number of IPI_RENDEZVOUS interrupts");
431 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
432 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
433 "nstops", CTLFLAG_RD, &pcs->pcs_nstops,
434 "Number of IPI_STOP interrupts");
436 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
437 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
438 "nstrays", CTLFLAG_RD, &pcs->pcs_nstrays,
439 "Number of stray interrupts");
442 SYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
445 cpu_flush_dcache(void *ptr, size_t len)
449 va = (uintptr_t)ptr & ~31;
450 lim = (uintptr_t)ptr + len;
459 /* Get current clock frequency for the given cpu id. */
461 cpu_est_clockrate(int cpu_id, uint64_t *rate)
464 if (pcpu_find(cpu_id) == NULL || rate == NULL)
466 *rate = (u_long)cpu_freq * 1000000ul;
480 struct ia64_pal_result res;
482 if (cpu_idle_hook != NULL)
485 res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
489 cpu_idle_wakeup(int cpu)
503 cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx)
505 struct pcb *oldpcb, *newpcb;
507 oldpcb = old->td_pcb;
508 #ifdef COMPAT_FREEBSD32
509 ia32_savectx(oldpcb);
511 if (PCPU_GET(fpcurthread) == old)
512 old->td_frame->tf_special.psr |= IA64_PSR_DFH;
513 if (!savectx(oldpcb)) {
514 atomic_store_rel_ptr(&old->td_lock, mtx);
516 newpcb = new->td_pcb;
517 oldpcb->pcb_current_pmap =
518 pmap_switch(newpcb->pcb_current_pmap);
520 #if defined(SCHED_ULE) && defined(SMP)
521 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock)
525 PCPU_SET(curthread, new);
527 #ifdef COMPAT_FREEBSD32
528 ia32_restorectx(newpcb);
531 if (PCPU_GET(fpcurthread) == new)
532 new->td_frame->tf_special.psr &= ~IA64_PSR_DFH;
534 /* We should not get here. */
535 panic("cpu_switch: restorectx() returned");
541 cpu_throw(struct thread *old __unused, struct thread *new)
545 newpcb = new->td_pcb;
546 (void)pmap_switch(newpcb->pcb_current_pmap);
548 #if defined(SCHED_ULE) && defined(SMP)
549 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock)
553 PCPU_SET(curthread, new);
555 #ifdef COMPAT_FREEBSD32
556 ia32_restorectx(newpcb);
560 /* We should not get here. */
561 panic("cpu_throw: restorectx() returned");
566 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
570 * Set pc_acpi_id to "uninitialized".
571 * See sys/dev/acpica/acpi_cpu.c
573 pcpu->pc_acpi_id = 0xffffffff;
577 cpu_pcpu_setup(struct pcpu *pc, u_int acpi_id, u_int sapic_id)
579 struct ia64_sal_result r;
581 pc->pc_acpi_id = acpi_id;
582 pc->pc_md.lid = IA64_LID_SET_SAPIC_ID(sapic_id);
584 r = ia64_sal_entry(SAL_SGISN_SAPIC_INFO, sapic_id, 0, 0, 0, 0, 0, 0);
585 if (r.sal_status == 0) {
586 pc->pc_md.sgisn_nasid = r.sal_result[0];
587 pc->pc_md.sgisn_subnode = r.sal_result[1];
588 pc->pc_md.sgisn_slice = r.sal_result[2];
598 if (td->td_md.md_spinlock_count == 0)
599 td->td_md.md_saved_intr = intr_disable();
600 td->td_md.md_spinlock_count++;
611 td->td_md.md_spinlock_count--;
612 if (td->td_md.md_spinlock_count == 0)
613 intr_restore(td->td_md.md_saved_intr);
617 map_vhpt(uintptr_t vhpt)
622 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
623 PTE_PL_KERN | PTE_AR_RW;
624 pte |= vhpt & PTE_PPN_MASK;
626 __asm __volatile("ptr.d %0,%1" :: "r"(vhpt),
627 "r"(IA64_ID_PAGE_SHIFT<<2));
629 __asm __volatile("mov %0=psr" : "=r"(psr));
630 __asm __volatile("rsm psr.ic|psr.i");
633 ia64_set_itir(IA64_ID_PAGE_SHIFT << 2);
635 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(2), "r"(pte));
636 __asm __volatile("mov psr.l=%0" :: "r" (psr));
646 if (ia64_pal_base == 0)
649 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
650 PTE_PL_KERN | PTE_AR_RWX;
651 pte |= ia64_pal_base & PTE_PPN_MASK;
653 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
654 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2));
656 __asm __volatile("mov %0=psr" : "=r"(psr));
657 __asm __volatile("rsm psr.ic|psr.i");
659 ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base));
660 ia64_set_itir(IA64_ID_PAGE_SHIFT << 2);
662 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(pte));
664 __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte));
665 __asm __volatile("mov psr.l=%0" :: "r" (psr));
670 map_gateway_page(void)
675 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
676 PTE_PL_KERN | PTE_AR_X_RX;
677 pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK;
679 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
680 "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2));
682 __asm __volatile("mov %0=psr" : "=r"(psr));
683 __asm __volatile("rsm psr.ic|psr.i");
685 ia64_set_ifa(VM_MAX_ADDRESS);
686 ia64_set_itir(PAGE_SHIFT << 2);
688 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte));
690 __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte));
691 __asm __volatile("mov psr.l=%0" :: "r" (psr));
694 /* Expose the mapping to userland in ar.k5 */
695 ia64_set_k5(VM_MAX_ADDRESS);
699 freq_ratio(u_long base, u_long ratio)
703 f = (base * (ratio >> 32)) / (ratio & 0xfffffffful);
704 return ((f + 500000) / 1000000);
708 calculate_frequencies(void)
710 struct ia64_sal_result sal;
711 struct ia64_pal_result pal;
713 sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
714 pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
716 if (sal.sal_status == 0 && pal.pal_status == 0) {
718 printf("Platform clock frequency %ld Hz\n",
720 printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
721 "ITC ratio %ld/%ld\n",
722 pal.pal_result[0] >> 32,
723 pal.pal_result[0] & ((1L << 32) - 1),
724 pal.pal_result[1] >> 32,
725 pal.pal_result[1] & ((1L << 32) - 1),
726 pal.pal_result[2] >> 32,
727 pal.pal_result[2] & ((1L << 32) - 1));
729 cpu_freq = freq_ratio(sal.sal_result[0], pal.pal_result[0]);
730 bus_freq = freq_ratio(sal.sal_result[0], pal.pal_result[1]);
731 itc_freq = freq_ratio(sal.sal_result[0], pal.pal_result[2]);
735 struct ia64_init_return
738 struct ia64_init_return ret;
740 vm_offset_t kernstart, kernend;
741 vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1;
744 int metadata_missing;
746 /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
749 * TODO: Disable interrupts, floating point etc.
750 * Maybe flush cache and tlb
752 ia64_set_fpsr(IA64_FPSR_DEFAULT);
755 * TODO: Get critical system information (if possible, from the
756 * information provided by the boot program).
760 * pa_bootinfo is the physical address of the bootinfo block as
761 * passed to us by the loader and set in locore.s.
763 bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo));
765 if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) {
766 bzero(&bootinfo, sizeof(bootinfo));
767 bootinfo.bi_kernend = (vm_offset_t) round_page(_end);
771 * Look for the I/O ports first - we need them for console
774 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
775 switch (md->md_type) {
776 case EFI_MD_TYPE_IOPORT:
777 ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys,
778 md->md_pages * EFI_PAGE_SIZE);
780 case EFI_MD_TYPE_PALCODE:
781 ia64_pal_base = md->md_phys;
786 metadata_missing = 0;
787 if (bootinfo.bi_modulep)
788 preload_metadata = (caddr_t)bootinfo.bi_modulep;
790 metadata_missing = 1;
792 if (envmode == 0 && bootinfo.bi_envp)
793 kern_envp = (caddr_t)bootinfo.bi_envp;
795 kern_envp = static_env;
798 * Look at arguments passed to us and compute boothowto.
800 boothowto = bootinfo.bi_boothowto;
802 if (boothowto & RB_VERBOSE)
806 * Find the beginning and end of the kernel.
808 kernstart = trunc_page(kernel_text);
810 ksym_start = bootinfo.bi_symtab;
811 ksym_end = bootinfo.bi_esymtab;
812 kernend = (vm_offset_t)round_page(ksym_end);
814 kernend = (vm_offset_t)round_page(_end);
816 /* But if the bootstrap tells us otherwise, believe it! */
817 if (bootinfo.bi_kernend)
818 kernend = round_page(bootinfo.bi_kernend);
821 * Setup the PCPU data for the bootstrap processor. It is needed
822 * by printf(). Also, since printf() has critical sections, we
823 * need to initialize at least pc_curthread.
826 ia64_set_k4((u_int64_t)pcpup);
827 pcpu_init(pcpup, 0, sizeof(pcpu0));
828 dpcpu_init((void *)kernend, 0);
829 cpu_pcpu_setup(pcpup, ~0U, ia64_get_lid());
830 kernend += DPCPU_SIZE;
831 PCPU_SET(curthread, &thread0);
834 if (ia64_pal_base != 0) {
835 ia64_pal_base &= ~IA64_ID_PAGE_MASK;
837 * We use a TR to map the first 256M of memory - this might
838 * cover the palcode too.
840 if (ia64_pal_base == 0)
841 printf("PAL code mapped by the kernel's TR\n");
843 printf("PAL code not found\n");
847 * Wire things up so we can call the firmware.
850 efi_boot_minimal(bootinfo.bi_systab);
853 calculate_frequencies();
856 * Initialize the console before we print anything out.
860 /* OUTPUT NOW ALLOWED */
862 if (metadata_missing)
863 printf("WARNING: loader(8) metadata is missing!\n");
867 /* Get FPSWA interface */
868 fpswa_iface = (bootinfo.bi_fpswa == 0) ? NULL :
869 (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa);
871 /* Init basic tunables, including hz */
874 p = getenv("kernelname");
876 strncpy(kernelname, p, sizeof(kernelname) - 1);
880 kernstartpfn = atop(IA64_RR_MASK(kernstart));
881 kernendpfn = atop(IA64_RR_MASK(kernend));
884 * Size the memory regions and load phys_avail[] with the results.
888 * Find out how much memory is available, by looking at
889 * the memory descriptors.
893 printf("Memory descriptor count: %d\n", mdcount);
897 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
899 printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md,
900 md->md_type, md->md_phys, md->md_pages);
903 pfn0 = ia64_btop(round_page(md->md_phys));
904 pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096));
908 if (md->md_type != EFI_MD_TYPE_FREE)
912 * We have a memory descriptor that describes conventional
913 * memory that is for general use. We must determine if the
914 * loader has put the kernel in this region.
916 physmem += (pfn1 - pfn0);
917 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) {
919 * Must compute the location of the kernel
920 * within the segment.
923 printf("Descriptor %p contains kernel\n", mp);
925 if (pfn0 < kernstartpfn) {
927 * There is a chunk before the kernel.
930 printf("Loading chunk before kernel: "
931 "0x%lx / 0x%lx\n", pfn0, kernstartpfn);
933 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
934 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn);
937 if (kernendpfn < pfn1) {
939 * There is a chunk after the kernel.
942 printf("Loading chunk after kernel: "
943 "0x%lx / 0x%lx\n", kernendpfn, pfn1);
945 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn);
946 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
951 * Just load this cluster as one chunk.
954 printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i,
957 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
958 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
963 phys_avail[phys_avail_cnt] = 0;
966 init_param2(physmem);
969 * Initialize error message buffer (at end of core).
971 msgbufp = (struct msgbuf *)pmap_steal_memory(MSGBUF_SIZE);
972 msgbufinit(msgbufp, MSGBUF_SIZE);
974 proc_linkup0(&proc0, &thread0);
976 * Init mapping for kernel stack for proc 0
978 thread0.td_kstack = pmap_steal_memory(KSTACK_PAGES * PAGE_SIZE);
979 thread0.td_kstack_pages = KSTACK_PAGES;
984 * Initialize the rest of proc 0's PCB.
986 * Set the kernel sp, reserving space for an (empty) trapframe,
987 * and make proc0's trapframe pointer point to it for sanity.
988 * Initialise proc0's backing store to start after u area.
990 cpu_thread_alloc(&thread0);
991 thread0.td_frame->tf_flags = FRAME_SYSCALL;
992 thread0.td_pcb->pcb_special.sp =
993 (u_int64_t)thread0.td_frame - 16;
994 thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack;
997 * Initialize the virtual memory system.
1002 * Initialize debuggers, and break into them if appropriate.
1007 if (boothowto & RB_KDB)
1008 kdb_enter(KDB_WHY_BOOTFLAGS,
1009 "Boot flags requested debugger\n");
1015 ret.bspstore = thread0.td_pcb->pcb_special.bspstore;
1016 ret.sp = thread0.td_pcb->pcb_special.sp;
1024 return (bootinfo.bi_hcdp);
1028 bzero(void *buf, size_t len)
1032 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
1036 while (len >= sizeof(u_long) * 8) {
1038 *((u_long*) p + 1) = 0;
1039 *((u_long*) p + 2) = 0;
1040 *((u_long*) p + 3) = 0;
1041 len -= sizeof(u_long) * 8;
1042 *((u_long*) p + 4) = 0;
1043 *((u_long*) p + 5) = 0;
1044 *((u_long*) p + 6) = 0;
1045 *((u_long*) p + 7) = 0;
1046 p += sizeof(u_long) * 8;
1048 while (len >= sizeof(u_long)) {
1050 len -= sizeof(u_long);
1051 p += sizeof(u_long);
1069 u_int64_t start, end, now;
1073 start = ia64_get_itc();
1074 end = start + itc_freq * n;
1075 /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */
1077 now = ia64_get_itc();
1078 } while (now < end || (now > start && end < start));
1084 * Send an interrupt (signal) to a process.
1087 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
1091 struct trapframe *tf;
1092 struct sigacts *psp;
1093 struct sigframe sf, *sfp;
1101 PROC_LOCK_ASSERT(p, MA_OWNED);
1102 sig = ksi->ksi_signo;
1103 code = ksi->ksi_code;
1105 mtx_assert(&psp->ps_mtx, MA_OWNED);
1107 sp = tf->tf_special.sp;
1108 oonstack = sigonstack(sp);
1111 /* save user context */
1112 bzero(&sf, sizeof(struct sigframe));
1113 sf.sf_uc.uc_sigmask = *mask;
1114 sf.sf_uc.uc_stack = td->td_sigstk;
1115 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
1116 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
1119 * Allocate and validate space for the signal handler
1120 * context. Note that if the stack is in P0 space, the
1121 * call to grow() is a nop, and the useracc() check
1122 * will fail if the process has not already allocated
1123 * the space with a `brk'.
1125 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
1126 SIGISMEMBER(psp->ps_sigonstack, sig)) {
1127 sbs = (u_int64_t)td->td_sigstk.ss_sp;
1128 sbs = (sbs + 15) & ~15;
1129 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size);
1130 #if defined(COMPAT_43)
1131 td->td_sigstk.ss_flags |= SS_ONSTACK;
1134 sfp = (struct sigframe *)sp;
1135 sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15);
1137 /* Fill in the siginfo structure for POSIX handlers. */
1138 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
1139 sf.sf_si = ksi->ksi_info;
1140 sf.sf_si.si_signo = sig;
1142 * XXX this shouldn't be here after code in trap.c
1145 sf.sf_si.si_addr = (void*)tf->tf_special.ifa;
1146 code = (u_int64_t)&sfp->sf_si;
1149 mtx_unlock(&psp->ps_mtx);
1152 get_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
1154 /* Copy the frame out to userland. */
1155 if (copyout(&sf, sfp, sizeof(sf)) != 0) {
1157 * Process has trashed its stack; give it an illegal
1158 * instruction to halt it in its tracks.
1161 sigexit(td, SIGILL);
1165 if ((tf->tf_flags & FRAME_SYSCALL) == 0) {
1166 tf->tf_special.psr &= ~IA64_PSR_RI;
1167 tf->tf_special.iip = ia64_get_k5() +
1168 ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page);
1170 tf->tf_special.iip = ia64_get_k5() +
1171 ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page);
1174 * Setup the trapframe to return to the signal trampoline. We pass
1175 * information to the trampoline in the following registers:
1177 * gp new backing store or NULL
1179 * r9 signal code or siginfo pointer
1180 * r10 signal handler (function descriptor)
1182 tf->tf_special.sp = (u_int64_t)sfp - 16;
1183 tf->tf_special.gp = sbs;
1184 tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore;
1185 tf->tf_special.ndirty = 0;
1186 tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat;
1187 tf->tf_scratch.gr8 = sig;
1188 tf->tf_scratch.gr9 = code;
1189 tf->tf_scratch.gr10 = (u_int64_t)catcher;
1192 mtx_lock(&psp->ps_mtx);
1196 * System call to cleanup state after a signal
1197 * has been taken. Reset signal mask and
1198 * stack state from context left by sendsig (above).
1199 * Return to previous pc and psl as specified by
1200 * context left by sendsig. Check carefully to
1201 * make sure that the user has not modified the
1202 * state to gain improper privileges.
1207 sigreturn(struct thread *td,
1208 struct sigreturn_args /* {
1209 ucontext_t *sigcntxp;
1213 struct trapframe *tf;
1220 * Fetch the entire context structure at once for speed.
1221 * We don't use a normal argument to simplify RSE handling.
1223 if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc)))
1226 set_mcontext(td, &uc.uc_mcontext);
1228 #if defined(COMPAT_43)
1229 if (sigonstack(tf->tf_special.sp))
1230 td->td_sigstk.ss_flags |= SS_ONSTACK;
1232 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1234 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
1236 return (EJUSTRETURN);
1239 #ifdef COMPAT_FREEBSD4
1241 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
1244 return sigreturn(td, (struct sigreturn_args *)uap);
1249 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1250 * we want to start a backtrace from the function that caused us to enter
1251 * the debugger. We have the context in the trapframe, but base the trace
1252 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1253 * enough for a backtrace.
1256 makectx(struct trapframe *tf, struct pcb *pcb)
1259 pcb->pcb_special = tf->tf_special;
1260 pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */
1261 save_callee_saved(&pcb->pcb_preserved);
1262 save_callee_saved_fp(&pcb->pcb_preserved_fp);
1266 ia64_flush_dirty(struct thread *td, struct _special *r)
1270 uint64_t bspst, kstk, rnat;
1276 kstk = td->td_kstack + (r->bspstore & 0x1ffUL);
1277 if (td == curthread) {
1278 __asm __volatile("mov ar.rsc=0;;");
1279 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst));
1280 /* Make sure we have all the user registers written out. */
1281 if (bspst - kstk < r->ndirty) {
1282 __asm __volatile("flushrs;;");
1283 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst));
1285 __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat));
1286 __asm __volatile("mov ar.rsc=3");
1287 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty);
1289 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL))
1290 ? *(uint64_t*)(kstk | 0x1f8L) : rnat;
1292 locked = PROC_LOCKED(td->td_proc);
1295 iov.iov_base = (void*)(uintptr_t)kstk;
1296 iov.iov_len = r->ndirty;
1299 uio.uio_offset = r->bspstore;
1300 uio.uio_resid = r->ndirty;
1301 uio.uio_segflg = UIO_SYSSPACE;
1302 uio.uio_rw = UIO_WRITE;
1304 error = proc_rwmem(td->td_proc, &uio);
1306 * XXX proc_rwmem() doesn't currently return ENOSPC,
1307 * so I think it can bogusly return 0. Neither do
1308 * we allow short writes.
1310 if (uio.uio_resid != 0 && error == 0)
1316 r->bspstore += r->ndirty;
1322 get_mcontext(struct thread *td, mcontext_t *mc, int flags)
1324 struct trapframe *tf;
1328 bzero(mc, sizeof(*mc));
1329 mc->mc_special = tf->tf_special;
1330 error = ia64_flush_dirty(td, &mc->mc_special);
1331 if (tf->tf_flags & FRAME_SYSCALL) {
1332 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT;
1333 mc->mc_scratch = tf->tf_scratch;
1334 if (flags & GET_MC_CLEAR_RET) {
1335 mc->mc_scratch.gr8 = 0;
1336 mc->mc_scratch.gr9 = 0;
1337 mc->mc_scratch.gr10 = 0;
1338 mc->mc_scratch.gr11 = 0;
1341 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT;
1342 mc->mc_scratch = tf->tf_scratch;
1343 mc->mc_scratch_fp = tf->tf_scratch_fp;
1345 * XXX If the thread never used the high FP registers, we
1346 * probably shouldn't waste time saving them.
1348 ia64_highfp_save(td);
1349 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID;
1350 mc->mc_high_fp = td->td_pcb->pcb_high_fp;
1352 save_callee_saved(&mc->mc_preserved);
1353 save_callee_saved_fp(&mc->mc_preserved_fp);
1358 set_mcontext(struct thread *td, const mcontext_t *mc)
1361 struct trapframe *tf;
1366 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1367 ("Whoa there! We have more than 8KB of dirty registers!"));
1371 * Only copy the user mask and the restart instruction bit from
1374 psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL |
1375 IA64_PSR_MFH | IA64_PSR_RI;
1376 s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask);
1377 /* We don't have any dirty registers of the new context. */
1379 if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) {
1381 * We can get an async context passed to us while we
1382 * entered the kernel through a syscall: sigreturn(2)
1383 * takes contexts that could previously be the result of
1384 * a trap or interrupt.
1385 * Hence, we cannot assert that the trapframe is not
1386 * a syscall frame, but we can assert that it's at
1387 * least an expected syscall.
1389 if (tf->tf_flags & FRAME_SYSCALL) {
1390 KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo"));
1391 tf->tf_flags &= ~FRAME_SYSCALL;
1393 tf->tf_scratch = mc->mc_scratch;
1394 tf->tf_scratch_fp = mc->mc_scratch_fp;
1395 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID)
1396 td->td_pcb->pcb_high_fp = mc->mc_high_fp;
1398 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo"));
1399 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) {
1400 s.cfm = tf->tf_special.cfm;
1401 s.iip = tf->tf_special.iip;
1402 tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */
1404 tf->tf_scratch = mc->mc_scratch;
1407 restore_callee_saved(&mc->mc_preserved);
1408 restore_callee_saved_fp(&mc->mc_preserved_fp);
1414 * Clear registers on exec.
1417 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1419 struct trapframe *tf;
1420 uint64_t *ksttop, *kst;
1423 ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty +
1424 (tf->tf_special.bspstore & 0x1ffUL));
1427 * We can ignore up to 8KB of dirty registers by masking off the
1428 * lower 13 bits in exception_restore() or epc_syscall(). This
1429 * should be enough for a couple of years, but if there are more
1430 * than 8KB of dirty registers, we lose track of the bottom of
1431 * the kernel stack. The solution is to copy the active part of
1432 * the kernel stack down 1 page (or 2, but not more than that)
1433 * so that we always have less than 8KB of dirty registers.
1435 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1436 ("Whoa there! We have more than 8KB of dirty registers!"));
1438 bzero(&tf->tf_special, sizeof(tf->tf_special));
1439 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */
1440 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch));
1441 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp));
1442 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL;
1443 tf->tf_special.bspstore = IA64_BACKINGSTORE;
1445 * Copy the arguments onto the kernel register stack so that
1446 * they get loaded by the loadrs instruction. Skip over the
1447 * NaT collection points.
1450 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1453 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1455 *kst-- = imgp->ps_strings;
1456 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1459 tf->tf_special.ndirty = (ksttop - kst) << 3;
1460 } else { /* epc syscalls (default). */
1461 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
1462 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
1464 * Write values for out0, out1 and out2 to the user's backing
1465 * store and arrange for them to be restored into the user's
1466 * initial register frame.
1467 * Assumes that (bspstore & 0x1f8) < 0x1e0.
1469 suword((caddr_t)tf->tf_special.bspstore - 24, stack);
1470 suword((caddr_t)tf->tf_special.bspstore - 16, imgp->ps_strings);
1471 suword((caddr_t)tf->tf_special.bspstore - 8, 0);
1474 tf->tf_special.iip = imgp->entry_addr;
1475 tf->tf_special.sp = (stack & ~15) - 16;
1476 tf->tf_special.rsc = 0xf;
1477 tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
1478 tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
1479 IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
1484 ptrace_set_pc(struct thread *td, unsigned long addr)
1488 switch (addr & 0xFUL) {
1490 slot = IA64_PSR_RI_0;
1493 /* XXX we need to deal with MLX bundles here */
1494 slot = IA64_PSR_RI_1;
1497 slot = IA64_PSR_RI_2;
1503 td->td_frame->tf_special.iip = addr & ~0x0FULL;
1504 td->td_frame->tf_special.psr =
1505 (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot;
1510 ptrace_single_step(struct thread *td)
1512 struct trapframe *tf;
1515 * There's no way to set single stepping when we're leaving the
1516 * kernel through the EPC syscall path. The way we solve this is
1517 * by enabling the lower-privilege trap so that we re-enter the
1518 * kernel as soon as the privilege level changes. See trap.c for
1519 * how we proceed from there.
1522 if (tf->tf_flags & FRAME_SYSCALL)
1523 tf->tf_special.psr |= IA64_PSR_LP;
1525 tf->tf_special.psr |= IA64_PSR_SS;
1530 ptrace_clear_single_step(struct thread *td)
1532 struct trapframe *tf;
1535 * Clear any and all status bits we may use to implement single
1539 tf->tf_special.psr &= ~IA64_PSR_SS;
1540 tf->tf_special.psr &= ~IA64_PSR_LP;
1541 tf->tf_special.psr &= ~IA64_PSR_TB;
1546 fill_regs(struct thread *td, struct reg *regs)
1548 struct trapframe *tf;
1551 regs->r_special = tf->tf_special;
1552 regs->r_scratch = tf->tf_scratch;
1553 save_callee_saved(®s->r_preserved);
1558 set_regs(struct thread *td, struct reg *regs)
1560 struct trapframe *tf;
1564 error = ia64_flush_dirty(td, &tf->tf_special);
1566 tf->tf_special = regs->r_special;
1567 tf->tf_special.bspstore += tf->tf_special.ndirty;
1568 tf->tf_special.ndirty = 0;
1569 tf->tf_scratch = regs->r_scratch;
1570 restore_callee_saved(®s->r_preserved);
1576 fill_dbregs(struct thread *td, struct dbreg *dbregs)
1583 set_dbregs(struct thread *td, struct dbreg *dbregs)
1590 fill_fpregs(struct thread *td, struct fpreg *fpregs)
1592 struct trapframe *frame = td->td_frame;
1593 struct pcb *pcb = td->td_pcb;
1595 /* Save the high FP registers. */
1596 ia64_highfp_save(td);
1598 fpregs->fpr_scratch = frame->tf_scratch_fp;
1599 save_callee_saved_fp(&fpregs->fpr_preserved);
1600 fpregs->fpr_high = pcb->pcb_high_fp;
1605 set_fpregs(struct thread *td, struct fpreg *fpregs)
1607 struct trapframe *frame = td->td_frame;
1608 struct pcb *pcb = td->td_pcb;
1610 /* Throw away the high FP registers (should be redundant). */
1611 ia64_highfp_drop(td);
1613 frame->tf_scratch_fp = fpregs->fpr_scratch;
1614 restore_callee_saved_fp(&fpregs->fpr_preserved);
1615 pcb->pcb_high_fp = fpregs->fpr_high;
1620 ia64_sync_icache(vm_offset_t va, vm_offset_t sz)
1624 if (!ia64_sync_icache_needed)