2 * Copyright (c) 2000-2001 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <machine/asm.h>
32 .global ia64_pal_entry
33 ia64_pal_entry: .quad 0
37 * struct ia64_pal_result ia64_call_pal_static(u_int64_t proc,
38 * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
40 ENTRY(ia64_call_pal_static, 4)
49 alloc pfssave=ar.pfs,4,5,0,0
53 movl entry=@gprel(ia64_pal_entry)
54 1: mov palret=ip // for return address
58 mov r28=in0 // procedure number
60 ld8 entry=[entry] // read entry point
61 mov r29=in1 // copy arguments
66 add palret=2f-1b,palret // calculate return address
69 rsm psr.i // disable interrupts
71 br.cond.sptk b6 // call into firmware
79 END(ia64_call_pal_static)
84 * struct ia64_pal_result ia64_call_pal_static_physical(u_int64_t proc,
85 * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
87 ENTRY(ia64_call_pal_static_physical, 4)
96 alloc pfssave=ar.pfs,4,5,0,0
100 movl entry=@gprel(ia64_pal_entry)
101 1: mov palret=ip // for return address
104 mov r28=in0 // procedure number
106 ld8 entry=[entry] // read entry point
107 mov r29=in1 // copy arguments
111 dep entry=0,entry,61,3 // physical address
112 dep palret=0,palret,61,3 // physical address
113 br.call.sptk.many rp=ia64_physical_mode
117 add palret=2f-1b,palret // calculate return address
120 br.cond.sptk b6 // call into firmware
124 br.call.sptk.many rp=ia64_change_mode
131 END(ia64_call_pal_static_physical)
136 * struct ia64_pal_result ia64_call_pal_stacked(u_int64_t proc,
137 * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
139 ENTRY(ia64_call_pal_stacked, 4)
147 alloc pfssave=ar.pfs,4,4,4,0
150 movl entry=@gprel(ia64_pal_entry)
154 mov r28=in0 // procedure number
157 ld8 entry=[entry] // read entry point
158 mov out1=in1 // copy arguments
164 rsm psr.i // disable interrupts
166 br.call.sptk.many rp=b6 // call into firmware
174 END(ia64_call_pal_stacked)
179 * struct ia64_pal_result ia64_call_pal_stacked_physical(u_int64_t proc,
180 * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
182 ENTRY(ia64_call_pal_stacked_physical, 4)
190 alloc pfssave=ar.pfs,4,4,4,0
193 movl entry=@gprel(ia64_pal_entry)
196 mov r28=in0 // procedure number
199 ld8 entry=[entry] // read entry point
200 mov out1=in1 // copy arguments
204 dep entry=0,entry,61,3 // physical address
205 br.call.sptk.many rp=ia64_physical_mode
210 br.call.sptk.many rp=b6 // call into firmware
214 br.call.sptk.many rp=ia64_change_mode
221 END(ia64_call_pal_stacked_physical)