1 /* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
41 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
42 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Christopher G. Demetriou
55 * for the NetBSD Project.
56 * 4. The name of the author may not be used to endorse or promote products
57 * derived from this software without specific prior written permission
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
72 #ifndef _MACHINE_BUS_H_
73 #define _MACHINE_BUS_H_
75 #include <machine/_bus.h>
76 #include <machine/cpufunc.h>
79 * Values for the ia64 bus space tag, not to be used directly by MI code.
81 #define IA64_BUS_SPACE_IO 0 /* space is i/o space */
82 #define IA64_BUS_SPACE_MEM 1 /* space is mem space */
84 #define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
85 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
86 #define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFF
87 #define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
88 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
89 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
91 #define BUS_SPACE_UNRESTRICTED (~0)
94 * Map a region of device bus space into CPU virtual address space.
97 static __inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
98 bus_size_t size, int flags,
99 bus_space_handle_t *bshp);
102 bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
103 bus_size_t size __unused, int flags __unused,
104 bus_space_handle_t *bshp)
112 * Unmap a region of device bus space.
115 bus_space_unmap(bus_space_tag_t bst __unused, bus_space_handle_t bsh __unused,
116 bus_size_t size __unused)
122 * Get a new handle for a subregion of an already-mapped area of bus space.
125 bus_space_subregion(bus_space_tag_t bst, bus_space_handle_t bsh,
126 bus_size_t ofs, bus_size_t size, bus_space_handle_t *nbshp)
134 * Allocate a region of memory that is accessible to devices in bus space.
137 bus_space_alloc(bus_space_tag_t bst, bus_addr_t rstart, bus_addr_t rend,
138 bus_size_t size, bus_size_t align, bus_size_t boundary, int flags,
139 bus_addr_t *addrp, bus_space_handle_t *bshp);
143 * Free a region of bus space accessible memory.
146 bus_space_free(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t size);
150 * Bus read/write barrier method.
152 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
153 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
156 bus_space_barrier(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
157 bus_size_t size, int flags)
165 * Read 1 unit of data from bus space described by the tag, handle and ofs
166 * tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
169 static __inline uint8_t
170 bus_space_read_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
172 uint8_t __volatile *bsp;
173 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
174 __MEMIO_ADDR(bsh + ofs);
178 static __inline uint16_t
179 bus_space_read_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
181 uint16_t __volatile *bsp;
182 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
183 __MEMIO_ADDR(bsh + ofs);
187 static __inline uint32_t
188 bus_space_read_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
190 uint32_t __volatile *bsp;
191 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
192 __MEMIO_ADDR(bsh + ofs);
196 static __inline uint64_t
197 bus_space_read_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
199 uint64_t __volatile *bsp;
200 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
201 __MEMIO_ADDR(bsh + ofs);
207 * Write 1 unit of data to bus space described by the tag, handle and ofs
208 * tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
209 * data is passed by value.
212 bus_space_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
215 uint8_t __volatile *bsp;
216 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
217 __MEMIO_ADDR(bsh + ofs);
222 bus_space_write_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
225 uint16_t __volatile *bsp;
226 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
227 __MEMIO_ADDR(bsh + ofs);
232 bus_space_write_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
235 uint32_t __volatile *bsp;
236 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
237 __MEMIO_ADDR(bsh + ofs);
242 bus_space_write_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
245 uint64_t __volatile *bsp;
246 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
247 __MEMIO_ADDR(bsh + ofs);
253 * Read count units of data from bus space described by the tag, handle and
254 * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
255 * data is returned in the buffer passed by reference.
258 bus_space_read_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
259 bus_size_t ofs, uint8_t *bufp, size_t count)
261 uint8_t __volatile *bsp;
262 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
263 __MEMIO_ADDR(bsh + ofs);
269 bus_space_read_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
270 bus_size_t ofs, uint16_t *bufp, size_t count)
272 uint16_t __volatile *bsp;
273 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
274 __MEMIO_ADDR(bsh + ofs);
280 bus_space_read_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
281 bus_size_t ofs, uint32_t *bufp, size_t count)
283 uint32_t __volatile *bsp;
284 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
285 __MEMIO_ADDR(bsh + ofs);
291 bus_space_read_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
292 bus_size_t ofs, uint64_t *bufp, size_t count)
294 uint64_t __volatile *bsp;
295 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
296 __MEMIO_ADDR(bsh + ofs);
303 * Write count units of data to bus space described by the tag, handle and
304 * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
305 * data is read from the buffer passed by reference.
308 bus_space_write_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
309 bus_size_t ofs, const uint8_t *bufp, size_t count)
311 uint8_t __volatile *bsp;
312 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
313 __MEMIO_ADDR(bsh + ofs);
319 bus_space_write_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
320 bus_size_t ofs, const uint16_t *bufp, size_t count)
322 uint16_t __volatile *bsp;
323 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
324 __MEMIO_ADDR(bsh + ofs);
330 bus_space_write_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
331 bus_size_t ofs, const uint32_t *bufp, size_t count)
333 uint32_t __volatile *bsp;
334 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
335 __MEMIO_ADDR(bsh + ofs);
341 bus_space_write_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
342 bus_size_t ofs, const uint64_t *bufp, size_t count)
344 uint64_t __volatile *bsp;
345 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
346 __MEMIO_ADDR(bsh + ofs);
353 * Read count units of data from bus space described by the tag, handle and
354 * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
355 * data is written to the buffer passed by reference and read from successive
356 * bus space addresses. Access is unordered.
359 bus_space_read_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
360 bus_size_t ofs, uint8_t *bufp, size_t count)
362 uint8_t __volatile *bsp;
363 while (count-- > 0) {
364 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
365 __MEMIO_ADDR(bsh + ofs);
372 bus_space_read_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
373 bus_size_t ofs, uint16_t *bufp, size_t count)
375 uint16_t __volatile *bsp;
376 while (count-- > 0) {
377 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
378 __MEMIO_ADDR(bsh + ofs);
385 bus_space_read_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
386 bus_size_t ofs, uint32_t *bufp, size_t count)
388 uint32_t __volatile *bsp;
389 while (count-- > 0) {
390 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
391 __MEMIO_ADDR(bsh + ofs);
398 bus_space_read_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
399 bus_size_t ofs, uint64_t *bufp, size_t count)
401 uint64_t __volatile *bsp;
402 while (count-- > 0) {
403 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
404 __MEMIO_ADDR(bsh + ofs);
412 * Write count units of data from bus space described by the tag, handle and
413 * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
414 * data is read from the buffer passed by reference and written to successive
415 * bus space addresses. Access is unordered.
418 bus_space_write_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
419 bus_size_t ofs, const uint8_t *bufp, size_t count)
421 uint8_t __volatile *bsp;
422 while (count-- > 0) {
423 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
424 __MEMIO_ADDR(bsh + ofs);
431 bus_space_write_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
432 bus_size_t ofs, const uint16_t *bufp, size_t count)
434 uint16_t __volatile *bsp;
435 while (count-- > 0) {
436 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
437 __MEMIO_ADDR(bsh + ofs);
444 bus_space_write_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
445 bus_size_t ofs, const uint32_t *bufp, size_t count)
447 uint32_t __volatile *bsp;
448 while (count-- > 0) {
449 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
450 __MEMIO_ADDR(bsh + ofs);
457 bus_space_write_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
458 bus_size_t ofs, const uint64_t *bufp, size_t count)
460 uint64_t __volatile *bsp;
461 while (count-- > 0) {
462 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
463 __MEMIO_ADDR(bsh + ofs);
471 * Write count units of data from bus space described by the tag, handle and
472 * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
473 * data is passed by value. Writes are unordered.
476 bus_space_set_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
477 bus_size_t ofs, uint8_t val, size_t count)
479 uint8_t __volatile *bsp;
480 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
481 __MEMIO_ADDR(bsh + ofs);
487 bus_space_set_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
488 bus_size_t ofs, uint16_t val, size_t count)
490 uint16_t __volatile *bsp;
491 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
492 __MEMIO_ADDR(bsh + ofs);
498 bus_space_set_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
499 bus_size_t ofs, uint32_t val, size_t count)
501 uint32_t __volatile *bsp;
502 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
503 __MEMIO_ADDR(bsh + ofs);
509 bus_space_set_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
510 bus_size_t ofs, uint64_t val, size_t count)
512 uint64_t __volatile *bsp;
513 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
514 __MEMIO_ADDR(bsh + ofs);
521 * Write count units of data from bus space described by the tag, handle and
522 * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
523 * data is passed by value and written to successive bus space addresses.
524 * Writes are unordered.
527 bus_space_set_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
528 bus_size_t ofs, uint8_t val, size_t count)
530 uint8_t __volatile *bsp;
531 while (count-- > 0) {
532 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
533 __MEMIO_ADDR(bsh + ofs);
540 bus_space_set_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
541 bus_size_t ofs, uint16_t val, size_t count)
543 uint16_t __volatile *bsp;
544 while (count-- > 0) {
545 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
546 __MEMIO_ADDR(bsh + ofs);
553 bus_space_set_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
554 bus_size_t ofs, uint32_t val, size_t count)
556 uint32_t __volatile *bsp;
557 while (count-- > 0) {
558 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
559 __MEMIO_ADDR(bsh + ofs);
566 bus_space_set_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
567 bus_size_t ofs, uint64_t val, size_t count)
569 uint64_t __volatile *bsp;
570 while (count-- > 0) {
571 bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
572 __MEMIO_ADDR(bsh + ofs);
580 * Copy count units of data from bus space described by the tag and the first
581 * handle and ofs pair to bus space described by the tag and the second handle
582 * and ofs pair. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes.
583 * The data is read from successive bus space addresses and also written to
584 * successive bus space addresses. Both reads and writes are unordered.
587 bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t bsh1,
588 bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
591 uint8_t __volatile *dstp, *srcp;
597 while (count-- > 0) {
598 if (bst == IA64_BUS_SPACE_IO) {
599 srcp = __PIO_ADDR(src);
600 dstp = __PIO_ADDR(dst);
602 srcp = __MEMIO_ADDR(src);
603 dstp = __MEMIO_ADDR(dst);
610 while (count-- > 0) {
611 if (bst == IA64_BUS_SPACE_IO) {
612 srcp = __PIO_ADDR(src);
613 dstp = __PIO_ADDR(dst);
615 srcp = __MEMIO_ADDR(src);
616 dstp = __MEMIO_ADDR(dst);
626 bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t bsh1,
627 bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
630 uint16_t __volatile *dstp, *srcp;
634 src += (count - 1) << 1;
635 dst += (count - 1) << 1;
636 while (count-- > 0) {
637 if (bst == IA64_BUS_SPACE_IO) {
638 srcp = __PIO_ADDR(src);
639 dstp = __PIO_ADDR(dst);
641 srcp = __MEMIO_ADDR(src);
642 dstp = __MEMIO_ADDR(dst);
649 while (count-- > 0) {
650 if (bst == IA64_BUS_SPACE_IO) {
651 srcp = __PIO_ADDR(src);
652 dstp = __PIO_ADDR(dst);
654 srcp = __MEMIO_ADDR(src);
655 dstp = __MEMIO_ADDR(dst);
665 bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t bsh1,
666 bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
669 uint32_t __volatile *dstp, *srcp;
673 src += (count - 1) << 2;
674 dst += (count - 1) << 2;
675 while (count-- > 0) {
676 if (bst == IA64_BUS_SPACE_IO) {
677 srcp = __PIO_ADDR(src);
678 dstp = __PIO_ADDR(dst);
680 srcp = __MEMIO_ADDR(src);
681 dstp = __MEMIO_ADDR(dst);
688 while (count-- > 0) {
689 if (bst == IA64_BUS_SPACE_IO) {
690 srcp = __PIO_ADDR(src);
691 dstp = __PIO_ADDR(dst);
693 srcp = __MEMIO_ADDR(src);
694 dstp = __MEMIO_ADDR(dst);
704 bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1,
705 bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
708 uint64_t __volatile *dstp, *srcp;
712 src += (count - 1) << 3;
713 dst += (count - 1) << 3;
714 while (count-- > 0) {
715 if (bst == IA64_BUS_SPACE_IO) {
716 srcp = __PIO_ADDR(src);
717 dstp = __PIO_ADDR(dst);
719 srcp = __MEMIO_ADDR(src);
720 dstp = __MEMIO_ADDR(dst);
727 while (count-- > 0) {
728 if (bst == IA64_BUS_SPACE_IO) {
729 srcp = __PIO_ADDR(src);
730 dstp = __PIO_ADDR(dst);
732 srcp = __MEMIO_ADDR(src);
733 dstp = __MEMIO_ADDR(dst);
744 * Stream accesses are the same as normal accesses on ia64; there are no
745 * supported bus systems with an endianess different from the host one.
747 #define bus_space_read_stream_1(t, h, o) \
748 bus_space_read_1(t, h, o)
749 #define bus_space_read_stream_2(t, h, o) \
750 bus_space_read_2(t, h, o)
751 #define bus_space_read_stream_4(t, h, o) \
752 bus_space_read_4(t, h, o)
753 #define bus_space_read_stream_8(t, h, o) \
754 bus_space_read_8(t, h, o)
756 #define bus_space_read_multi_stream_1(t, h, o, a, c) \
757 bus_space_read_multi_1(t, h, o, a, c)
758 #define bus_space_read_multi_stream_2(t, h, o, a, c) \
759 bus_space_read_multi_2(t, h, o, a, c)
760 #define bus_space_read_multi_stream_4(t, h, o, a, c) \
761 bus_space_read_multi_4(t, h, o, a, c)
762 #define bus_space_read_multi_stream_8(t, h, o, a, c) \
763 bus_space_read_multi_8(t, h, o, a, c)
765 #define bus_space_write_stream_1(t, h, o, v) \
766 bus_space_write_1(t, h, o, v)
767 #define bus_space_write_stream_2(t, h, o, v) \
768 bus_space_write_2(t, h, o, v)
769 #define bus_space_write_stream_4(t, h, o, v) \
770 bus_space_write_4(t, h, o, v)
771 #define bus_space_write_stream_8(t, h, o, v) \
772 bus_space_write_8(t, h, o, v)
774 #define bus_space_write_multi_stream_1(t, h, o, a, c) \
775 bus_space_write_multi_1(t, h, o, a, c)
776 #define bus_space_write_multi_stream_2(t, h, o, a, c) \
777 bus_space_write_multi_2(t, h, o, a, c)
778 #define bus_space_write_multi_stream_4(t, h, o, a, c) \
779 bus_space_write_multi_4(t, h, o, a, c)
780 #define bus_space_write_multi_stream_8(t, h, o, a, c) \
781 bus_space_write_multi_8(t, h, o, a, c)
783 #define bus_space_set_multi_stream_1(t, h, o, v, c) \
784 bus_space_set_multi_1(t, h, o, v, c)
785 #define bus_space_set_multi_stream_2(t, h, o, v, c) \
786 bus_space_set_multi_2(t, h, o, v, c)
787 #define bus_space_set_multi_stream_4(t, h, o, v, c) \
788 bus_space_set_multi_4(t, h, o, v, c)
789 #define bus_space_set_multi_stream_8(t, h, o, v, c) \
790 bus_space_set_multi_8(t, h, o, v, c)
792 #define bus_space_read_region_stream_1(t, h, o, a, c) \
793 bus_space_read_region_1(t, h, o, a, c)
794 #define bus_space_read_region_stream_2(t, h, o, a, c) \
795 bus_space_read_region_2(t, h, o, a, c)
796 #define bus_space_read_region_stream_4(t, h, o, a, c) \
797 bus_space_read_region_4(t, h, o, a, c)
798 #define bus_space_read_region_stream_8(t, h, o, a, c) \
799 bus_space_read_region_8(t, h, o, a, c)
801 #define bus_space_write_region_stream_1(t, h, o, a, c) \
802 bus_space_write_region_1(t, h, o, a, c)
803 #define bus_space_write_region_stream_2(t, h, o, a, c) \
804 bus_space_write_region_2(t, h, o, a, c)
805 #define bus_space_write_region_stream_4(t, h, o, a, c) \
806 bus_space_write_region_4(t, h, o, a, c)
807 #define bus_space_write_region_stream_8(t, h, o, a, c) \
808 bus_space_write_region_8(t, h, o, a, c)
810 #define bus_space_set_region_stream_1(t, h, o, v, c) \
811 bus_space_set_region_1(t, h, o, v, c)
812 #define bus_space_set_region_stream_2(t, h, o, v, c) \
813 bus_space_set_region_2(t, h, o, v, c)
814 #define bus_space_set_region_stream_4(t, h, o, v, c) \
815 bus_space_set_region_4(t, h, o, v, c)
816 #define bus_space_set_region_stream_8(t, h, o, v, c) \
817 bus_space_set_region_8(t, h, o, v, c)
819 #define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
820 bus_space_copy_region_1(t, h1, o1, h2, o2, c)
821 #define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
822 bus_space_copy_region_2(t, h1, o1, h2, o2, c)
823 #define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
824 bus_space_copy_region_4(t, h1, o1, h2, o2, c)
825 #define bus_space_copy_region_stream_8(t, h1, o1, h2, o2, c) \
826 bus_space_copy_region_8(t, h1, o1, h2, o2, c)
828 #include <machine/bus_dma.h>
830 #endif /* _MACHINE_BUS_H_ */