2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifndef _MACHINE_CPUFUNC_H_
30 #define _MACHINE_CPUFUNC_H_
34 #include <sys/types.h>
35 #include <machine/ia64_cpu.h>
36 #include <machine/vmparam.h>
45 __asm __volatile("break 0x80100"); /* XXX use linux value */
49 #define HAVE_INLINE_FFS
54 return (__builtin_ffs(mask));
59 extern uint64_t ia64_port_base;
60 #define __MEMIO_ADDR(x) (__volatile void*)(IA64_PHYS_TO_RR6(x))
61 #define __PIO_ADDR(x) (__volatile void*)(ia64_port_base | \
62 (((x) & 0xFFFC) << 10) | ((x) & 0xFFF))
65 * I/O port reads with ia32 semantics.
67 static __inline uint8_t
68 inb(unsigned int port)
70 __volatile uint8_t *p;
80 static __inline uint16_t
81 inw(unsigned int port)
83 __volatile uint16_t *p;
93 static __inline uint32_t
94 inl(unsigned int port)
107 insb(unsigned int port, void *addr, size_t count)
115 insw(unsigned int port, void *addr, size_t count)
117 uint16_t *buf = addr;
123 insl(unsigned int port, void *addr, size_t count)
125 uint32_t *buf = addr;
131 outb(unsigned int port, uint8_t data)
134 p = __PIO_ADDR(port);
142 outw(unsigned int port, uint16_t data)
144 volatile uint16_t *p;
145 p = __PIO_ADDR(port);
153 outl(unsigned int port, uint32_t data)
155 volatile uint32_t *p;
156 p = __PIO_ADDR(port);
164 outsb(unsigned int port, const void *addr, size_t count)
166 const uint8_t *buf = addr;
172 outsw(unsigned int port, const void *addr, size_t count)
174 const uint16_t *buf = addr;
180 outsl(unsigned int port, const void *addr, size_t count)
182 const uint32_t *buf = addr;
190 __asm __volatile ("rsm psr.i");
196 __asm __volatile ("ssm psr.i;; srlz.d");
199 static __inline register_t
203 __asm __volatile ("mov %0=psr;;" : "=r"(psr));
205 return ((psr & IA64_PSR_I) ? 1 : 0);
209 intr_restore(register_t ie)
217 #endif /* !_MACHINE_CPUFUNC_H_ */