2 /* From: NetBSD: ieee.h,v 1.2 1997/04/06 08:47:27 cgd Exp */
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
8 * This software was developed by the Computer Systems Engineering group
9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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36 * @(#)ieee.h 8.1 (Berkeley) 6/11/93
38 * from: Header: ieee.h,v 1.7 92/11/26 02:04:37 torek Exp
42 * ieee.h defines the machine-dependent layout of the machine's IEEE
43 * floating point. It does *not* define (yet?) any of the rounding
44 * mode bits, exceptions, and so forth.
48 * Define the number of bits in each fraction and exponent.
51 * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented
54 * as fractions that look like 0.fffff x 2 . This means that
57 * the number 0.10000 x 2 , for instance, is the same as the normalized
60 * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero
63 * in the fraction; to represent 2 , we need two, and so on. This
65 * (-exp_bias-fracbits+1)
66 * implies that the smallest denormalized number is 2
68 * for whichever format we are talking about: for single precision, for
71 * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and
73 * -149 == -127 - 23 + 1.
76 #define SNG_FRACBITS 23
78 #define DBL_EXPBITS 11
79 #define DBL_FRACBITS 52
95 * Floats whose exponent is in [1..INFNAN) (of whatever type) are
96 * `normal'. Floats whose exponent is INFNAN are either Inf or NaN.
97 * Floats whose exponent is zero are either zero (iff all fraction
98 * bits are zero) or subnormal values.
100 * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
101 * high fraction; if the bit is set, it is a `quiet NaN'.
103 #define SNG_EXP_INFNAN 255
104 #define DBL_EXP_INFNAN 2047
107 #define SNG_QUIETNAN (1 << 22)
108 #define DBL_QUIETNAN (1 << 19)
114 #define SNG_EXP_BIAS 127
115 #define DBL_EXP_BIAS 1023