2 * Copyright (c) 2002 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #ifndef _MACHINE_MCA_H_
30 #define _MACHINE_MCA_H_
32 struct mca_record_header {
33 uint64_t rh_seqnr; /* Record id. */
34 uint8_t rh_major; /* BCD (=02). */
35 uint8_t rh_minor; /* BCD (=00). */
36 uint8_t rh_error; /* Error severity. */
37 #define MCA_RH_ERROR_RECOVERABLE 0
38 #define MCA_RH_ERROR_FATAL 1
39 #define MCA_RH_ERROR_CORRECTED 2
41 #define MCA_RH_FLAGS_PLATFORM_ID 0x01 /* Platform_id present. */
42 uint32_t rh_length; /* Size including header. */
44 #define MCA_RH_TIME_SEC 0
45 #define MCA_RH_TIME_MIN 1
46 #define MCA_RH_TIME_HOUR 2
47 #define MCA_RH_TIME_MDAY 4
48 #define MCA_RH_TIME_MON 5
49 #define MCA_RH_TIME_YEAR 6
50 #define MCA_RH_TIME_CENT 7
51 struct uuid rh_platform;
54 struct mca_section_header {
56 uint8_t sh_major; /* BCD (=02). */
57 uint8_t sh_minor; /* BCD (=00). */
59 #define MCA_SH_FLAGS_CORRECTED 0x01 /* Error has been corrected. */
60 #define MCA_SH_FLAGS_PROPAGATE 0x02 /* Possible propagation. */
61 #define MCA_SH_FLAGS_RESET 0x04 /* Reset device before use. */
62 #define MCA_SH_FLAGS_VALID 0x80 /* Flags are valid. */
64 uint32_t sh_length; /* Size including header. */
67 struct mca_cpu_record {
69 #define MCA_CPU_FLAGS_ERRMAP (1ULL << 0)
70 #define MCA_CPU_FLAGS_STATE (1ULL << 1)
71 #define MCA_CPU_FLAGS_CR_LID (1ULL << 2)
72 #define MCA_CPU_FLAGS_PSI_STRUCT (1ULL << 3)
73 #define MCA_CPU_FLAGS_CACHE(x) (((x) >> 4) & 15)
74 #define MCA_CPU_FLAGS_TLB(x) (((x) >> 8) & 15)
75 #define MCA_CPU_FLAGS_BUS(x) (((x) >> 12) & 15)
76 #define MCA_CPU_FLAGS_REG(x) (((x) >> 16) & 15)
77 #define MCA_CPU_FLAGS_MS(x) (((x) >> 20) & 15)
78 #define MCA_CPU_FLAGS_CPUID (1ULL << 24)
82 /* Nx cpu_mod (cache). */
83 /* Nx cpu_mod (TLB). */
84 /* Nx cpu_mod (bus). */
85 /* Nx cpu_mod (reg). */
86 /* Nx cpu_mod (MS). */
91 struct mca_cpu_cpuid {
96 uint64_t cpu_mod_flags;
97 #define MCA_CPU_MOD_FLAGS_INFO (1ULL << 0)
98 #define MCA_CPU_MOD_FLAGS_REQID (1ULL << 1)
99 #define MCA_CPU_MOD_FLAGS_RSPID (1ULL << 2)
100 #define MCA_CPU_MOD_FLAGS_TGTID (1ULL << 3)
101 #define MCA_CPU_MOD_FLAGS_IP (1ULL << 4)
102 uint64_t cpu_mod_info;
103 uint64_t cpu_mod_reqid;
104 uint64_t cpu_mod_rspid;
105 uint64_t cpu_mod_tgtid;
110 uint64_t cpu_psi_flags;
111 #define MCA_CPU_PSI_FLAGS_STATE (1ULL << 0)
112 #define MCA_CPU_PSI_FLAGS_BR (1ULL << 1)
113 #define MCA_CPU_PSI_FLAGS_CR (1ULL << 2)
114 #define MCA_CPU_PSI_FLAGS_AR (1ULL << 3)
115 #define MCA_CPU_PSI_FLAGS_RR (1ULL << 4)
116 #define MCA_CPU_PSI_FLAGS_FR (1ULL << 5)
117 uint8_t cpu_psi_state[1024]; /* XXX variable? */
118 uint64_t cpu_psi_br[8];
119 uint64_t cpu_psi_cr[128]; /* XXX variable? */
120 uint64_t cpu_psi_ar[128]; /* XXX variable? */
121 uint64_t cpu_psi_rr[8];
122 uint64_t cpu_psi_fr[256]; /* 16 bytes per register! */
125 struct mca_mem_record {
127 #define MCA_MEM_FLAGS_STATUS (1ULL << 0)
128 #define MCA_MEM_FLAGS_ADDR (1ULL << 1)
129 #define MCA_MEM_FLAGS_ADDRMASK (1ULL << 2)
130 #define MCA_MEM_FLAGS_NODE (1ULL << 3)
131 #define MCA_MEM_FLAGS_CARD (1ULL << 4)
132 #define MCA_MEM_FLAGS_MODULE (1ULL << 5)
133 #define MCA_MEM_FLAGS_BANK (1ULL << 6)
134 #define MCA_MEM_FLAGS_DEVICE (1ULL << 7)
135 #define MCA_MEM_FLAGS_ROW (1ULL << 8)
136 #define MCA_MEM_FLAGS_COLUMN (1ULL << 9)
137 #define MCA_MEM_FLAGS_BITPOS (1ULL << 10)
138 #define MCA_MEM_FLAGS_REQID (1ULL << 11)
139 #define MCA_MEM_FLAGS_RSPID (1ULL << 12)
140 #define MCA_MEM_FLAGS_TGTID (1ULL << 13)
141 #define MCA_MEM_FLAGS_BUSDATA (1ULL << 14)
142 #define MCA_MEM_FLAGS_OEM_ID (1ULL << 15)
143 #define MCA_MEM_FLAGS_OEM_DATA (1ULL << 16)
146 uint64_t mem_addrmask;
158 uint64_t mem_busdata;
159 struct uuid mem_oem_id;
160 uint16_t mem_oem_length; /* Size of OEM data. */
161 /* N bytes of OEM platform data. */
164 struct mca_pcibus_record {
165 uint64_t pcibus_flags;
166 #define MCA_PCIBUS_FLAGS_STATUS (1ULL << 0)
167 #define MCA_PCIBUS_FLAGS_ERROR (1ULL << 1)
168 #define MCA_PCIBUS_FLAGS_BUS (1ULL << 2)
169 #define MCA_PCIBUS_FLAGS_ADDR (1ULL << 3)
170 #define MCA_PCIBUS_FLAGS_DATA (1ULL << 4)
171 #define MCA_PCIBUS_FLAGS_CMD (1ULL << 5)
172 #define MCA_PCIBUS_FLAGS_REQID (1ULL << 6)
173 #define MCA_PCIBUS_FLAGS_RSPID (1ULL << 7)
174 #define MCA_PCIBUS_FLAGS_TGTID (1ULL << 8)
175 #define MCA_PCIBUS_FLAGS_OEM_ID (1ULL << 9)
176 #define MCA_PCIBUS_FLAGS_OEM_DATA (1ULL << 10)
177 uint64_t pcibus_status;
178 uint16_t pcibus_error;
181 uint64_t pcibus_addr;
182 uint64_t pcibus_data;
184 uint64_t pcibus_reqid;
185 uint64_t pcibus_rspid;
186 uint64_t pcibus_tgtid;
187 struct uuid pcibus_oem_id;
188 uint16_t pcibus_oem_length; /* Size of OEM data. */
189 /* N bytes of OEM platform data. */
192 struct mca_pcidev_record {
193 uint64_t pcidev_flags;
194 #define MCA_PCIDEV_FLAGS_STATUS (1ULL << 0)
195 #define MCA_PCIDEV_FLAGS_INFO (1ULL << 1)
196 #define MCA_PCIDEV_FLAGS_REG_MEM (1ULL << 2)
197 #define MCA_PCIDEV_FLAGS_REG_IO (1ULL << 3)
198 #define MCA_PCIDEV_FLAGS_REG_DATA (1ULL << 4)
199 #define MCA_PCIDEV_FLAGS_OEM_DATA (1ULL << 5)
200 uint64_t pcidev_status;
202 uint16_t info_vendor;
203 uint16_t info_device;
204 uint32_t info_ccfn; /* Class code & funct. nr. */
205 #define MCA_PCIDEV_INFO_CLASS(x) ((x) & 0xffffff)
206 #define MCA_PCIDEV_INFO_FUNCTION(x) (((x) >> 24) & 0xff)
209 uint8_t info_segment;
213 uint32_t pcidev_reg_mem;
214 uint32_t pcidev_reg_io;
216 /* M bytes of OEM platform data. */
219 struct mca_pcidev_reg {
220 uint64_t pcidev_reg_addr;
221 uint64_t pcidev_reg_data;
224 #define MCA_UUID_CPU \
225 {0xe429faf1,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
226 #define MCA_UUID_MEMORY \
227 {0xe429faf2,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
228 #define MCA_UUID_SEL \
229 {0xe429faf3,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
230 #define MCA_UUID_PCI_BUS \
231 {0xe429faf4,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
232 #define MCA_UUID_SMBIOS \
233 {0xe429faf5,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
234 #define MCA_UUID_PCI_DEV \
235 {0xe429faf6,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
236 #define MCA_UUID_GENERIC \
237 {0xe429faf7,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
241 void ia64_mca_init(void);
242 void ia64_mca_save_state(int);
246 #endif /* _MACHINE_MCA_H_ */