2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 * from: isa_dma.c,v 1.3 1999/05/09 23:56:00 peter Exp $
38 * code to manage AT bus
40 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
41 * Fixed uninitialized variable problem and added code to deal
42 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
43 * mode DMA count compution and reorganized DMA setup code in
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/malloc.h>
51 #include <sys/mutex.h>
54 #include <vm/vm_param.h>
56 #include <isa/isareg.h>
57 #include <isa/isavar.h>
58 #include <isa/isa_dmareg.h>
59 #include <machine/bus.h>
61 static bus_dma_tag_t dma_tag[8];
62 static bus_dmamap_t dma_map[8];
63 static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
64 static u_int8_t dma_inuse = 0; /* User for acquire/release */
65 static u_int8_t dma_auto_mode = 0;
66 static u_int8_t dma_bounced = 0;
68 #define VALID_DMA_MASK (7)
70 /* high byte of address is stored in this port for i-th dma channel */
71 static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
74 * Setup a DMA channel's bounce buffer.
77 isa_dma_init(int chan, u_int bouncebufsize, int flag __unused)
79 static int initted = 0;
80 bus_addr_t boundary = chan >= 4 ? 0x20000 : 0x10000;
84 * Reset the DMA hardware.
94 if (chan & ~VALID_DMA_MASK)
95 panic("isa_dma_init: channel out of range");
97 if (dma_tag[chan] || dma_map[chan])
98 panic("isa_dma_init: impossible request");
101 if (bus_dma_tag_create(/*parent*/NULL,
103 /*boundary*/boundary,
104 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT,
105 /*highaddr*/BUS_SPACE_MAXADDR,
106 /*filter*/NULL, /*filterarg*/NULL,
107 /*maxsize*/bouncebufsize,
108 /*nsegments*/1, /*maxsegz*/0x3ffff,
110 /*lockfunc*/busdma_lock_mutex,
112 &dma_tag[chan]) != 0) {
113 panic("isa_dma_init: unable to create dma tag\n");
116 if (bus_dmamap_create(dma_tag[chan], 0, &dma_map[chan])) {
117 panic("isa_dma_init: unable to create dma map\n");
124 * Register a DMA channel's usage. Usually called from a device driver
125 * in open() or during its initialization.
128 isa_dma_acquire(chan)
132 if (chan & ~VALID_DMA_MASK)
133 panic("isa_dma_acquire: channel out of range");
136 if (dma_inuse & (1 << chan)) {
137 printf("isa_dma_acquire: channel %d already in use\n", chan);
140 dma_inuse |= (1 << chan);
141 dma_auto_mode &= ~(1 << chan);
147 * Unregister a DMA channel's usage. Usually called from a device driver
148 * during close() or during its shutdown.
151 isa_dma_release(chan)
155 if (chan & ~VALID_DMA_MASK)
156 panic("isa_dma_release: channel out of range");
158 if ((dma_inuse & (1 << chan)) == 0)
159 printf("isa_dma_release: channel %d not in use\n", chan);
162 if (dma_busy & (1 << chan)) {
163 dma_busy &= ~(1 << chan);
165 * XXX We should also do "dma_bounced &= (1 << chan);"
166 * because we are acting on behalf of isa_dmadone() which
167 * was not called to end the last DMA operation. This does
168 * not matter now, but it may in the future.
172 dma_inuse &= ~(1 << chan);
173 dma_auto_mode &= ~(1 << chan);
177 * isa_dmacascade(): program 8237 DMA controller channel to accept
178 * external dma control by a board.
185 if (chan & ~VALID_DMA_MASK)
186 panic("isa_dmacascade: channel out of range");
189 /* set dma channel mode, and set dma channel mode */
190 if ((chan & 4) == 0) {
191 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
192 outb(DMA1_SMSK, chan);
194 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
195 outb(DMA2_SMSK, chan & 3);
200 * isa_dmastart(): program 8237 DMA controller channel.
203 struct isa_dmastart_arg {
209 static void isa_dmastart_cb(void *arg, bus_dma_segment_t *segs, int nseg,
213 caddr_t addr = ((struct isa_dmastart_arg *) arg)->addr;
215 int chan = ((struct isa_dmastart_arg *) arg)->chan;
216 int flags = ((struct isa_dmastart_arg *) arg)->flags;
217 bus_addr_t phys = segs->ds_addr;
218 int nbytes = segs->ds_len;
222 panic("isa_dmastart: transfer mapping not contiguous");
225 if ((chipset.sgmap == NULL) &&
226 (pmap_extract(kernel_pmap, (vm_offset_t)addr)
227 > BUS_SPACE_MAXADDR_24BIT)) {
229 dma_bounced |= (1 << chan);
230 /* copy bounce buffer on write */
231 if (!(flags & ISADMA_READ))
232 bus_dmamap_sync(dma_tag[chan], dma_map[chan],
233 BUS_DMASYNC_PREWRITE);
237 if ((chan & 4) == 0) {
239 * Program one of DMA channels 0..3. These are
240 * byte mode channels.
242 /* set dma channel mode, and reset address ff */
244 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
245 if (flags & ISADMA_RAW) {
246 if (flags & ISADMA_READ)
247 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
249 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
252 if (flags & ISADMA_READ)
253 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
255 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
258 /* send start address */
259 waport = DMA1_CHN(chan);
261 outb(waport, phys>>8);
262 outb(dmapageport[chan], phys>>16);
265 outb(waport + 1, --nbytes);
266 outb(waport + 1, nbytes>>8);
269 outb(DMA1_SMSK, chan);
272 * Program one of DMA channels 4..7. These are
273 * word mode channels.
275 /* set dma channel mode, and reset address ff */
277 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
278 if (flags & ISADMA_RAW) {
279 if (flags & ISADMA_READ)
280 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
282 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
285 if (flags & ISADMA_READ)
286 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
288 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
291 /* send start address */
292 waport = DMA2_CHN(chan - 4);
293 outb(waport, phys>>1);
294 outb(waport, phys>>9);
295 outb(dmapageport[chan], phys>>16);
299 outb(waport + 2, --nbytes);
300 outb(waport + 2, nbytes>>8);
303 outb(DMA2_SMSK, chan & 3);
308 isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
310 struct isa_dmastart_arg args;
313 if (chan & ~VALID_DMA_MASK)
314 panic("isa_dmastart: channel out of range");
316 if ((chan < 4 && nbytes > (1<<16))
317 || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
318 panic("isa_dmastart: impossible request");
320 if ((dma_inuse & (1 << chan)) == 0)
321 printf("isa_dmastart: channel %d not acquired\n", chan);
326 * XXX This should be checked, but drivers like ad1848 only call
327 * isa_dmastart() once because they use Auto DMA mode. If we
328 * leave this in, drivers that do this will print this continuously.
330 if (dma_busy & (1 << chan))
331 printf("isa_dmastart: channel %d busy\n", chan);
334 if (!dma_tag[chan] || !dma_map[chan])
335 panic("isa_dmastart: called without isa_dma_init");
337 dma_busy |= (1 << chan);
339 if (flags & ISADMA_RAW) {
340 dma_auto_mode |= (1 << chan);
342 dma_auto_mode &= ~(1 << chan);
346 * Freeze dma while updating registers.
348 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
353 bus_dmamap_load(dma_tag[chan], dma_map[chan], addr, nbytes,
354 isa_dmastart_cb, &args, 0);
358 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
361 if (chan & ~VALID_DMA_MASK)
362 panic("isa_dmadone: channel out of range");
364 if ((dma_inuse & (1 << chan)) == 0)
365 printf("isa_dmadone: channel %d not acquired\n", chan);
368 if (((dma_busy & (1 << chan)) == 0) &&
369 (dma_auto_mode & (1 << chan)) == 0 )
370 printf("isa_dmadone: channel %d not busy\n", chan);
372 if (dma_bounced & (1 << chan)) {
373 /* copy bounce buffer on read */
374 if (flags & ISADMA_READ) {
375 bus_dmamap_sync(dma_tag[chan], dma_map[chan],
376 BUS_DMASYNC_POSTREAD);
378 dma_bounced &= ~(1 << chan);
381 if ((dma_auto_mode & (1 << chan)) == 0) {
382 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
383 bus_dmamap_unload(dma_tag[chan], dma_map[chan]);
386 dma_busy &= ~(1 << chan);
390 * Query the progress of a transfer on a DMA channel.
392 * To avoid having to interrupt a transfer in progress, we sample
393 * each of the high and low databytes twice, and apply the following
394 * logic to determine the correct count.
396 * Reads are performed with interrupts disabled, thus it is to be
397 * expected that the time between reads is very small. At most
398 * one rollover in the low count byte can be expected within the
399 * four reads that are performed.
401 * There are three gaps in which a rollover can occur :
411 * If a rollover occurs in gap1 or gap2, the low2 value will be
412 * greater than the low1 value. In this case, low2 and high2 are a
413 * corresponding pair.
415 * In any other case, low1 and high1 can be considered to be correct.
417 * The function returns the number of bytes remaining in the transfer,
418 * or -1 if the channel requested is not active.
422 isa_dmastatus(int chan)
426 u_long low1, high1, low2, high2;
429 /* channel active? */
430 if ((dma_inuse & (1 << chan)) == 0) {
431 printf("isa_dmastatus: channel %d not active\n", chan);
436 if (((dma_busy & (1 << chan)) == 0) &&
437 (dma_auto_mode & (1 << chan)) == 0 ) {
438 printf("chan %d not busy\n", chan);
441 if (chan < 4) { /* low DMA controller */
443 waport = DMA1_CHN(chan) + 1;
444 } else { /* high DMA controller */
446 waport = DMA2_CHN(chan - 4) + 2;
449 s = splhigh(); /* no interrupts Mr Jones! */
450 outb(ffport, 0); /* clear register LSB flipflop */
453 outb(ffport, 0); /* clear again */
456 splx(s); /* enable interrupts again */
459 * Now decide if a wrap has tried to skew our results.
460 * Note that after TC, the count will read 0xffff, while we want
461 * to return zero, so we add and then mask to compensate.
464 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
466 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
469 if (chan >= 4) /* high channels move words */
475 * Reached terminal count yet ?
482 return(inb(DMA1_STATUS) & (1 << chan));
484 return(inb(DMA2_STATUS) & (1 << (chan & 3)));
488 * Stop a DMA transfer currently in progress.
491 isa_dmastop(int chan)
493 if ((dma_inuse & (1 << chan)) == 0)
494 printf("isa_dmastop: channel %d not acquired\n", chan);
496 if (((dma_busy & (1 << chan)) == 0) &&
497 ((dma_auto_mode & (1 << chan)) == 0)) {
498 printf("chan %d not busy\n", chan);
502 if ((chan & 4) == 0) {
503 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
505 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
507 return(isa_dmastatus(chan));