2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz and Don Ahn.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
39 * Routines to handle clock hardware.
43 * inittodr, settodr and support routines written
44 * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
46 * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
50 #include "opt_clock.h"
54 #include <sys/param.h>
55 #include <sys/systm.h>
59 #include <sys/mutex.h>
62 #include <sys/timetc.h>
63 #include <sys/kernel.h>
64 #include <sys/limits.h>
65 #include <sys/module.h>
66 #include <sys/sysctl.h>
68 #include <sys/power.h>
70 #include <machine/clock.h>
71 #include <machine/cputypes.h>
72 #include <machine/frame.h>
73 #include <machine/intr_machdep.h>
74 #include <machine/md_var.h>
75 #include <machine/psl.h>
77 #include <machine/apicvar.h>
79 #include <machine/specialreg.h>
81 #include <i386/isa/isa.h>
84 #include <isa/isavar.h>
86 #include <i386/isa/timerreg.h>
89 #include <i386/bios/mca_machdep.h>
93 * 32-bit time_t's can't reach leap years before 1904 or after 2036, so we
94 * can use a simple formula for leap years.
96 #define LEAPYEAR(y) (((u_int)(y) % 4 == 0) ? 1 : 0)
97 #define DAYSPERYEAR (31+28+31+30+31+30+31+31+30+31+30+31)
99 #define TIMER_DIV(x) ((timer_freq + (x) / 2) / (x))
103 * Time in timer cycles that it takes for microtime() to disable interrupts
104 * and latch the count. microtime() currently uses "cli; outb ..." so it
105 * normally takes less than 2 timer cycles. Add a few for cache misses.
106 * Add a few more to allow for latency in bogus calls to microtime() with
107 * interrupts already disabled.
109 #define TIMER0_LATCH_COUNT 20
112 * Maximum frequency that we are willing to allow for timer0. Must be
113 * low enough to guarantee that the timer interrupt handler returns
114 * before the next timer interrupt.
116 #define TIMER0_MAX_FREQ 20000
119 int adjkerntz; /* local offset from GMT in seconds */
121 int disable_rtc_set; /* disable resettodr() if != 0 */
124 int statclock_disable;
126 #define TIMER_FREQ 1193182
128 u_int timer_freq = TIMER_FREQ;
129 int timer0_max_count;
130 int wall_cmos_clock; /* wall CMOS clock assumed if != 0 */
131 struct mtx clock_lock;
133 static int beeping = 0;
134 static const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
135 static u_int hardclock_max_count;
136 static struct intsrc *i8254_intsrc;
137 static u_int32_t i8254_lastcount;
138 static u_int32_t i8254_offset;
139 static int (*i8254_pending)(struct intsrc *);
140 static int i8254_ticked;
141 static int using_lapic_timer;
144 * XXX new_function and timer_func should not handle clockframes, but
145 * timer_func currently needs to hold hardclock to handle the
146 * timer0_state == 0 case. We should use inthand_add()/inthand_remove()
147 * to switch between clkintr() and a slightly different timerintr().
149 static void (*new_function)(struct clockframe *frame);
150 static u_int new_rate;
151 static u_int timer0_prescaler_count;
152 static u_char timer0_state;
154 static u_char rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
155 static u_char rtc_statusb = RTCSB_24HR | RTCSB_PINTR;
157 /* Values for timerX_state: */
159 #define RELEASE_PENDING 1
161 #define ACQUIRE_PENDING 3
163 static u_char timer2_state;
164 static void (*timer_func)(struct clockframe *frame) = hardclock;
166 static unsigned i8254_get_timecount(struct timecounter *tc);
167 static void set_timer_freq(u_int freq, int intr_freq);
169 static struct timecounter i8254_timecounter = {
170 i8254_get_timecount, /* get_timecount */
172 ~0u, /* counter_mask */
179 clkintr(struct clockframe *frame)
182 if (timecounter->tc_get_timecount == i8254_get_timecount) {
183 mtx_lock_spin(&clock_lock);
187 i8254_offset += timer0_max_count;
191 mtx_unlock_spin(&clock_lock);
193 if (timer_func != hardclock || !using_lapic_timer)
196 switch (timer0_state) {
202 if (using_lapic_timer)
204 if ((timer0_prescaler_count += timer0_max_count)
205 >= hardclock_max_count) {
206 timer0_prescaler_count -= hardclock_max_count;
211 case ACQUIRE_PENDING:
212 mtx_lock_spin(&clock_lock);
213 i8254_offset = i8254_get_timecount(NULL);
215 timer0_max_count = TIMER_DIV(new_rate);
216 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
217 outb(TIMER_CNTR0, timer0_max_count & 0xff);
218 outb(TIMER_CNTR0, timer0_max_count >> 8);
219 mtx_unlock_spin(&clock_lock);
220 timer_func = new_function;
221 timer0_state = ACQUIRED;
224 case RELEASE_PENDING:
225 if ((timer0_prescaler_count += timer0_max_count)
226 >= hardclock_max_count) {
227 mtx_lock_spin(&clock_lock);
228 i8254_offset = i8254_get_timecount(NULL);
230 timer0_max_count = hardclock_max_count;
232 TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
233 outb(TIMER_CNTR0, timer0_max_count & 0xff);
234 outb(TIMER_CNTR0, timer0_max_count >> 8);
235 mtx_unlock_spin(&clock_lock);
236 timer0_prescaler_count = 0;
237 timer_func = hardclock;
238 timer0_state = RELEASED;
239 if (!using_lapic_timer)
246 /* Reset clock interrupt by asserting bit 7 of port 0x61 */
248 outb(0x61, inb(0x61) | 0x80);
254 * The acquire and release functions must be called at ipl >= splclock().
257 acquire_timer0(int rate, void (*function)(struct clockframe *frame))
261 if (rate <= 0 || rate > TIMER0_MAX_FREQ)
263 switch (timer0_state) {
266 timer0_state = ACQUIRE_PENDING;
269 case RELEASE_PENDING:
270 if (rate != old_rate)
273 * The timer has been released recently, but is being
274 * re-acquired before the release completed. In this
275 * case, we simply reclaim it as if it had not been
278 timer0_state = ACQUIRED;
282 return (-1); /* busy */
284 new_function = function;
285 old_rate = new_rate = rate;
291 acquire_timer2(int mode)
294 if (timer2_state != RELEASED)
296 timer2_state = ACQUIRED;
299 * This access to the timer registers is as atomic as possible
300 * because it is a single instruction. We could do better if we
301 * knew the rate. Use of splclock() limits glitches to 10-100us,
302 * and this is probably good enough for timer2, so we aren't as
303 * careful with it as with timer0.
305 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
314 switch (timer0_state) {
317 timer0_state = RELEASE_PENDING;
320 case ACQUIRE_PENDING:
321 /* Nothing happened yet, release quickly. */
322 timer0_state = RELEASED;
336 if (timer2_state != ACQUIRED)
338 timer2_state = RELEASED;
339 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
344 * This routine receives statistical clock interrupts from the RTC.
345 * As explained above, these occur at 128 interrupts per second.
346 * When profiling, we receive interrupts at a rate of 1024 Hz.
348 * This does not actually add as much overhead as it sounds, because
349 * when the statistical clock is active, the hardclock driver no longer
350 * needs to keep (inaccurate) statistics on its own. This decouples
351 * statistics gathering from scheduling interrupts.
353 * The RTC chip requires that we read status register C (RTC_INTR)
354 * to acknowledge an interrupt, before it will generate the next one.
355 * Under high interrupt load, rtcintr() can be indefinitely delayed and
356 * the clock can tick immediately after the read from RTC_INTR. In this
357 * case, the mc146818A interrupt signal will not drop for long enough
358 * to register with the 8259 PIC. If an interrupt is missed, the stat
359 * clock will halt, considerably degrading system performance. This is
360 * why we use 'while' rather than a more straightforward 'if' below.
361 * Stat clock ticks can still be lost, causing minor loss of accuracy
362 * in the statistics, but the stat clock will no longer stop.
365 rtcintr(struct clockframe *frame)
368 while (rtcin(RTC_INTR) & RTCIR_PERIOD) {
369 if (profprocs != 0) {
383 DB_SHOW_COMMAND(rtc, rtc)
385 printf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
386 rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
387 rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
388 rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
397 mtx_lock_spin(&clock_lock);
399 /* Select timer0 and latch counter value. */
400 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
402 low = inb(TIMER_CNTR0);
403 high = inb(TIMER_CNTR0);
405 mtx_unlock_spin(&clock_lock);
406 return ((high << 8) | low);
410 * Wait "n" microseconds.
411 * Relies on timer 1 counting down from (timer_freq / hz)
412 * Note: timer had better have been programmed before this is first used!
417 int delta, prev_tick, tick, ticks_left;
422 static int state = 0;
426 for (n1 = 1; n1 <= 10000000; n1 *= 10)
431 printf("DELAY(%d)...", n);
434 * Guard against the timer being uninitialized if we are called
435 * early for console i/o.
437 if (timer0_max_count == 0)
438 set_timer_freq(timer_freq, hz);
441 * Read the counter first, so that the rest of the setup overhead is
442 * counted. Guess the initial overhead is 20 usec (on most systems it
443 * takes about 1.5 usec for each of the i/o's in getit(). The loop
444 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The
445 * multiplications and divisions to scale the count take a while).
447 * However, if ddb is active then use a fake counter since reading
448 * the i8254 counter involves acquiring a lock. ddb must not do
449 * locking for many reasons, but it calls here for at least atkbd
458 n -= 0; /* XXX actually guess no initial overhead */
460 * Calculate (n * (timer_freq / 1e6)) without using floating point
461 * and without any avoidable overflows.
467 * Use fixed point to avoid a slow division by 1000000.
468 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
469 * 2^15 is the first power of 2 that gives exact results
470 * for n between 0 and 256.
472 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
475 * Don't bother using fixed point, although gcc-2.7.2
476 * generates particularly poor code for the long long
477 * division, since even the slow way will complete long
478 * before the delay is up (unless we're interrupted).
480 ticks_left = ((u_int)n * (long long)timer_freq + 999999)
483 while (ticks_left > 0) {
487 tick = prev_tick - 1;
489 tick = timer0_max_count;
496 delta = prev_tick - tick;
499 delta += timer0_max_count;
501 * Guard against timer0_max_count being wrong.
502 * This shouldn't happen in normal operation,
503 * but it may happen if set_timer_freq() is
513 printf(" %d calls to getit() at %d usec each\n",
514 getit_calls, (n + 5) / getit_calls);
519 sysbeepstop(void *chan)
521 outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
527 sysbeep(int pitch, int period)
531 if (acquire_timer2(TIMER_SQWAVE|TIMER_16BIT))
533 /* Something else owns it. */
535 return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
537 mtx_lock_spin(&clock_lock);
538 outb(TIMER_CNTR2, pitch);
539 outb(TIMER_CNTR2, (pitch>>8));
540 mtx_unlock_spin(&clock_lock);
542 /* enable counter2 output to speaker */
543 outb(IO_PPI, inb(IO_PPI) | 3);
545 timeout(sysbeepstop, (void *)NULL, period);
552 * RTC support routines
565 val = inb(IO_RTC + 1);
572 writertc(u_char reg, u_char val)
580 outb(IO_RTC + 1, val);
581 inb(0x84); /* XXX work around wrong order in rtcin() */
588 return(bcd2bin(rtcin(port)));
592 calibrate_clocks(void)
594 u_int count, prev_count, tot_count;
595 int sec, start_sec, timeout;
598 printf("Calibrating clock(s) ... ");
599 if (!(rtcin(RTC_STATUSD) & RTCSD_PWR))
603 /* Read the mc146818A seconds counter. */
605 if (!(rtcin(RTC_STATUSA) & RTCSA_TUP)) {
606 sec = rtcin(RTC_SEC);
613 /* Wait for the mC146818A seconds counter to change. */
616 if (!(rtcin(RTC_STATUSA) & RTCSA_TUP)) {
617 sec = rtcin(RTC_SEC);
618 if (sec != start_sec)
625 /* Start keeping track of the i8254 counter. */
626 prev_count = getit();
627 if (prev_count == 0 || prev_count > timer0_max_count)
632 * Wait for the mc146818A seconds counter to change. Read the i8254
633 * counter for each iteration since this is convenient and only
634 * costs a few usec of inaccuracy. The timing of the final reads
635 * of the counters almost matches the timing of the initial reads,
636 * so the main cause of inaccuracy is the varying latency from
637 * inside getit() or rtcin(RTC_STATUSA) to the beginning of the
638 * rtcin(RTC_SEC) that returns a changed seconds count. The
639 * maximum inaccuracy from this cause is < 10 usec on 486's.
643 if (!(rtcin(RTC_STATUSA) & RTCSA_TUP))
644 sec = rtcin(RTC_SEC);
646 if (count == 0 || count > timer0_max_count)
648 if (count > prev_count)
649 tot_count += prev_count - (count - timer0_max_count);
651 tot_count += prev_count - count;
653 if (sec != start_sec)
660 printf("i8254 clock: %u Hz\n", tot_count);
666 printf("failed, using default i8254 clock of %u Hz\n",
672 set_timer_freq(u_int freq, int intr_freq)
674 int new_timer0_max_count;
676 mtx_lock_spin(&clock_lock);
678 new_timer0_max_count = hardclock_max_count = TIMER_DIV(intr_freq);
679 if (new_timer0_max_count != timer0_max_count) {
680 timer0_max_count = new_timer0_max_count;
681 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
682 outb(TIMER_CNTR0, timer0_max_count & 0xff);
683 outb(TIMER_CNTR0, timer0_max_count >> 8);
685 mtx_unlock_spin(&clock_lock);
692 mtx_lock_spin(&clock_lock);
693 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
694 outb(TIMER_CNTR0, timer0_max_count & 0xff);
695 outb(TIMER_CNTR0, timer0_max_count >> 8);
696 mtx_unlock_spin(&clock_lock);
703 /* Restore all of the RTC's "status" (actually, control) registers. */
704 /* XXX locking is needed for RTC access. */
705 writertc(RTC_STATUSB, RTCSB_24HR);
706 writertc(RTC_STATUSA, rtc_statusa);
707 writertc(RTC_STATUSB, rtc_statusb);
712 * Restore all the timers non-atomically (XXX: should be atomically).
714 * This function is called from pmtimer_resume() to restore all the timers.
715 * This should not be necessary, but there are broken laptops that do not
716 * restore all the timers on resume.
722 i8254_restore(); /* restore timer_freq and hz */
723 rtc_restore(); /* reenable RTC interrupts */
727 * Initialize 8254 timer 0 early so that it can be used in DELAY().
728 * XXX initialization of other timers is unintentionally left blank.
735 writertc(RTC_STATUSA, rtc_statusa);
736 writertc(RTC_STATUSB, RTCSB_24HR);
738 set_timer_freq(timer_freq, hz);
739 freq = calibrate_clocks();
740 #ifdef CLK_CALIBRATION_LOOP
743 "Press a key on the console to abort clock calibration\n");
744 while (cncheckc() == -1)
750 * Use the calibrated i8254 frequency if it seems reasonable.
751 * Otherwise use the default, and don't use the calibrated i586
754 delta = freq > timer_freq ? freq - timer_freq : timer_freq - freq;
755 if (delta < timer_freq / 100) {
756 #ifndef CLK_USE_I8254_CALIBRATION
759 "CLK_USE_I8254_CALIBRATION not specified - using default frequency\n");
766 "%d Hz differs from default of %d Hz by more than 1%%\n",
770 set_timer_freq(timer_freq, hz);
771 i8254_timecounter.tc_frequency = timer_freq;
772 tc_init(&i8254_timecounter);
778 * Initialize the time of day register, based on the time base which is, e.g.
782 inittodr(time_t base)
784 unsigned long sec, days;
797 /* Look if we have a RTC present and the time is valid */
798 if (!(rtcin(RTC_STATUSD) & RTCSD_PWR))
801 /* wait for time update to complete */
802 /* If RTCSA_TUP is zero, we have at least 244us before next update */
804 while (rtcin(RTC_STATUSA) & RTCSA_TUP) {
810 #ifdef USE_RTC_CENTURY
811 year = readrtc(RTC_YEAR) + readrtc(RTC_CENTURY) * 100;
813 year = readrtc(RTC_YEAR) + 1900;
821 month = readrtc(RTC_MONTH);
822 for (m = 1; m < month; m++)
823 days += daysinmonth[m-1];
824 if ((month > 2) && LEAPYEAR(year))
826 days += readrtc(RTC_DAY) - 1;
827 for (y = 1970; y < year; y++)
828 days += DAYSPERYEAR + LEAPYEAR(y);
829 sec = ((( days * 24 +
830 readrtc(RTC_HRS)) * 60 +
831 readrtc(RTC_MIN)) * 60 +
833 /* sec now contains the number of seconds, since Jan 1 1970,
834 in the local time zone */
836 sec += tz_minuteswest * 60 + (wall_cmos_clock ? adjkerntz : 0);
838 y = time_second - sec;
839 if (y <= -2 || y >= 2) {
840 /* badly off, adjust it */
849 printf("Invalid time in real time clock.\n");
850 printf("Check and reset the date immediately!\n");
854 * Write system time back to RTC
869 /* Disable RTC updates and interrupts. */
870 writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
872 /* Calculate local time to put in RTC */
874 tm -= tz_minuteswest * 60 + (wall_cmos_clock ? adjkerntz : 0);
876 writertc(RTC_SEC, bin2bcd(tm%60)); tm /= 60; /* Write back Seconds */
877 writertc(RTC_MIN, bin2bcd(tm%60)); tm /= 60; /* Write back Minutes */
878 writertc(RTC_HRS, bin2bcd(tm%24)); tm /= 24; /* Write back Hours */
880 /* We have now the days since 01-01-1970 in tm */
881 writertc(RTC_WDAY, (tm + 4) % 7 + 1); /* Write back Weekday */
882 for (y = 1970, m = DAYSPERYEAR + LEAPYEAR(y);
884 y++, m = DAYSPERYEAR + LEAPYEAR(y))
887 /* Now we have the years in y and the day-of-the-year in tm */
888 writertc(RTC_YEAR, bin2bcd(y%100)); /* Write back Year */
889 #ifdef USE_RTC_CENTURY
890 writertc(RTC_CENTURY, bin2bcd(y/100)); /* ... and Century */
896 if (m == 1 && LEAPYEAR(y))
903 writertc(RTC_MONTH, bin2bcd(m + 1)); /* Write back Month */
904 writertc(RTC_DAY, bin2bcd(tm + 1)); /* Write back Month Day */
906 /* Reenable RTC updates and interrupts. */
907 writertc(RTC_STATUSB, rtc_statusb);
913 * Start both clocks running.
921 using_lapic_timer = lapic_setup_clock();
923 if (statclock_disable || using_lapic_timer) {
925 * The stat interrupt mask is different without the
926 * statistics clock. Also, don't set the interrupt
927 * flag which would normally cause the RTC to generate
930 rtc_statusb = RTCSB_24HR;
932 /* Setting stathz to nonzero early helps avoid races. */
933 stathz = RTC_NOPROFRATE;
934 profhz = RTC_PROFRATE;
937 /* Finish initializing 8254 timer 0. */
938 intr_add_handler("clk", 0, (driver_intr_t *)clkintr, NULL,
939 INTR_TYPE_CLK | INTR_FAST, NULL);
940 i8254_intsrc = intr_lookup_source(0);
941 if (i8254_intsrc != NULL)
942 i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
944 /* Initialize RTC. */
945 writertc(RTC_STATUSA, rtc_statusa);
946 writertc(RTC_STATUSB, RTCSB_24HR);
948 /* Don't bother enabling the statistics clock. */
949 if (!statclock_disable && !using_lapic_timer) {
950 diag = rtcin(RTC_DIAG);
952 printf("RTC BIOS diagnostic error %b\n", diag, RTCDG_BITS);
954 intr_add_handler("rtc", 8, (driver_intr_t *)rtcintr, NULL,
955 INTR_TYPE_CLK | INTR_FAST, NULL);
957 writertc(RTC_STATUSB, rtc_statusb);
965 cpu_startprofclock(void)
968 if (using_lapic_timer)
970 rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
971 writertc(RTC_STATUSA, rtc_statusa);
972 psdiv = pscnt = psratio;
976 cpu_stopprofclock(void)
979 if (using_lapic_timer)
981 rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
982 writertc(RTC_STATUSA, rtc_statusa);
987 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
993 * Use `i8254' instead of `timer' in external names because `timer'
994 * is is too generic. Should use it everywhere.
997 error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
998 if (error == 0 && req->newptr != NULL) {
1000 if (timer0_state != RELEASED)
1001 return (EBUSY); /* too much trouble to handle */
1003 set_timer_freq(freq, hz);
1004 i8254_timecounter.tc_frequency = freq;
1009 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
1010 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
1013 i8254_get_timecount(struct timecounter *tc)
1019 eflags = read_eflags();
1020 mtx_lock_spin(&clock_lock);
1022 /* Select timer0 and latch counter value. */
1023 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
1025 low = inb(TIMER_CNTR0);
1026 high = inb(TIMER_CNTR0);
1027 count = timer0_max_count - ((high << 8) | low);
1028 if (count < i8254_lastcount ||
1029 (!i8254_ticked && (clkintr_pending ||
1030 ((count < 20 || (!(eflags & PSL_I) && count < timer0_max_count / 2u)) &&
1031 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
1033 i8254_offset += timer0_max_count;
1035 i8254_lastcount = count;
1036 count += i8254_offset;
1037 mtx_unlock_spin(&clock_lock);
1043 * Attach to the ISA PnP descriptors for the timer and realtime clock.
1045 static struct isa_pnp_id attimer_ids[] = {
1046 { 0x0001d041 /* PNP0100 */, "AT timer" },
1047 { 0x000bd041 /* PNP0B00 */, "AT realtime clock" },
1052 attimer_probe(device_t dev)
1056 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids)) <= 0)
1062 attimer_attach(device_t dev)
1067 static device_method_t attimer_methods[] = {
1068 /* Device interface */
1069 DEVMETHOD(device_probe, attimer_probe),
1070 DEVMETHOD(device_attach, attimer_attach),
1071 DEVMETHOD(device_detach, bus_generic_detach),
1072 DEVMETHOD(device_shutdown, bus_generic_shutdown),
1073 DEVMETHOD(device_suspend, bus_generic_suspend), /* XXX stop statclock? */
1074 DEVMETHOD(device_resume, bus_generic_resume), /* XXX restart statclock? */
1078 static driver_t attimer_driver = {
1084 static devclass_t attimer_devclass;
1086 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
1087 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
1088 #endif /* DEV_ISA */