2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * New-style Interrupt Framework
34 * TODO: - add support for disconnected PICs.
35 * - to support IPI (PPI) enabling on other CPUs if already started.
36 * - to complete things for removable PICs.
40 #include "opt_hwpmc_hooks.h"
41 #include "opt_iommu.h"
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
47 #include <sys/mutex.h>
48 #include <sys/syslog.h>
49 #include <sys/malloc.h>
51 #include <sys/queue.h>
53 #include <sys/interrupt.h>
54 #include <sys/taskqueue.h>
57 #include <sys/cpuset.h>
59 #include <sys/sched.h>
61 #include <sys/sysctl.h>
62 #include <sys/vmmeter.h>
64 #include <sys/pmckern.h>
67 #include <machine/atomic.h>
68 #include <machine/intr.h>
69 #include <machine/cpu.h>
70 #include <machine/smp.h>
71 #include <machine/stdarg.h>
78 #include <dev/iommu/iommu_msi.h>
84 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
87 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
88 printf(fmt,##args); } while (0)
90 #define debugf(fmt, args...)
93 MALLOC_DECLARE(M_INTRNG);
94 MALLOC_DEFINE(M_INTRNG, "intr", "intr interrupt handling");
96 /* Main interrupt handler called from assembler -> 'hidden' for C code. */
97 void intr_irq_handler(struct trapframe *tf);
99 /* Root interrupt controller stuff. */
100 device_t intr_irq_root_dev;
101 static intr_irq_filter_t *irq_root_filter;
102 static void *irq_root_arg;
103 static u_int irq_root_ipicount;
105 struct intr_pic_child {
106 SLIST_ENTRY(intr_pic_child) pc_next;
107 struct intr_pic *pc_pic;
108 intr_child_irq_filter_t *pc_filter;
114 /* Interrupt controller definition. */
116 SLIST_ENTRY(intr_pic) pic_next;
117 intptr_t pic_xref; /* hardware identification */
119 /* Only one of FLAG_PIC or FLAG_MSI may be set */
120 #define FLAG_PIC (1 << 0)
121 #define FLAG_MSI (1 << 1)
122 #define FLAG_TYPE_MASK (FLAG_PIC | FLAG_MSI)
124 struct mtx pic_child_lock;
125 SLIST_HEAD(, intr_pic_child) pic_children;
128 static struct mtx pic_list_lock;
129 static SLIST_HEAD(, intr_pic) pic_list;
131 static struct intr_pic *pic_lookup(device_t dev, intptr_t xref, int flags);
133 /* Interrupt source definition. */
134 static struct mtx isrc_table_lock;
135 static struct intr_irqsrc **irq_sources;
139 #ifdef EARLY_AP_STARTUP
140 static bool irq_assign_cpu = true;
142 static bool irq_assign_cpu = false;
146 u_int intr_nirq = NIRQ;
147 SYSCTL_UINT(_machdep, OID_AUTO, nirq, CTLFLAG_RDTUN, &intr_nirq, 0,
150 /* Data for MI statistics reporting. */
155 static u_int intrcnt_index;
157 static struct intr_irqsrc *intr_map_get_isrc(u_int res_id);
158 static void intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc);
159 static struct intr_map_data * intr_map_get_map_data(u_int res_id);
160 static void intr_map_copy_map_data(u_int res_id, device_t *dev, intptr_t *xref,
161 struct intr_map_data **data);
164 * Interrupt framework initialization routine.
167 intr_irq_init(void *dummy __unused)
171 SLIST_INIT(&pic_list);
172 mtx_init(&pic_list_lock, "intr pic list", NULL, MTX_DEF);
174 mtx_init(&isrc_table_lock, "intr isrc table", NULL, MTX_DEF);
177 * - 2 counters for each I/O interrupt.
178 * - MAXCPU counters for each IPI counters for SMP.
180 intrcnt_count = intr_nirq * 2;
182 intrcnt_count += INTR_IPI_COUNT * MAXCPU;
185 intrcnt = mallocarray(intrcnt_count, sizeof(u_long), M_INTRNG,
187 intrnames = mallocarray(intrcnt_count, INTRNAME_LEN, M_INTRNG,
189 sintrcnt = intrcnt_count * sizeof(u_long);
190 sintrnames = intrcnt_count * INTRNAME_LEN;
191 irq_sources = mallocarray(intr_nirq, sizeof(struct intr_irqsrc*),
192 M_INTRNG, M_WAITOK | M_ZERO);
194 SYSINIT(intr_irq_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_irq_init, NULL);
197 intrcnt_setname(const char *name, int index)
200 snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s",
201 INTRNAME_LEN - 1, name);
205 * Update name for interrupt source with interrupt event.
208 intrcnt_updatename(struct intr_irqsrc *isrc)
211 /* QQQ: What about stray counter name? */
212 mtx_assert(&isrc_table_lock, MA_OWNED);
213 intrcnt_setname(isrc->isrc_event->ie_fullname, isrc->isrc_index);
217 * Virtualization for interrupt source interrupt counter increment.
220 isrc_increment_count(struct intr_irqsrc *isrc)
223 if (isrc->isrc_flags & INTR_ISRCF_PPI)
224 atomic_add_long(&isrc->isrc_count[0], 1);
226 isrc->isrc_count[0]++;
230 * Virtualization for interrupt source interrupt stray counter increment.
233 isrc_increment_straycount(struct intr_irqsrc *isrc)
236 isrc->isrc_count[1]++;
240 * Virtualization for interrupt source interrupt name update.
243 isrc_update_name(struct intr_irqsrc *isrc, const char *name)
245 char str[INTRNAME_LEN];
247 mtx_assert(&isrc_table_lock, MA_OWNED);
250 snprintf(str, INTRNAME_LEN, "%s: %s", isrc->isrc_name, name);
251 intrcnt_setname(str, isrc->isrc_index);
252 snprintf(str, INTRNAME_LEN, "stray %s: %s", isrc->isrc_name,
254 intrcnt_setname(str, isrc->isrc_index + 1);
256 snprintf(str, INTRNAME_LEN, "%s:", isrc->isrc_name);
257 intrcnt_setname(str, isrc->isrc_index);
258 snprintf(str, INTRNAME_LEN, "stray %s:", isrc->isrc_name);
259 intrcnt_setname(str, isrc->isrc_index + 1);
264 * Virtualization for interrupt source interrupt counters setup.
267 isrc_setup_counters(struct intr_irqsrc *isrc)
272 * XXX - it does not work well with removable controllers and
273 * interrupt sources !!!
275 index = atomic_fetchadd_int(&intrcnt_index, 2);
276 isrc->isrc_index = index;
277 isrc->isrc_count = &intrcnt[index];
278 isrc_update_name(isrc, NULL);
282 * Virtualization for interrupt source interrupt counters release.
285 isrc_release_counters(struct intr_irqsrc *isrc)
288 panic("%s: not implemented", __func__);
293 * Virtualization for interrupt source IPI counters setup.
296 intr_ipi_setup_counters(const char *name)
299 char str[INTRNAME_LEN];
301 index = atomic_fetchadd_int(&intrcnt_index, MAXCPU);
302 for (i = 0; i < MAXCPU; i++) {
303 snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
304 intrcnt_setname(str, index + i);
306 return (&intrcnt[index]);
311 * Main interrupt dispatch handler. It's called straight
312 * from the assembler, where CPU interrupt is served.
315 intr_irq_handler(struct trapframe *tf)
317 struct trapframe * oldframe;
320 KASSERT(irq_root_filter != NULL, ("%s: no filter", __func__));
325 oldframe = td->td_intr_frame;
326 td->td_intr_frame = tf;
327 irq_root_filter(irq_root_arg);
328 td->td_intr_frame = oldframe;
331 if (pmc_hook && TRAPF_USERMODE(tf) &&
332 (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
333 pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
338 intr_child_irq_handler(struct intr_pic *parent, uintptr_t irq)
340 struct intr_pic_child *child;
344 mtx_lock_spin(&parent->pic_child_lock);
345 SLIST_FOREACH(child, &parent->pic_children, pc_next) {
346 if (child->pc_start <= irq &&
347 irq < (child->pc_start + child->pc_length)) {
352 mtx_unlock_spin(&parent->pic_child_lock);
355 return (child->pc_filter(child->pc_filter_arg, irq));
357 return (FILTER_STRAY);
361 * interrupt controller dispatch function for interrupts. It should
362 * be called straight from the interrupt controller, when associated interrupt
366 intr_isrc_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
369 KASSERT(isrc != NULL, ("%s: no source", __func__));
371 isrc_increment_count(isrc);
374 if (isrc->isrc_filter != NULL) {
376 error = isrc->isrc_filter(isrc->isrc_arg, tf);
377 PIC_POST_FILTER(isrc->isrc_dev, isrc);
378 if (error == FILTER_HANDLED)
382 if (isrc->isrc_event != NULL) {
383 if (intr_event_handle(isrc->isrc_event, tf) == 0)
387 isrc_increment_straycount(isrc);
392 * Alloc unique interrupt number (resource handle) for interrupt source.
394 * There could be various strategies how to allocate free interrupt number
395 * (resource handle) for new interrupt source.
397 * 1. Handles are always allocated forward, so handles are not recycled
398 * immediately. However, if only one free handle left which is reused
402 isrc_alloc_irq(struct intr_irqsrc *isrc)
406 mtx_assert(&isrc_table_lock, MA_OWNED);
408 if (irq_next_free >= intr_nirq)
411 for (irq = irq_next_free; irq < intr_nirq; irq++) {
412 if (irq_sources[irq] == NULL)
415 for (irq = 0; irq < irq_next_free; irq++) {
416 if (irq_sources[irq] == NULL)
420 irq_next_free = intr_nirq;
424 isrc->isrc_irq = irq;
425 irq_sources[irq] = isrc;
427 irq_next_free = irq + 1;
428 if (irq_next_free >= intr_nirq)
434 * Free unique interrupt number (resource handle) from interrupt source.
437 isrc_free_irq(struct intr_irqsrc *isrc)
440 mtx_assert(&isrc_table_lock, MA_OWNED);
442 if (isrc->isrc_irq >= intr_nirq)
444 if (irq_sources[isrc->isrc_irq] != isrc)
447 irq_sources[isrc->isrc_irq] = NULL;
448 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
451 * If we are recovering from the state irq_sources table is full,
452 * then the following allocation should check the entire table. This
453 * will ensure maximum separation of allocation order from release
456 if (irq_next_free >= intr_nirq)
463 * Initialize interrupt source and register it into global interrupt table.
466 intr_isrc_register(struct intr_irqsrc *isrc, device_t dev, u_int flags,
467 const char *fmt, ...)
472 bzero(isrc, sizeof(struct intr_irqsrc));
473 isrc->isrc_dev = dev;
474 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
475 isrc->isrc_flags = flags;
478 vsnprintf(isrc->isrc_name, INTR_ISRC_NAMELEN, fmt, ap);
481 mtx_lock(&isrc_table_lock);
482 error = isrc_alloc_irq(isrc);
484 mtx_unlock(&isrc_table_lock);
488 * Setup interrupt counters, but not for IPI sources. Those are setup
489 * later and only for used ones (up to INTR_IPI_COUNT) to not exhaust
492 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
493 isrc_setup_counters(isrc);
494 mtx_unlock(&isrc_table_lock);
499 * Deregister interrupt source from global interrupt table.
502 intr_isrc_deregister(struct intr_irqsrc *isrc)
506 mtx_lock(&isrc_table_lock);
507 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
508 isrc_release_counters(isrc);
509 error = isrc_free_irq(isrc);
510 mtx_unlock(&isrc_table_lock);
516 * A support function for a PIC to decide if provided ISRC should be inited
517 * on given cpu. The logic of INTR_ISRCF_BOUND flag and isrc_cpu member of
518 * struct intr_irqsrc is the following:
520 * If INTR_ISRCF_BOUND is set, the ISRC should be inited only on cpus
521 * set in isrc_cpu. If not, the ISRC should be inited on every cpu and
522 * isrc_cpu is kept consistent with it. Thus isrc_cpu is always correct.
525 intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu)
528 if (isrc->isrc_handlers == 0)
530 if ((isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI)) == 0)
532 if (isrc->isrc_flags & INTR_ISRCF_BOUND)
533 return (CPU_ISSET(cpu, &isrc->isrc_cpu));
535 CPU_SET(cpu, &isrc->isrc_cpu);
542 * Setup filter into interrupt source.
545 iscr_setup_filter(struct intr_irqsrc *isrc, const char *name,
546 intr_irq_filter_t *filter, void *arg, void **cookiep)
552 mtx_lock(&isrc_table_lock);
554 * Make sure that we do not mix the two ways
555 * how we handle interrupt sources.
557 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
558 mtx_unlock(&isrc_table_lock);
561 isrc->isrc_filter = filter;
562 isrc->isrc_arg = arg;
563 isrc_update_name(isrc, name);
564 mtx_unlock(&isrc_table_lock);
572 * Interrupt source pre_ithread method for MI interrupt framework.
575 intr_isrc_pre_ithread(void *arg)
577 struct intr_irqsrc *isrc = arg;
579 PIC_PRE_ITHREAD(isrc->isrc_dev, isrc);
583 * Interrupt source post_ithread method for MI interrupt framework.
586 intr_isrc_post_ithread(void *arg)
588 struct intr_irqsrc *isrc = arg;
590 PIC_POST_ITHREAD(isrc->isrc_dev, isrc);
594 * Interrupt source post_filter method for MI interrupt framework.
597 intr_isrc_post_filter(void *arg)
599 struct intr_irqsrc *isrc = arg;
601 PIC_POST_FILTER(isrc->isrc_dev, isrc);
605 * Interrupt source assign_cpu method for MI interrupt framework.
608 intr_isrc_assign_cpu(void *arg, int cpu)
611 struct intr_irqsrc *isrc = arg;
614 mtx_lock(&isrc_table_lock);
616 CPU_ZERO(&isrc->isrc_cpu);
617 isrc->isrc_flags &= ~INTR_ISRCF_BOUND;
619 CPU_SETOF(cpu, &isrc->isrc_cpu);
620 isrc->isrc_flags |= INTR_ISRCF_BOUND;
624 * In NOCPU case, it's up to PIC to either leave ISRC on same CPU or
625 * re-balance it to another CPU or enable it on more CPUs. However,
626 * PIC is expected to change isrc_cpu appropriately to keep us well
627 * informed if the call is successful.
629 if (irq_assign_cpu) {
630 error = PIC_BIND_INTR(isrc->isrc_dev, isrc);
632 CPU_ZERO(&isrc->isrc_cpu);
633 mtx_unlock(&isrc_table_lock);
637 mtx_unlock(&isrc_table_lock);
645 * Create interrupt event for interrupt source.
648 isrc_event_create(struct intr_irqsrc *isrc)
650 struct intr_event *ie;
653 error = intr_event_create(&ie, isrc, 0, isrc->isrc_irq,
654 intr_isrc_pre_ithread, intr_isrc_post_ithread, intr_isrc_post_filter,
655 intr_isrc_assign_cpu, "%s:", isrc->isrc_name);
659 mtx_lock(&isrc_table_lock);
661 * Make sure that we do not mix the two ways
662 * how we handle interrupt sources. Let contested event wins.
665 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
667 if (isrc->isrc_event != NULL) {
669 mtx_unlock(&isrc_table_lock);
670 intr_event_destroy(ie);
671 return (isrc->isrc_event != NULL ? EBUSY : 0);
673 isrc->isrc_event = ie;
674 mtx_unlock(&isrc_table_lock);
680 * Destroy interrupt event for interrupt source.
683 isrc_event_destroy(struct intr_irqsrc *isrc)
685 struct intr_event *ie;
687 mtx_lock(&isrc_table_lock);
688 ie = isrc->isrc_event;
689 isrc->isrc_event = NULL;
690 mtx_unlock(&isrc_table_lock);
693 intr_event_destroy(ie);
697 * Add handler to interrupt source.
700 isrc_add_handler(struct intr_irqsrc *isrc, const char *name,
701 driver_filter_t filter, driver_intr_t handler, void *arg,
702 enum intr_type flags, void **cookiep)
706 if (isrc->isrc_event == NULL) {
707 error = isrc_event_create(isrc);
712 error = intr_event_add_handler(isrc->isrc_event, name, filter, handler,
713 arg, intr_priority(flags), flags, cookiep);
715 mtx_lock(&isrc_table_lock);
716 intrcnt_updatename(isrc);
717 mtx_unlock(&isrc_table_lock);
724 * Lookup interrupt controller locked.
726 static inline struct intr_pic *
727 pic_lookup_locked(device_t dev, intptr_t xref, int flags)
729 struct intr_pic *pic;
731 mtx_assert(&pic_list_lock, MA_OWNED);
733 if (dev == NULL && xref == 0)
736 /* Note that pic->pic_dev is never NULL on registered PIC. */
737 SLIST_FOREACH(pic, &pic_list, pic_next) {
738 if ((pic->pic_flags & FLAG_TYPE_MASK) !=
739 (flags & FLAG_TYPE_MASK))
743 if (xref == pic->pic_xref)
745 } else if (xref == 0 || pic->pic_xref == 0) {
746 if (dev == pic->pic_dev)
748 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
755 * Lookup interrupt controller.
757 static struct intr_pic *
758 pic_lookup(device_t dev, intptr_t xref, int flags)
760 struct intr_pic *pic;
762 mtx_lock(&pic_list_lock);
763 pic = pic_lookup_locked(dev, xref, flags);
764 mtx_unlock(&pic_list_lock);
769 * Create interrupt controller.
771 static struct intr_pic *
772 pic_create(device_t dev, intptr_t xref, int flags)
774 struct intr_pic *pic;
776 mtx_lock(&pic_list_lock);
777 pic = pic_lookup_locked(dev, xref, flags);
779 mtx_unlock(&pic_list_lock);
782 pic = malloc(sizeof(*pic), M_INTRNG, M_NOWAIT | M_ZERO);
784 mtx_unlock(&pic_list_lock);
787 pic->pic_xref = xref;
789 pic->pic_flags = flags;
790 mtx_init(&pic->pic_child_lock, "pic child lock", NULL, MTX_SPIN);
791 SLIST_INSERT_HEAD(&pic_list, pic, pic_next);
792 mtx_unlock(&pic_list_lock);
798 * Destroy interrupt controller.
801 pic_destroy(device_t dev, intptr_t xref, int flags)
803 struct intr_pic *pic;
805 mtx_lock(&pic_list_lock);
806 pic = pic_lookup_locked(dev, xref, flags);
808 mtx_unlock(&pic_list_lock);
811 SLIST_REMOVE(&pic_list, pic, intr_pic, pic_next);
812 mtx_unlock(&pic_list_lock);
818 * Register interrupt controller.
821 intr_pic_register(device_t dev, intptr_t xref)
823 struct intr_pic *pic;
827 pic = pic_create(dev, xref, FLAG_PIC);
831 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
832 device_get_nameunit(dev), dev, (uintmax_t)xref);
837 * Unregister interrupt controller.
840 intr_pic_deregister(device_t dev, intptr_t xref)
843 panic("%s: not implemented", __func__);
847 * Mark interrupt controller (itself) as a root one.
849 * Note that only an interrupt controller can really know its position
850 * in interrupt controller's tree. So root PIC must claim itself as a root.
852 * In FDT case, according to ePAPR approved version 1.1 from 08 April 2011,
854 * "The root of the interrupt tree is determined when traversal
855 * of the interrupt tree reaches an interrupt controller node without
856 * an interrupts property and thus no explicit interrupt parent."
859 intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
860 void *arg, u_int ipicount)
862 struct intr_pic *pic;
864 pic = pic_lookup(dev, xref, FLAG_PIC);
866 device_printf(dev, "not registered\n");
870 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
871 ("%s: Found a non-PIC controller: %s", __func__,
872 device_get_name(pic->pic_dev)));
874 if (filter == NULL) {
875 device_printf(dev, "filter missing\n");
880 * Only one interrupt controllers could be on the root for now.
881 * Note that we further suppose that there is not threaded interrupt
882 * routine (handler) on the root. See intr_irq_handler().
884 if (intr_irq_root_dev != NULL) {
885 device_printf(dev, "another root already set\n");
889 intr_irq_root_dev = dev;
890 irq_root_filter = filter;
892 irq_root_ipicount = ipicount;
894 debugf("irq root set to %s\n", device_get_nameunit(dev));
899 * Add a handler to manage a sub range of a parents interrupts.
902 intr_pic_add_handler(device_t parent, struct intr_pic *pic,
903 intr_child_irq_filter_t *filter, void *arg, uintptr_t start,
906 struct intr_pic *parent_pic;
907 struct intr_pic_child *newchild;
909 struct intr_pic_child *child;
912 /* Find the parent PIC */
913 parent_pic = pic_lookup(parent, 0, FLAG_PIC);
914 if (parent_pic == NULL)
917 newchild = malloc(sizeof(*newchild), M_INTRNG, M_WAITOK | M_ZERO);
918 newchild->pc_pic = pic;
919 newchild->pc_filter = filter;
920 newchild->pc_filter_arg = arg;
921 newchild->pc_start = start;
922 newchild->pc_length = length;
924 mtx_lock_spin(&parent_pic->pic_child_lock);
926 SLIST_FOREACH(child, &parent_pic->pic_children, pc_next) {
927 KASSERT(child->pc_pic != pic, ("%s: Adding a child PIC twice",
931 SLIST_INSERT_HEAD(&parent_pic->pic_children, newchild, pc_next);
932 mtx_unlock_spin(&parent_pic->pic_child_lock);
938 intr_resolve_irq(device_t dev, intptr_t xref, struct intr_map_data *data,
939 struct intr_irqsrc **isrc)
941 struct intr_pic *pic;
942 struct intr_map_data_msi *msi;
947 pic = pic_lookup(dev, xref,
948 (data->type == INTR_MAP_DATA_MSI) ? FLAG_MSI : FLAG_PIC);
952 switch (data->type) {
953 case INTR_MAP_DATA_MSI:
954 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
955 ("%s: Found a non-MSI controller: %s", __func__,
956 device_get_name(pic->pic_dev)));
957 msi = (struct intr_map_data_msi *)data;
962 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
963 ("%s: Found a non-PIC controller: %s", __func__,
964 device_get_name(pic->pic_dev)));
965 return (PIC_MAP_INTR(pic->pic_dev, data, isrc));
970 intr_is_per_cpu(struct resource *res)
973 struct intr_irqsrc *isrc;
975 res_id = (u_int)rman_get_start(res);
976 isrc = intr_map_get_isrc(res_id);
979 panic("Attempt to get isrc for non-active resource id: %u\n",
981 return ((isrc->isrc_flags & INTR_ISRCF_PPI) != 0);
985 intr_activate_irq(device_t dev, struct resource *res)
989 struct intr_map_data *data;
990 struct intr_irqsrc *isrc;
994 KASSERT(rman_get_start(res) == rman_get_end(res),
995 ("%s: more interrupts in resource", __func__));
997 res_id = (u_int)rman_get_start(res);
998 if (intr_map_get_isrc(res_id) != NULL)
999 panic("Attempt to double activation of resource id: %u\n",
1001 intr_map_copy_map_data(res_id, &map_dev, &map_xref, &data);
1002 error = intr_resolve_irq(map_dev, map_xref, data, &isrc);
1004 free(data, M_INTRNG);
1005 /* XXX TODO DISCONECTED PICs */
1006 /* if (error == EINVAL) return(0); */
1009 intr_map_set_isrc(res_id, isrc);
1010 rman_set_virtual(res, data);
1011 return (PIC_ACTIVATE_INTR(isrc->isrc_dev, isrc, res, data));
1015 intr_deactivate_irq(device_t dev, struct resource *res)
1017 struct intr_map_data *data;
1018 struct intr_irqsrc *isrc;
1022 KASSERT(rman_get_start(res) == rman_get_end(res),
1023 ("%s: more interrupts in resource", __func__));
1025 res_id = (u_int)rman_get_start(res);
1026 isrc = intr_map_get_isrc(res_id);
1028 panic("Attempt to deactivate non-active resource id: %u\n",
1031 data = rman_get_virtual(res);
1032 error = PIC_DEACTIVATE_INTR(isrc->isrc_dev, isrc, res, data);
1033 intr_map_set_isrc(res_id, NULL);
1034 rman_set_virtual(res, NULL);
1035 free(data, M_INTRNG);
1040 intr_setup_irq(device_t dev, struct resource *res, driver_filter_t filt,
1041 driver_intr_t hand, void *arg, int flags, void **cookiep)
1044 struct intr_map_data *data;
1045 struct intr_irqsrc *isrc;
1049 KASSERT(rman_get_start(res) == rman_get_end(res),
1050 ("%s: more interrupts in resource", __func__));
1052 res_id = (u_int)rman_get_start(res);
1053 isrc = intr_map_get_isrc(res_id);
1055 /* XXX TODO DISCONECTED PICs */
1059 data = rman_get_virtual(res);
1060 name = device_get_nameunit(dev);
1064 * Standard handling is done through MI interrupt framework. However,
1065 * some interrupts could request solely own special handling. This
1066 * non standard handling can be used for interrupt controllers without
1067 * handler (filter only), so in case that interrupt controllers are
1068 * chained, MI interrupt framework is called only in leaf controller.
1070 * Note that root interrupt controller routine is served as well,
1071 * however in intr_irq_handler(), i.e. main system dispatch routine.
1073 if (flags & INTR_SOLO && hand != NULL) {
1074 debugf("irq %u cannot solo on %s\n", irq, name);
1078 if (flags & INTR_SOLO) {
1079 error = iscr_setup_filter(isrc, name, (intr_irq_filter_t *)filt,
1081 debugf("irq %u setup filter error %d on %s\n", isrc->isrc_irq, error,
1086 error = isrc_add_handler(isrc, name, filt, hand, arg, flags,
1088 debugf("irq %u add handler error %d on %s\n", isrc->isrc_irq, error, name);
1093 mtx_lock(&isrc_table_lock);
1094 error = PIC_SETUP_INTR(isrc->isrc_dev, isrc, res, data);
1096 isrc->isrc_handlers++;
1097 if (isrc->isrc_handlers == 1)
1098 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
1100 mtx_unlock(&isrc_table_lock);
1102 intr_event_remove_handler(*cookiep);
1107 intr_teardown_irq(device_t dev, struct resource *res, void *cookie)
1110 struct intr_map_data *data;
1111 struct intr_irqsrc *isrc;
1114 KASSERT(rman_get_start(res) == rman_get_end(res),
1115 ("%s: more interrupts in resource", __func__));
1117 res_id = (u_int)rman_get_start(res);
1118 isrc = intr_map_get_isrc(res_id);
1119 if (isrc == NULL || isrc->isrc_handlers == 0)
1122 data = rman_get_virtual(res);
1125 if (isrc->isrc_filter != NULL) {
1129 mtx_lock(&isrc_table_lock);
1130 isrc->isrc_filter = NULL;
1131 isrc->isrc_arg = NULL;
1132 isrc->isrc_handlers = 0;
1133 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1134 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1135 isrc_update_name(isrc, NULL);
1136 mtx_unlock(&isrc_table_lock);
1140 if (isrc != intr_handler_source(cookie))
1143 error = intr_event_remove_handler(cookie);
1145 mtx_lock(&isrc_table_lock);
1146 isrc->isrc_handlers--;
1147 if (isrc->isrc_handlers == 0)
1148 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1149 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1150 intrcnt_updatename(isrc);
1151 mtx_unlock(&isrc_table_lock);
1157 intr_describe_irq(device_t dev, struct resource *res, void *cookie,
1161 struct intr_irqsrc *isrc;
1164 KASSERT(rman_get_start(res) == rman_get_end(res),
1165 ("%s: more interrupts in resource", __func__));
1167 res_id = (u_int)rman_get_start(res);
1168 isrc = intr_map_get_isrc(res_id);
1169 if (isrc == NULL || isrc->isrc_handlers == 0)
1172 if (isrc->isrc_filter != NULL) {
1176 mtx_lock(&isrc_table_lock);
1177 isrc_update_name(isrc, descr);
1178 mtx_unlock(&isrc_table_lock);
1182 error = intr_event_describe_handler(isrc->isrc_event, cookie, descr);
1184 mtx_lock(&isrc_table_lock);
1185 intrcnt_updatename(isrc);
1186 mtx_unlock(&isrc_table_lock);
1193 intr_bind_irq(device_t dev, struct resource *res, int cpu)
1195 struct intr_irqsrc *isrc;
1198 KASSERT(rman_get_start(res) == rman_get_end(res),
1199 ("%s: more interrupts in resource", __func__));
1201 res_id = (u_int)rman_get_start(res);
1202 isrc = intr_map_get_isrc(res_id);
1203 if (isrc == NULL || isrc->isrc_handlers == 0)
1206 if (isrc->isrc_filter != NULL)
1207 return (intr_isrc_assign_cpu(isrc, cpu));
1209 return (intr_event_bind(isrc->isrc_event, cpu));
1213 * Return the CPU that the next interrupt source should use.
1214 * For now just returns the next CPU according to round-robin.
1217 intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
1221 KASSERT(!CPU_EMPTY(cpumask), ("%s: Empty CPU mask", __func__));
1222 if (!irq_assign_cpu || mp_ncpus == 1) {
1223 cpu = PCPU_GET(cpuid);
1225 if (CPU_ISSET(cpu, cpumask))
1228 return (CPU_FFS(cpumask) - 1);
1233 if (last_cpu > mp_maxid)
1235 } while (!CPU_ISSET(last_cpu, cpumask));
1239 #ifndef EARLY_AP_STARTUP
1241 * Distribute all the interrupt sources among the available
1242 * CPUs once the AP's have been launched.
1245 intr_irq_shuffle(void *arg __unused)
1247 struct intr_irqsrc *isrc;
1253 mtx_lock(&isrc_table_lock);
1254 irq_assign_cpu = true;
1255 for (i = 0; i < intr_nirq; i++) {
1256 isrc = irq_sources[i];
1257 if (isrc == NULL || isrc->isrc_handlers == 0 ||
1258 isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI))
1261 if (isrc->isrc_event != NULL &&
1262 isrc->isrc_flags & INTR_ISRCF_BOUND &&
1263 isrc->isrc_event->ie_cpu != CPU_FFS(&isrc->isrc_cpu) - 1)
1264 panic("%s: CPU inconsistency", __func__);
1266 if ((isrc->isrc_flags & INTR_ISRCF_BOUND) == 0)
1267 CPU_ZERO(&isrc->isrc_cpu); /* start again */
1270 * We are in wicked position here if the following call fails
1271 * for bound ISRC. The best thing we can do is to clear
1272 * isrc_cpu so inconsistency with ie_cpu will be detectable.
1274 if (PIC_BIND_INTR(isrc->isrc_dev, isrc) != 0)
1275 CPU_ZERO(&isrc->isrc_cpu);
1277 mtx_unlock(&isrc_table_lock);
1279 SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
1280 #endif /* !EARLY_AP_STARTUP */
1284 intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
1287 return (PCPU_GET(cpuid));
1292 * Allocate memory for new intr_map_data structure.
1293 * Initialize common fields.
1295 struct intr_map_data *
1296 intr_alloc_map_data(enum intr_map_data_type type, size_t len, int flags)
1298 struct intr_map_data *data;
1300 data = malloc(len, M_INTRNG, flags);
1306 void intr_free_intr_map_data(struct intr_map_data *data)
1309 free(data, M_INTRNG);
1313 * Register a MSI/MSI-X interrupt controller
1316 intr_msi_register(device_t dev, intptr_t xref)
1318 struct intr_pic *pic;
1322 pic = pic_create(dev, xref, FLAG_MSI);
1326 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
1327 device_get_nameunit(dev), dev, (uintmax_t)xref);
1332 intr_alloc_msi(device_t pci, device_t child, intptr_t xref, int count,
1333 int maxcount, int *irqs)
1335 struct iommu_domain *domain;
1336 struct intr_irqsrc **isrc;
1337 struct intr_pic *pic;
1339 struct intr_map_data_msi *msi;
1342 pic = pic_lookup(NULL, xref, FLAG_MSI);
1346 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1347 ("%s: Found a non-MSI controller: %s", __func__,
1348 device_get_name(pic->pic_dev)));
1351 * If this is the first time we have used this context ask the
1352 * interrupt controller to map memory the msi source will need.
1354 err = MSI_IOMMU_INIT(pic->pic_dev, child, &domain);
1358 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1359 err = MSI_ALLOC_MSI(pic->pic_dev, child, count, maxcount, &pdev, isrc);
1361 free(isrc, M_INTRNG);
1365 for (i = 0; i < count; i++) {
1366 isrc[i]->isrc_iommu = domain;
1367 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1368 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1369 msi-> isrc = isrc[i];
1371 irqs[i] = intr_map_irq(pic->pic_dev, xref,
1372 (struct intr_map_data *)msi);
1374 free(isrc, M_INTRNG);
1380 intr_release_msi(device_t pci, device_t child, intptr_t xref, int count,
1383 struct intr_irqsrc **isrc;
1384 struct intr_pic *pic;
1385 struct intr_map_data_msi *msi;
1388 pic = pic_lookup(NULL, xref, FLAG_MSI);
1392 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1393 ("%s: Found a non-MSI controller: %s", __func__,
1394 device_get_name(pic->pic_dev)));
1396 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1398 for (i = 0; i < count; i++) {
1399 msi = (struct intr_map_data_msi *)
1400 intr_map_get_map_data(irqs[i]);
1401 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1402 ("%s: irq %d map data is not MSI", __func__,
1404 isrc[i] = msi->isrc;
1407 MSI_IOMMU_DEINIT(pic->pic_dev, child);
1409 err = MSI_RELEASE_MSI(pic->pic_dev, child, count, isrc);
1411 for (i = 0; i < count; i++) {
1412 if (isrc[i] != NULL)
1413 intr_unmap_irq(irqs[i]);
1416 free(isrc, M_INTRNG);
1421 intr_alloc_msix(device_t pci, device_t child, intptr_t xref, int *irq)
1423 struct iommu_domain *domain;
1424 struct intr_irqsrc *isrc;
1425 struct intr_pic *pic;
1427 struct intr_map_data_msi *msi;
1430 pic = pic_lookup(NULL, xref, FLAG_MSI);
1434 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1435 ("%s: Found a non-MSI controller: %s", __func__,
1436 device_get_name(pic->pic_dev)));
1439 * If this is the first time we have used this context ask the
1440 * interrupt controller to map memory the msi source will need.
1442 err = MSI_IOMMU_INIT(pic->pic_dev, child, &domain);
1446 err = MSI_ALLOC_MSIX(pic->pic_dev, child, &pdev, &isrc);
1450 isrc->isrc_iommu = domain;
1451 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1452 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1454 *irq = intr_map_irq(pic->pic_dev, xref, (struct intr_map_data *)msi);
1459 intr_release_msix(device_t pci, device_t child, intptr_t xref, int irq)
1461 struct intr_irqsrc *isrc;
1462 struct intr_pic *pic;
1463 struct intr_map_data_msi *msi;
1466 pic = pic_lookup(NULL, xref, FLAG_MSI);
1470 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1471 ("%s: Found a non-MSI controller: %s", __func__,
1472 device_get_name(pic->pic_dev)));
1474 msi = (struct intr_map_data_msi *)
1475 intr_map_get_map_data(irq);
1476 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1477 ("%s: irq %d map data is not MSI", __func__,
1481 intr_unmap_irq(irq);
1485 MSI_IOMMU_DEINIT(pic->pic_dev, child);
1487 err = MSI_RELEASE_MSIX(pic->pic_dev, child, isrc);
1488 intr_unmap_irq(irq);
1494 intr_map_msi(device_t pci, device_t child, intptr_t xref, int irq,
1495 uint64_t *addr, uint32_t *data)
1497 struct intr_irqsrc *isrc;
1498 struct intr_pic *pic;
1501 pic = pic_lookup(NULL, xref, FLAG_MSI);
1505 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1506 ("%s: Found a non-MSI controller: %s", __func__,
1507 device_get_name(pic->pic_dev)));
1509 isrc = intr_map_get_isrc(irq);
1513 err = MSI_MAP_MSI(pic->pic_dev, child, isrc, addr, data);
1516 if (isrc->isrc_iommu != NULL)
1517 iommu_translate_msi(isrc->isrc_iommu, addr);
1523 void dosoftints(void);
1531 * Init interrupt controller on another CPU.
1534 intr_pic_init_secondary(void)
1538 * QQQ: Only root PIC is aware of other CPUs ???
1540 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
1542 //mtx_lock(&isrc_table_lock);
1543 PIC_INIT_SECONDARY(intr_irq_root_dev);
1544 //mtx_unlock(&isrc_table_lock);
1549 DB_SHOW_COMMAND(irqs, db_show_irqs)
1553 struct intr_irqsrc *isrc;
1555 for (irqsum = 0, i = 0; i < intr_nirq; i++) {
1556 isrc = irq_sources[i];
1560 num = isrc->isrc_count != NULL ? isrc->isrc_count[0] : 0;
1561 db_printf("irq%-3u <%s>: cpu %02lx%s cnt %lu\n", i,
1562 isrc->isrc_name, isrc->isrc_cpu.__bits[0],
1563 isrc->isrc_flags & INTR_ISRCF_BOUND ? " (bound)" : "", num);
1566 db_printf("irq total %u\n", irqsum);
1571 * Interrupt mapping table functions.
1573 * Please, keep this part separately, it can be transformed to
1574 * extension of standard resources.
1576 struct intr_map_entry
1580 struct intr_map_data *map_data;
1581 struct intr_irqsrc *isrc;
1582 /* XXX TODO DISCONECTED PICs */
1586 /* XXX Convert irq_map[] to dynamicaly expandable one. */
1587 static struct intr_map_entry **irq_map;
1588 static u_int irq_map_count;
1589 static u_int irq_map_first_free_idx;
1590 static struct mtx irq_map_lock;
1592 static struct intr_irqsrc *
1593 intr_map_get_isrc(u_int res_id)
1595 struct intr_irqsrc *isrc;
1598 mtx_lock(&irq_map_lock);
1599 if (res_id < irq_map_count && irq_map[res_id] != NULL)
1600 isrc = irq_map[res_id]->isrc;
1601 mtx_unlock(&irq_map_lock);
1607 intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc)
1610 mtx_lock(&irq_map_lock);
1611 if (res_id < irq_map_count && irq_map[res_id] != NULL)
1612 irq_map[res_id]->isrc = isrc;
1613 mtx_unlock(&irq_map_lock);
1617 * Get a copy of intr_map_entry data
1619 static struct intr_map_data *
1620 intr_map_get_map_data(u_int res_id)
1622 struct intr_map_data *data;
1625 mtx_lock(&irq_map_lock);
1626 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1627 panic("Attempt to copy invalid resource id: %u\n", res_id);
1628 data = irq_map[res_id]->map_data;
1629 mtx_unlock(&irq_map_lock);
1635 * Get a copy of intr_map_entry data
1638 intr_map_copy_map_data(u_int res_id, device_t *map_dev, intptr_t *map_xref,
1639 struct intr_map_data **data)
1644 mtx_lock(&irq_map_lock);
1645 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1646 panic("Attempt to copy invalid resource id: %u\n", res_id);
1647 if (irq_map[res_id]->map_data != NULL)
1648 len = irq_map[res_id]->map_data->len;
1649 mtx_unlock(&irq_map_lock);
1654 *data = malloc(len, M_INTRNG, M_WAITOK | M_ZERO);
1655 mtx_lock(&irq_map_lock);
1656 if (irq_map[res_id] == NULL)
1657 panic("Attempt to copy invalid resource id: %u\n", res_id);
1659 if (len != irq_map[res_id]->map_data->len)
1660 panic("Resource id: %u has changed.\n", res_id);
1661 memcpy(*data, irq_map[res_id]->map_data, len);
1663 *map_dev = irq_map[res_id]->dev;
1664 *map_xref = irq_map[res_id]->xref;
1665 mtx_unlock(&irq_map_lock);
1669 * Allocate and fill new entry in irq_map table.
1672 intr_map_irq(device_t dev, intptr_t xref, struct intr_map_data *data)
1675 struct intr_map_entry *entry;
1677 /* Prepare new entry first. */
1678 entry = malloc(sizeof(*entry), M_INTRNG, M_WAITOK | M_ZERO);
1682 entry->map_data = data;
1685 mtx_lock(&irq_map_lock);
1686 for (i = irq_map_first_free_idx; i < irq_map_count; i++) {
1687 if (irq_map[i] == NULL) {
1689 irq_map_first_free_idx = i + 1;
1690 mtx_unlock(&irq_map_lock);
1694 mtx_unlock(&irq_map_lock);
1696 /* XXX Expand irq_map table */
1697 panic("IRQ mapping table is full.");
1701 * Remove and free mapping entry.
1704 intr_unmap_irq(u_int res_id)
1706 struct intr_map_entry *entry;
1708 mtx_lock(&irq_map_lock);
1709 if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL))
1710 panic("Attempt to unmap invalid resource id: %u\n", res_id);
1711 entry = irq_map[res_id];
1712 irq_map[res_id] = NULL;
1713 irq_map_first_free_idx = res_id;
1714 mtx_unlock(&irq_map_lock);
1715 intr_free_intr_map_data(entry->map_data);
1716 free(entry, M_INTRNG);
1720 * Clone mapping entry.
1723 intr_map_clone_irq(u_int old_res_id)
1727 struct intr_map_data *data;
1729 intr_map_copy_map_data(old_res_id, &map_dev, &map_xref, &data);
1730 return (intr_map_irq(map_dev, map_xref, data));
1734 intr_map_init(void *dummy __unused)
1737 mtx_init(&irq_map_lock, "intr map table", NULL, MTX_DEF);
1739 irq_map_count = 2 * intr_nirq;
1740 irq_map = mallocarray(irq_map_count, sizeof(struct intr_map_entry*),
1741 M_INTRNG, M_WAITOK | M_ZERO);
1743 SYSINIT(intr_map_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_map_init, NULL);