2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * New-style Interrupt Framework
34 * TODO: - to support IPI (PPI) enabling on other CPUs if already started
35 * - to complete things for removable PICs
39 #include "opt_hwpmc_hooks.h"
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/syslog.h>
45 #include <sys/malloc.h>
47 #include <sys/queue.h>
49 #include <sys/interrupt.h>
51 #include <sys/cpuset.h>
53 #include <sys/sched.h>
56 #include <sys/pmckern.h>
59 #include <machine/atomic.h>
60 #include <machine/intr.h>
61 #include <machine/cpu.h>
62 #include <machine/smp.h>
63 #include <machine/stdarg.h>
72 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
75 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
76 printf(fmt,##args); } while (0)
78 #define debugf(fmt, args...)
81 MALLOC_DECLARE(M_INTRNG);
82 MALLOC_DEFINE(M_INTRNG, "intr", "intr interrupt handling");
84 /* Main interrupt handler called from assembler -> 'hidden' for C code. */
85 void intr_irq_handler(struct trapframe *tf);
87 /* Root interrupt controller stuff. */
88 device_t intr_irq_root_dev;
89 static intr_irq_filter_t *irq_root_filter;
90 static void *irq_root_arg;
91 static u_int irq_root_ipicount;
93 struct intr_pic_child {
94 SLIST_ENTRY(intr_pic_child) pc_next;
95 struct intr_pic *pc_pic;
96 intr_child_irq_filter_t *pc_filter;
102 /* Interrupt controller definition. */
104 SLIST_ENTRY(intr_pic) pic_next;
105 intptr_t pic_xref; /* hardware identification */
107 #define FLAG_PIC (1 << 0)
108 #define FLAG_MSI (1 << 1)
110 struct mtx pic_child_lock;
111 SLIST_HEAD(, intr_pic_child) pic_children;
114 static struct mtx pic_list_lock;
115 static SLIST_HEAD(, intr_pic) pic_list;
117 static struct intr_pic *pic_lookup(device_t dev, intptr_t xref);
119 /* Interrupt source definition. */
120 static struct mtx isrc_table_lock;
121 static struct intr_irqsrc *irq_sources[NIRQ];
125 static boolean_t irq_assign_cpu = FALSE;
129 * - 2 counters for each I/O interrupt.
130 * - MAXCPU counters for each IPI counters for SMP.
133 #define INTRCNT_COUNT (NIRQ * 2 + INTR_IPI_COUNT * MAXCPU)
135 #define INTRCNT_COUNT (NIRQ * 2)
138 /* Data for MI statistics reporting. */
139 u_long intrcnt[INTRCNT_COUNT];
140 char intrnames[INTRCNT_COUNT * INTRNAME_LEN];
141 size_t sintrcnt = sizeof(intrcnt);
142 size_t sintrnames = sizeof(intrnames);
143 static u_int intrcnt_index;
146 * Interrupt framework initialization routine.
149 intr_irq_init(void *dummy __unused)
152 SLIST_INIT(&pic_list);
153 mtx_init(&pic_list_lock, "intr pic list", NULL, MTX_DEF);
155 mtx_init(&isrc_table_lock, "intr isrc table", NULL, MTX_DEF);
157 SYSINIT(intr_irq_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_irq_init, NULL);
160 intrcnt_setname(const char *name, int index)
163 snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s",
164 INTRNAME_LEN - 1, name);
168 * Update name for interrupt source with interrupt event.
171 intrcnt_updatename(struct intr_irqsrc *isrc)
174 /* QQQ: What about stray counter name? */
175 mtx_assert(&isrc_table_lock, MA_OWNED);
176 intrcnt_setname(isrc->isrc_event->ie_fullname, isrc->isrc_index);
180 * Virtualization for interrupt source interrupt counter increment.
183 isrc_increment_count(struct intr_irqsrc *isrc)
186 if (isrc->isrc_flags & INTR_ISRCF_PPI)
187 atomic_add_long(&isrc->isrc_count[0], 1);
189 isrc->isrc_count[0]++;
193 * Virtualization for interrupt source interrupt stray counter increment.
196 isrc_increment_straycount(struct intr_irqsrc *isrc)
199 isrc->isrc_count[1]++;
203 * Virtualization for interrupt source interrupt name update.
206 isrc_update_name(struct intr_irqsrc *isrc, const char *name)
208 char str[INTRNAME_LEN];
210 mtx_assert(&isrc_table_lock, MA_OWNED);
213 snprintf(str, INTRNAME_LEN, "%s: %s", isrc->isrc_name, name);
214 intrcnt_setname(str, isrc->isrc_index);
215 snprintf(str, INTRNAME_LEN, "stray %s: %s", isrc->isrc_name,
217 intrcnt_setname(str, isrc->isrc_index + 1);
219 snprintf(str, INTRNAME_LEN, "%s:", isrc->isrc_name);
220 intrcnt_setname(str, isrc->isrc_index);
221 snprintf(str, INTRNAME_LEN, "stray %s:", isrc->isrc_name);
222 intrcnt_setname(str, isrc->isrc_index + 1);
227 * Virtualization for interrupt source interrupt counters setup.
230 isrc_setup_counters(struct intr_irqsrc *isrc)
235 * XXX - it does not work well with removable controllers and
236 * interrupt sources !!!
238 index = atomic_fetchadd_int(&intrcnt_index, 2);
239 isrc->isrc_index = index;
240 isrc->isrc_count = &intrcnt[index];
241 isrc_update_name(isrc, NULL);
245 * Virtualization for interrupt source interrupt counters release.
248 isrc_release_counters(struct intr_irqsrc *isrc)
251 panic("%s: not implemented", __func__);
256 * Virtualization for interrupt source IPI counters setup.
259 intr_ipi_setup_counters(const char *name)
262 char str[INTRNAME_LEN];
264 index = atomic_fetchadd_int(&intrcnt_index, MAXCPU);
265 for (i = 0; i < MAXCPU; i++) {
266 snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
267 intrcnt_setname(str, index + i);
269 return (&intrcnt[index]);
274 * Main interrupt dispatch handler. It's called straight
275 * from the assembler, where CPU interrupt is served.
278 intr_irq_handler(struct trapframe *tf)
280 struct trapframe * oldframe;
283 KASSERT(irq_root_filter != NULL, ("%s: no filter", __func__));
285 PCPU_INC(cnt.v_intr);
288 oldframe = td->td_intr_frame;
289 td->td_intr_frame = tf;
290 irq_root_filter(irq_root_arg);
291 td->td_intr_frame = oldframe;
294 if (pmc_hook && TRAPF_USERMODE(tf) &&
295 (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
296 pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
301 intr_child_irq_handler(struct intr_pic *parent, uintptr_t irq)
303 struct intr_pic_child *child;
307 mtx_lock_spin(&parent->pic_child_lock);
308 SLIST_FOREACH(child, &parent->pic_children, pc_next) {
309 if (child->pc_start <= irq &&
310 irq < (child->pc_start + child->pc_length)) {
315 mtx_unlock_spin(&parent->pic_child_lock);
318 return (child->pc_filter(child->pc_filter_arg, irq));
320 return (FILTER_STRAY);
324 * interrupt controller dispatch function for interrupts. It should
325 * be called straight from the interrupt controller, when associated interrupt
329 intr_isrc_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
332 KASSERT(isrc != NULL, ("%s: no source", __func__));
334 isrc_increment_count(isrc);
337 if (isrc->isrc_filter != NULL) {
339 error = isrc->isrc_filter(isrc->isrc_arg, tf);
340 PIC_POST_FILTER(isrc->isrc_dev, isrc);
341 if (error == FILTER_HANDLED)
345 if (isrc->isrc_event != NULL) {
346 if (intr_event_handle(isrc->isrc_event, tf) == 0)
350 isrc_increment_straycount(isrc);
355 * Alloc unique interrupt number (resource handle) for interrupt source.
357 * There could be various strategies how to allocate free interrupt number
358 * (resource handle) for new interrupt source.
360 * 1. Handles are always allocated forward, so handles are not recycled
361 * immediately. However, if only one free handle left which is reused
365 isrc_alloc_irq(struct intr_irqsrc *isrc)
369 mtx_assert(&isrc_table_lock, MA_OWNED);
371 maxirqs = nitems(irq_sources);
372 if (irq_next_free >= maxirqs)
375 for (irq = irq_next_free; irq < maxirqs; irq++) {
376 if (irq_sources[irq] == NULL)
379 for (irq = 0; irq < irq_next_free; irq++) {
380 if (irq_sources[irq] == NULL)
384 irq_next_free = maxirqs;
388 isrc->isrc_irq = irq;
389 irq_sources[irq] = isrc;
391 irq_next_free = irq + 1;
392 if (irq_next_free >= maxirqs)
398 * Free unique interrupt number (resource handle) from interrupt source.
401 isrc_free_irq(struct intr_irqsrc *isrc)
404 mtx_assert(&isrc_table_lock, MA_OWNED);
406 if (isrc->isrc_irq >= nitems(irq_sources))
408 if (irq_sources[isrc->isrc_irq] != isrc)
411 irq_sources[isrc->isrc_irq] = NULL;
412 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
417 * Lookup interrupt source by interrupt number (resource handle).
419 static inline struct intr_irqsrc *
420 isrc_lookup(u_int irq)
423 if (irq < nitems(irq_sources))
424 return (irq_sources[irq]);
429 * Initialize interrupt source and register it into global interrupt table.
432 intr_isrc_register(struct intr_irqsrc *isrc, device_t dev, u_int flags,
433 const char *fmt, ...)
438 bzero(isrc, sizeof(struct intr_irqsrc));
439 isrc->isrc_dev = dev;
440 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
441 isrc->isrc_flags = flags;
444 vsnprintf(isrc->isrc_name, INTR_ISRC_NAMELEN, fmt, ap);
447 mtx_lock(&isrc_table_lock);
448 error = isrc_alloc_irq(isrc);
450 mtx_unlock(&isrc_table_lock);
454 * Setup interrupt counters, but not for IPI sources. Those are setup
455 * later and only for used ones (up to INTR_IPI_COUNT) to not exhaust
458 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
459 isrc_setup_counters(isrc);
460 mtx_unlock(&isrc_table_lock);
465 * Deregister interrupt source from global interrupt table.
468 intr_isrc_deregister(struct intr_irqsrc *isrc)
472 mtx_lock(&isrc_table_lock);
473 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
474 isrc_release_counters(isrc);
475 error = isrc_free_irq(isrc);
476 mtx_unlock(&isrc_table_lock);
482 * A support function for a PIC to decide if provided ISRC should be inited
483 * on given cpu. The logic of INTR_ISRCF_BOUND flag and isrc_cpu member of
484 * struct intr_irqsrc is the following:
486 * If INTR_ISRCF_BOUND is set, the ISRC should be inited only on cpus
487 * set in isrc_cpu. If not, the ISRC should be inited on every cpu and
488 * isrc_cpu is kept consistent with it. Thus isrc_cpu is always correct.
491 intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu)
494 if (isrc->isrc_handlers == 0)
496 if ((isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI)) == 0)
498 if (isrc->isrc_flags & INTR_ISRCF_BOUND)
499 return (CPU_ISSET(cpu, &isrc->isrc_cpu));
501 CPU_SET(cpu, &isrc->isrc_cpu);
508 * Setup filter into interrupt source.
511 iscr_setup_filter(struct intr_irqsrc *isrc, const char *name,
512 intr_irq_filter_t *filter, void *arg, void **cookiep)
518 mtx_lock(&isrc_table_lock);
520 * Make sure that we do not mix the two ways
521 * how we handle interrupt sources.
523 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
524 mtx_unlock(&isrc_table_lock);
527 isrc->isrc_filter = filter;
528 isrc->isrc_arg = arg;
529 isrc_update_name(isrc, name);
530 mtx_unlock(&isrc_table_lock);
538 * Interrupt source pre_ithread method for MI interrupt framework.
541 intr_isrc_pre_ithread(void *arg)
543 struct intr_irqsrc *isrc = arg;
545 PIC_PRE_ITHREAD(isrc->isrc_dev, isrc);
549 * Interrupt source post_ithread method for MI interrupt framework.
552 intr_isrc_post_ithread(void *arg)
554 struct intr_irqsrc *isrc = arg;
556 PIC_POST_ITHREAD(isrc->isrc_dev, isrc);
560 * Interrupt source post_filter method for MI interrupt framework.
563 intr_isrc_post_filter(void *arg)
565 struct intr_irqsrc *isrc = arg;
567 PIC_POST_FILTER(isrc->isrc_dev, isrc);
571 * Interrupt source assign_cpu method for MI interrupt framework.
574 intr_isrc_assign_cpu(void *arg, int cpu)
577 struct intr_irqsrc *isrc = arg;
580 if (isrc->isrc_dev != intr_irq_root_dev)
583 mtx_lock(&isrc_table_lock);
585 CPU_ZERO(&isrc->isrc_cpu);
586 isrc->isrc_flags &= ~INTR_ISRCF_BOUND;
588 CPU_SETOF(cpu, &isrc->isrc_cpu);
589 isrc->isrc_flags |= INTR_ISRCF_BOUND;
593 * In NOCPU case, it's up to PIC to either leave ISRC on same CPU or
594 * re-balance it to another CPU or enable it on more CPUs. However,
595 * PIC is expected to change isrc_cpu appropriately to keep us well
596 * informed if the call is successful.
598 if (irq_assign_cpu) {
599 error = PIC_BIND_INTR(isrc->isrc_dev, isrc);
601 CPU_ZERO(&isrc->isrc_cpu);
602 mtx_unlock(&isrc_table_lock);
606 mtx_unlock(&isrc_table_lock);
614 * Create interrupt event for interrupt source.
617 isrc_event_create(struct intr_irqsrc *isrc)
619 struct intr_event *ie;
622 error = intr_event_create(&ie, isrc, 0, isrc->isrc_irq,
623 intr_isrc_pre_ithread, intr_isrc_post_ithread, intr_isrc_post_filter,
624 intr_isrc_assign_cpu, "%s:", isrc->isrc_name);
628 mtx_lock(&isrc_table_lock);
630 * Make sure that we do not mix the two ways
631 * how we handle interrupt sources. Let contested event wins.
634 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
636 if (isrc->isrc_event != NULL) {
638 mtx_unlock(&isrc_table_lock);
639 intr_event_destroy(ie);
640 return (isrc->isrc_event != NULL ? EBUSY : 0);
642 isrc->isrc_event = ie;
643 mtx_unlock(&isrc_table_lock);
649 * Destroy interrupt event for interrupt source.
652 isrc_event_destroy(struct intr_irqsrc *isrc)
654 struct intr_event *ie;
656 mtx_lock(&isrc_table_lock);
657 ie = isrc->isrc_event;
658 isrc->isrc_event = NULL;
659 mtx_unlock(&isrc_table_lock);
662 intr_event_destroy(ie);
666 * Add handler to interrupt source.
669 isrc_add_handler(struct intr_irqsrc *isrc, const char *name,
670 driver_filter_t filter, driver_intr_t handler, void *arg,
671 enum intr_type flags, void **cookiep)
675 if (isrc->isrc_event == NULL) {
676 error = isrc_event_create(isrc);
681 error = intr_event_add_handler(isrc->isrc_event, name, filter, handler,
682 arg, intr_priority(flags), flags, cookiep);
684 mtx_lock(&isrc_table_lock);
685 intrcnt_updatename(isrc);
686 mtx_unlock(&isrc_table_lock);
693 * Lookup interrupt controller locked.
695 static inline struct intr_pic *
696 pic_lookup_locked(device_t dev, intptr_t xref)
698 struct intr_pic *pic;
700 mtx_assert(&pic_list_lock, MA_OWNED);
702 if (dev == NULL && xref == 0)
705 /* Note that pic->pic_dev is never NULL on registered PIC. */
706 SLIST_FOREACH(pic, &pic_list, pic_next) {
708 if (xref == pic->pic_xref)
710 } else if (xref == 0 || pic->pic_xref == 0) {
711 if (dev == pic->pic_dev)
713 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
720 * Lookup interrupt controller.
722 static struct intr_pic *
723 pic_lookup(device_t dev, intptr_t xref)
725 struct intr_pic *pic;
727 mtx_lock(&pic_list_lock);
728 pic = pic_lookup_locked(dev, xref);
729 mtx_unlock(&pic_list_lock);
734 * Create interrupt controller.
736 static struct intr_pic *
737 pic_create(device_t dev, intptr_t xref)
739 struct intr_pic *pic;
741 mtx_lock(&pic_list_lock);
742 pic = pic_lookup_locked(dev, xref);
744 mtx_unlock(&pic_list_lock);
747 pic = malloc(sizeof(*pic), M_INTRNG, M_NOWAIT | M_ZERO);
749 mtx_unlock(&pic_list_lock);
752 pic->pic_xref = xref;
754 mtx_init(&pic->pic_child_lock, "pic child lock", NULL, MTX_SPIN);
755 SLIST_INSERT_HEAD(&pic_list, pic, pic_next);
756 mtx_unlock(&pic_list_lock);
762 * Destroy interrupt controller.
765 pic_destroy(device_t dev, intptr_t xref)
767 struct intr_pic *pic;
769 mtx_lock(&pic_list_lock);
770 pic = pic_lookup_locked(dev, xref);
772 mtx_unlock(&pic_list_lock);
775 SLIST_REMOVE(&pic_list, pic, intr_pic, pic_next);
776 mtx_unlock(&pic_list_lock);
782 * Register interrupt controller.
785 intr_pic_register(device_t dev, intptr_t xref)
787 struct intr_pic *pic;
791 pic = pic_create(dev, xref);
795 pic->pic_flags |= FLAG_PIC;
797 debugf("PIC %p registered for %s <dev %p, xref %x>\n", pic,
798 device_get_nameunit(dev), dev, xref);
803 * Unregister interrupt controller.
806 intr_pic_deregister(device_t dev, intptr_t xref)
809 panic("%s: not implemented", __func__);
813 * Mark interrupt controller (itself) as a root one.
815 * Note that only an interrupt controller can really know its position
816 * in interrupt controller's tree. So root PIC must claim itself as a root.
818 * In FDT case, according to ePAPR approved version 1.1 from 08 April 2011,
820 * "The root of the interrupt tree is determined when traversal
821 * of the interrupt tree reaches an interrupt controller node without
822 * an interrupts property and thus no explicit interrupt parent."
825 intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
826 void *arg, u_int ipicount)
828 struct intr_pic *pic;
830 pic = pic_lookup(dev, xref);
832 device_printf(dev, "not registered\n");
836 KASSERT((pic->pic_flags & FLAG_PIC) != 0,
837 ("%s: Found a non-PIC controller: %s", __func__,
838 device_get_name(pic->pic_dev)));
840 if (filter == NULL) {
841 device_printf(dev, "filter missing\n");
846 * Only one interrupt controllers could be on the root for now.
847 * Note that we further suppose that there is not threaded interrupt
848 * routine (handler) on the root. See intr_irq_handler().
850 if (intr_irq_root_dev != NULL) {
851 device_printf(dev, "another root already set\n");
855 intr_irq_root_dev = dev;
856 irq_root_filter = filter;
858 irq_root_ipicount = ipicount;
860 debugf("irq root set to %s\n", device_get_nameunit(dev));
865 * Add a handler to manage a sub range of a parents interrupts.
868 intr_pic_add_handler(device_t parent, struct intr_pic *pic,
869 intr_child_irq_filter_t *filter, void *arg, uintptr_t start,
872 struct intr_pic *parent_pic;
873 struct intr_pic_child *newchild;
875 struct intr_pic_child *child;
878 parent_pic = pic_lookup(parent, 0);
879 if (parent_pic == NULL)
882 newchild = malloc(sizeof(*newchild), M_INTRNG, M_WAITOK | M_ZERO);
883 newchild->pc_pic = pic;
884 newchild->pc_filter = filter;
885 newchild->pc_filter_arg = arg;
886 newchild->pc_start = start;
887 newchild->pc_length = length;
889 mtx_lock_spin(&parent_pic->pic_child_lock);
891 SLIST_FOREACH(child, &parent_pic->pic_children, pc_next) {
892 KASSERT(child->pc_pic != pic, ("%s: Adding a child PIC twice",
896 SLIST_INSERT_HEAD(&parent_pic->pic_children, newchild, pc_next);
897 mtx_unlock_spin(&parent_pic->pic_child_lock);
903 intr_map_irq(device_t dev, intptr_t xref, struct intr_map_data *data,
907 struct intr_irqsrc *isrc;
908 struct intr_pic *pic;
913 pic = pic_lookup(dev, xref);
917 KASSERT((pic->pic_flags & FLAG_PIC) != 0,
918 ("%s: Found a non-PIC controller: %s", __func__,
919 device_get_name(pic->pic_dev)));
921 error = PIC_MAP_INTR(pic->pic_dev, data, &isrc);
923 *irqp = isrc->isrc_irq;
928 intr_alloc_irq(device_t dev, struct resource *res)
930 struct intr_map_data *data;
931 struct intr_irqsrc *isrc;
933 KASSERT(rman_get_start(res) == rman_get_end(res),
934 ("%s: more interrupts in resource", __func__));
936 isrc = isrc_lookup(rman_get_start(res));
940 data = rman_get_virtual(res);
941 return (PIC_ALLOC_INTR(isrc->isrc_dev, isrc, res, data));
945 intr_release_irq(device_t dev, struct resource *res)
947 struct intr_map_data *data;
948 struct intr_irqsrc *isrc;
950 KASSERT(rman_get_start(res) == rman_get_end(res),
951 ("%s: more interrupts in resource", __func__));
953 isrc = isrc_lookup(rman_get_start(res));
957 data = rman_get_virtual(res);
958 return (PIC_RELEASE_INTR(isrc->isrc_dev, isrc, res, data));
962 intr_setup_irq(device_t dev, struct resource *res, driver_filter_t filt,
963 driver_intr_t hand, void *arg, int flags, void **cookiep)
966 struct intr_map_data *data;
967 struct intr_irqsrc *isrc;
970 KASSERT(rman_get_start(res) == rman_get_end(res),
971 ("%s: more interrupts in resource", __func__));
973 isrc = isrc_lookup(rman_get_start(res));
977 data = rman_get_virtual(res);
978 name = device_get_nameunit(dev);
982 * Standard handling is done through MI interrupt framework. However,
983 * some interrupts could request solely own special handling. This
984 * non standard handling can be used for interrupt controllers without
985 * handler (filter only), so in case that interrupt controllers are
986 * chained, MI interrupt framework is called only in leaf controller.
988 * Note that root interrupt controller routine is served as well,
989 * however in intr_irq_handler(), i.e. main system dispatch routine.
991 if (flags & INTR_SOLO && hand != NULL) {
992 debugf("irq %u cannot solo on %s\n", irq, name);
996 if (flags & INTR_SOLO) {
997 error = iscr_setup_filter(isrc, name, (intr_irq_filter_t *)filt,
999 debugf("irq %u setup filter error %d on %s\n", irq, error,
1004 error = isrc_add_handler(isrc, name, filt, hand, arg, flags,
1006 debugf("irq %u add handler error %d on %s\n", irq, error, name);
1011 mtx_lock(&isrc_table_lock);
1012 error = PIC_SETUP_INTR(isrc->isrc_dev, isrc, res, data);
1014 isrc->isrc_handlers++;
1015 if (isrc->isrc_handlers == 1)
1016 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
1018 mtx_unlock(&isrc_table_lock);
1020 intr_event_remove_handler(*cookiep);
1025 intr_teardown_irq(device_t dev, struct resource *res, void *cookie)
1028 struct intr_map_data *data;
1029 struct intr_irqsrc *isrc;
1031 KASSERT(rman_get_start(res) == rman_get_end(res),
1032 ("%s: more interrupts in resource", __func__));
1034 isrc = isrc_lookup(rman_get_start(res));
1035 if (isrc == NULL || isrc->isrc_handlers == 0)
1038 data = rman_get_virtual(res);
1041 if (isrc->isrc_filter != NULL) {
1045 mtx_lock(&isrc_table_lock);
1046 isrc->isrc_filter = NULL;
1047 isrc->isrc_arg = NULL;
1048 isrc->isrc_handlers = 0;
1049 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1050 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1051 isrc_update_name(isrc, NULL);
1052 mtx_unlock(&isrc_table_lock);
1056 if (isrc != intr_handler_source(cookie))
1059 error = intr_event_remove_handler(cookie);
1061 mtx_lock(&isrc_table_lock);
1062 isrc->isrc_handlers--;
1063 if (isrc->isrc_handlers == 0)
1064 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1065 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1066 intrcnt_updatename(isrc);
1067 mtx_unlock(&isrc_table_lock);
1073 intr_describe_irq(device_t dev, struct resource *res, void *cookie,
1077 struct intr_irqsrc *isrc;
1079 KASSERT(rman_get_start(res) == rman_get_end(res),
1080 ("%s: more interrupts in resource", __func__));
1082 isrc = isrc_lookup(rman_get_start(res));
1083 if (isrc == NULL || isrc->isrc_handlers == 0)
1086 if (isrc->isrc_filter != NULL) {
1090 mtx_lock(&isrc_table_lock);
1091 isrc_update_name(isrc, descr);
1092 mtx_unlock(&isrc_table_lock);
1096 error = intr_event_describe_handler(isrc->isrc_event, cookie, descr);
1098 mtx_lock(&isrc_table_lock);
1099 intrcnt_updatename(isrc);
1100 mtx_unlock(&isrc_table_lock);
1107 intr_bind_irq(device_t dev, struct resource *res, int cpu)
1109 struct intr_irqsrc *isrc;
1111 KASSERT(rman_get_start(res) == rman_get_end(res),
1112 ("%s: more interrupts in resource", __func__));
1114 isrc = isrc_lookup(rman_get_start(res));
1115 if (isrc == NULL || isrc->isrc_handlers == 0)
1118 if (isrc->isrc_filter != NULL)
1119 return (intr_isrc_assign_cpu(isrc, cpu));
1121 return (intr_event_bind(isrc->isrc_event, cpu));
1125 * Return the CPU that the next interrupt source should use.
1126 * For now just returns the next CPU according to round-robin.
1129 intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
1132 if (!irq_assign_cpu || mp_ncpus == 1)
1133 return (PCPU_GET(cpuid));
1137 if (last_cpu > mp_maxid)
1139 } while (!CPU_ISSET(last_cpu, cpumask));
1144 * Distribute all the interrupt sources among the available
1145 * CPUs once the AP's have been launched.
1148 intr_irq_shuffle(void *arg __unused)
1150 struct intr_irqsrc *isrc;
1156 mtx_lock(&isrc_table_lock);
1157 irq_assign_cpu = TRUE;
1158 for (i = 0; i < NIRQ; i++) {
1159 isrc = irq_sources[i];
1160 if (isrc == NULL || isrc->isrc_handlers == 0 ||
1161 isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI))
1164 if (isrc->isrc_event != NULL &&
1165 isrc->isrc_flags & INTR_ISRCF_BOUND &&
1166 isrc->isrc_event->ie_cpu != CPU_FFS(&isrc->isrc_cpu) - 1)
1167 panic("%s: CPU inconsistency", __func__);
1169 if ((isrc->isrc_flags & INTR_ISRCF_BOUND) == 0)
1170 CPU_ZERO(&isrc->isrc_cpu); /* start again */
1173 * We are in wicked position here if the following call fails
1174 * for bound ISRC. The best thing we can do is to clear
1175 * isrc_cpu so inconsistency with ie_cpu will be detectable.
1177 if (PIC_BIND_INTR(isrc->isrc_dev, isrc) != 0)
1178 CPU_ZERO(&isrc->isrc_cpu);
1180 mtx_unlock(&isrc_table_lock);
1182 SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
1186 intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
1189 return (PCPU_GET(cpuid));
1194 * Register a MSI/MSI-X interrupt controller
1197 intr_msi_register(device_t dev, intptr_t xref)
1199 struct intr_pic *pic;
1203 pic = pic_create(dev, xref);
1207 pic->pic_flags |= FLAG_MSI;
1209 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
1210 device_get_nameunit(dev), dev, (uintmax_t)xref);
1215 intr_alloc_msi(device_t pci, device_t child, intptr_t xref, int count,
1216 int maxcount, int *irqs)
1218 struct intr_irqsrc **isrc;
1219 struct intr_pic *pic;
1223 pic = pic_lookup(NULL, xref);
1227 KASSERT((pic->pic_flags & FLAG_MSI) != 0,
1228 ("%s: Found a non-MSI controller: %s", __func__,
1229 device_get_name(pic->pic_dev)));
1231 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1232 err = MSI_ALLOC_MSI(pic->pic_dev, child, count, maxcount, &pdev, isrc);
1234 for (i = 0; i < count; i++) {
1235 irqs[i] = isrc[i]->isrc_irq;
1239 free(isrc, M_INTRNG);
1245 intr_release_msi(device_t pci, device_t child, intptr_t xref, int count,
1248 struct intr_irqsrc **isrc;
1249 struct intr_pic *pic;
1252 pic = pic_lookup(NULL, xref);
1256 KASSERT((pic->pic_flags & FLAG_MSI) != 0,
1257 ("%s: Found a non-MSI controller: %s", __func__,
1258 device_get_name(pic->pic_dev)));
1260 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1262 for (i = 0; i < count; i++) {
1263 isrc[i] = isrc_lookup(irqs[i]);
1265 free(isrc, M_INTRNG);
1270 err = MSI_RELEASE_MSI(pic->pic_dev, child, count, isrc);
1271 free(isrc, M_INTRNG);
1276 intr_alloc_msix(device_t pci, device_t child, intptr_t xref, int *irq)
1278 struct intr_irqsrc *isrc;
1279 struct intr_pic *pic;
1283 pic = pic_lookup(NULL, xref);
1287 KASSERT((pic->pic_flags & FLAG_MSI) != 0,
1288 ("%s: Found a non-MSI controller: %s", __func__,
1289 device_get_name(pic->pic_dev)));
1291 err = MSI_ALLOC_MSIX(pic->pic_dev, child, &pdev, &isrc);
1295 *irq = isrc->isrc_irq;
1300 intr_release_msix(device_t pci, device_t child, intptr_t xref, int irq)
1302 struct intr_irqsrc *isrc;
1303 struct intr_pic *pic;
1306 pic = pic_lookup(NULL, xref);
1310 KASSERT((pic->pic_flags & FLAG_MSI) != 0,
1311 ("%s: Found a non-MSI controller: %s", __func__,
1312 device_get_name(pic->pic_dev)));
1314 isrc = isrc_lookup(irq);
1318 err = MSI_RELEASE_MSIX(pic->pic_dev, child, isrc);
1323 intr_map_msi(device_t pci, device_t child, intptr_t xref, int irq,
1324 uint64_t *addr, uint32_t *data)
1326 struct intr_irqsrc *isrc;
1327 struct intr_pic *pic;
1330 pic = pic_lookup(NULL, xref);
1334 KASSERT((pic->pic_flags & FLAG_MSI) != 0,
1335 ("%s: Found a non-MSI controller: %s", __func__,
1336 device_get_name(pic->pic_dev)));
1338 isrc = isrc_lookup(irq);
1342 err = MSI_MAP_MSI(pic->pic_dev, child, isrc, addr, data);
1347 void dosoftints(void);
1355 * Init interrupt controller on another CPU.
1358 intr_pic_init_secondary(void)
1362 * QQQ: Only root PIC is aware of other CPUs ???
1364 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
1366 //mtx_lock(&isrc_table_lock);
1367 PIC_INIT_SECONDARY(intr_irq_root_dev);
1368 //mtx_unlock(&isrc_table_lock);
1373 DB_SHOW_COMMAND(irqs, db_show_irqs)
1377 struct intr_irqsrc *isrc;
1379 for (irqsum = 0, i = 0; i < NIRQ; i++) {
1380 isrc = irq_sources[i];
1384 num = isrc->isrc_count != NULL ? isrc->isrc_count[0] : 0;
1385 db_printf("irq%-3u <%s>: cpu %02lx%s cnt %lu\n", i,
1386 isrc->isrc_name, isrc->isrc_cpu.__bits[0],
1387 isrc->isrc_flags & INTR_ISRCF_BOUND ? " (bound)" : "", num);
1390 db_printf("irq total %u\n", irqsum);