2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * New-style Interrupt Framework
34 * TODO: - add support for disconnected PICs.
35 * - to support IPI (PPI) enabling on other CPUs if already started.
36 * - to complete things for removable PICs.
40 #include "opt_hwpmc_hooks.h"
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/syslog.h>
46 #include <sys/malloc.h>
48 #include <sys/queue.h>
50 #include <sys/interrupt.h>
52 #include <sys/cpuset.h>
54 #include <sys/sched.h>
56 #include <sys/vmmeter.h>
58 #include <sys/pmckern.h>
61 #include <machine/atomic.h>
62 #include <machine/intr.h>
63 #include <machine/cpu.h>
64 #include <machine/smp.h>
65 #include <machine/stdarg.h>
74 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
77 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
78 printf(fmt,##args); } while (0)
80 #define debugf(fmt, args...)
83 MALLOC_DECLARE(M_INTRNG);
84 MALLOC_DEFINE(M_INTRNG, "intr", "intr interrupt handling");
86 /* Main interrupt handler called from assembler -> 'hidden' for C code. */
87 void intr_irq_handler(struct trapframe *tf);
89 /* Root interrupt controller stuff. */
90 device_t intr_irq_root_dev;
91 static intr_irq_filter_t *irq_root_filter;
92 static void *irq_root_arg;
93 static u_int irq_root_ipicount;
95 struct intr_pic_child {
96 SLIST_ENTRY(intr_pic_child) pc_next;
97 struct intr_pic *pc_pic;
98 intr_child_irq_filter_t *pc_filter;
104 /* Interrupt controller definition. */
106 SLIST_ENTRY(intr_pic) pic_next;
107 intptr_t pic_xref; /* hardware identification */
109 /* Only one of FLAG_PIC or FLAG_MSI may be set */
110 #define FLAG_PIC (1 << 0)
111 #define FLAG_MSI (1 << 1)
112 #define FLAG_TYPE_MASK (FLAG_PIC | FLAG_MSI)
114 struct mtx pic_child_lock;
115 SLIST_HEAD(, intr_pic_child) pic_children;
118 static struct mtx pic_list_lock;
119 static SLIST_HEAD(, intr_pic) pic_list;
121 static struct intr_pic *pic_lookup(device_t dev, intptr_t xref, int flags);
123 /* Interrupt source definition. */
124 static struct mtx isrc_table_lock;
125 static struct intr_irqsrc *irq_sources[NIRQ];
129 static boolean_t irq_assign_cpu = FALSE;
133 * - 2 counters for each I/O interrupt.
134 * - MAXCPU counters for each IPI counters for SMP.
137 #define INTRCNT_COUNT (NIRQ * 2 + INTR_IPI_COUNT * MAXCPU)
139 #define INTRCNT_COUNT (NIRQ * 2)
142 /* Data for MI statistics reporting. */
143 u_long intrcnt[INTRCNT_COUNT];
144 char intrnames[INTRCNT_COUNT * INTRNAME_LEN];
145 size_t sintrcnt = sizeof(intrcnt);
146 size_t sintrnames = sizeof(intrnames);
147 static u_int intrcnt_index;
149 static struct intr_irqsrc *intr_map_get_isrc(u_int res_id);
150 static void intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc);
151 static struct intr_map_data * intr_map_get_map_data(u_int res_id);
152 static void intr_map_copy_map_data(u_int res_id, device_t *dev, intptr_t *xref,
153 struct intr_map_data **data);
156 * Interrupt framework initialization routine.
159 intr_irq_init(void *dummy __unused)
162 SLIST_INIT(&pic_list);
163 mtx_init(&pic_list_lock, "intr pic list", NULL, MTX_DEF);
165 mtx_init(&isrc_table_lock, "intr isrc table", NULL, MTX_DEF);
167 SYSINIT(intr_irq_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_irq_init, NULL);
170 intrcnt_setname(const char *name, int index)
173 snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s",
174 INTRNAME_LEN - 1, name);
178 * Update name for interrupt source with interrupt event.
181 intrcnt_updatename(struct intr_irqsrc *isrc)
184 /* QQQ: What about stray counter name? */
185 mtx_assert(&isrc_table_lock, MA_OWNED);
186 intrcnt_setname(isrc->isrc_event->ie_fullname, isrc->isrc_index);
190 * Virtualization for interrupt source interrupt counter increment.
193 isrc_increment_count(struct intr_irqsrc *isrc)
196 if (isrc->isrc_flags & INTR_ISRCF_PPI)
197 atomic_add_long(&isrc->isrc_count[0], 1);
199 isrc->isrc_count[0]++;
203 * Virtualization for interrupt source interrupt stray counter increment.
206 isrc_increment_straycount(struct intr_irqsrc *isrc)
209 isrc->isrc_count[1]++;
213 * Virtualization for interrupt source interrupt name update.
216 isrc_update_name(struct intr_irqsrc *isrc, const char *name)
218 char str[INTRNAME_LEN];
220 mtx_assert(&isrc_table_lock, MA_OWNED);
223 snprintf(str, INTRNAME_LEN, "%s: %s", isrc->isrc_name, name);
224 intrcnt_setname(str, isrc->isrc_index);
225 snprintf(str, INTRNAME_LEN, "stray %s: %s", isrc->isrc_name,
227 intrcnt_setname(str, isrc->isrc_index + 1);
229 snprintf(str, INTRNAME_LEN, "%s:", isrc->isrc_name);
230 intrcnt_setname(str, isrc->isrc_index);
231 snprintf(str, INTRNAME_LEN, "stray %s:", isrc->isrc_name);
232 intrcnt_setname(str, isrc->isrc_index + 1);
237 * Virtualization for interrupt source interrupt counters setup.
240 isrc_setup_counters(struct intr_irqsrc *isrc)
245 * XXX - it does not work well with removable controllers and
246 * interrupt sources !!!
248 index = atomic_fetchadd_int(&intrcnt_index, 2);
249 isrc->isrc_index = index;
250 isrc->isrc_count = &intrcnt[index];
251 isrc_update_name(isrc, NULL);
255 * Virtualization for interrupt source interrupt counters release.
258 isrc_release_counters(struct intr_irqsrc *isrc)
261 panic("%s: not implemented", __func__);
266 * Virtualization for interrupt source IPI counters setup.
269 intr_ipi_setup_counters(const char *name)
272 char str[INTRNAME_LEN];
274 index = atomic_fetchadd_int(&intrcnt_index, MAXCPU);
275 for (i = 0; i < MAXCPU; i++) {
276 snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
277 intrcnt_setname(str, index + i);
279 return (&intrcnt[index]);
284 * Main interrupt dispatch handler. It's called straight
285 * from the assembler, where CPU interrupt is served.
288 intr_irq_handler(struct trapframe *tf)
290 struct trapframe * oldframe;
293 KASSERT(irq_root_filter != NULL, ("%s: no filter", __func__));
298 oldframe = td->td_intr_frame;
299 td->td_intr_frame = tf;
300 irq_root_filter(irq_root_arg);
301 td->td_intr_frame = oldframe;
304 if (pmc_hook && TRAPF_USERMODE(tf) &&
305 (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
306 pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
311 intr_child_irq_handler(struct intr_pic *parent, uintptr_t irq)
313 struct intr_pic_child *child;
317 mtx_lock_spin(&parent->pic_child_lock);
318 SLIST_FOREACH(child, &parent->pic_children, pc_next) {
319 if (child->pc_start <= irq &&
320 irq < (child->pc_start + child->pc_length)) {
325 mtx_unlock_spin(&parent->pic_child_lock);
328 return (child->pc_filter(child->pc_filter_arg, irq));
330 return (FILTER_STRAY);
334 * interrupt controller dispatch function for interrupts. It should
335 * be called straight from the interrupt controller, when associated interrupt
339 intr_isrc_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
342 KASSERT(isrc != NULL, ("%s: no source", __func__));
344 isrc_increment_count(isrc);
347 if (isrc->isrc_filter != NULL) {
349 error = isrc->isrc_filter(isrc->isrc_arg, tf);
350 PIC_POST_FILTER(isrc->isrc_dev, isrc);
351 if (error == FILTER_HANDLED)
355 if (isrc->isrc_event != NULL) {
356 if (intr_event_handle(isrc->isrc_event, tf) == 0)
360 isrc_increment_straycount(isrc);
365 * Alloc unique interrupt number (resource handle) for interrupt source.
367 * There could be various strategies how to allocate free interrupt number
368 * (resource handle) for new interrupt source.
370 * 1. Handles are always allocated forward, so handles are not recycled
371 * immediately. However, if only one free handle left which is reused
375 isrc_alloc_irq(struct intr_irqsrc *isrc)
379 mtx_assert(&isrc_table_lock, MA_OWNED);
381 maxirqs = nitems(irq_sources);
382 if (irq_next_free >= maxirqs)
385 for (irq = irq_next_free; irq < maxirqs; irq++) {
386 if (irq_sources[irq] == NULL)
389 for (irq = 0; irq < irq_next_free; irq++) {
390 if (irq_sources[irq] == NULL)
394 irq_next_free = maxirqs;
398 isrc->isrc_irq = irq;
399 irq_sources[irq] = isrc;
401 irq_next_free = irq + 1;
402 if (irq_next_free >= maxirqs)
408 * Free unique interrupt number (resource handle) from interrupt source.
411 isrc_free_irq(struct intr_irqsrc *isrc)
414 mtx_assert(&isrc_table_lock, MA_OWNED);
416 if (isrc->isrc_irq >= nitems(irq_sources))
418 if (irq_sources[isrc->isrc_irq] != isrc)
421 irq_sources[isrc->isrc_irq] = NULL;
422 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
427 * Initialize interrupt source and register it into global interrupt table.
430 intr_isrc_register(struct intr_irqsrc *isrc, device_t dev, u_int flags,
431 const char *fmt, ...)
436 bzero(isrc, sizeof(struct intr_irqsrc));
437 isrc->isrc_dev = dev;
438 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
439 isrc->isrc_flags = flags;
442 vsnprintf(isrc->isrc_name, INTR_ISRC_NAMELEN, fmt, ap);
445 mtx_lock(&isrc_table_lock);
446 error = isrc_alloc_irq(isrc);
448 mtx_unlock(&isrc_table_lock);
452 * Setup interrupt counters, but not for IPI sources. Those are setup
453 * later and only for used ones (up to INTR_IPI_COUNT) to not exhaust
456 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
457 isrc_setup_counters(isrc);
458 mtx_unlock(&isrc_table_lock);
463 * Deregister interrupt source from global interrupt table.
466 intr_isrc_deregister(struct intr_irqsrc *isrc)
470 mtx_lock(&isrc_table_lock);
471 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
472 isrc_release_counters(isrc);
473 error = isrc_free_irq(isrc);
474 mtx_unlock(&isrc_table_lock);
480 * A support function for a PIC to decide if provided ISRC should be inited
481 * on given cpu. The logic of INTR_ISRCF_BOUND flag and isrc_cpu member of
482 * struct intr_irqsrc is the following:
484 * If INTR_ISRCF_BOUND is set, the ISRC should be inited only on cpus
485 * set in isrc_cpu. If not, the ISRC should be inited on every cpu and
486 * isrc_cpu is kept consistent with it. Thus isrc_cpu is always correct.
489 intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu)
492 if (isrc->isrc_handlers == 0)
494 if ((isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI)) == 0)
496 if (isrc->isrc_flags & INTR_ISRCF_BOUND)
497 return (CPU_ISSET(cpu, &isrc->isrc_cpu));
499 CPU_SET(cpu, &isrc->isrc_cpu);
506 * Setup filter into interrupt source.
509 iscr_setup_filter(struct intr_irqsrc *isrc, const char *name,
510 intr_irq_filter_t *filter, void *arg, void **cookiep)
516 mtx_lock(&isrc_table_lock);
518 * Make sure that we do not mix the two ways
519 * how we handle interrupt sources.
521 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
522 mtx_unlock(&isrc_table_lock);
525 isrc->isrc_filter = filter;
526 isrc->isrc_arg = arg;
527 isrc_update_name(isrc, name);
528 mtx_unlock(&isrc_table_lock);
536 * Interrupt source pre_ithread method for MI interrupt framework.
539 intr_isrc_pre_ithread(void *arg)
541 struct intr_irqsrc *isrc = arg;
543 PIC_PRE_ITHREAD(isrc->isrc_dev, isrc);
547 * Interrupt source post_ithread method for MI interrupt framework.
550 intr_isrc_post_ithread(void *arg)
552 struct intr_irqsrc *isrc = arg;
554 PIC_POST_ITHREAD(isrc->isrc_dev, isrc);
558 * Interrupt source post_filter method for MI interrupt framework.
561 intr_isrc_post_filter(void *arg)
563 struct intr_irqsrc *isrc = arg;
565 PIC_POST_FILTER(isrc->isrc_dev, isrc);
569 * Interrupt source assign_cpu method for MI interrupt framework.
572 intr_isrc_assign_cpu(void *arg, int cpu)
575 struct intr_irqsrc *isrc = arg;
578 mtx_lock(&isrc_table_lock);
580 CPU_ZERO(&isrc->isrc_cpu);
581 isrc->isrc_flags &= ~INTR_ISRCF_BOUND;
583 CPU_SETOF(cpu, &isrc->isrc_cpu);
584 isrc->isrc_flags |= INTR_ISRCF_BOUND;
588 * In NOCPU case, it's up to PIC to either leave ISRC on same CPU or
589 * re-balance it to another CPU or enable it on more CPUs. However,
590 * PIC is expected to change isrc_cpu appropriately to keep us well
591 * informed if the call is successful.
593 if (irq_assign_cpu) {
594 error = PIC_BIND_INTR(isrc->isrc_dev, isrc);
596 CPU_ZERO(&isrc->isrc_cpu);
597 mtx_unlock(&isrc_table_lock);
601 mtx_unlock(&isrc_table_lock);
609 * Create interrupt event for interrupt source.
612 isrc_event_create(struct intr_irqsrc *isrc)
614 struct intr_event *ie;
617 error = intr_event_create(&ie, isrc, 0, isrc->isrc_irq,
618 intr_isrc_pre_ithread, intr_isrc_post_ithread, intr_isrc_post_filter,
619 intr_isrc_assign_cpu, "%s:", isrc->isrc_name);
623 mtx_lock(&isrc_table_lock);
625 * Make sure that we do not mix the two ways
626 * how we handle interrupt sources. Let contested event wins.
629 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
631 if (isrc->isrc_event != NULL) {
633 mtx_unlock(&isrc_table_lock);
634 intr_event_destroy(ie);
635 return (isrc->isrc_event != NULL ? EBUSY : 0);
637 isrc->isrc_event = ie;
638 mtx_unlock(&isrc_table_lock);
644 * Destroy interrupt event for interrupt source.
647 isrc_event_destroy(struct intr_irqsrc *isrc)
649 struct intr_event *ie;
651 mtx_lock(&isrc_table_lock);
652 ie = isrc->isrc_event;
653 isrc->isrc_event = NULL;
654 mtx_unlock(&isrc_table_lock);
657 intr_event_destroy(ie);
661 * Add handler to interrupt source.
664 isrc_add_handler(struct intr_irqsrc *isrc, const char *name,
665 driver_filter_t filter, driver_intr_t handler, void *arg,
666 enum intr_type flags, void **cookiep)
670 if (isrc->isrc_event == NULL) {
671 error = isrc_event_create(isrc);
676 error = intr_event_add_handler(isrc->isrc_event, name, filter, handler,
677 arg, intr_priority(flags), flags, cookiep);
679 mtx_lock(&isrc_table_lock);
680 intrcnt_updatename(isrc);
681 mtx_unlock(&isrc_table_lock);
688 * Lookup interrupt controller locked.
690 static inline struct intr_pic *
691 pic_lookup_locked(device_t dev, intptr_t xref, int flags)
693 struct intr_pic *pic;
695 mtx_assert(&pic_list_lock, MA_OWNED);
697 if (dev == NULL && xref == 0)
700 /* Note that pic->pic_dev is never NULL on registered PIC. */
701 SLIST_FOREACH(pic, &pic_list, pic_next) {
702 if ((pic->pic_flags & FLAG_TYPE_MASK) !=
703 (flags & FLAG_TYPE_MASK))
707 if (xref == pic->pic_xref)
709 } else if (xref == 0 || pic->pic_xref == 0) {
710 if (dev == pic->pic_dev)
712 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
719 * Lookup interrupt controller.
721 static struct intr_pic *
722 pic_lookup(device_t dev, intptr_t xref, int flags)
724 struct intr_pic *pic;
726 mtx_lock(&pic_list_lock);
727 pic = pic_lookup_locked(dev, xref, flags);
728 mtx_unlock(&pic_list_lock);
733 * Create interrupt controller.
735 static struct intr_pic *
736 pic_create(device_t dev, intptr_t xref, int flags)
738 struct intr_pic *pic;
740 mtx_lock(&pic_list_lock);
741 pic = pic_lookup_locked(dev, xref, flags);
743 mtx_unlock(&pic_list_lock);
746 pic = malloc(sizeof(*pic), M_INTRNG, M_NOWAIT | M_ZERO);
748 mtx_unlock(&pic_list_lock);
751 pic->pic_xref = xref;
753 pic->pic_flags = flags;
754 mtx_init(&pic->pic_child_lock, "pic child lock", NULL, MTX_SPIN);
755 SLIST_INSERT_HEAD(&pic_list, pic, pic_next);
756 mtx_unlock(&pic_list_lock);
762 * Destroy interrupt controller.
765 pic_destroy(device_t dev, intptr_t xref, int flags)
767 struct intr_pic *pic;
769 mtx_lock(&pic_list_lock);
770 pic = pic_lookup_locked(dev, xref, flags);
772 mtx_unlock(&pic_list_lock);
775 SLIST_REMOVE(&pic_list, pic, intr_pic, pic_next);
776 mtx_unlock(&pic_list_lock);
782 * Register interrupt controller.
785 intr_pic_register(device_t dev, intptr_t xref)
787 struct intr_pic *pic;
791 pic = pic_create(dev, xref, FLAG_PIC);
795 debugf("PIC %p registered for %s <dev %p, xref %x>\n", pic,
796 device_get_nameunit(dev), dev, xref);
801 * Unregister interrupt controller.
804 intr_pic_deregister(device_t dev, intptr_t xref)
807 panic("%s: not implemented", __func__);
811 * Mark interrupt controller (itself) as a root one.
813 * Note that only an interrupt controller can really know its position
814 * in interrupt controller's tree. So root PIC must claim itself as a root.
816 * In FDT case, according to ePAPR approved version 1.1 from 08 April 2011,
818 * "The root of the interrupt tree is determined when traversal
819 * of the interrupt tree reaches an interrupt controller node without
820 * an interrupts property and thus no explicit interrupt parent."
823 intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
824 void *arg, u_int ipicount)
826 struct intr_pic *pic;
828 pic = pic_lookup(dev, xref, FLAG_PIC);
830 device_printf(dev, "not registered\n");
834 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
835 ("%s: Found a non-PIC controller: %s", __func__,
836 device_get_name(pic->pic_dev)));
838 if (filter == NULL) {
839 device_printf(dev, "filter missing\n");
844 * Only one interrupt controllers could be on the root for now.
845 * Note that we further suppose that there is not threaded interrupt
846 * routine (handler) on the root. See intr_irq_handler().
848 if (intr_irq_root_dev != NULL) {
849 device_printf(dev, "another root already set\n");
853 intr_irq_root_dev = dev;
854 irq_root_filter = filter;
856 irq_root_ipicount = ipicount;
858 debugf("irq root set to %s\n", device_get_nameunit(dev));
863 * Add a handler to manage a sub range of a parents interrupts.
866 intr_pic_add_handler(device_t parent, struct intr_pic *pic,
867 intr_child_irq_filter_t *filter, void *arg, uintptr_t start,
870 struct intr_pic *parent_pic;
871 struct intr_pic_child *newchild;
873 struct intr_pic_child *child;
876 /* Find the parent PIC */
877 parent_pic = pic_lookup(parent, 0, FLAG_PIC);
878 if (parent_pic == NULL)
881 newchild = malloc(sizeof(*newchild), M_INTRNG, M_WAITOK | M_ZERO);
882 newchild->pc_pic = pic;
883 newchild->pc_filter = filter;
884 newchild->pc_filter_arg = arg;
885 newchild->pc_start = start;
886 newchild->pc_length = length;
888 mtx_lock_spin(&parent_pic->pic_child_lock);
890 SLIST_FOREACH(child, &parent_pic->pic_children, pc_next) {
891 KASSERT(child->pc_pic != pic, ("%s: Adding a child PIC twice",
895 SLIST_INSERT_HEAD(&parent_pic->pic_children, newchild, pc_next);
896 mtx_unlock_spin(&parent_pic->pic_child_lock);
902 intr_resolve_irq(device_t dev, intptr_t xref, struct intr_map_data *data,
903 struct intr_irqsrc **isrc)
905 struct intr_pic *pic;
906 struct intr_map_data_msi *msi;
911 pic = pic_lookup(dev, xref,
912 (data->type == INTR_MAP_DATA_MSI) ? FLAG_MSI : FLAG_PIC);
916 switch (data->type) {
917 case INTR_MAP_DATA_MSI:
918 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
919 ("%s: Found a non-MSI controller: %s", __func__,
920 device_get_name(pic->pic_dev)));
921 msi = (struct intr_map_data_msi *)data;
926 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
927 ("%s: Found a non-PIC controller: %s", __func__,
928 device_get_name(pic->pic_dev)));
929 return (PIC_MAP_INTR(pic->pic_dev, data, isrc));
935 intr_is_per_cpu(struct resource *res)
938 struct intr_irqsrc *isrc;
940 res_id = (u_int)rman_get_start(res);
941 isrc = intr_map_get_isrc(res_id);
944 panic("Attempt to get isrc for non-active resource id: %u\n",
946 return ((isrc->isrc_flags & INTR_ISRCF_PPI) != 0);
950 intr_activate_irq(device_t dev, struct resource *res)
954 struct intr_map_data *data;
955 struct intr_irqsrc *isrc;
959 KASSERT(rman_get_start(res) == rman_get_end(res),
960 ("%s: more interrupts in resource", __func__));
962 res_id = (u_int)rman_get_start(res);
963 if (intr_map_get_isrc(res_id) != NULL)
964 panic("Attempt to double activation of resource id: %u\n",
966 intr_map_copy_map_data(res_id, &map_dev, &map_xref, &data);
967 error = intr_resolve_irq(map_dev, map_xref, data, &isrc);
969 free(data, M_INTRNG);
970 /* XXX TODO DISCONECTED PICs */
971 /* if (error == EINVAL) return(0); */
974 intr_map_set_isrc(res_id, isrc);
975 rman_set_virtual(res, data);
976 return (PIC_ACTIVATE_INTR(isrc->isrc_dev, isrc, res, data));
980 intr_deactivate_irq(device_t dev, struct resource *res)
982 struct intr_map_data *data;
983 struct intr_irqsrc *isrc;
987 KASSERT(rman_get_start(res) == rman_get_end(res),
988 ("%s: more interrupts in resource", __func__));
990 res_id = (u_int)rman_get_start(res);
991 isrc = intr_map_get_isrc(res_id);
993 panic("Attempt to deactivate non-active resource id: %u\n",
996 data = rman_get_virtual(res);
997 error = PIC_DEACTIVATE_INTR(isrc->isrc_dev, isrc, res, data);
998 intr_map_set_isrc(res_id, NULL);
999 rman_set_virtual(res, NULL);
1000 free(data, M_INTRNG);
1005 intr_setup_irq(device_t dev, struct resource *res, driver_filter_t filt,
1006 driver_intr_t hand, void *arg, int flags, void **cookiep)
1009 struct intr_map_data *data;
1010 struct intr_irqsrc *isrc;
1014 KASSERT(rman_get_start(res) == rman_get_end(res),
1015 ("%s: more interrupts in resource", __func__));
1017 res_id = (u_int)rman_get_start(res);
1018 isrc = intr_map_get_isrc(res_id);
1020 /* XXX TODO DISCONECTED PICs */
1024 data = rman_get_virtual(res);
1025 name = device_get_nameunit(dev);
1029 * Standard handling is done through MI interrupt framework. However,
1030 * some interrupts could request solely own special handling. This
1031 * non standard handling can be used for interrupt controllers without
1032 * handler (filter only), so in case that interrupt controllers are
1033 * chained, MI interrupt framework is called only in leaf controller.
1035 * Note that root interrupt controller routine is served as well,
1036 * however in intr_irq_handler(), i.e. main system dispatch routine.
1038 if (flags & INTR_SOLO && hand != NULL) {
1039 debugf("irq %u cannot solo on %s\n", irq, name);
1043 if (flags & INTR_SOLO) {
1044 error = iscr_setup_filter(isrc, name, (intr_irq_filter_t *)filt,
1046 debugf("irq %u setup filter error %d on %s\n", isrc->isrc_irq, error,
1051 error = isrc_add_handler(isrc, name, filt, hand, arg, flags,
1053 debugf("irq %u add handler error %d on %s\n", isrc->isrc_irq, error, name);
1058 mtx_lock(&isrc_table_lock);
1059 error = PIC_SETUP_INTR(isrc->isrc_dev, isrc, res, data);
1061 isrc->isrc_handlers++;
1062 if (isrc->isrc_handlers == 1)
1063 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
1065 mtx_unlock(&isrc_table_lock);
1067 intr_event_remove_handler(*cookiep);
1072 intr_teardown_irq(device_t dev, struct resource *res, void *cookie)
1075 struct intr_map_data *data;
1076 struct intr_irqsrc *isrc;
1079 KASSERT(rman_get_start(res) == rman_get_end(res),
1080 ("%s: more interrupts in resource", __func__));
1082 res_id = (u_int)rman_get_start(res);
1083 isrc = intr_map_get_isrc(res_id);
1084 if (isrc == NULL || isrc->isrc_handlers == 0)
1087 data = rman_get_virtual(res);
1090 if (isrc->isrc_filter != NULL) {
1094 mtx_lock(&isrc_table_lock);
1095 isrc->isrc_filter = NULL;
1096 isrc->isrc_arg = NULL;
1097 isrc->isrc_handlers = 0;
1098 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1099 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1100 isrc_update_name(isrc, NULL);
1101 mtx_unlock(&isrc_table_lock);
1105 if (isrc != intr_handler_source(cookie))
1108 error = intr_event_remove_handler(cookie);
1110 mtx_lock(&isrc_table_lock);
1111 isrc->isrc_handlers--;
1112 if (isrc->isrc_handlers == 0)
1113 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1114 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1115 intrcnt_updatename(isrc);
1116 mtx_unlock(&isrc_table_lock);
1122 intr_describe_irq(device_t dev, struct resource *res, void *cookie,
1126 struct intr_irqsrc *isrc;
1129 KASSERT(rman_get_start(res) == rman_get_end(res),
1130 ("%s: more interrupts in resource", __func__));
1132 res_id = (u_int)rman_get_start(res);
1133 isrc = intr_map_get_isrc(res_id);
1134 if (isrc == NULL || isrc->isrc_handlers == 0)
1137 if (isrc->isrc_filter != NULL) {
1141 mtx_lock(&isrc_table_lock);
1142 isrc_update_name(isrc, descr);
1143 mtx_unlock(&isrc_table_lock);
1147 error = intr_event_describe_handler(isrc->isrc_event, cookie, descr);
1149 mtx_lock(&isrc_table_lock);
1150 intrcnt_updatename(isrc);
1151 mtx_unlock(&isrc_table_lock);
1158 intr_bind_irq(device_t dev, struct resource *res, int cpu)
1160 struct intr_irqsrc *isrc;
1163 KASSERT(rman_get_start(res) == rman_get_end(res),
1164 ("%s: more interrupts in resource", __func__));
1166 res_id = (u_int)rman_get_start(res);
1167 isrc = intr_map_get_isrc(res_id);
1168 if (isrc == NULL || isrc->isrc_handlers == 0)
1171 if (isrc->isrc_filter != NULL)
1172 return (intr_isrc_assign_cpu(isrc, cpu));
1174 return (intr_event_bind(isrc->isrc_event, cpu));
1178 * Return the CPU that the next interrupt source should use.
1179 * For now just returns the next CPU according to round-robin.
1182 intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
1186 KASSERT(!CPU_EMPTY(cpumask), ("%s: Empty CPU mask", __func__));
1187 if (!irq_assign_cpu || mp_ncpus == 1) {
1188 cpu = PCPU_GET(cpuid);
1190 if (CPU_ISSET(cpu, cpumask))
1193 return (CPU_FFS(cpumask) - 1);
1198 if (last_cpu > mp_maxid)
1200 } while (!CPU_ISSET(last_cpu, cpumask));
1205 * Distribute all the interrupt sources among the available
1206 * CPUs once the AP's have been launched.
1209 intr_irq_shuffle(void *arg __unused)
1211 struct intr_irqsrc *isrc;
1217 mtx_lock(&isrc_table_lock);
1218 irq_assign_cpu = TRUE;
1219 for (i = 0; i < NIRQ; i++) {
1220 isrc = irq_sources[i];
1221 if (isrc == NULL || isrc->isrc_handlers == 0 ||
1222 isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI))
1225 if (isrc->isrc_event != NULL &&
1226 isrc->isrc_flags & INTR_ISRCF_BOUND &&
1227 isrc->isrc_event->ie_cpu != CPU_FFS(&isrc->isrc_cpu) - 1)
1228 panic("%s: CPU inconsistency", __func__);
1230 if ((isrc->isrc_flags & INTR_ISRCF_BOUND) == 0)
1231 CPU_ZERO(&isrc->isrc_cpu); /* start again */
1234 * We are in wicked position here if the following call fails
1235 * for bound ISRC. The best thing we can do is to clear
1236 * isrc_cpu so inconsistency with ie_cpu will be detectable.
1238 if (PIC_BIND_INTR(isrc->isrc_dev, isrc) != 0)
1239 CPU_ZERO(&isrc->isrc_cpu);
1241 mtx_unlock(&isrc_table_lock);
1243 SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
1247 intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
1250 return (PCPU_GET(cpuid));
1255 * Allocate memory for new intr_map_data structure.
1256 * Initialize common fields.
1258 struct intr_map_data *
1259 intr_alloc_map_data(enum intr_map_data_type type, size_t len, int flags)
1261 struct intr_map_data *data;
1263 data = malloc(len, M_INTRNG, flags);
1269 void intr_free_intr_map_data(struct intr_map_data *data)
1272 free(data, M_INTRNG);
1277 * Register a MSI/MSI-X interrupt controller
1280 intr_msi_register(device_t dev, intptr_t xref)
1282 struct intr_pic *pic;
1286 pic = pic_create(dev, xref, FLAG_MSI);
1290 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
1291 device_get_nameunit(dev), dev, (uintmax_t)xref);
1296 intr_alloc_msi(device_t pci, device_t child, intptr_t xref, int count,
1297 int maxcount, int *irqs)
1299 struct intr_irqsrc **isrc;
1300 struct intr_pic *pic;
1302 struct intr_map_data_msi *msi;
1305 pic = pic_lookup(NULL, xref, FLAG_MSI);
1309 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1310 ("%s: Found a non-MSI controller: %s", __func__,
1311 device_get_name(pic->pic_dev)));
1313 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1314 err = MSI_ALLOC_MSI(pic->pic_dev, child, count, maxcount, &pdev, isrc);
1316 free(isrc, M_INTRNG);
1320 for (i = 0; i < count; i++) {
1321 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1322 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1323 msi-> isrc = isrc[i];
1324 irqs[i] = intr_map_irq(pic->pic_dev, xref,
1325 (struct intr_map_data *)msi);
1328 free(isrc, M_INTRNG);
1334 intr_release_msi(device_t pci, device_t child, intptr_t xref, int count,
1337 struct intr_irqsrc **isrc;
1338 struct intr_pic *pic;
1339 struct intr_map_data_msi *msi;
1342 pic = pic_lookup(NULL, xref, FLAG_MSI);
1346 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1347 ("%s: Found a non-MSI controller: %s", __func__,
1348 device_get_name(pic->pic_dev)));
1350 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1352 for (i = 0; i < count; i++) {
1353 msi = (struct intr_map_data_msi *)
1354 intr_map_get_map_data(irqs[i]);
1355 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1356 ("%s: irq %d map data is not MSI", __func__,
1358 isrc[i] = msi->isrc;
1361 err = MSI_RELEASE_MSI(pic->pic_dev, child, count, isrc);
1363 for (i = 0; i < count; i++) {
1364 if (isrc[i] != NULL)
1365 intr_unmap_irq(irqs[i]);
1368 free(isrc, M_INTRNG);
1373 intr_alloc_msix(device_t pci, device_t child, intptr_t xref, int *irq)
1375 struct intr_irqsrc *isrc;
1376 struct intr_pic *pic;
1378 struct intr_map_data_msi *msi;
1381 pic = pic_lookup(NULL, xref, FLAG_MSI);
1385 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1386 ("%s: Found a non-MSI controller: %s", __func__,
1387 device_get_name(pic->pic_dev)));
1390 err = MSI_ALLOC_MSIX(pic->pic_dev, child, &pdev, &isrc);
1394 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1395 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1397 *irq = intr_map_irq(pic->pic_dev, xref, (struct intr_map_data *)msi);
1402 intr_release_msix(device_t pci, device_t child, intptr_t xref, int irq)
1404 struct intr_irqsrc *isrc;
1405 struct intr_pic *pic;
1406 struct intr_map_data_msi *msi;
1409 pic = pic_lookup(NULL, xref, FLAG_MSI);
1413 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1414 ("%s: Found a non-MSI controller: %s", __func__,
1415 device_get_name(pic->pic_dev)));
1417 msi = (struct intr_map_data_msi *)
1418 intr_map_get_map_data(irq);
1419 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1420 ("%s: irq %d map data is not MSI", __func__,
1424 intr_unmap_irq(irq);
1428 err = MSI_RELEASE_MSIX(pic->pic_dev, child, isrc);
1429 intr_unmap_irq(irq);
1435 intr_map_msi(device_t pci, device_t child, intptr_t xref, int irq,
1436 uint64_t *addr, uint32_t *data)
1438 struct intr_irqsrc *isrc;
1439 struct intr_pic *pic;
1442 pic = pic_lookup(NULL, xref, FLAG_MSI);
1446 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1447 ("%s: Found a non-MSI controller: %s", __func__,
1448 device_get_name(pic->pic_dev)));
1450 isrc = intr_map_get_isrc(irq);
1454 err = MSI_MAP_MSI(pic->pic_dev, child, isrc, addr, data);
1459 void dosoftints(void);
1467 * Init interrupt controller on another CPU.
1470 intr_pic_init_secondary(void)
1474 * QQQ: Only root PIC is aware of other CPUs ???
1476 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
1478 //mtx_lock(&isrc_table_lock);
1479 PIC_INIT_SECONDARY(intr_irq_root_dev);
1480 //mtx_unlock(&isrc_table_lock);
1485 DB_SHOW_COMMAND(irqs, db_show_irqs)
1489 struct intr_irqsrc *isrc;
1491 for (irqsum = 0, i = 0; i < NIRQ; i++) {
1492 isrc = irq_sources[i];
1496 num = isrc->isrc_count != NULL ? isrc->isrc_count[0] : 0;
1497 db_printf("irq%-3u <%s>: cpu %02lx%s cnt %lu\n", i,
1498 isrc->isrc_name, isrc->isrc_cpu.__bits[0],
1499 isrc->isrc_flags & INTR_ISRCF_BOUND ? " (bound)" : "", num);
1502 db_printf("irq total %u\n", irqsum);
1507 * Interrupt mapping table functions.
1509 * Please, keep this part separately, it can be transformed to
1510 * extension of standard resources.
1512 struct intr_map_entry
1516 struct intr_map_data *map_data;
1517 struct intr_irqsrc *isrc;
1518 /* XXX TODO DISCONECTED PICs */
1522 /* XXX Convert irq_map[] to dynamicaly expandable one. */
1523 static struct intr_map_entry *irq_map[2 * NIRQ];
1524 static int irq_map_count = nitems(irq_map);
1525 static int irq_map_first_free_idx;
1526 static struct mtx irq_map_lock;
1528 static struct intr_irqsrc *
1529 intr_map_get_isrc(u_int res_id)
1531 struct intr_irqsrc *isrc;
1533 mtx_lock(&irq_map_lock);
1534 if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL)) {
1535 mtx_unlock(&irq_map_lock);
1538 isrc = irq_map[res_id]->isrc;
1539 mtx_unlock(&irq_map_lock);
1544 intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc)
1547 mtx_lock(&irq_map_lock);
1548 if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL)) {
1549 mtx_unlock(&irq_map_lock);
1552 irq_map[res_id]->isrc = isrc;
1553 mtx_unlock(&irq_map_lock);
1557 * Get a copy of intr_map_entry data
1559 static struct intr_map_data *
1560 intr_map_get_map_data(u_int res_id)
1562 struct intr_map_data *data;
1565 mtx_lock(&irq_map_lock);
1566 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1567 panic("Attempt to copy invalid resource id: %u\n", res_id);
1568 data = irq_map[res_id]->map_data;
1569 mtx_unlock(&irq_map_lock);
1575 * Get a copy of intr_map_entry data
1578 intr_map_copy_map_data(u_int res_id, device_t *map_dev, intptr_t *map_xref,
1579 struct intr_map_data **data)
1584 mtx_lock(&irq_map_lock);
1585 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1586 panic("Attempt to copy invalid resource id: %u\n", res_id);
1587 if (irq_map[res_id]->map_data != NULL)
1588 len = irq_map[res_id]->map_data->len;
1589 mtx_unlock(&irq_map_lock);
1594 *data = malloc(len, M_INTRNG, M_WAITOK | M_ZERO);
1595 mtx_lock(&irq_map_lock);
1596 if (irq_map[res_id] == NULL)
1597 panic("Attempt to copy invalid resource id: %u\n", res_id);
1599 if (len != irq_map[res_id]->map_data->len)
1600 panic("Resource id: %u has changed.\n", res_id);
1601 memcpy(*data, irq_map[res_id]->map_data, len);
1603 *map_dev = irq_map[res_id]->dev;
1604 *map_xref = irq_map[res_id]->xref;
1605 mtx_unlock(&irq_map_lock);
1610 * Allocate and fill new entry in irq_map table.
1613 intr_map_irq(device_t dev, intptr_t xref, struct intr_map_data *data)
1616 struct intr_map_entry *entry;
1618 /* Prepare new entry first. */
1619 entry = malloc(sizeof(*entry), M_INTRNG, M_WAITOK | M_ZERO);
1623 entry->map_data = data;
1626 mtx_lock(&irq_map_lock);
1627 for (i = irq_map_first_free_idx; i < irq_map_count; i++) {
1628 if (irq_map[i] == NULL) {
1630 irq_map_first_free_idx = i + 1;
1631 mtx_unlock(&irq_map_lock);
1635 mtx_unlock(&irq_map_lock);
1637 /* XXX Expand irq_map table */
1638 panic("IRQ mapping table is full.");
1642 * Remove and free mapping entry.
1645 intr_unmap_irq(u_int res_id)
1647 struct intr_map_entry *entry;
1649 mtx_lock(&irq_map_lock);
1650 if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL))
1651 panic("Attempt to unmap invalid resource id: %u\n", res_id);
1652 entry = irq_map[res_id];
1653 irq_map[res_id] = NULL;
1654 irq_map_first_free_idx = res_id;
1655 mtx_unlock(&irq_map_lock);
1656 intr_free_intr_map_data(entry->map_data);
1657 free(entry, M_INTRNG);
1661 * Clone mapping entry.
1664 intr_map_clone_irq(u_int old_res_id)
1668 struct intr_map_data *data;
1670 intr_map_copy_map_data(old_res_id, &map_dev, &map_xref, &data);
1671 return (intr_map_irq(map_dev, map_xref, data));
1675 intr_map_init(void *dummy __unused)
1678 mtx_init(&irq_map_lock, "intr map table", NULL, MTX_DEF);
1680 SYSINIT(intr_map_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_map_init, NULL);