2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * New-style Interrupt Framework
34 * TODO: - to support IPI (PPI) enabling on other CPUs if already started
35 * - to complete things for removable PICs
40 #include "opt_platform.h"
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/syslog.h>
46 #include <sys/malloc.h>
48 #include <sys/queue.h>
50 #include <sys/interrupt.h>
52 #include <sys/cpuset.h>
54 #include <sys/sched.h>
56 #include <machine/atomic.h>
57 #include <machine/intr.h>
58 #include <machine/cpu.h>
59 #include <machine/smp.h>
60 #include <machine/stdarg.h>
63 #include <dev/ofw/openfirm.h>
64 #include <dev/ofw/ofw_bus.h>
65 #include <dev/ofw/ofw_bus_subr.h>
74 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
77 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
78 printf(fmt,##args); } while (0)
80 #define debugf(fmt, args...)
83 MALLOC_DECLARE(M_INTRNG);
84 MALLOC_DEFINE(M_INTRNG, "intr", "intr interrupt handling");
86 /* Main interrupt handler called from assembler -> 'hidden' for C code. */
87 void intr_irq_handler(struct trapframe *tf);
89 /* Root interrupt controller stuff. */
90 device_t intr_irq_root_dev;
91 static intr_irq_filter_t *irq_root_filter;
92 static void *irq_root_arg;
93 static u_int irq_root_ipicount;
95 /* Interrupt controller definition. */
97 SLIST_ENTRY(intr_pic) pic_next;
98 intptr_t pic_xref; /* hardware identification */
102 static struct mtx pic_list_lock;
103 static SLIST_HEAD(, intr_pic) pic_list;
105 static struct intr_pic *pic_lookup(device_t dev, intptr_t xref);
107 /* Interrupt source definition. */
108 static struct mtx isrc_table_lock;
109 static struct intr_irqsrc *irq_sources[NIRQ];
112 #define IRQ_INVALID nitems(irq_sources)
115 * XXX - All stuff around struct intr_dev_data is considered as temporary
116 * until better place for storing struct intr_map_data will be find.
118 * For now, there are two global interrupt numbers spaces:
119 * <0, NIRQ) ... interrupts without config data
120 * managed in irq_sources[]
121 * IRQ_DDATA_BASE + <0, 2 * NIRQ) ... interrupts with config data
122 * managed in intr_ddata_tab[]
124 * Read intr_ddata_lookup() to see how these spaces are worked with.
125 * Note that each interrupt number from second space duplicates some number
126 * from first space at this moment. An interrupt number from first space can
127 * be duplicated even multiple times in second space.
129 struct intr_dev_data {
133 struct intr_map_data idd_data;
134 struct intr_irqsrc * idd_isrc;
137 static struct intr_dev_data *intr_ddata_tab[2 * NIRQ];
138 static u_int intr_ddata_first_unused;
140 #define IRQ_DDATA_BASE 10000
141 CTASSERT(IRQ_DDATA_BASE > IRQ_INVALID);
144 static boolean_t irq_assign_cpu = FALSE;
148 * - 2 counters for each I/O interrupt.
149 * - MAXCPU counters for each IPI counters for SMP.
152 #define INTRCNT_COUNT (NIRQ * 2 + INTR_IPI_COUNT * MAXCPU)
154 #define INTRCNT_COUNT (NIRQ * 2)
157 /* Data for MI statistics reporting. */
158 u_long intrcnt[INTRCNT_COUNT];
159 char intrnames[INTRCNT_COUNT * INTRNAME_LEN];
160 size_t sintrcnt = sizeof(intrcnt);
161 size_t sintrnames = sizeof(intrnames);
162 static u_int intrcnt_index;
165 * Interrupt framework initialization routine.
168 intr_irq_init(void *dummy __unused)
171 SLIST_INIT(&pic_list);
172 mtx_init(&pic_list_lock, "intr pic list", NULL, MTX_DEF);
173 mtx_init(&isrc_table_lock, "intr isrc table", NULL, MTX_DEF);
175 SYSINIT(intr_irq_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_irq_init, NULL);
178 intrcnt_setname(const char *name, int index)
181 snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s",
182 INTRNAME_LEN - 1, name);
186 * Update name for interrupt source with interrupt event.
189 intrcnt_updatename(struct intr_irqsrc *isrc)
192 /* QQQ: What about stray counter name? */
193 mtx_assert(&isrc_table_lock, MA_OWNED);
194 intrcnt_setname(isrc->isrc_event->ie_fullname, isrc->isrc_index);
198 * Virtualization for interrupt source interrupt counter increment.
201 isrc_increment_count(struct intr_irqsrc *isrc)
204 if (isrc->isrc_flags & INTR_ISRCF_PPI)
205 atomic_add_long(&isrc->isrc_count[0], 1);
207 isrc->isrc_count[0]++;
211 * Virtualization for interrupt source interrupt stray counter increment.
214 isrc_increment_straycount(struct intr_irqsrc *isrc)
217 isrc->isrc_count[1]++;
221 * Virtualization for interrupt source interrupt name update.
224 isrc_update_name(struct intr_irqsrc *isrc, const char *name)
226 char str[INTRNAME_LEN];
228 mtx_assert(&isrc_table_lock, MA_OWNED);
231 snprintf(str, INTRNAME_LEN, "%s: %s", isrc->isrc_name, name);
232 intrcnt_setname(str, isrc->isrc_index);
233 snprintf(str, INTRNAME_LEN, "stray %s: %s", isrc->isrc_name,
235 intrcnt_setname(str, isrc->isrc_index + 1);
237 snprintf(str, INTRNAME_LEN, "%s:", isrc->isrc_name);
238 intrcnt_setname(str, isrc->isrc_index);
239 snprintf(str, INTRNAME_LEN, "stray %s:", isrc->isrc_name);
240 intrcnt_setname(str, isrc->isrc_index + 1);
245 * Virtualization for interrupt source interrupt counters setup.
248 isrc_setup_counters(struct intr_irqsrc *isrc)
253 * XXX - it does not work well with removable controllers and
254 * interrupt sources !!!
256 index = atomic_fetchadd_int(&intrcnt_index, 2);
257 isrc->isrc_index = index;
258 isrc->isrc_count = &intrcnt[index];
259 isrc_update_name(isrc, NULL);
263 * Virtualization for interrupt source interrupt counters release.
266 isrc_release_counters(struct intr_irqsrc *isrc)
269 panic("%s: not implemented", __func__);
274 * Virtualization for interrupt source IPI counters setup.
277 intr_ipi_setup_counters(const char *name)
280 char str[INTRNAME_LEN];
282 index = atomic_fetchadd_int(&intrcnt_index, MAXCPU);
283 for (i = 0; i < MAXCPU; i++) {
284 snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
285 intrcnt_setname(str, index + i);
287 return (&intrcnt[index]);
292 * Main interrupt dispatch handler. It's called straight
293 * from the assembler, where CPU interrupt is served.
296 intr_irq_handler(struct trapframe *tf)
298 struct trapframe * oldframe;
301 KASSERT(irq_root_filter != NULL, ("%s: no filter", __func__));
303 PCPU_INC(cnt.v_intr);
306 oldframe = td->td_intr_frame;
307 td->td_intr_frame = tf;
308 irq_root_filter(irq_root_arg);
309 td->td_intr_frame = oldframe;
314 * interrupt controller dispatch function for interrupts. It should
315 * be called straight from the interrupt controller, when associated interrupt
319 intr_isrc_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
322 KASSERT(isrc != NULL, ("%s: no source", __func__));
324 isrc_increment_count(isrc);
327 if (isrc->isrc_filter != NULL) {
329 error = isrc->isrc_filter(isrc->isrc_arg, tf);
330 PIC_POST_FILTER(isrc->isrc_dev, isrc);
331 if (error == FILTER_HANDLED)
335 if (isrc->isrc_event != NULL) {
336 if (intr_event_handle(isrc->isrc_event, tf) == 0)
340 isrc_increment_straycount(isrc);
345 * Alloc unique interrupt number (resource handle) for interrupt source.
347 * There could be various strategies how to allocate free interrupt number
348 * (resource handle) for new interrupt source.
350 * 1. Handles are always allocated forward, so handles are not recycled
351 * immediately. However, if only one free handle left which is reused
355 isrc_alloc_irq(struct intr_irqsrc *isrc)
359 mtx_assert(&isrc_table_lock, MA_OWNED);
361 maxirqs = nitems(irq_sources);
362 if (irq_next_free >= maxirqs)
365 for (irq = irq_next_free; irq < maxirqs; irq++) {
366 if (irq_sources[irq] == NULL)
369 for (irq = 0; irq < irq_next_free; irq++) {
370 if (irq_sources[irq] == NULL)
374 irq_next_free = maxirqs;
378 isrc->isrc_irq = irq;
379 irq_sources[irq] = isrc;
381 irq_next_free = irq + 1;
382 if (irq_next_free >= maxirqs)
388 * Free unique interrupt number (resource handle) from interrupt source.
391 isrc_free_irq(struct intr_irqsrc *isrc)
394 mtx_assert(&isrc_table_lock, MA_OWNED);
396 if (isrc->isrc_irq >= nitems(irq_sources))
398 if (irq_sources[isrc->isrc_irq] != isrc)
401 irq_sources[isrc->isrc_irq] = NULL;
402 isrc->isrc_irq = IRQ_INVALID; /* just to be safe */
407 * Lookup interrupt source by interrupt number (resource handle).
409 static inline struct intr_irqsrc *
410 isrc_lookup(u_int irq)
413 if (irq < nitems(irq_sources))
414 return (irq_sources[irq]);
419 * Initialize interrupt source and register it into global interrupt table.
422 intr_isrc_register(struct intr_irqsrc *isrc, device_t dev, u_int flags,
423 const char *fmt, ...)
428 bzero(isrc, sizeof(struct intr_irqsrc));
429 isrc->isrc_dev = dev;
430 isrc->isrc_irq = IRQ_INVALID; /* just to be safe */
431 isrc->isrc_flags = flags;
434 vsnprintf(isrc->isrc_name, INTR_ISRC_NAMELEN, fmt, ap);
437 mtx_lock(&isrc_table_lock);
438 error = isrc_alloc_irq(isrc);
440 mtx_unlock(&isrc_table_lock);
444 * Setup interrupt counters, but not for IPI sources. Those are setup
445 * later and only for used ones (up to INTR_IPI_COUNT) to not exhaust
448 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
449 isrc_setup_counters(isrc);
450 mtx_unlock(&isrc_table_lock);
455 * Deregister interrupt source from global interrupt table.
458 intr_isrc_deregister(struct intr_irqsrc *isrc)
462 mtx_lock(&isrc_table_lock);
463 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
464 isrc_release_counters(isrc);
465 error = isrc_free_irq(isrc);
466 mtx_unlock(&isrc_table_lock);
472 * A support function for a PIC to decide if provided ISRC should be inited
473 * on given cpu. The logic of INTR_ISRCF_BOUND flag and isrc_cpu member of
474 * struct intr_irqsrc is the following:
476 * If INTR_ISRCF_BOUND is set, the ISRC should be inited only on cpus
477 * set in isrc_cpu. If not, the ISRC should be inited on every cpu and
478 * isrc_cpu is kept consistent with it. Thus isrc_cpu is always correct.
481 intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu)
484 if (isrc->isrc_handlers == 0)
486 if ((isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI)) == 0)
488 if (isrc->isrc_flags & INTR_ISRCF_BOUND)
489 return (CPU_ISSET(cpu, &isrc->isrc_cpu));
491 CPU_SET(cpu, &isrc->isrc_cpu);
496 static struct intr_dev_data *
497 intr_ddata_alloc(u_int extsize)
499 struct intr_dev_data *ddata;
501 ddata = malloc(sizeof(*ddata) + extsize, M_INTRNG, M_WAITOK | M_ZERO);
503 mtx_lock(&isrc_table_lock);
504 if (intr_ddata_first_unused >= nitems(intr_ddata_tab)) {
505 mtx_unlock(&isrc_table_lock);
506 free(ddata, M_INTRNG);
509 intr_ddata_tab[intr_ddata_first_unused] = ddata;
510 ddata->idd_irq = IRQ_DDATA_BASE + intr_ddata_first_unused++;
511 mtx_unlock(&isrc_table_lock);
515 static struct intr_irqsrc *
516 intr_ddata_lookup(u_int irq, struct intr_map_data **datap)
519 struct intr_irqsrc *isrc;
520 struct intr_dev_data *ddata;
522 isrc = isrc_lookup(irq);
529 if (irq < IRQ_DDATA_BASE)
532 irq -= IRQ_DDATA_BASE;
533 if (irq >= nitems(intr_ddata_tab))
536 ddata = intr_ddata_tab[irq];
537 if (ddata->idd_isrc == NULL) {
538 error = intr_map_irq(ddata->idd_dev, ddata->idd_xref,
539 &ddata->idd_data, &irq);
542 ddata->idd_isrc = isrc_lookup(irq);
545 *datap = &ddata->idd_data;
546 return (ddata->idd_isrc);
551 * Map interrupt source according to ACPI info into framework. If such mapping
552 * does not exist, create it. Return unique interrupt number (resource handle)
553 * associated with mapped interrupt source.
556 intr_acpi_map_irq(device_t dev, u_int irq, enum intr_polarity pol,
557 enum intr_trigger trig)
559 struct intr_dev_data *ddata;
561 ddata = intr_ddata_alloc(0);
563 return (0xFFFFFFFF); /* no space left */
565 ddata->idd_dev = dev;
566 ddata->idd_data.type = INTR_MAP_DATA_ACPI;
567 ddata->idd_data.acpi.irq = irq;
568 ddata->idd_data.acpi.pol = pol;
569 ddata->idd_data.acpi.trig = trig;
570 return (ddata->idd_irq);
575 * Map interrupt source according to FDT data into framework. If such mapping
576 * does not exist, create it. Return unique interrupt number (resource handle)
577 * associated with mapped interrupt source.
580 intr_fdt_map_irq(phandle_t node, pcell_t *cells, u_int ncells)
582 struct intr_dev_data *ddata;
585 cellsize = ncells * sizeof(*cells);
586 ddata = intr_ddata_alloc(cellsize);
588 return (0xFFFFFFFF); /* no space left */
590 ddata->idd_xref = (intptr_t)node;
591 ddata->idd_data.type = INTR_MAP_DATA_FDT;
592 ddata->idd_data.fdt.ncells = ncells;
593 ddata->idd_data.fdt.cells = (pcell_t *)(ddata + 1);
594 memcpy(ddata->idd_data.fdt.cells, cells, cellsize);
595 return (ddata->idd_irq);
601 * Setup filter into interrupt source.
604 iscr_setup_filter(struct intr_irqsrc *isrc, const char *name,
605 intr_irq_filter_t *filter, void *arg, void **cookiep)
611 mtx_lock(&isrc_table_lock);
613 * Make sure that we do not mix the two ways
614 * how we handle interrupt sources.
616 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
617 mtx_unlock(&isrc_table_lock);
620 isrc->isrc_filter = filter;
621 isrc->isrc_arg = arg;
622 isrc_update_name(isrc, name);
623 mtx_unlock(&isrc_table_lock);
631 * Interrupt source pre_ithread method for MI interrupt framework.
634 intr_isrc_pre_ithread(void *arg)
636 struct intr_irqsrc *isrc = arg;
638 PIC_PRE_ITHREAD(isrc->isrc_dev, isrc);
642 * Interrupt source post_ithread method for MI interrupt framework.
645 intr_isrc_post_ithread(void *arg)
647 struct intr_irqsrc *isrc = arg;
649 PIC_POST_ITHREAD(isrc->isrc_dev, isrc);
653 * Interrupt source post_filter method for MI interrupt framework.
656 intr_isrc_post_filter(void *arg)
658 struct intr_irqsrc *isrc = arg;
660 PIC_POST_FILTER(isrc->isrc_dev, isrc);
664 * Interrupt source assign_cpu method for MI interrupt framework.
667 intr_isrc_assign_cpu(void *arg, int cpu)
670 struct intr_irqsrc *isrc = arg;
673 if (isrc->isrc_dev != intr_irq_root_dev)
676 mtx_lock(&isrc_table_lock);
678 CPU_ZERO(&isrc->isrc_cpu);
679 isrc->isrc_flags &= ~INTR_ISRCF_BOUND;
681 CPU_SETOF(cpu, &isrc->isrc_cpu);
682 isrc->isrc_flags |= INTR_ISRCF_BOUND;
686 * In NOCPU case, it's up to PIC to either leave ISRC on same CPU or
687 * re-balance it to another CPU or enable it on more CPUs. However,
688 * PIC is expected to change isrc_cpu appropriately to keep us well
689 * informed if the call is successfull.
691 if (irq_assign_cpu) {
692 error = PIC_BIND_INTR(isrc->isrc_dev, isrc);
694 CPU_ZERO(&isrc->isrc_cpu);
695 mtx_unlock(&isrc_table_lock);
699 mtx_unlock(&isrc_table_lock);
707 * Create interrupt event for interrupt source.
710 isrc_event_create(struct intr_irqsrc *isrc)
712 struct intr_event *ie;
715 error = intr_event_create(&ie, isrc, 0, isrc->isrc_irq,
716 intr_isrc_pre_ithread, intr_isrc_post_ithread, intr_isrc_post_filter,
717 intr_isrc_assign_cpu, "%s:", isrc->isrc_name);
721 mtx_lock(&isrc_table_lock);
723 * Make sure that we do not mix the two ways
724 * how we handle interrupt sources. Let contested event wins.
727 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
729 if (isrc->isrc_event != NULL) {
731 mtx_unlock(&isrc_table_lock);
732 intr_event_destroy(ie);
733 return (isrc->isrc_event != NULL ? EBUSY : 0);
735 isrc->isrc_event = ie;
736 mtx_unlock(&isrc_table_lock);
742 * Destroy interrupt event for interrupt source.
745 isrc_event_destroy(struct intr_irqsrc *isrc)
747 struct intr_event *ie;
749 mtx_lock(&isrc_table_lock);
750 ie = isrc->isrc_event;
751 isrc->isrc_event = NULL;
752 mtx_unlock(&isrc_table_lock);
755 intr_event_destroy(ie);
759 * Add handler to interrupt source.
762 isrc_add_handler(struct intr_irqsrc *isrc, const char *name,
763 driver_filter_t filter, driver_intr_t handler, void *arg,
764 enum intr_type flags, void **cookiep)
768 if (isrc->isrc_event == NULL) {
769 error = isrc_event_create(isrc);
774 error = intr_event_add_handler(isrc->isrc_event, name, filter, handler,
775 arg, intr_priority(flags), flags, cookiep);
777 mtx_lock(&isrc_table_lock);
778 intrcnt_updatename(isrc);
779 mtx_unlock(&isrc_table_lock);
786 * Lookup interrupt controller locked.
788 static inline struct intr_pic *
789 pic_lookup_locked(device_t dev, intptr_t xref)
791 struct intr_pic *pic;
793 mtx_assert(&pic_list_lock, MA_OWNED);
795 if (dev == NULL && xref == 0)
798 /* Note that pic->pic_dev is never NULL on registered PIC. */
799 SLIST_FOREACH(pic, &pic_list, pic_next) {
801 if (xref == pic->pic_xref)
803 } else if (xref == 0 || pic->pic_xref == 0) {
804 if (dev == pic->pic_dev)
806 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
813 * Lookup interrupt controller.
815 static struct intr_pic *
816 pic_lookup(device_t dev, intptr_t xref)
818 struct intr_pic *pic;
820 mtx_lock(&pic_list_lock);
821 pic = pic_lookup_locked(dev, xref);
822 mtx_unlock(&pic_list_lock);
827 * Create interrupt controller.
829 static struct intr_pic *
830 pic_create(device_t dev, intptr_t xref)
832 struct intr_pic *pic;
834 mtx_lock(&pic_list_lock);
835 pic = pic_lookup_locked(dev, xref);
837 mtx_unlock(&pic_list_lock);
840 pic = malloc(sizeof(*pic), M_INTRNG, M_NOWAIT | M_ZERO);
841 pic->pic_xref = xref;
843 SLIST_INSERT_HEAD(&pic_list, pic, pic_next);
844 mtx_unlock(&pic_list_lock);
850 * Destroy interrupt controller.
853 pic_destroy(device_t dev, intptr_t xref)
855 struct intr_pic *pic;
857 mtx_lock(&pic_list_lock);
858 pic = pic_lookup_locked(dev, xref);
860 mtx_unlock(&pic_list_lock);
863 SLIST_REMOVE(&pic_list, pic, intr_pic, pic_next);
864 mtx_unlock(&pic_list_lock);
870 * Register interrupt controller.
873 intr_pic_register(device_t dev, intptr_t xref)
875 struct intr_pic *pic;
879 pic = pic_create(dev, xref);
883 debugf("PIC %p registered for %s <dev %p, xref %x>\n", pic,
884 device_get_nameunit(dev), dev, xref);
889 * Unregister interrupt controller.
892 intr_pic_deregister(device_t dev, intptr_t xref)
895 panic("%s: not implemented", __func__);
899 * Mark interrupt controller (itself) as a root one.
901 * Note that only an interrupt controller can really know its position
902 * in interrupt controller's tree. So root PIC must claim itself as a root.
904 * In FDT case, according to ePAPR approved version 1.1 from 08 April 2011,
906 * "The root of the interrupt tree is determined when traversal
907 * of the interrupt tree reaches an interrupt controller node without
908 * an interrupts property and thus no explicit interrupt parent."
911 intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
912 void *arg, u_int ipicount)
915 if (pic_lookup(dev, xref) == NULL) {
916 device_printf(dev, "not registered\n");
919 if (filter == NULL) {
920 device_printf(dev, "filter missing\n");
925 * Only one interrupt controllers could be on the root for now.
926 * Note that we further suppose that there is not threaded interrupt
927 * routine (handler) on the root. See intr_irq_handler().
929 if (intr_irq_root_dev != NULL) {
930 device_printf(dev, "another root already set\n");
934 intr_irq_root_dev = dev;
935 irq_root_filter = filter;
937 irq_root_ipicount = ipicount;
939 debugf("irq root set to %s\n", device_get_nameunit(dev));
944 intr_map_irq(device_t dev, intptr_t xref, struct intr_map_data *data,
948 struct intr_irqsrc *isrc;
949 struct intr_pic *pic;
954 pic = pic_lookup(dev, xref);
955 if (pic == NULL || pic->pic_dev == NULL)
958 error = PIC_MAP_INTR(pic->pic_dev, data, &isrc);
960 *irqp = isrc->isrc_irq;
965 intr_alloc_irq(device_t dev, struct resource *res)
967 struct intr_map_data *data;
968 struct intr_irqsrc *isrc;
970 KASSERT(rman_get_start(res) == rman_get_end(res),
971 ("%s: more interrupts in resource", __func__));
973 isrc = intr_ddata_lookup(rman_get_start(res), &data);
977 return (PIC_ALLOC_INTR(isrc->isrc_dev, isrc, res, data));
981 intr_release_irq(device_t dev, struct resource *res)
983 struct intr_map_data *data;
984 struct intr_irqsrc *isrc;
986 KASSERT(rman_get_start(res) == rman_get_end(res),
987 ("%s: more interrupts in resource", __func__));
989 isrc = intr_ddata_lookup(rman_get_start(res), &data);
993 return (PIC_RELEASE_INTR(isrc->isrc_dev, isrc, res, data));
997 intr_setup_irq(device_t dev, struct resource *res, driver_filter_t filt,
998 driver_intr_t hand, void *arg, int flags, void **cookiep)
1001 struct intr_map_data *data;
1002 struct intr_irqsrc *isrc;
1005 KASSERT(rman_get_start(res) == rman_get_end(res),
1006 ("%s: more interrupts in resource", __func__));
1008 isrc = intr_ddata_lookup(rman_get_start(res), &data);
1012 name = device_get_nameunit(dev);
1016 * Standard handling is done thru MI interrupt framework. However,
1017 * some interrupts could request solely own special handling. This
1018 * non standard handling can be used for interrupt controllers without
1019 * handler (filter only), so in case that interrupt controllers are
1020 * chained, MI interrupt framework is called only in leaf controller.
1022 * Note that root interrupt controller routine is served as well,
1023 * however in intr_irq_handler(), i.e. main system dispatch routine.
1025 if (flags & INTR_SOLO && hand != NULL) {
1026 debugf("irq %u cannot solo on %s\n", irq, name);
1030 if (flags & INTR_SOLO) {
1031 error = iscr_setup_filter(isrc, name, (intr_irq_filter_t *)filt,
1033 debugf("irq %u setup filter error %d on %s\n", irq, error,
1038 error = isrc_add_handler(isrc, name, filt, hand, arg, flags,
1040 debugf("irq %u add handler error %d on %s\n", irq, error, name);
1045 mtx_lock(&isrc_table_lock);
1046 error = PIC_SETUP_INTR(isrc->isrc_dev, isrc, res, data);
1048 isrc->isrc_handlers++;
1049 if (isrc->isrc_handlers == 1)
1050 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
1052 mtx_unlock(&isrc_table_lock);
1054 intr_event_remove_handler(*cookiep);
1059 intr_teardown_irq(device_t dev, struct resource *res, void *cookie)
1062 struct intr_map_data *data;
1063 struct intr_irqsrc *isrc;
1065 KASSERT(rman_get_start(res) == rman_get_end(res),
1066 ("%s: more interrupts in resource", __func__));
1068 isrc = intr_ddata_lookup(rman_get_start(res), &data);
1069 if (isrc == NULL || isrc->isrc_handlers == 0)
1073 if (isrc->isrc_filter != NULL) {
1077 mtx_lock(&isrc_table_lock);
1078 isrc->isrc_filter = NULL;
1079 isrc->isrc_arg = NULL;
1080 isrc->isrc_handlers = 0;
1081 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1082 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1083 isrc_update_name(isrc, NULL);
1084 mtx_unlock(&isrc_table_lock);
1088 if (isrc != intr_handler_source(cookie))
1091 error = intr_event_remove_handler(cookie);
1093 mtx_lock(&isrc_table_lock);
1094 isrc->isrc_handlers--;
1095 if (isrc->isrc_handlers == 0)
1096 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1097 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1098 intrcnt_updatename(isrc);
1099 mtx_unlock(&isrc_table_lock);
1105 intr_describe_irq(device_t dev, struct resource *res, void *cookie,
1109 struct intr_irqsrc *isrc;
1111 KASSERT(rman_get_start(res) == rman_get_end(res),
1112 ("%s: more interrupts in resource", __func__));
1114 isrc = intr_ddata_lookup(rman_get_start(res), NULL);
1115 if (isrc == NULL || isrc->isrc_handlers == 0)
1118 if (isrc->isrc_filter != NULL) {
1122 mtx_lock(&isrc_table_lock);
1123 isrc_update_name(isrc, descr);
1124 mtx_unlock(&isrc_table_lock);
1128 error = intr_event_describe_handler(isrc->isrc_event, cookie, descr);
1130 mtx_lock(&isrc_table_lock);
1131 intrcnt_updatename(isrc);
1132 mtx_unlock(&isrc_table_lock);
1139 intr_bind_irq(device_t dev, struct resource *res, int cpu)
1141 struct intr_irqsrc *isrc;
1143 KASSERT(rman_get_start(res) == rman_get_end(res),
1144 ("%s: more interrupts in resource", __func__));
1146 isrc = intr_ddata_lookup(rman_get_start(res), NULL);
1147 if (isrc == NULL || isrc->isrc_handlers == 0)
1150 if (isrc->isrc_filter != NULL)
1151 return (intr_isrc_assign_cpu(isrc, cpu));
1153 return (intr_event_bind(isrc->isrc_event, cpu));
1157 * Return the CPU that the next interrupt source should use.
1158 * For now just returns the next CPU according to round-robin.
1161 intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
1164 if (!irq_assign_cpu || mp_ncpus == 1)
1165 return (PCPU_GET(cpuid));
1169 if (last_cpu > mp_maxid)
1171 } while (!CPU_ISSET(last_cpu, cpumask));
1176 * Distribute all the interrupt sources among the available
1177 * CPUs once the AP's have been launched.
1180 intr_irq_shuffle(void *arg __unused)
1182 struct intr_irqsrc *isrc;
1188 mtx_lock(&isrc_table_lock);
1189 irq_assign_cpu = TRUE;
1190 for (i = 0; i < NIRQ; i++) {
1191 isrc = irq_sources[i];
1192 if (isrc == NULL || isrc->isrc_handlers == 0 ||
1193 isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI))
1196 if (isrc->isrc_event != NULL &&
1197 isrc->isrc_flags & INTR_ISRCF_BOUND &&
1198 isrc->isrc_event->ie_cpu != CPU_FFS(&isrc->isrc_cpu) - 1)
1199 panic("%s: CPU inconsistency", __func__);
1201 if ((isrc->isrc_flags & INTR_ISRCF_BOUND) == 0)
1202 CPU_ZERO(&isrc->isrc_cpu); /* start again */
1205 * We are in wicked position here if the following call fails
1206 * for bound ISRC. The best thing we can do is to clear
1207 * isrc_cpu so inconsistency with ie_cpu will be detectable.
1209 if (PIC_BIND_INTR(isrc->isrc_dev, isrc) != 0)
1210 CPU_ZERO(&isrc->isrc_cpu);
1212 mtx_unlock(&isrc_table_lock);
1214 SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
1218 intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
1221 return (PCPU_GET(cpuid));
1225 void dosoftints(void);
1233 * Init interrupt controller on another CPU.
1236 intr_pic_init_secondary(void)
1240 * QQQ: Only root PIC is aware of other CPUs ???
1242 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
1244 //mtx_lock(&isrc_table_lock);
1245 PIC_INIT_SECONDARY(intr_irq_root_dev);
1246 //mtx_unlock(&isrc_table_lock);
1251 DB_SHOW_COMMAND(irqs, db_show_irqs)
1255 struct intr_irqsrc *isrc;
1257 for (irqsum = 0, i = 0; i < NIRQ; i++) {
1258 isrc = irq_sources[i];
1262 num = isrc->isrc_count != NULL ? isrc->isrc_count[0] : 0;
1263 db_printf("irq%-3u <%s>: cpu %02lx%s cnt %lu\n", i,
1264 isrc->isrc_name, isrc->isrc_cpu.__bits[0],
1265 isrc->isrc_flags & INTR_ISRCF_BOUND ? " (bound)" : "", num);
1268 db_printf("irq total %u\n", irqsum);