2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * New-style Interrupt Framework
34 * TODO: - add support for disconnected PICs.
35 * - to support IPI (PPI) enabling on other CPUs if already started.
36 * - to complete things for removable PICs.
40 #include "opt_hwpmc_hooks.h"
41 #include "opt_iommu.h"
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
47 #include <sys/mutex.h>
48 #include <sys/syslog.h>
49 #include <sys/malloc.h>
51 #include <sys/queue.h>
53 #include <sys/interrupt.h>
54 #include <sys/taskqueue.h>
57 #include <sys/cpuset.h>
59 #include <sys/sched.h>
61 #include <sys/vmmeter.h>
63 #include <sys/pmckern.h>
66 #include <machine/atomic.h>
67 #include <machine/intr.h>
68 #include <machine/cpu.h>
69 #include <machine/smp.h>
70 #include <machine/stdarg.h>
77 #include <dev/iommu/iommu_msi.h>
83 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
86 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
87 printf(fmt,##args); } while (0)
89 #define debugf(fmt, args...)
92 MALLOC_DECLARE(M_INTRNG);
93 MALLOC_DEFINE(M_INTRNG, "intr", "intr interrupt handling");
95 /* Main interrupt handler called from assembler -> 'hidden' for C code. */
96 void intr_irq_handler(struct trapframe *tf);
98 /* Root interrupt controller stuff. */
99 device_t intr_irq_root_dev;
100 static intr_irq_filter_t *irq_root_filter;
101 static void *irq_root_arg;
102 static u_int irq_root_ipicount;
104 struct intr_pic_child {
105 SLIST_ENTRY(intr_pic_child) pc_next;
106 struct intr_pic *pc_pic;
107 intr_child_irq_filter_t *pc_filter;
113 /* Interrupt controller definition. */
115 SLIST_ENTRY(intr_pic) pic_next;
116 intptr_t pic_xref; /* hardware identification */
118 /* Only one of FLAG_PIC or FLAG_MSI may be set */
119 #define FLAG_PIC (1 << 0)
120 #define FLAG_MSI (1 << 1)
121 #define FLAG_TYPE_MASK (FLAG_PIC | FLAG_MSI)
123 struct mtx pic_child_lock;
124 SLIST_HEAD(, intr_pic_child) pic_children;
127 static struct mtx pic_list_lock;
128 static SLIST_HEAD(, intr_pic) pic_list;
130 static struct intr_pic *pic_lookup(device_t dev, intptr_t xref, int flags);
132 /* Interrupt source definition. */
133 static struct mtx isrc_table_lock;
134 static struct intr_irqsrc *irq_sources[NIRQ];
138 #ifdef EARLY_AP_STARTUP
139 static bool irq_assign_cpu = true;
141 static bool irq_assign_cpu = false;
146 * - 2 counters for each I/O interrupt.
147 * - MAXCPU counters for each IPI counters for SMP.
150 #define INTRCNT_COUNT (NIRQ * 2 + INTR_IPI_COUNT * MAXCPU)
152 #define INTRCNT_COUNT (NIRQ * 2)
155 /* Data for MI statistics reporting. */
156 u_long intrcnt[INTRCNT_COUNT];
157 char intrnames[INTRCNT_COUNT * INTRNAME_LEN];
158 size_t sintrcnt = sizeof(intrcnt);
159 size_t sintrnames = sizeof(intrnames);
160 static u_int intrcnt_index;
162 static struct intr_irqsrc *intr_map_get_isrc(u_int res_id);
163 static void intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc);
164 static struct intr_map_data * intr_map_get_map_data(u_int res_id);
165 static void intr_map_copy_map_data(u_int res_id, device_t *dev, intptr_t *xref,
166 struct intr_map_data **data);
169 * Interrupt framework initialization routine.
172 intr_irq_init(void *dummy __unused)
175 SLIST_INIT(&pic_list);
176 mtx_init(&pic_list_lock, "intr pic list", NULL, MTX_DEF);
178 mtx_init(&isrc_table_lock, "intr isrc table", NULL, MTX_DEF);
180 SYSINIT(intr_irq_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_irq_init, NULL);
183 intrcnt_setname(const char *name, int index)
186 snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s",
187 INTRNAME_LEN - 1, name);
191 * Update name for interrupt source with interrupt event.
194 intrcnt_updatename(struct intr_irqsrc *isrc)
197 /* QQQ: What about stray counter name? */
198 mtx_assert(&isrc_table_lock, MA_OWNED);
199 intrcnt_setname(isrc->isrc_event->ie_fullname, isrc->isrc_index);
203 * Virtualization for interrupt source interrupt counter increment.
206 isrc_increment_count(struct intr_irqsrc *isrc)
209 if (isrc->isrc_flags & INTR_ISRCF_PPI)
210 atomic_add_long(&isrc->isrc_count[0], 1);
212 isrc->isrc_count[0]++;
216 * Virtualization for interrupt source interrupt stray counter increment.
219 isrc_increment_straycount(struct intr_irqsrc *isrc)
222 isrc->isrc_count[1]++;
226 * Virtualization for interrupt source interrupt name update.
229 isrc_update_name(struct intr_irqsrc *isrc, const char *name)
231 char str[INTRNAME_LEN];
233 mtx_assert(&isrc_table_lock, MA_OWNED);
236 snprintf(str, INTRNAME_LEN, "%s: %s", isrc->isrc_name, name);
237 intrcnt_setname(str, isrc->isrc_index);
238 snprintf(str, INTRNAME_LEN, "stray %s: %s", isrc->isrc_name,
240 intrcnt_setname(str, isrc->isrc_index + 1);
242 snprintf(str, INTRNAME_LEN, "%s:", isrc->isrc_name);
243 intrcnt_setname(str, isrc->isrc_index);
244 snprintf(str, INTRNAME_LEN, "stray %s:", isrc->isrc_name);
245 intrcnt_setname(str, isrc->isrc_index + 1);
250 * Virtualization for interrupt source interrupt counters setup.
253 isrc_setup_counters(struct intr_irqsrc *isrc)
258 * XXX - it does not work well with removable controllers and
259 * interrupt sources !!!
261 index = atomic_fetchadd_int(&intrcnt_index, 2);
262 isrc->isrc_index = index;
263 isrc->isrc_count = &intrcnt[index];
264 isrc_update_name(isrc, NULL);
268 * Virtualization for interrupt source interrupt counters release.
271 isrc_release_counters(struct intr_irqsrc *isrc)
274 panic("%s: not implemented", __func__);
279 * Virtualization for interrupt source IPI counters setup.
282 intr_ipi_setup_counters(const char *name)
285 char str[INTRNAME_LEN];
287 index = atomic_fetchadd_int(&intrcnt_index, MAXCPU);
288 for (i = 0; i < MAXCPU; i++) {
289 snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
290 intrcnt_setname(str, index + i);
292 return (&intrcnt[index]);
297 * Main interrupt dispatch handler. It's called straight
298 * from the assembler, where CPU interrupt is served.
301 intr_irq_handler(struct trapframe *tf)
303 struct trapframe * oldframe;
306 KASSERT(irq_root_filter != NULL, ("%s: no filter", __func__));
311 oldframe = td->td_intr_frame;
312 td->td_intr_frame = tf;
313 irq_root_filter(irq_root_arg);
314 td->td_intr_frame = oldframe;
317 if (pmc_hook && TRAPF_USERMODE(tf) &&
318 (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
319 pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
324 intr_child_irq_handler(struct intr_pic *parent, uintptr_t irq)
326 struct intr_pic_child *child;
330 mtx_lock_spin(&parent->pic_child_lock);
331 SLIST_FOREACH(child, &parent->pic_children, pc_next) {
332 if (child->pc_start <= irq &&
333 irq < (child->pc_start + child->pc_length)) {
338 mtx_unlock_spin(&parent->pic_child_lock);
341 return (child->pc_filter(child->pc_filter_arg, irq));
343 return (FILTER_STRAY);
347 * interrupt controller dispatch function for interrupts. It should
348 * be called straight from the interrupt controller, when associated interrupt
352 intr_isrc_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
355 KASSERT(isrc != NULL, ("%s: no source", __func__));
357 isrc_increment_count(isrc);
360 if (isrc->isrc_filter != NULL) {
362 error = isrc->isrc_filter(isrc->isrc_arg, tf);
363 PIC_POST_FILTER(isrc->isrc_dev, isrc);
364 if (error == FILTER_HANDLED)
368 if (isrc->isrc_event != NULL) {
369 if (intr_event_handle(isrc->isrc_event, tf) == 0)
373 isrc_increment_straycount(isrc);
378 * Alloc unique interrupt number (resource handle) for interrupt source.
380 * There could be various strategies how to allocate free interrupt number
381 * (resource handle) for new interrupt source.
383 * 1. Handles are always allocated forward, so handles are not recycled
384 * immediately. However, if only one free handle left which is reused
388 isrc_alloc_irq(struct intr_irqsrc *isrc)
392 mtx_assert(&isrc_table_lock, MA_OWNED);
394 maxirqs = nitems(irq_sources);
395 if (irq_next_free >= maxirqs)
398 for (irq = irq_next_free; irq < maxirqs; irq++) {
399 if (irq_sources[irq] == NULL)
402 for (irq = 0; irq < irq_next_free; irq++) {
403 if (irq_sources[irq] == NULL)
407 irq_next_free = maxirqs;
411 isrc->isrc_irq = irq;
412 irq_sources[irq] = isrc;
414 irq_next_free = irq + 1;
415 if (irq_next_free >= maxirqs)
421 * Free unique interrupt number (resource handle) from interrupt source.
424 isrc_free_irq(struct intr_irqsrc *isrc)
427 mtx_assert(&isrc_table_lock, MA_OWNED);
429 if (isrc->isrc_irq >= nitems(irq_sources))
431 if (irq_sources[isrc->isrc_irq] != isrc)
434 irq_sources[isrc->isrc_irq] = NULL;
435 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
440 * Initialize interrupt source and register it into global interrupt table.
443 intr_isrc_register(struct intr_irqsrc *isrc, device_t dev, u_int flags,
444 const char *fmt, ...)
449 bzero(isrc, sizeof(struct intr_irqsrc));
450 isrc->isrc_dev = dev;
451 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
452 isrc->isrc_flags = flags;
455 vsnprintf(isrc->isrc_name, INTR_ISRC_NAMELEN, fmt, ap);
458 mtx_lock(&isrc_table_lock);
459 error = isrc_alloc_irq(isrc);
461 mtx_unlock(&isrc_table_lock);
465 * Setup interrupt counters, but not for IPI sources. Those are setup
466 * later and only for used ones (up to INTR_IPI_COUNT) to not exhaust
469 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
470 isrc_setup_counters(isrc);
471 mtx_unlock(&isrc_table_lock);
476 * Deregister interrupt source from global interrupt table.
479 intr_isrc_deregister(struct intr_irqsrc *isrc)
483 mtx_lock(&isrc_table_lock);
484 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
485 isrc_release_counters(isrc);
486 error = isrc_free_irq(isrc);
487 mtx_unlock(&isrc_table_lock);
493 * A support function for a PIC to decide if provided ISRC should be inited
494 * on given cpu. The logic of INTR_ISRCF_BOUND flag and isrc_cpu member of
495 * struct intr_irqsrc is the following:
497 * If INTR_ISRCF_BOUND is set, the ISRC should be inited only on cpus
498 * set in isrc_cpu. If not, the ISRC should be inited on every cpu and
499 * isrc_cpu is kept consistent with it. Thus isrc_cpu is always correct.
502 intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu)
505 if (isrc->isrc_handlers == 0)
507 if ((isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI)) == 0)
509 if (isrc->isrc_flags & INTR_ISRCF_BOUND)
510 return (CPU_ISSET(cpu, &isrc->isrc_cpu));
512 CPU_SET(cpu, &isrc->isrc_cpu);
519 * Setup filter into interrupt source.
522 iscr_setup_filter(struct intr_irqsrc *isrc, const char *name,
523 intr_irq_filter_t *filter, void *arg, void **cookiep)
529 mtx_lock(&isrc_table_lock);
531 * Make sure that we do not mix the two ways
532 * how we handle interrupt sources.
534 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
535 mtx_unlock(&isrc_table_lock);
538 isrc->isrc_filter = filter;
539 isrc->isrc_arg = arg;
540 isrc_update_name(isrc, name);
541 mtx_unlock(&isrc_table_lock);
549 * Interrupt source pre_ithread method for MI interrupt framework.
552 intr_isrc_pre_ithread(void *arg)
554 struct intr_irqsrc *isrc = arg;
556 PIC_PRE_ITHREAD(isrc->isrc_dev, isrc);
560 * Interrupt source post_ithread method for MI interrupt framework.
563 intr_isrc_post_ithread(void *arg)
565 struct intr_irqsrc *isrc = arg;
567 PIC_POST_ITHREAD(isrc->isrc_dev, isrc);
571 * Interrupt source post_filter method for MI interrupt framework.
574 intr_isrc_post_filter(void *arg)
576 struct intr_irqsrc *isrc = arg;
578 PIC_POST_FILTER(isrc->isrc_dev, isrc);
582 * Interrupt source assign_cpu method for MI interrupt framework.
585 intr_isrc_assign_cpu(void *arg, int cpu)
588 struct intr_irqsrc *isrc = arg;
591 if (isrc->isrc_dev != intr_irq_root_dev)
594 mtx_lock(&isrc_table_lock);
596 CPU_ZERO(&isrc->isrc_cpu);
597 isrc->isrc_flags &= ~INTR_ISRCF_BOUND;
599 CPU_SETOF(cpu, &isrc->isrc_cpu);
600 isrc->isrc_flags |= INTR_ISRCF_BOUND;
604 * In NOCPU case, it's up to PIC to either leave ISRC on same CPU or
605 * re-balance it to another CPU or enable it on more CPUs. However,
606 * PIC is expected to change isrc_cpu appropriately to keep us well
607 * informed if the call is successful.
609 if (irq_assign_cpu) {
610 error = PIC_BIND_INTR(isrc->isrc_dev, isrc);
612 CPU_ZERO(&isrc->isrc_cpu);
613 mtx_unlock(&isrc_table_lock);
617 mtx_unlock(&isrc_table_lock);
625 * Create interrupt event for interrupt source.
628 isrc_event_create(struct intr_irqsrc *isrc)
630 struct intr_event *ie;
633 error = intr_event_create(&ie, isrc, 0, isrc->isrc_irq,
634 intr_isrc_pre_ithread, intr_isrc_post_ithread, intr_isrc_post_filter,
635 intr_isrc_assign_cpu, "%s:", isrc->isrc_name);
639 mtx_lock(&isrc_table_lock);
641 * Make sure that we do not mix the two ways
642 * how we handle interrupt sources. Let contested event wins.
645 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
647 if (isrc->isrc_event != NULL) {
649 mtx_unlock(&isrc_table_lock);
650 intr_event_destroy(ie);
651 return (isrc->isrc_event != NULL ? EBUSY : 0);
653 isrc->isrc_event = ie;
654 mtx_unlock(&isrc_table_lock);
660 * Destroy interrupt event for interrupt source.
663 isrc_event_destroy(struct intr_irqsrc *isrc)
665 struct intr_event *ie;
667 mtx_lock(&isrc_table_lock);
668 ie = isrc->isrc_event;
669 isrc->isrc_event = NULL;
670 mtx_unlock(&isrc_table_lock);
673 intr_event_destroy(ie);
677 * Add handler to interrupt source.
680 isrc_add_handler(struct intr_irqsrc *isrc, const char *name,
681 driver_filter_t filter, driver_intr_t handler, void *arg,
682 enum intr_type flags, void **cookiep)
686 if (isrc->isrc_event == NULL) {
687 error = isrc_event_create(isrc);
692 error = intr_event_add_handler(isrc->isrc_event, name, filter, handler,
693 arg, intr_priority(flags), flags, cookiep);
695 mtx_lock(&isrc_table_lock);
696 intrcnt_updatename(isrc);
697 mtx_unlock(&isrc_table_lock);
704 * Lookup interrupt controller locked.
706 static inline struct intr_pic *
707 pic_lookup_locked(device_t dev, intptr_t xref, int flags)
709 struct intr_pic *pic;
711 mtx_assert(&pic_list_lock, MA_OWNED);
713 if (dev == NULL && xref == 0)
716 /* Note that pic->pic_dev is never NULL on registered PIC. */
717 SLIST_FOREACH(pic, &pic_list, pic_next) {
718 if ((pic->pic_flags & FLAG_TYPE_MASK) !=
719 (flags & FLAG_TYPE_MASK))
723 if (xref == pic->pic_xref)
725 } else if (xref == 0 || pic->pic_xref == 0) {
726 if (dev == pic->pic_dev)
728 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
735 * Lookup interrupt controller.
737 static struct intr_pic *
738 pic_lookup(device_t dev, intptr_t xref, int flags)
740 struct intr_pic *pic;
742 mtx_lock(&pic_list_lock);
743 pic = pic_lookup_locked(dev, xref, flags);
744 mtx_unlock(&pic_list_lock);
749 * Create interrupt controller.
751 static struct intr_pic *
752 pic_create(device_t dev, intptr_t xref, int flags)
754 struct intr_pic *pic;
756 mtx_lock(&pic_list_lock);
757 pic = pic_lookup_locked(dev, xref, flags);
759 mtx_unlock(&pic_list_lock);
762 pic = malloc(sizeof(*pic), M_INTRNG, M_NOWAIT | M_ZERO);
764 mtx_unlock(&pic_list_lock);
767 pic->pic_xref = xref;
769 pic->pic_flags = flags;
770 mtx_init(&pic->pic_child_lock, "pic child lock", NULL, MTX_SPIN);
771 SLIST_INSERT_HEAD(&pic_list, pic, pic_next);
772 mtx_unlock(&pic_list_lock);
778 * Destroy interrupt controller.
781 pic_destroy(device_t dev, intptr_t xref, int flags)
783 struct intr_pic *pic;
785 mtx_lock(&pic_list_lock);
786 pic = pic_lookup_locked(dev, xref, flags);
788 mtx_unlock(&pic_list_lock);
791 SLIST_REMOVE(&pic_list, pic, intr_pic, pic_next);
792 mtx_unlock(&pic_list_lock);
798 * Register interrupt controller.
801 intr_pic_register(device_t dev, intptr_t xref)
803 struct intr_pic *pic;
807 pic = pic_create(dev, xref, FLAG_PIC);
811 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
812 device_get_nameunit(dev), dev, (uintmax_t)xref);
817 * Unregister interrupt controller.
820 intr_pic_deregister(device_t dev, intptr_t xref)
823 panic("%s: not implemented", __func__);
827 * Mark interrupt controller (itself) as a root one.
829 * Note that only an interrupt controller can really know its position
830 * in interrupt controller's tree. So root PIC must claim itself as a root.
832 * In FDT case, according to ePAPR approved version 1.1 from 08 April 2011,
834 * "The root of the interrupt tree is determined when traversal
835 * of the interrupt tree reaches an interrupt controller node without
836 * an interrupts property and thus no explicit interrupt parent."
839 intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
840 void *arg, u_int ipicount)
842 struct intr_pic *pic;
844 pic = pic_lookup(dev, xref, FLAG_PIC);
846 device_printf(dev, "not registered\n");
850 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
851 ("%s: Found a non-PIC controller: %s", __func__,
852 device_get_name(pic->pic_dev)));
854 if (filter == NULL) {
855 device_printf(dev, "filter missing\n");
860 * Only one interrupt controllers could be on the root for now.
861 * Note that we further suppose that there is not threaded interrupt
862 * routine (handler) on the root. See intr_irq_handler().
864 if (intr_irq_root_dev != NULL) {
865 device_printf(dev, "another root already set\n");
869 intr_irq_root_dev = dev;
870 irq_root_filter = filter;
872 irq_root_ipicount = ipicount;
874 debugf("irq root set to %s\n", device_get_nameunit(dev));
879 * Add a handler to manage a sub range of a parents interrupts.
882 intr_pic_add_handler(device_t parent, struct intr_pic *pic,
883 intr_child_irq_filter_t *filter, void *arg, uintptr_t start,
886 struct intr_pic *parent_pic;
887 struct intr_pic_child *newchild;
889 struct intr_pic_child *child;
892 /* Find the parent PIC */
893 parent_pic = pic_lookup(parent, 0, FLAG_PIC);
894 if (parent_pic == NULL)
897 newchild = malloc(sizeof(*newchild), M_INTRNG, M_WAITOK | M_ZERO);
898 newchild->pc_pic = pic;
899 newchild->pc_filter = filter;
900 newchild->pc_filter_arg = arg;
901 newchild->pc_start = start;
902 newchild->pc_length = length;
904 mtx_lock_spin(&parent_pic->pic_child_lock);
906 SLIST_FOREACH(child, &parent_pic->pic_children, pc_next) {
907 KASSERT(child->pc_pic != pic, ("%s: Adding a child PIC twice",
911 SLIST_INSERT_HEAD(&parent_pic->pic_children, newchild, pc_next);
912 mtx_unlock_spin(&parent_pic->pic_child_lock);
918 intr_resolve_irq(device_t dev, intptr_t xref, struct intr_map_data *data,
919 struct intr_irqsrc **isrc)
921 struct intr_pic *pic;
922 struct intr_map_data_msi *msi;
927 pic = pic_lookup(dev, xref,
928 (data->type == INTR_MAP_DATA_MSI) ? FLAG_MSI : FLAG_PIC);
932 switch (data->type) {
933 case INTR_MAP_DATA_MSI:
934 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
935 ("%s: Found a non-MSI controller: %s", __func__,
936 device_get_name(pic->pic_dev)));
937 msi = (struct intr_map_data_msi *)data;
942 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
943 ("%s: Found a non-PIC controller: %s", __func__,
944 device_get_name(pic->pic_dev)));
945 return (PIC_MAP_INTR(pic->pic_dev, data, isrc));
950 intr_activate_irq(device_t dev, struct resource *res)
954 struct intr_map_data *data;
955 struct intr_irqsrc *isrc;
959 KASSERT(rman_get_start(res) == rman_get_end(res),
960 ("%s: more interrupts in resource", __func__));
962 res_id = (u_int)rman_get_start(res);
963 if (intr_map_get_isrc(res_id) != NULL)
964 panic("Attempt to double activation of resource id: %u\n",
966 intr_map_copy_map_data(res_id, &map_dev, &map_xref, &data);
967 error = intr_resolve_irq(map_dev, map_xref, data, &isrc);
969 free(data, M_INTRNG);
970 /* XXX TODO DISCONECTED PICs */
971 /* if (error == EINVAL) return(0); */
974 intr_map_set_isrc(res_id, isrc);
975 rman_set_virtual(res, data);
976 return (PIC_ACTIVATE_INTR(isrc->isrc_dev, isrc, res, data));
980 intr_deactivate_irq(device_t dev, struct resource *res)
982 struct intr_map_data *data;
983 struct intr_irqsrc *isrc;
987 KASSERT(rman_get_start(res) == rman_get_end(res),
988 ("%s: more interrupts in resource", __func__));
990 res_id = (u_int)rman_get_start(res);
991 isrc = intr_map_get_isrc(res_id);
993 panic("Attempt to deactivate non-active resource id: %u\n",
996 data = rman_get_virtual(res);
997 error = PIC_DEACTIVATE_INTR(isrc->isrc_dev, isrc, res, data);
998 intr_map_set_isrc(res_id, NULL);
999 rman_set_virtual(res, NULL);
1000 free(data, M_INTRNG);
1005 intr_setup_irq(device_t dev, struct resource *res, driver_filter_t filt,
1006 driver_intr_t hand, void *arg, int flags, void **cookiep)
1009 struct intr_map_data *data;
1010 struct intr_irqsrc *isrc;
1014 KASSERT(rman_get_start(res) == rman_get_end(res),
1015 ("%s: more interrupts in resource", __func__));
1017 res_id = (u_int)rman_get_start(res);
1018 isrc = intr_map_get_isrc(res_id);
1020 /* XXX TODO DISCONECTED PICs */
1024 data = rman_get_virtual(res);
1025 name = device_get_nameunit(dev);
1029 * Standard handling is done through MI interrupt framework. However,
1030 * some interrupts could request solely own special handling. This
1031 * non standard handling can be used for interrupt controllers without
1032 * handler (filter only), so in case that interrupt controllers are
1033 * chained, MI interrupt framework is called only in leaf controller.
1035 * Note that root interrupt controller routine is served as well,
1036 * however in intr_irq_handler(), i.e. main system dispatch routine.
1038 if (flags & INTR_SOLO && hand != NULL) {
1039 debugf("irq %u cannot solo on %s\n", irq, name);
1043 if (flags & INTR_SOLO) {
1044 error = iscr_setup_filter(isrc, name, (intr_irq_filter_t *)filt,
1046 debugf("irq %u setup filter error %d on %s\n", isrc->isrc_irq, error,
1051 error = isrc_add_handler(isrc, name, filt, hand, arg, flags,
1053 debugf("irq %u add handler error %d on %s\n", isrc->isrc_irq, error, name);
1058 mtx_lock(&isrc_table_lock);
1059 error = PIC_SETUP_INTR(isrc->isrc_dev, isrc, res, data);
1061 isrc->isrc_handlers++;
1062 if (isrc->isrc_handlers == 1)
1063 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
1065 mtx_unlock(&isrc_table_lock);
1067 intr_event_remove_handler(*cookiep);
1072 intr_teardown_irq(device_t dev, struct resource *res, void *cookie)
1075 struct intr_map_data *data;
1076 struct intr_irqsrc *isrc;
1079 KASSERT(rman_get_start(res) == rman_get_end(res),
1080 ("%s: more interrupts in resource", __func__));
1082 res_id = (u_int)rman_get_start(res);
1083 isrc = intr_map_get_isrc(res_id);
1084 if (isrc == NULL || isrc->isrc_handlers == 0)
1087 data = rman_get_virtual(res);
1090 if (isrc->isrc_filter != NULL) {
1094 mtx_lock(&isrc_table_lock);
1095 isrc->isrc_filter = NULL;
1096 isrc->isrc_arg = NULL;
1097 isrc->isrc_handlers = 0;
1098 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1099 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1100 isrc_update_name(isrc, NULL);
1101 mtx_unlock(&isrc_table_lock);
1105 if (isrc != intr_handler_source(cookie))
1108 error = intr_event_remove_handler(cookie);
1110 mtx_lock(&isrc_table_lock);
1111 isrc->isrc_handlers--;
1112 if (isrc->isrc_handlers == 0)
1113 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1114 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1115 intrcnt_updatename(isrc);
1116 mtx_unlock(&isrc_table_lock);
1122 intr_describe_irq(device_t dev, struct resource *res, void *cookie,
1126 struct intr_irqsrc *isrc;
1129 KASSERT(rman_get_start(res) == rman_get_end(res),
1130 ("%s: more interrupts in resource", __func__));
1132 res_id = (u_int)rman_get_start(res);
1133 isrc = intr_map_get_isrc(res_id);
1134 if (isrc == NULL || isrc->isrc_handlers == 0)
1137 if (isrc->isrc_filter != NULL) {
1141 mtx_lock(&isrc_table_lock);
1142 isrc_update_name(isrc, descr);
1143 mtx_unlock(&isrc_table_lock);
1147 error = intr_event_describe_handler(isrc->isrc_event, cookie, descr);
1149 mtx_lock(&isrc_table_lock);
1150 intrcnt_updatename(isrc);
1151 mtx_unlock(&isrc_table_lock);
1158 intr_bind_irq(device_t dev, struct resource *res, int cpu)
1160 struct intr_irqsrc *isrc;
1163 KASSERT(rman_get_start(res) == rman_get_end(res),
1164 ("%s: more interrupts in resource", __func__));
1166 res_id = (u_int)rman_get_start(res);
1167 isrc = intr_map_get_isrc(res_id);
1168 if (isrc == NULL || isrc->isrc_handlers == 0)
1171 if (isrc->isrc_filter != NULL)
1172 return (intr_isrc_assign_cpu(isrc, cpu));
1174 return (intr_event_bind(isrc->isrc_event, cpu));
1178 * Return the CPU that the next interrupt source should use.
1179 * For now just returns the next CPU according to round-robin.
1182 intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
1186 KASSERT(!CPU_EMPTY(cpumask), ("%s: Empty CPU mask", __func__));
1187 if (!irq_assign_cpu || mp_ncpus == 1) {
1188 cpu = PCPU_GET(cpuid);
1190 if (CPU_ISSET(cpu, cpumask))
1193 return (CPU_FFS(cpumask) - 1);
1198 if (last_cpu > mp_maxid)
1200 } while (!CPU_ISSET(last_cpu, cpumask));
1204 #ifndef EARLY_AP_STARTUP
1206 * Distribute all the interrupt sources among the available
1207 * CPUs once the AP's have been launched.
1210 intr_irq_shuffle(void *arg __unused)
1212 struct intr_irqsrc *isrc;
1218 mtx_lock(&isrc_table_lock);
1219 irq_assign_cpu = true;
1220 for (i = 0; i < NIRQ; i++) {
1221 isrc = irq_sources[i];
1222 if (isrc == NULL || isrc->isrc_handlers == 0 ||
1223 isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI))
1226 if (isrc->isrc_event != NULL &&
1227 isrc->isrc_flags & INTR_ISRCF_BOUND &&
1228 isrc->isrc_event->ie_cpu != CPU_FFS(&isrc->isrc_cpu) - 1)
1229 panic("%s: CPU inconsistency", __func__);
1231 if ((isrc->isrc_flags & INTR_ISRCF_BOUND) == 0)
1232 CPU_ZERO(&isrc->isrc_cpu); /* start again */
1235 * We are in wicked position here if the following call fails
1236 * for bound ISRC. The best thing we can do is to clear
1237 * isrc_cpu so inconsistency with ie_cpu will be detectable.
1239 if (PIC_BIND_INTR(isrc->isrc_dev, isrc) != 0)
1240 CPU_ZERO(&isrc->isrc_cpu);
1242 mtx_unlock(&isrc_table_lock);
1244 SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
1245 #endif /* !EARLY_AP_STARTUP */
1249 intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
1252 return (PCPU_GET(cpuid));
1257 * Allocate memory for new intr_map_data structure.
1258 * Initialize common fields.
1260 struct intr_map_data *
1261 intr_alloc_map_data(enum intr_map_data_type type, size_t len, int flags)
1263 struct intr_map_data *data;
1265 data = malloc(len, M_INTRNG, flags);
1271 void intr_free_intr_map_data(struct intr_map_data *data)
1274 free(data, M_INTRNG);
1278 * Register a MSI/MSI-X interrupt controller
1281 intr_msi_register(device_t dev, intptr_t xref)
1283 struct intr_pic *pic;
1287 pic = pic_create(dev, xref, FLAG_MSI);
1291 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
1292 device_get_nameunit(dev), dev, (uintmax_t)xref);
1297 intr_alloc_msi(device_t pci, device_t child, intptr_t xref, int count,
1298 int maxcount, int *irqs)
1300 struct iommu_domain *domain;
1301 struct intr_irqsrc **isrc;
1302 struct intr_pic *pic;
1304 struct intr_map_data_msi *msi;
1307 pic = pic_lookup(NULL, xref, FLAG_MSI);
1311 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1312 ("%s: Found a non-MSI controller: %s", __func__,
1313 device_get_name(pic->pic_dev)));
1316 * If this is the first time we have used this context ask the
1317 * interrupt controller to map memory the msi source will need.
1319 err = MSI_IOMMU_INIT(pic->pic_dev, child, &domain);
1323 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1324 err = MSI_ALLOC_MSI(pic->pic_dev, child, count, maxcount, &pdev, isrc);
1326 free(isrc, M_INTRNG);
1330 for (i = 0; i < count; i++) {
1331 isrc[i]->isrc_iommu = domain;
1332 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1333 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1334 msi-> isrc = isrc[i];
1336 irqs[i] = intr_map_irq(pic->pic_dev, xref,
1337 (struct intr_map_data *)msi);
1339 free(isrc, M_INTRNG);
1345 intr_release_msi(device_t pci, device_t child, intptr_t xref, int count,
1348 struct intr_irqsrc **isrc;
1349 struct intr_pic *pic;
1350 struct intr_map_data_msi *msi;
1353 pic = pic_lookup(NULL, xref, FLAG_MSI);
1357 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1358 ("%s: Found a non-MSI controller: %s", __func__,
1359 device_get_name(pic->pic_dev)));
1361 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1363 for (i = 0; i < count; i++) {
1364 msi = (struct intr_map_data_msi *)
1365 intr_map_get_map_data(irqs[i]);
1366 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1367 ("%s: irq %d map data is not MSI", __func__,
1369 isrc[i] = msi->isrc;
1372 MSI_IOMMU_DEINIT(pic->pic_dev, child);
1374 err = MSI_RELEASE_MSI(pic->pic_dev, child, count, isrc);
1376 for (i = 0; i < count; i++) {
1377 if (isrc[i] != NULL)
1378 intr_unmap_irq(irqs[i]);
1381 free(isrc, M_INTRNG);
1386 intr_alloc_msix(device_t pci, device_t child, intptr_t xref, int *irq)
1388 struct iommu_domain *domain;
1389 struct intr_irqsrc *isrc;
1390 struct intr_pic *pic;
1392 struct intr_map_data_msi *msi;
1395 pic = pic_lookup(NULL, xref, FLAG_MSI);
1399 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1400 ("%s: Found a non-MSI controller: %s", __func__,
1401 device_get_name(pic->pic_dev)));
1404 * If this is the first time we have used this context ask the
1405 * interrupt controller to map memory the msi source will need.
1407 err = MSI_IOMMU_INIT(pic->pic_dev, child, &domain);
1411 err = MSI_ALLOC_MSIX(pic->pic_dev, child, &pdev, &isrc);
1415 isrc->isrc_iommu = domain;
1416 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1417 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1419 *irq = intr_map_irq(pic->pic_dev, xref, (struct intr_map_data *)msi);
1424 intr_release_msix(device_t pci, device_t child, intptr_t xref, int irq)
1426 struct intr_irqsrc *isrc;
1427 struct intr_pic *pic;
1428 struct intr_map_data_msi *msi;
1431 pic = pic_lookup(NULL, xref, FLAG_MSI);
1435 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1436 ("%s: Found a non-MSI controller: %s", __func__,
1437 device_get_name(pic->pic_dev)));
1439 msi = (struct intr_map_data_msi *)
1440 intr_map_get_map_data(irq);
1441 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1442 ("%s: irq %d map data is not MSI", __func__,
1446 intr_unmap_irq(irq);
1450 MSI_IOMMU_DEINIT(pic->pic_dev, child);
1452 err = MSI_RELEASE_MSIX(pic->pic_dev, child, isrc);
1453 intr_unmap_irq(irq);
1459 intr_map_msi(device_t pci, device_t child, intptr_t xref, int irq,
1460 uint64_t *addr, uint32_t *data)
1462 struct intr_irqsrc *isrc;
1463 struct intr_pic *pic;
1466 pic = pic_lookup(NULL, xref, FLAG_MSI);
1470 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1471 ("%s: Found a non-MSI controller: %s", __func__,
1472 device_get_name(pic->pic_dev)));
1474 isrc = intr_map_get_isrc(irq);
1478 err = MSI_MAP_MSI(pic->pic_dev, child, isrc, addr, data);
1481 if (isrc->isrc_iommu != NULL)
1482 iommu_translate_msi(isrc->isrc_iommu, addr);
1488 void dosoftints(void);
1496 * Init interrupt controller on another CPU.
1499 intr_pic_init_secondary(void)
1503 * QQQ: Only root PIC is aware of other CPUs ???
1505 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
1507 //mtx_lock(&isrc_table_lock);
1508 PIC_INIT_SECONDARY(intr_irq_root_dev);
1509 //mtx_unlock(&isrc_table_lock);
1514 DB_SHOW_COMMAND(irqs, db_show_irqs)
1518 struct intr_irqsrc *isrc;
1520 for (irqsum = 0, i = 0; i < NIRQ; i++) {
1521 isrc = irq_sources[i];
1525 num = isrc->isrc_count != NULL ? isrc->isrc_count[0] : 0;
1526 db_printf("irq%-3u <%s>: cpu %02lx%s cnt %lu\n", i,
1527 isrc->isrc_name, isrc->isrc_cpu.__bits[0],
1528 isrc->isrc_flags & INTR_ISRCF_BOUND ? " (bound)" : "", num);
1531 db_printf("irq total %u\n", irqsum);
1536 * Interrupt mapping table functions.
1538 * Please, keep this part separately, it can be transformed to
1539 * extension of standard resources.
1541 struct intr_map_entry
1545 struct intr_map_data *map_data;
1546 struct intr_irqsrc *isrc;
1547 /* XXX TODO DISCONECTED PICs */
1551 /* XXX Convert irq_map[] to dynamicaly expandable one. */
1552 static struct intr_map_entry *irq_map[2 * NIRQ];
1553 static int irq_map_count = nitems(irq_map);
1554 static int irq_map_first_free_idx;
1555 static struct mtx irq_map_lock;
1557 static struct intr_irqsrc *
1558 intr_map_get_isrc(u_int res_id)
1560 struct intr_irqsrc *isrc;
1563 mtx_lock(&irq_map_lock);
1564 if (res_id < irq_map_count && irq_map[res_id] != NULL)
1565 isrc = irq_map[res_id]->isrc;
1566 mtx_unlock(&irq_map_lock);
1572 intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc)
1575 mtx_lock(&irq_map_lock);
1576 if (res_id < irq_map_count && irq_map[res_id] != NULL)
1577 irq_map[res_id]->isrc = isrc;
1578 mtx_unlock(&irq_map_lock);
1582 * Get a copy of intr_map_entry data
1584 static struct intr_map_data *
1585 intr_map_get_map_data(u_int res_id)
1587 struct intr_map_data *data;
1590 mtx_lock(&irq_map_lock);
1591 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1592 panic("Attempt to copy invalid resource id: %u\n", res_id);
1593 data = irq_map[res_id]->map_data;
1594 mtx_unlock(&irq_map_lock);
1600 * Get a copy of intr_map_entry data
1603 intr_map_copy_map_data(u_int res_id, device_t *map_dev, intptr_t *map_xref,
1604 struct intr_map_data **data)
1609 mtx_lock(&irq_map_lock);
1610 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1611 panic("Attempt to copy invalid resource id: %u\n", res_id);
1612 if (irq_map[res_id]->map_data != NULL)
1613 len = irq_map[res_id]->map_data->len;
1614 mtx_unlock(&irq_map_lock);
1619 *data = malloc(len, M_INTRNG, M_WAITOK | M_ZERO);
1620 mtx_lock(&irq_map_lock);
1621 if (irq_map[res_id] == NULL)
1622 panic("Attempt to copy invalid resource id: %u\n", res_id);
1624 if (len != irq_map[res_id]->map_data->len)
1625 panic("Resource id: %u has changed.\n", res_id);
1626 memcpy(*data, irq_map[res_id]->map_data, len);
1628 *map_dev = irq_map[res_id]->dev;
1629 *map_xref = irq_map[res_id]->xref;
1630 mtx_unlock(&irq_map_lock);
1634 * Allocate and fill new entry in irq_map table.
1637 intr_map_irq(device_t dev, intptr_t xref, struct intr_map_data *data)
1640 struct intr_map_entry *entry;
1642 /* Prepare new entry first. */
1643 entry = malloc(sizeof(*entry), M_INTRNG, M_WAITOK | M_ZERO);
1647 entry->map_data = data;
1650 mtx_lock(&irq_map_lock);
1651 for (i = irq_map_first_free_idx; i < irq_map_count; i++) {
1652 if (irq_map[i] == NULL) {
1654 irq_map_first_free_idx = i + 1;
1655 mtx_unlock(&irq_map_lock);
1659 mtx_unlock(&irq_map_lock);
1661 /* XXX Expand irq_map table */
1662 panic("IRQ mapping table is full.");
1666 * Remove and free mapping entry.
1669 intr_unmap_irq(u_int res_id)
1671 struct intr_map_entry *entry;
1673 mtx_lock(&irq_map_lock);
1674 if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL))
1675 panic("Attempt to unmap invalid resource id: %u\n", res_id);
1676 entry = irq_map[res_id];
1677 irq_map[res_id] = NULL;
1678 irq_map_first_free_idx = res_id;
1679 mtx_unlock(&irq_map_lock);
1680 intr_free_intr_map_data(entry->map_data);
1681 free(entry, M_INTRNG);
1685 * Clone mapping entry.
1688 intr_map_clone_irq(u_int old_res_id)
1692 struct intr_map_data *data;
1694 intr_map_copy_map_data(old_res_id, &map_dev, &map_xref, &data);
1695 return (intr_map_irq(map_dev, map_xref, data));
1699 intr_map_init(void *dummy __unused)
1702 mtx_init(&irq_map_lock, "intr map table", NULL, MTX_DEF);
1704 SYSINIT(intr_map_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_map_init, NULL);